UART simulation

tests/test_emulator_sci_timing.py

@@ -12,6 +12,7 @@ from h8536.emulator import (
     SCI_SSR_RDRF,
     SCI_SSR_TDRE,
     SCI1,
+    UartTiming,
 )
 
 
@@ -66,6 +67,22 @@ class SciTimingTest(unittest.TestCase):
         self.assertEqual(sci.tx_frames, [HEARTBEAT_FRAME])
         self.assertTrue(sci.saw_heartbeat())
 
+    def test_inject_rx_sets_overrun_if_rdrf_is_still_full(self):
+        sci = SCI1()
+
+        sci.inject_rx(0x11)
+        sci.inject_rx(0x22)
+
+        self.assertEqual(sci.read(SCI1_SSR) & (SCI_SSR_RDRF | SCI_SSR_ORER), SCI_SSR_RDRF | SCI_SSR_ORER)
+        self.assertEqual(sci.rdr, 0x11)
+
+    def test_uart_8n1_38400_byte_timing(self):
+        timing = UartTiming(baud=38_400)
+
+        self.assertEqual(timing.bits_per_character, 10)
+        self.assertAlmostEqual(timing.micros_per_character(), 260.416666, places=3)
+        self.assertEqual(timing.cycles_per_character(10_000_000), 2604)
+
 
 if __name__ == "__main__":
     unittest.main()