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timing adjustments

This commit is contained in:
Aiden
2026-05-25 22:17:36 +10:00
parent 6d4d9f0027
commit 4b50d0e98f
11 changed files with 313 additions and 40 deletions

View File

@@ -18,8 +18,16 @@ WDT_TCSR_R = 0xFEEC
FRT1_TCR = 0xFE90
FRT1_TCSR = 0xFE91
FRT1_FRC_H = 0xFE92
FRT1_FRC_L = 0xFE93
FRT1_OCRA_H = 0xFE94
FRT1_OCRA_L = 0xFE95
FRT2_TCR = 0xFEA0
FRT2_TCSR = 0xFEA1
FRT2_FRC_H = 0xFEA2
FRT2_FRC_L = 0xFEA3
FRT2_OCRA_H = 0xFEA4
FRT2_OCRA_L = 0xFEA5
SCI_SCR_TIE = 0x80
SCI_SCR_RIE = 0x40
@@ -32,6 +40,7 @@ SCI_SSR_FER = 0x10
SCI_SSR_PER = 0x08
FRT_TCR_OCIEA = 0x20
FRT_TCSR_OCFA = 0x20
FRT_TCSR_CCLRA = 0x01
ON_CHIP_RAM_START = 0xF680
ON_CHIP_RAM_END = 0xFE7F