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LCD emulation

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Aiden
2026-05-25 21:33:19 +10:00
parent e141f3b30d
commit 191b72d418
7 changed files with 113 additions and 11 deletions
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15
h8536/emulator/memory.py
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@@ -20,7 +20,7 @@ from .constants import (
SCI1_SSR,
SCI1_TDR,
)
from .peripherals.lcd import LCD_E_CLOCK_DATA, LCD_E_CLOCK_STATUS
from .peripherals.lcd import LCD, LCD_E_CLOCK_DATA, LCD_E_CLOCK_STATUS
from .peripherals.p9_bus import P9Bus
from .sci import SCI1
@@ -38,6 +38,7 @@ class MemoryMap:
def __init__(self, rom_bytes: bytes, sci1: SCI1 | None = None) -> None:
self.rom = Rom(rom_bytes, base=0)
self.sci1 = sci1 if sci1 is not None else SCI1()
self.lcd = LCD()
self.p9_bus = P9Bus()
self.ram = bytearray(ON_CHIP_RAM_END - ON_CHIP_RAM_START + 1)
self.registers = bytearray(REGISTER_FIELD_END - REGISTER_FIELD_START + 1)
@@ -60,11 +61,9 @@ class MemoryMap:
value = self.sci1.read(address)
self._set_register(address, value)
elif address == LCD_E_CLOCK_STATUS:
# LCD E-clock/status space. Default to ready/zero so boot can pass
# busy-flag polling until a fuller external bus model exists.
value = 0x00
value = self.lcd.read_status()
elif address == LCD_E_CLOCK_DATA:
value = self.external.get(address, 0x00)
value = self.lcd.read_data()
elif address in self.external:
value = self.external[address]
elif ON_CHIP_RAM_START <= address <= ON_CHIP_RAM_END:
@@ -94,6 +93,12 @@ class MemoryMap:
if address in (SCI1_SMR, SCI1_BRR, SCI1_SCR, SCI1_TDR, SCI1_SSR, SCI1_RDR):
self.sci1.write(address, value)
self._set_register(address, self.sci1.read(address))
elif address == LCD_E_CLOCK_STATUS:
self.lcd.write_command(value)
self.external[address] = value
elif address == LCD_E_CLOCK_DATA:
self.lcd.write_data(value)
self.external[address] = value
elif ON_CHIP_RAM_START <= address <= ON_CHIP_RAM_END:
self.ram[address - ON_CHIP_RAM_START] = value
elif address == P9DDR: