16353 lines
391 KiB
JSON
16353 lines
391 KiB
JSON
{
|
|
"vectors": [
|
|
{
|
|
"address": 0,
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|
"name": "reset",
|
|
"target": 4096,
|
|
"target_label": "vec_reset_1000"
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|
},
|
|
{
|
|
"address": 4,
|
|
"name": "invalid_instruction",
|
|
"target": 4096,
|
|
"target_label": "vec_reset_1000"
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|
},
|
|
{
|
|
"address": 6,
|
|
"name": "zero_divide",
|
|
"target": 4096,
|
|
"target_label": "vec_reset_1000"
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|
},
|
|
{
|
|
"address": 8,
|
|
"name": "trap_vs",
|
|
"target": 4096,
|
|
"target_label": "vec_reset_1000"
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|
},
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|
{
|
|
"address": 16,
|
|
"name": "address_error",
|
|
"target": 4096,
|
|
"target_label": "vec_reset_1000"
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|
},
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|
{
|
|
"address": 18,
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|
"name": "trace",
|
|
"target": 4096,
|
|
"target_label": "vec_reset_1000"
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|
},
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|
{
|
|
"address": 22,
|
|
"name": "nmi",
|
|
"target": 17299,
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|
"target_label": "vec_nmi_4393"
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|
},
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|
{
|
|
"address": 32,
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|
"name": "trapa_0",
|
|
"target": 4096,
|
|
"target_label": "vec_reset_1000"
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|
},
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|
{
|
|
"address": 34,
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|
"name": "trapa_1",
|
|
"target": 4096,
|
|
"target_label": "vec_reset_1000"
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|
},
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|
{
|
|
"address": 36,
|
|
"name": "trapa_2",
|
|
"target": 4096,
|
|
"target_label": "vec_reset_1000"
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|
},
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|
{
|
|
"address": 38,
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|
"name": "trapa_3",
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|
"target": 4096,
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|
"target_label": "vec_reset_1000"
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|
},
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|
{
|
|
"address": 40,
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|
"name": "trapa_4",
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|
"target": 4096,
|
|
"target_label": "vec_reset_1000"
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|
},
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|
{
|
|
"address": 42,
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|
"name": "trapa_5",
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|
"target": 4096,
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|
"target_label": "vec_reset_1000"
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|
},
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|
{
|
|
"address": 44,
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|
"name": "trapa_6",
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|
"target": 4096,
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|
"target_label": "vec_reset_1000"
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|
},
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|
{
|
|
"address": 46,
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|
"name": "trapa_7",
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|
"target": 4096,
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|
"target_label": "vec_reset_1000"
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},
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|
{
|
|
"address": 48,
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|
"name": "trapa_8",
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|
"target": 4096,
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|
"target_label": "vec_reset_1000"
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},
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|
{
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|
"address": 50,
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|
"name": "trapa_9",
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|
"target": 4096,
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"target_label": "vec_reset_1000"
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},
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|
{
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|
"address": 52,
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|
"name": "trapa_a",
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|
"target": 4096,
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|
"target_label": "vec_reset_1000"
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},
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{
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"address": 54,
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|
"name": "trapa_b",
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"target": 4096,
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|
"target_label": "vec_reset_1000"
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},
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|
{
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|
"address": 56,
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|
"name": "trapa_c",
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|
"target": 4096,
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|
"target_label": "vec_reset_1000"
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},
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|
{
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|
"address": 58,
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|
"name": "trapa_d",
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"target": 4096,
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"target_label": "vec_reset_1000"
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},
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{
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"address": 60,
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"name": "trapa_e",
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"target": 4096,
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"target_label": "vec_reset_1000"
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},
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|
{
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"address": 62,
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|
"name": "trapa_f",
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|
"target": 4096,
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|
"target_label": "vec_reset_1000"
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},
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{
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"address": 64,
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"name": "irq0",
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"target": 4096,
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"target_label": "vec_reset_1000"
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},
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{
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"address": 66,
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"name": "interval_timer",
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"target": 49092,
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"target_label": "vec_interval_timer_BFC4"
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},
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{
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"address": 72,
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"name": "irq1",
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"target": 4096,
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"target_label": "vec_reset_1000"
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},
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{
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"address": 80,
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"name": "irq2",
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"target": 4096,
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"target_label": "vec_reset_1000"
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},
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{
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"address": 82,
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"name": "irq3",
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"target": 15408,
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"target_label": "vec_irq3_3C30"
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},
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{
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"address": 88,
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"name": "irq4",
|
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"target": 15047,
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"target_label": "vec_irq4_3AC7"
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},
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{
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"address": 90,
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"name": "irq5",
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"target": 4096,
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"target_label": "vec_reset_1000"
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},
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|
{
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"address": 98,
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"name": "frt1_ocia",
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"target": 48874,
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"target_label": "vec_frt1_ocia_BEEA"
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},
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{
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"address": 106,
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"name": "frt2_ocia",
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"target": 48931,
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"target_label": "vec_frt2_ocia_BF23"
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},
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{
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"address": 128,
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"name": "sci1_eri",
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"target": 47959,
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"target_label": "vec_sci1_eri_BB57"
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},
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{
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"address": 130,
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"name": "sci1_rxi",
|
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"target": 47975,
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"target_label": "vec_sci1_rxi_BB67"
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},
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{
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"address": 132,
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"name": "sci1_txi",
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"target": 47748,
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"target_label": "vec_sci1_txi_BA84"
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},
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{
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"address": 144,
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"name": "ad_adi",
|
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"target": 15769,
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"target_label": "vec_ad_adi_3D99"
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}
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],
|
|
"dtc_vectors": [],
|
|
"memory_regions": [
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{
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|
"name": "exception_vectors",
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"start": 0,
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|
"end": 159,
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"kind": "vectors",
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|
"manual": "section 2 address space"
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},
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|
{
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|
"name": "dtc_vectors",
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"start": 160,
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|
"end": 255,
|
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"kind": "dtc_vectors",
|
|
"manual": "section 2 address space"
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|
},
|
|
{
|
|
"name": "program_or_external",
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|
"start": 256,
|
|
"end": 63103,
|
|
"kind": "program",
|
|
"manual": "section 2/17 mode-dependent ROM or external space"
|
|
},
|
|
{
|
|
"name": "on_chip_ram",
|
|
"start": 63104,
|
|
"end": 65151,
|
|
"kind": "ram",
|
|
"manual": "section 16 RAM"
|
|
},
|
|
{
|
|
"name": "register_field",
|
|
"start": 65152,
|
|
"end": 65535,
|
|
"kind": "registers",
|
|
"manual": "appendix B register map"
|
|
}
|
|
],
|
|
"data_candidates": {
|
|
"strings": [],
|
|
"pointer_tables": []
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|
},
|
|
"call_graph": {
|
|
"nodes": [
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{
|
|
"start": 9779,
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|
"label": "loc_2633",
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|
"sources": [],
|
|
"instruction_count": 10,
|
|
"end": 9807,
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|
"calls": [
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15956
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|
],
|
|
"unresolved_calls": 0
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|
}
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|
],
|
|
"edges": [
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|
{
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|
"from": 9779,
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|
"from_label": "loc_2633",
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|
"to": 15956,
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|
"to_label": "loc_3E54",
|
|
"call_site": 9804
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}
|
|
]
|
|
},
|
|
"timing_summary": {
|
|
"blocks": [],
|
|
"loops": []
|
|
},
|
|
"sci": {
|
|
"clock_hz": null,
|
|
"formulas": {
|
|
"async": "B = clock_hz / (64 * 2^(2n) * (N + 1))",
|
|
"sync": "B = clock_hz / (8 * 2^(2n) * (N + 1))"
|
|
},
|
|
"manual_references": [
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"Manual/0900766b802125d0.md:15837 SMR selects SCI mode and CKS1/CKS0 internal clock source",
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"Manual/0900766b802125d0.md:16027 SCR.CKE1 selects internal or external clock source",
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|
"Manual/0900766b802125d0.md:16177 BRR and SMR.CKS determine the baud-rate generator",
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"Manual/0900766b802125d0.md:16303 asynchronous BRR formula",
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"Manual/0900766b802125d0.md:16379 synchronous BRR formula",
|
|
"Manual/0900766b802125d0.md:16410 SCI clock source selection tables"
|
|
],
|
|
"channels": {
|
|
"SCI1": {
|
|
"writes": [],
|
|
"configurations": []
|
|
},
|
|
"SCI2": {
|
|
"writes": [],
|
|
"configurations": []
|
|
}
|
|
}
|
|
},
|
|
"sci_protocol": {
|
|
"manual_references": [
|
|
"Manual/0900766b802125d0.md:15748 SCI register map for RDR/TDR/SCR/SSR",
|
|
"Manual/0900766b802125d0.md:15794 RDR stores received data and is CPU-readable",
|
|
"Manual/0900766b802125d0.md:15823 TDR holds the next byte to transmit",
|
|
"Manual/0900766b802125d0.md:15976 SCR.TIE enables/disables TXI on TDRE",
|
|
"Manual/0900766b802125d0.md:15993 SCR.RIE enables RXI and ERI",
|
|
"Manual/0900766b802125d0.md:16008 SCR.TE enables the transmitter",
|
|
"Manual/0900766b802125d0.md:16028 SCR.RE enables the receiver",
|
|
"Manual/0900766b802125d0.md:16090 SSR flags are cleared by writing zero",
|
|
"Manual/0900766b802125d0.md:16100 SSR.TDRE means TDR can accept the next byte",
|
|
"Manual/0900766b802125d0.md:16116 SSR.RDRF means received data reached RDR",
|
|
"Manual/0900766b802125d0.md:16127 SSR.ORER reports receive overrun",
|
|
"Manual/0900766b802125d0.md:16140 SSR.FER reports framing errors",
|
|
"Manual/0900766b802125d0.md:16147 SSR.PER reports parity errors"
|
|
],
|
|
"channels": {
|
|
"SCI1": {
|
|
"events": []
|
|
},
|
|
"SCI2": {
|
|
"events": []
|
|
}
|
|
},
|
|
"events": []
|
|
},
|
|
"serial_reconstruction": {
|
|
"kind": "serial_reconstruction",
|
|
"candidates": [],
|
|
"ram_roles": [],
|
|
"evidence": [],
|
|
"required_evidence": {
|
|
"tx": [
|
|
"tx_buffer_region",
|
|
"tx_checksum_seed",
|
|
"checksum_byte",
|
|
"xor_checksum_chain",
|
|
"initial_send_from_buffer_start",
|
|
"tx_index_initialized_to_one",
|
|
"tx_isr_indexed_send",
|
|
"tx_index_increment",
|
|
"tx_index_compare_frame_length"
|
|
],
|
|
"rx": [
|
|
"rx_rdr_read",
|
|
"rx_indexed_store",
|
|
"rx_index_increment_store",
|
|
"rx_isr_compare_frame_length",
|
|
"rx_complete_timer",
|
|
"rx_processor_requires_six_bytes",
|
|
"rx_copy_capture_to_frame_buffer",
|
|
"rx_checksum_seed",
|
|
"rx_xor_checksum_validation"
|
|
]
|
|
}
|
|
},
|
|
"board_profile": {
|
|
"board": "sony_rcp_tx7",
|
|
"name": "Sony RCP-TX7",
|
|
"summary": "Board trace ties the H8/536 SCI1 pins to a MAX202 RS232 transceiver.",
|
|
"manual_references": [
|
|
"Manual/0900766b802125d0.md:2417 FP-80 H8/536 pin 66 is P95/TXD",
|
|
"Manual/0900766b802125d0.md:2418 FP-80 H8/536 pin 67 is P96/RXD",
|
|
"Manual/0900766b802125d0.md:11192 Port 9 carries SCI1 and SCI2 serial signals",
|
|
"Manual/0900766b802125d0.md:11201 P96 is RXD1 input",
|
|
"Manual/0900766b802125d0.md:11202 P95 is TXD1 output",
|
|
"Manual/0900766b802125d0.md:15725 SCI1 RXD input pin",
|
|
"Manual/0900766b802125d0.md:15726 SCI1 TXD output pin",
|
|
"Manual/0900766b802125d0.md:15750 SCI register table starts with SCI1 RDR/TDR/SMR/SCR/SSR/BRR",
|
|
"Manual/0900766b802125d0.md:15758 SCI register table lists SCI2 RDR/TDR/SMR/SCR/SSR/BRR",
|
|
"Manual/0900766b802125d0.md:15794 RDR receive data register",
|
|
"Manual/0900766b802125d0.md:15823 TDR transmit data register",
|
|
"Manual/0900766b802125d0.md:15969 SCR enables and disables SCI functions",
|
|
"Manual/0900766b802125d0.md:16009 SCR.TE makes the TXD pin output",
|
|
"Manual/0900766b802125d0.md:16029 SCR.RE makes the RXD pin input",
|
|
"Manual/0900766b802125d0.md:16090 SSR contains transmit/receive status flags",
|
|
"Manual/0900766b802125d0.md:10560 SYSCR2 controls port 9 pin functions",
|
|
"Manual/0900766b802125d0.md:10631 SYSCR2.P9SCI2E controls the SCI2 functions of P92-P94"
|
|
],
|
|
"traces": [
|
|
{
|
|
"channel": "SCI1",
|
|
"signal": "TXD",
|
|
"h8_pin": 66,
|
|
"h8_pin_name": "P95/TXD",
|
|
"h8_function": "TXD1",
|
|
"max202_pin": 11,
|
|
"evidence": "MAX202 pin 11 traces to H8 pin 66"
|
|
},
|
|
{
|
|
"channel": "SCI1",
|
|
"signal": "RXD",
|
|
"h8_pin": 67,
|
|
"h8_pin_name": "P96/RXD",
|
|
"h8_function": "RXD1",
|
|
"max202_pin": 12,
|
|
"evidence": "MAX202 pin 12 traces to H8 pin 67"
|
|
}
|
|
],
|
|
"channels": {
|
|
"SCI1": {
|
|
"traced_to_max202": true,
|
|
"path": "RS232/MAX202",
|
|
"pins": [
|
|
{
|
|
"channel": "SCI1",
|
|
"signal": "TXD",
|
|
"h8_pin": 66,
|
|
"h8_pin_name": "P95/TXD",
|
|
"h8_function": "TXD1",
|
|
"max202_pin": 11,
|
|
"evidence": "MAX202 pin 11 traces to H8 pin 66"
|
|
},
|
|
{
|
|
"channel": "SCI1",
|
|
"signal": "RXD",
|
|
"h8_pin": 67,
|
|
"h8_pin_name": "P96/RXD",
|
|
"h8_function": "RXD1",
|
|
"max202_pin": 12,
|
|
"evidence": "MAX202 pin 12 traces to H8 pin 67"
|
|
}
|
|
],
|
|
"scr": {
|
|
"value": 12,
|
|
"value_hex": "H'0C",
|
|
"tie": false,
|
|
"rie": false,
|
|
"tx_enabled": false,
|
|
"rx_enabled": false
|
|
},
|
|
"accesses": []
|
|
},
|
|
"SCI2": {
|
|
"traced_to_max202": false,
|
|
"path": null,
|
|
"note": "Sony RCP-TX7 MAX202 board traces are on SCI1 P95/P96, not SCI2 P92/P93.",
|
|
"p9sci2e": false,
|
|
"scr": {
|
|
"value": 12,
|
|
"value_hex": "H'0C",
|
|
"tie": false,
|
|
"rie": false,
|
|
"tx_enabled": false,
|
|
"rx_enabled": false
|
|
},
|
|
"accesses": []
|
|
}
|
|
},
|
|
"instructions": {},
|
|
"state": {
|
|
"SYSCR2": {
|
|
"value": 128,
|
|
"value_hex": "H'80"
|
|
},
|
|
"P9SCI2E": false
|
|
}
|
|
},
|
|
"peripheral_access": {
|
|
"manual_references": [
|
|
"Manual/0900766b802125d0.md:12185 FRT FRC/OCRA/OCRB/ICR use TEMP for 16-bit CPU access",
|
|
"Manual/0900766b802125d0.md:12193 FRT byte access order is upper byte then lower byte",
|
|
"Manual/0900766b802125d0.md:12212 OCRA/OCRB reads are direct; writes still use TEMP",
|
|
"Manual/0900766b802125d0.md:17546 A/D ADDRA-ADDRD lower byte is accessed through TEMP",
|
|
"Manual/0900766b802125d0.md:17556 A/D full-result byte reads must be upper byte then lower byte"
|
|
],
|
|
"warnings": []
|
|
},
|
|
"indirect_flow": {
|
|
"sites": []
|
|
},
|
|
"dataflow": {
|
|
"blocks": [
|
|
{
|
|
"start": 9104,
|
|
"instructions": [
|
|
9104,
|
|
9108
|
|
],
|
|
"end": 9108,
|
|
"end_exclusive": 9111
|
|
},
|
|
{
|
|
"start": 9111,
|
|
"instructions": [
|
|
9111,
|
|
9116
|
|
],
|
|
"end": 9116,
|
|
"end_exclusive": 9119
|
|
},
|
|
{
|
|
"start": 9119,
|
|
"instructions": [
|
|
9119,
|
|
9123
|
|
],
|
|
"end": 9123,
|
|
"end_exclusive": 9125
|
|
},
|
|
{
|
|
"start": 9125,
|
|
"instructions": [
|
|
9125,
|
|
9128
|
|
],
|
|
"end": 9128,
|
|
"end_exclusive": 9130
|
|
},
|
|
{
|
|
"start": 9130,
|
|
"instructions": [
|
|
9130,
|
|
9134
|
|
],
|
|
"end": 9134,
|
|
"end_exclusive": 9137
|
|
},
|
|
{
|
|
"start": 9137,
|
|
"instructions": [
|
|
9137,
|
|
9141
|
|
],
|
|
"end": 9141,
|
|
"end_exclusive": 9143
|
|
},
|
|
{
|
|
"start": 9143,
|
|
"instructions": [
|
|
9143
|
|
],
|
|
"end": 9143,
|
|
"end_exclusive": 9147
|
|
},
|
|
{
|
|
"start": 9147,
|
|
"instructions": [
|
|
9147
|
|
],
|
|
"end": 9147,
|
|
"end_exclusive": 9149
|
|
},
|
|
{
|
|
"start": 9149,
|
|
"instructions": [
|
|
9149,
|
|
9151
|
|
],
|
|
"end": 9151,
|
|
"end_exclusive": 9153
|
|
},
|
|
{
|
|
"start": 9153,
|
|
"instructions": [
|
|
9153,
|
|
9157,
|
|
9161
|
|
],
|
|
"end": 9161,
|
|
"end_exclusive": 9163
|
|
},
|
|
{
|
|
"start": 9163,
|
|
"instructions": [
|
|
9163,
|
|
9167,
|
|
9169,
|
|
9172,
|
|
9176
|
|
],
|
|
"end": 9176,
|
|
"end_exclusive": 9178
|
|
},
|
|
{
|
|
"start": 9178,
|
|
"instructions": [
|
|
9178,
|
|
9182
|
|
],
|
|
"end": 9182,
|
|
"end_exclusive": 9184
|
|
},
|
|
{
|
|
"start": 9184,
|
|
"instructions": [
|
|
9184
|
|
],
|
|
"end": 9184,
|
|
"end_exclusive": 9186
|
|
},
|
|
{
|
|
"start": 9186,
|
|
"instructions": [
|
|
9186,
|
|
9189
|
|
],
|
|
"end": 9189,
|
|
"end_exclusive": 9191
|
|
},
|
|
{
|
|
"start": 9191,
|
|
"instructions": [
|
|
9191,
|
|
9194
|
|
],
|
|
"end": 9194,
|
|
"end_exclusive": 9196
|
|
},
|
|
{
|
|
"start": 9196,
|
|
"instructions": [
|
|
9196,
|
|
9200,
|
|
9203,
|
|
9206,
|
|
9210
|
|
],
|
|
"end": 9210,
|
|
"end_exclusive": 9212
|
|
},
|
|
{
|
|
"start": 9212,
|
|
"instructions": [
|
|
9212,
|
|
9216
|
|
],
|
|
"end": 9216,
|
|
"end_exclusive": 9218
|
|
},
|
|
{
|
|
"start": 9218,
|
|
"instructions": [
|
|
9218
|
|
],
|
|
"end": 9218,
|
|
"end_exclusive": 9220
|
|
},
|
|
{
|
|
"start": 9220,
|
|
"instructions": [
|
|
9220
|
|
],
|
|
"end": 9220,
|
|
"end_exclusive": 9223
|
|
},
|
|
{
|
|
"start": 9223,
|
|
"instructions": [
|
|
9223
|
|
],
|
|
"end": 9223,
|
|
"end_exclusive": 9224
|
|
},
|
|
{
|
|
"start": 9224,
|
|
"instructions": [
|
|
9224,
|
|
9228
|
|
],
|
|
"end": 9228,
|
|
"end_exclusive": 9231
|
|
},
|
|
{
|
|
"start": 9231,
|
|
"instructions": [
|
|
9231,
|
|
9236
|
|
],
|
|
"end": 9236,
|
|
"end_exclusive": 9239
|
|
},
|
|
{
|
|
"start": 9239,
|
|
"instructions": [
|
|
9239,
|
|
9243
|
|
],
|
|
"end": 9243,
|
|
"end_exclusive": 9245
|
|
},
|
|
{
|
|
"start": 9245,
|
|
"instructions": [
|
|
9245,
|
|
9248
|
|
],
|
|
"end": 9248,
|
|
"end_exclusive": 9250
|
|
},
|
|
{
|
|
"start": 9250,
|
|
"instructions": [
|
|
9250,
|
|
9254
|
|
],
|
|
"end": 9254,
|
|
"end_exclusive": 9256
|
|
},
|
|
{
|
|
"start": 9256,
|
|
"instructions": [
|
|
9256,
|
|
9260
|
|
],
|
|
"end": 9260,
|
|
"end_exclusive": 9262
|
|
},
|
|
{
|
|
"start": 9262,
|
|
"instructions": [
|
|
9262
|
|
],
|
|
"end": 9262,
|
|
"end_exclusive": 9266
|
|
},
|
|
{
|
|
"start": 9266,
|
|
"instructions": [
|
|
9266
|
|
],
|
|
"end": 9266,
|
|
"end_exclusive": 9268
|
|
},
|
|
{
|
|
"start": 9268,
|
|
"instructions": [
|
|
9268,
|
|
9270
|
|
],
|
|
"end": 9270,
|
|
"end_exclusive": 9272
|
|
},
|
|
{
|
|
"start": 9272,
|
|
"instructions": [
|
|
9272,
|
|
9276,
|
|
9280
|
|
],
|
|
"end": 9280,
|
|
"end_exclusive": 9282
|
|
},
|
|
{
|
|
"start": 9282,
|
|
"instructions": [
|
|
9282,
|
|
9286,
|
|
9288,
|
|
9291,
|
|
9295
|
|
],
|
|
"end": 9295,
|
|
"end_exclusive": 9297
|
|
},
|
|
{
|
|
"start": 9297,
|
|
"instructions": [
|
|
9297,
|
|
9301
|
|
],
|
|
"end": 9301,
|
|
"end_exclusive": 9303
|
|
},
|
|
{
|
|
"start": 9303,
|
|
"instructions": [
|
|
9303
|
|
],
|
|
"end": 9303,
|
|
"end_exclusive": 9305
|
|
},
|
|
{
|
|
"start": 9305,
|
|
"instructions": [
|
|
9305,
|
|
9308
|
|
],
|
|
"end": 9308,
|
|
"end_exclusive": 9310
|
|
},
|
|
{
|
|
"start": 9310,
|
|
"instructions": [
|
|
9310,
|
|
9313
|
|
],
|
|
"end": 9313,
|
|
"end_exclusive": 9316
|
|
},
|
|
{
|
|
"start": 9316,
|
|
"instructions": [
|
|
9316,
|
|
9320,
|
|
9323,
|
|
9326,
|
|
9330
|
|
],
|
|
"end": 9330,
|
|
"end_exclusive": 9332
|
|
},
|
|
{
|
|
"start": 9332,
|
|
"instructions": [
|
|
9332,
|
|
9336
|
|
],
|
|
"end": 9336,
|
|
"end_exclusive": 9338
|
|
},
|
|
{
|
|
"start": 9338,
|
|
"instructions": [
|
|
9338
|
|
],
|
|
"end": 9338,
|
|
"end_exclusive": 9340
|
|
},
|
|
{
|
|
"start": 9340,
|
|
"instructions": [
|
|
9340
|
|
],
|
|
"end": 9340,
|
|
"end_exclusive": 9343
|
|
},
|
|
{
|
|
"start": 9343,
|
|
"instructions": [
|
|
9343
|
|
],
|
|
"end": 9343,
|
|
"end_exclusive": 9344
|
|
},
|
|
{
|
|
"start": 9344,
|
|
"instructions": [
|
|
9344,
|
|
9348
|
|
],
|
|
"end": 9348,
|
|
"end_exclusive": 9350
|
|
},
|
|
{
|
|
"start": 9350,
|
|
"instructions": [
|
|
9350,
|
|
9353
|
|
],
|
|
"end": 9353,
|
|
"end_exclusive": 9355
|
|
},
|
|
{
|
|
"start": 9355,
|
|
"instructions": [
|
|
9355
|
|
],
|
|
"end": 9355,
|
|
"end_exclusive": 9358
|
|
},
|
|
{
|
|
"start": 9358,
|
|
"instructions": [
|
|
9358,
|
|
9362,
|
|
9364,
|
|
9367,
|
|
9371
|
|
],
|
|
"end": 9371,
|
|
"end_exclusive": 9373
|
|
},
|
|
{
|
|
"start": 9373,
|
|
"instructions": [
|
|
9373,
|
|
9377
|
|
],
|
|
"end": 9377,
|
|
"end_exclusive": 9379
|
|
},
|
|
{
|
|
"start": 9379,
|
|
"instructions": [
|
|
9379
|
|
],
|
|
"end": 9379,
|
|
"end_exclusive": 9381
|
|
},
|
|
{
|
|
"start": 9381,
|
|
"instructions": [
|
|
9381,
|
|
9384
|
|
],
|
|
"end": 9384,
|
|
"end_exclusive": 9385
|
|
},
|
|
{
|
|
"start": 9385,
|
|
"instructions": [
|
|
9385,
|
|
9389
|
|
],
|
|
"end": 9389,
|
|
"end_exclusive": 9391
|
|
},
|
|
{
|
|
"start": 9391,
|
|
"instructions": [
|
|
9391,
|
|
9396
|
|
],
|
|
"end": 9396,
|
|
"end_exclusive": 9398
|
|
},
|
|
{
|
|
"start": 9398,
|
|
"instructions": [
|
|
9398,
|
|
9402
|
|
],
|
|
"end": 9402,
|
|
"end_exclusive": 9404
|
|
},
|
|
{
|
|
"start": 9404,
|
|
"instructions": [
|
|
9404,
|
|
9407
|
|
],
|
|
"end": 9407,
|
|
"end_exclusive": 9409
|
|
},
|
|
{
|
|
"start": 9409,
|
|
"instructions": [
|
|
9409,
|
|
9413
|
|
],
|
|
"end": 9413,
|
|
"end_exclusive": 9415
|
|
},
|
|
{
|
|
"start": 9415,
|
|
"instructions": [
|
|
9415,
|
|
9419,
|
|
9421,
|
|
9425,
|
|
9427,
|
|
9430,
|
|
9434
|
|
],
|
|
"end": 9434,
|
|
"end_exclusive": 9436
|
|
},
|
|
{
|
|
"start": 9436,
|
|
"instructions": [
|
|
9436,
|
|
9440
|
|
],
|
|
"end": 9440,
|
|
"end_exclusive": 9442
|
|
},
|
|
{
|
|
"start": 9442,
|
|
"instructions": [
|
|
9442
|
|
],
|
|
"end": 9442,
|
|
"end_exclusive": 9444
|
|
},
|
|
{
|
|
"start": 9444,
|
|
"instructions": [
|
|
9444
|
|
],
|
|
"end": 9444,
|
|
"end_exclusive": 9447
|
|
},
|
|
{
|
|
"start": 9447,
|
|
"instructions": [
|
|
9447
|
|
],
|
|
"end": 9447,
|
|
"end_exclusive": 9448
|
|
},
|
|
{
|
|
"start": 9448,
|
|
"instructions": [
|
|
9448,
|
|
9452
|
|
],
|
|
"end": 9452,
|
|
"end_exclusive": 9454
|
|
},
|
|
{
|
|
"start": 9454,
|
|
"instructions": [
|
|
9454,
|
|
9459
|
|
],
|
|
"end": 9459,
|
|
"end_exclusive": 9461
|
|
},
|
|
{
|
|
"start": 9461,
|
|
"instructions": [
|
|
9461,
|
|
9465
|
|
],
|
|
"end": 9465,
|
|
"end_exclusive": 9467
|
|
},
|
|
{
|
|
"start": 9467,
|
|
"instructions": [
|
|
9467,
|
|
9470
|
|
],
|
|
"end": 9470,
|
|
"end_exclusive": 9472
|
|
},
|
|
{
|
|
"start": 9472,
|
|
"instructions": [
|
|
9472,
|
|
9476,
|
|
9480,
|
|
9482
|
|
],
|
|
"end": 9482,
|
|
"end_exclusive": 9484
|
|
},
|
|
{
|
|
"start": 9484,
|
|
"instructions": [
|
|
9484,
|
|
9487
|
|
],
|
|
"end": 9487,
|
|
"end_exclusive": 9489
|
|
},
|
|
{
|
|
"start": 9489,
|
|
"instructions": [
|
|
9489
|
|
],
|
|
"end": 9489,
|
|
"end_exclusive": 9491
|
|
},
|
|
{
|
|
"start": 9491,
|
|
"instructions": [
|
|
9491,
|
|
9495,
|
|
9497,
|
|
9500,
|
|
9504
|
|
],
|
|
"end": 9504,
|
|
"end_exclusive": 9506
|
|
},
|
|
{
|
|
"start": 9506,
|
|
"instructions": [
|
|
9506,
|
|
9510
|
|
],
|
|
"end": 9510,
|
|
"end_exclusive": 9512
|
|
},
|
|
{
|
|
"start": 9512,
|
|
"instructions": [
|
|
9512
|
|
],
|
|
"end": 9512,
|
|
"end_exclusive": 9514
|
|
},
|
|
{
|
|
"start": 9514,
|
|
"instructions": [
|
|
9514
|
|
],
|
|
"end": 9514,
|
|
"end_exclusive": 9517
|
|
},
|
|
{
|
|
"start": 9517,
|
|
"instructions": [
|
|
9517
|
|
],
|
|
"end": 9517,
|
|
"end_exclusive": 9518
|
|
},
|
|
{
|
|
"start": 9518,
|
|
"instructions": [
|
|
9518,
|
|
9522
|
|
],
|
|
"end": 9522,
|
|
"end_exclusive": 9524
|
|
},
|
|
{
|
|
"start": 9524,
|
|
"instructions": [
|
|
9524,
|
|
9529
|
|
],
|
|
"end": 9529,
|
|
"end_exclusive": 9531
|
|
},
|
|
{
|
|
"start": 9531,
|
|
"instructions": [
|
|
9531,
|
|
9535
|
|
],
|
|
"end": 9535,
|
|
"end_exclusive": 9537
|
|
},
|
|
{
|
|
"start": 9537,
|
|
"instructions": [
|
|
9537,
|
|
9540
|
|
],
|
|
"end": 9540,
|
|
"end_exclusive": 9542
|
|
},
|
|
{
|
|
"start": 9542,
|
|
"instructions": [
|
|
9542,
|
|
9546,
|
|
9550,
|
|
9552
|
|
],
|
|
"end": 9552,
|
|
"end_exclusive": 9554
|
|
},
|
|
{
|
|
"start": 9554,
|
|
"instructions": [
|
|
9554,
|
|
9557
|
|
],
|
|
"end": 9557,
|
|
"end_exclusive": 9559
|
|
},
|
|
{
|
|
"start": 9559,
|
|
"instructions": [
|
|
9559
|
|
],
|
|
"end": 9559,
|
|
"end_exclusive": 9561
|
|
},
|
|
{
|
|
"start": 9561,
|
|
"instructions": [
|
|
9561,
|
|
9565,
|
|
9567,
|
|
9570,
|
|
9574
|
|
],
|
|
"end": 9574,
|
|
"end_exclusive": 9576
|
|
},
|
|
{
|
|
"start": 9576,
|
|
"instructions": [
|
|
9576,
|
|
9580
|
|
],
|
|
"end": 9580,
|
|
"end_exclusive": 9582
|
|
},
|
|
{
|
|
"start": 9582,
|
|
"instructions": [
|
|
9582
|
|
],
|
|
"end": 9582,
|
|
"end_exclusive": 9584
|
|
},
|
|
{
|
|
"start": 9584,
|
|
"instructions": [
|
|
9584
|
|
],
|
|
"end": 9584,
|
|
"end_exclusive": 9587
|
|
},
|
|
{
|
|
"start": 9587,
|
|
"instructions": [
|
|
9587
|
|
],
|
|
"end": 9587,
|
|
"end_exclusive": 9588
|
|
},
|
|
{
|
|
"start": 9588,
|
|
"instructions": [
|
|
9588,
|
|
9592
|
|
],
|
|
"end": 9592,
|
|
"end_exclusive": 9595
|
|
},
|
|
{
|
|
"start": 9595,
|
|
"instructions": [
|
|
9595,
|
|
9600
|
|
],
|
|
"end": 9600,
|
|
"end_exclusive": 9602
|
|
},
|
|
{
|
|
"start": 9602,
|
|
"instructions": [
|
|
9602,
|
|
9606
|
|
],
|
|
"end": 9606,
|
|
"end_exclusive": 9608
|
|
},
|
|
{
|
|
"start": 9608,
|
|
"instructions": [
|
|
9608,
|
|
9611
|
|
],
|
|
"end": 9611,
|
|
"end_exclusive": 9613
|
|
},
|
|
{
|
|
"start": 9613,
|
|
"instructions": [
|
|
9613,
|
|
9617,
|
|
9619
|
|
],
|
|
"end": 9619,
|
|
"end_exclusive": 9621
|
|
},
|
|
{
|
|
"start": 9621,
|
|
"instructions": [
|
|
9621,
|
|
9623
|
|
],
|
|
"end": 9623,
|
|
"end_exclusive": 9625
|
|
},
|
|
{
|
|
"start": 9625,
|
|
"instructions": [
|
|
9625
|
|
],
|
|
"end": 9625,
|
|
"end_exclusive": 9627
|
|
},
|
|
{
|
|
"start": 9627,
|
|
"instructions": [
|
|
9627,
|
|
9631
|
|
],
|
|
"end": 9631,
|
|
"end_exclusive": 9633
|
|
},
|
|
{
|
|
"start": 9633,
|
|
"instructions": [
|
|
9633,
|
|
9636
|
|
],
|
|
"end": 9636,
|
|
"end_exclusive": 9638
|
|
},
|
|
{
|
|
"start": 9638,
|
|
"instructions": [
|
|
9638,
|
|
9641,
|
|
9644,
|
|
9648
|
|
],
|
|
"end": 9648,
|
|
"end_exclusive": 9650
|
|
},
|
|
{
|
|
"start": 9650,
|
|
"instructions": [
|
|
9650,
|
|
9654
|
|
],
|
|
"end": 9654,
|
|
"end_exclusive": 9656
|
|
},
|
|
{
|
|
"start": 9656,
|
|
"instructions": [
|
|
9656
|
|
],
|
|
"end": 9656,
|
|
"end_exclusive": 9658
|
|
},
|
|
{
|
|
"start": 9658,
|
|
"instructions": [
|
|
9658,
|
|
9661
|
|
],
|
|
"end": 9661,
|
|
"end_exclusive": 9663
|
|
},
|
|
{
|
|
"start": 9663,
|
|
"instructions": [
|
|
9663,
|
|
9667
|
|
],
|
|
"end": 9667,
|
|
"end_exclusive": 9669
|
|
},
|
|
{
|
|
"start": 9669,
|
|
"instructions": [
|
|
9669,
|
|
9672
|
|
],
|
|
"end": 9672,
|
|
"end_exclusive": 9674
|
|
},
|
|
{
|
|
"start": 9674,
|
|
"instructions": [
|
|
9674,
|
|
9679
|
|
],
|
|
"end": 9679,
|
|
"end_exclusive": 9683
|
|
},
|
|
{
|
|
"start": 9683,
|
|
"instructions": [
|
|
9683
|
|
],
|
|
"end": 9683,
|
|
"end_exclusive": 9684
|
|
},
|
|
{
|
|
"start": 9684,
|
|
"instructions": [
|
|
9684,
|
|
9688
|
|
],
|
|
"end": 9688,
|
|
"end_exclusive": 9691
|
|
},
|
|
{
|
|
"start": 9691,
|
|
"instructions": [
|
|
9691,
|
|
9696
|
|
],
|
|
"end": 9696,
|
|
"end_exclusive": 9698
|
|
},
|
|
{
|
|
"start": 9698,
|
|
"instructions": [
|
|
9698,
|
|
9702
|
|
],
|
|
"end": 9702,
|
|
"end_exclusive": 9704
|
|
},
|
|
{
|
|
"start": 9704,
|
|
"instructions": [
|
|
9704,
|
|
9707
|
|
],
|
|
"end": 9707,
|
|
"end_exclusive": 9709
|
|
},
|
|
{
|
|
"start": 9709,
|
|
"instructions": [
|
|
9709,
|
|
9713,
|
|
9715
|
|
],
|
|
"end": 9715,
|
|
"end_exclusive": 9717
|
|
},
|
|
{
|
|
"start": 9717,
|
|
"instructions": [
|
|
9717,
|
|
9719
|
|
],
|
|
"end": 9719,
|
|
"end_exclusive": 9721
|
|
},
|
|
{
|
|
"start": 9721,
|
|
"instructions": [
|
|
9721
|
|
],
|
|
"end": 9721,
|
|
"end_exclusive": 9723
|
|
},
|
|
{
|
|
"start": 9723,
|
|
"instructions": [
|
|
9723,
|
|
9727
|
|
],
|
|
"end": 9727,
|
|
"end_exclusive": 9729
|
|
},
|
|
{
|
|
"start": 9729,
|
|
"instructions": [
|
|
9729,
|
|
9731
|
|
],
|
|
"end": 9731,
|
|
"end_exclusive": 9733
|
|
},
|
|
{
|
|
"start": 9733,
|
|
"instructions": [
|
|
9733,
|
|
9736,
|
|
9739,
|
|
9743
|
|
],
|
|
"end": 9743,
|
|
"end_exclusive": 9745
|
|
},
|
|
{
|
|
"start": 9745,
|
|
"instructions": [
|
|
9745,
|
|
9749
|
|
],
|
|
"end": 9749,
|
|
"end_exclusive": 9751
|
|
},
|
|
{
|
|
"start": 9751,
|
|
"instructions": [
|
|
9751
|
|
],
|
|
"end": 9751,
|
|
"end_exclusive": 9753
|
|
},
|
|
{
|
|
"start": 9753,
|
|
"instructions": [
|
|
9753,
|
|
9756
|
|
],
|
|
"end": 9756,
|
|
"end_exclusive": 9758
|
|
},
|
|
{
|
|
"start": 9758,
|
|
"instructions": [
|
|
9758,
|
|
9762
|
|
],
|
|
"end": 9762,
|
|
"end_exclusive": 9764
|
|
},
|
|
{
|
|
"start": 9764,
|
|
"instructions": [
|
|
9764,
|
|
9767
|
|
],
|
|
"end": 9767,
|
|
"end_exclusive": 9769
|
|
},
|
|
{
|
|
"start": 9769,
|
|
"instructions": [
|
|
9769,
|
|
9774
|
|
],
|
|
"end": 9774,
|
|
"end_exclusive": 9778
|
|
},
|
|
{
|
|
"start": 9778,
|
|
"instructions": [
|
|
9778
|
|
],
|
|
"end": 9778,
|
|
"end_exclusive": 9779
|
|
},
|
|
{
|
|
"start": 9779,
|
|
"instructions": [
|
|
9779,
|
|
9785,
|
|
9787,
|
|
9790,
|
|
9794
|
|
],
|
|
"end": 9794,
|
|
"end_exclusive": 9796
|
|
},
|
|
{
|
|
"start": 9796,
|
|
"instructions": [
|
|
9796,
|
|
9800
|
|
],
|
|
"end": 9800,
|
|
"end_exclusive": 9802
|
|
},
|
|
{
|
|
"start": 9802,
|
|
"instructions": [
|
|
9802
|
|
],
|
|
"end": 9802,
|
|
"end_exclusive": 9804
|
|
},
|
|
{
|
|
"start": 9804,
|
|
"instructions": [
|
|
9804,
|
|
9807
|
|
],
|
|
"end": 9807,
|
|
"end_exclusive": 9808
|
|
}
|
|
],
|
|
"registers": [
|
|
"R0",
|
|
"R1",
|
|
"R2",
|
|
"R3",
|
|
"R4",
|
|
"R5",
|
|
"R6",
|
|
"R7"
|
|
],
|
|
"control_registers": [
|
|
"CCR",
|
|
"BR",
|
|
"EP",
|
|
"DP",
|
|
"TP",
|
|
"SR"
|
|
]
|
|
},
|
|
"symbols": {
|
|
"symbols": [
|
|
{
|
|
"address": 57606,
|
|
"name": "mem_E106",
|
|
"region": "program_or_external",
|
|
"kind": "memory",
|
|
"access_count": 5,
|
|
"read_count": 5,
|
|
"write_count": 2,
|
|
"unknown_count": 0,
|
|
"width_hints": [
|
|
"word"
|
|
],
|
|
"width": "word",
|
|
"first_access": 9143,
|
|
"last_access": 9415,
|
|
"accesses": [
|
|
{
|
|
"address": 57606,
|
|
"instruction_address": 9143,
|
|
"instruction": "MOV:G.W @H'E106, R0",
|
|
"mnemonic": "MOV:G.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E106",
|
|
"operand_index": 0
|
|
},
|
|
{
|
|
"address": 57606,
|
|
"instruction_address": 9196,
|
|
"instruction": "BCLR.W #0, @H'E106",
|
|
"mnemonic": "BCLR.W",
|
|
"direction": "read_write",
|
|
"width": "word",
|
|
"operand": "@H'E106",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 57606,
|
|
"instruction_address": 9262,
|
|
"instruction": "MOV:G.W @H'E106, R0",
|
|
"mnemonic": "MOV:G.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E106",
|
|
"operand_index": 0
|
|
},
|
|
{
|
|
"address": 57606,
|
|
"instruction_address": 9316,
|
|
"instruction": "BCLR.W #0, @H'E106",
|
|
"mnemonic": "BCLR.W",
|
|
"direction": "read_write",
|
|
"width": "word",
|
|
"operand": "@H'E106",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 57606,
|
|
"instruction_address": 9415,
|
|
"instruction": "MOV:G.W @H'E106, R0",
|
|
"mnemonic": "MOV:G.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E106",
|
|
"operand_index": 0
|
|
}
|
|
]
|
|
},
|
|
{
|
|
"address": 57616,
|
|
"name": "mem_E110",
|
|
"region": "program_or_external",
|
|
"kind": "memory",
|
|
"access_count": 7,
|
|
"read_count": 7,
|
|
"write_count": 0,
|
|
"unknown_count": 0,
|
|
"width_hints": [
|
|
"word"
|
|
],
|
|
"width": "word",
|
|
"first_access": 9119,
|
|
"last_access": 9698,
|
|
"accesses": [
|
|
{
|
|
"address": 57616,
|
|
"instruction_address": 9119,
|
|
"instruction": "BTST.W #15, @H'E110",
|
|
"mnemonic": "BTST.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E110",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 57616,
|
|
"instruction_address": 9239,
|
|
"instruction": "BTST.W #15, @H'E110",
|
|
"mnemonic": "BTST.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E110",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 57616,
|
|
"instruction_address": 9398,
|
|
"instruction": "BTST.W #15, @H'E110",
|
|
"mnemonic": "BTST.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E110",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 57616,
|
|
"instruction_address": 9461,
|
|
"instruction": "BTST.W #14, @H'E110",
|
|
"mnemonic": "BTST.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E110",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 57616,
|
|
"instruction_address": 9531,
|
|
"instruction": "BTST.W #14, @H'E110",
|
|
"mnemonic": "BTST.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E110",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 57616,
|
|
"instruction_address": 9602,
|
|
"instruction": "BTST.W #14, @H'E110",
|
|
"mnemonic": "BTST.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E110",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 57616,
|
|
"instruction_address": 9698,
|
|
"instruction": "BTST.W #14, @H'E110",
|
|
"mnemonic": "BTST.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E110",
|
|
"operand_index": 1
|
|
}
|
|
]
|
|
},
|
|
{
|
|
"address": 57630,
|
|
"name": "mem_E11E",
|
|
"region": "program_or_external",
|
|
"kind": "memory",
|
|
"access_count": 4,
|
|
"read_count": 4,
|
|
"write_count": 0,
|
|
"unknown_count": 0,
|
|
"width_hints": [
|
|
"word"
|
|
],
|
|
"width": "word",
|
|
"first_access": 9476,
|
|
"last_access": 9709,
|
|
"accesses": [
|
|
{
|
|
"address": 57630,
|
|
"instruction_address": 9476,
|
|
"instruction": "MOV:G.W @H'E11E, R0",
|
|
"mnemonic": "MOV:G.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E11E",
|
|
"operand_index": 0
|
|
},
|
|
{
|
|
"address": 57630,
|
|
"instruction_address": 9546,
|
|
"instruction": "MOV:G.W @H'E11E, R0",
|
|
"mnemonic": "MOV:G.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E11E",
|
|
"operand_index": 0
|
|
},
|
|
{
|
|
"address": 57630,
|
|
"instruction_address": 9613,
|
|
"instruction": "MOV:G.W @H'E11E, R0",
|
|
"mnemonic": "MOV:G.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E11E",
|
|
"operand_index": 0
|
|
},
|
|
{
|
|
"address": 57630,
|
|
"instruction_address": 9709,
|
|
"instruction": "MOV:G.W @H'E11E, R0",
|
|
"mnemonic": "MOV:G.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E11E",
|
|
"operand_index": 0
|
|
}
|
|
]
|
|
},
|
|
{
|
|
"address": 58630,
|
|
"name": "mem_E506",
|
|
"region": "program_or_external",
|
|
"kind": "memory",
|
|
"access_count": 2,
|
|
"read_count": 2,
|
|
"write_count": 0,
|
|
"unknown_count": 0,
|
|
"width_hints": [
|
|
"word"
|
|
],
|
|
"width": "word",
|
|
"first_access": 9153,
|
|
"last_access": 9272,
|
|
"accesses": [
|
|
{
|
|
"address": 58630,
|
|
"instruction_address": 9153,
|
|
"instruction": "AND.W @H'E506, R1",
|
|
"mnemonic": "AND.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E506",
|
|
"operand_index": 0
|
|
},
|
|
{
|
|
"address": 58630,
|
|
"instruction_address": 9272,
|
|
"instruction": "AND.W @H'E506, R1",
|
|
"mnemonic": "AND.W",
|
|
"direction": "read",
|
|
"width": "word",
|
|
"operand": "@H'E506",
|
|
"operand_index": 0
|
|
}
|
|
]
|
|
},
|
|
{
|
|
"address": 59654,
|
|
"name": "mem_E906",
|
|
"region": "program_or_external",
|
|
"kind": "memory",
|
|
"access_count": 4,
|
|
"read_count": 0,
|
|
"write_count": 4,
|
|
"unknown_count": 0,
|
|
"width_hints": [
|
|
"word"
|
|
],
|
|
"width": "word",
|
|
"first_access": 9163,
|
|
"last_access": 9421,
|
|
"accesses": [
|
|
{
|
|
"address": 59654,
|
|
"instruction_address": 9163,
|
|
"instruction": "MOV:G.W R1, @H'E906",
|
|
"mnemonic": "MOV:G.W",
|
|
"direction": "write",
|
|
"width": "word",
|
|
"operand": "@H'E906",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 59654,
|
|
"instruction_address": 9282,
|
|
"instruction": "MOV:G.W R1, @H'E906",
|
|
"mnemonic": "MOV:G.W",
|
|
"direction": "write",
|
|
"width": "word",
|
|
"operand": "@H'E906",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 59654,
|
|
"instruction_address": 9358,
|
|
"instruction": "MOV:G.W R0, @H'E906",
|
|
"mnemonic": "MOV:G.W",
|
|
"direction": "write",
|
|
"width": "word",
|
|
"operand": "@H'E906",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 59654,
|
|
"instruction_address": 9421,
|
|
"instruction": "MOV:G.W R0, @H'E906",
|
|
"mnemonic": "MOV:G.W",
|
|
"direction": "write",
|
|
"width": "word",
|
|
"operand": "@H'E906",
|
|
"operand_index": 1
|
|
}
|
|
]
|
|
},
|
|
{
|
|
"address": 59678,
|
|
"name": "mem_E91E",
|
|
"region": "program_or_external",
|
|
"kind": "memory",
|
|
"access_count": 2,
|
|
"read_count": 0,
|
|
"write_count": 2,
|
|
"unknown_count": 0,
|
|
"width_hints": [
|
|
"word"
|
|
],
|
|
"width": "word",
|
|
"first_access": 9491,
|
|
"last_access": 9561,
|
|
"accesses": [
|
|
{
|
|
"address": 59678,
|
|
"instruction_address": 9491,
|
|
"instruction": "MOV:G.W R0, @H'E91E",
|
|
"mnemonic": "MOV:G.W",
|
|
"direction": "write",
|
|
"width": "word",
|
|
"operand": "@H'E91E",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 59678,
|
|
"instruction_address": 9561,
|
|
"instruction": "MOV:G.W R0, @H'E91E",
|
|
"mnemonic": "MOV:G.W",
|
|
"direction": "write",
|
|
"width": "word",
|
|
"operand": "@H'E91E",
|
|
"operand_index": 1
|
|
}
|
|
]
|
|
},
|
|
{
|
|
"address": 59682,
|
|
"name": "mem_E922",
|
|
"region": "program_or_external",
|
|
"kind": "memory",
|
|
"access_count": 1,
|
|
"read_count": 0,
|
|
"write_count": 1,
|
|
"unknown_count": 0,
|
|
"width_hints": [
|
|
"word"
|
|
],
|
|
"width": "word",
|
|
"first_access": 9779,
|
|
"last_access": 9779,
|
|
"accesses": [
|
|
{
|
|
"address": 59682,
|
|
"instruction_address": 9779,
|
|
"instruction": "MOV:G.W #H'8000, @H'E922",
|
|
"mnemonic": "MOV:G.W",
|
|
"direction": "write",
|
|
"width": "word",
|
|
"operand": "@H'E922",
|
|
"operand_index": 1
|
|
}
|
|
]
|
|
},
|
|
{
|
|
"address": 62468,
|
|
"name": "mem_F404",
|
|
"region": "program_or_external",
|
|
"kind": "memory",
|
|
"access_count": 11,
|
|
"read_count": 11,
|
|
"write_count": 0,
|
|
"unknown_count": 0,
|
|
"width_hints": [
|
|
"byte"
|
|
],
|
|
"width": "byte",
|
|
"first_access": 9178,
|
|
"last_access": 9796,
|
|
"accesses": [
|
|
{
|
|
"address": 62468,
|
|
"instruction_address": 9178,
|
|
"instruction": "BTST.B #5, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F404",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 62468,
|
|
"instruction_address": 9212,
|
|
"instruction": "BTST.B #5, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F404",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 62468,
|
|
"instruction_address": 9297,
|
|
"instruction": "BTST.B #5, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F404",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 62468,
|
|
"instruction_address": 9332,
|
|
"instruction": "BTST.B #5, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F404",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 62468,
|
|
"instruction_address": 9373,
|
|
"instruction": "BTST.B #5, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F404",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 62468,
|
|
"instruction_address": 9436,
|
|
"instruction": "BTST.B #5, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F404",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 62468,
|
|
"instruction_address": 9506,
|
|
"instruction": "BTST.B #4, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F404",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 62468,
|
|
"instruction_address": 9576,
|
|
"instruction": "BTST.B #4, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F404",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 62468,
|
|
"instruction_address": 9650,
|
|
"instruction": "BTST.B #4, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F404",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 62468,
|
|
"instruction_address": 9745,
|
|
"instruction": "BTST.B #4, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F404",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 62468,
|
|
"instruction_address": 9796,
|
|
"instruction": "BTST.B #4, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F404",
|
|
"operand_index": 1
|
|
}
|
|
]
|
|
},
|
|
{
|
|
"address": 63184,
|
|
"name": "ram_F6D0",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram",
|
|
"access_count": 13,
|
|
"read_count": 13,
|
|
"write_count": 0,
|
|
"unknown_count": 0,
|
|
"width_hints": [
|
|
"byte"
|
|
],
|
|
"width": "byte",
|
|
"first_access": 9104,
|
|
"last_access": 9758,
|
|
"accesses": [
|
|
{
|
|
"address": 63184,
|
|
"instruction_address": 9104,
|
|
"instruction": "BTST.B #1, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F6D0",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63184,
|
|
"instruction_address": 9130,
|
|
"instruction": "BTST.B #2, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F6D0",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63184,
|
|
"instruction_address": 9224,
|
|
"instruction": "BTST.B #2, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F6D0",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63184,
|
|
"instruction_address": 9250,
|
|
"instruction": "BTST.B #1, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F6D0",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63184,
|
|
"instruction_address": 9385,
|
|
"instruction": "BTST.B #3, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F6D0",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63184,
|
|
"instruction_address": 9448,
|
|
"instruction": "BTST.B #7, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F6D0",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63184,
|
|
"instruction_address": 9518,
|
|
"instruction": "BTST.B #6, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F6D0",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63184,
|
|
"instruction_address": 9588,
|
|
"instruction": "BTST.B #4, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F6D0",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63184,
|
|
"instruction_address": 9627,
|
|
"instruction": "BTST.B #5, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F6D0",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63184,
|
|
"instruction_address": 9663,
|
|
"instruction": "BTST.B #5, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F6D0",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63184,
|
|
"instruction_address": 9684,
|
|
"instruction": "BTST.B #5, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F6D0",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63184,
|
|
"instruction_address": 9723,
|
|
"instruction": "BTST.B #4, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F6D0",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63184,
|
|
"instruction_address": 9758,
|
|
"instruction": "BTST.B #4, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F6D0",
|
|
"operand_index": 1
|
|
}
|
|
]
|
|
},
|
|
{
|
|
"address": 63220,
|
|
"name": "ram_F6F4",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram",
|
|
"access_count": 2,
|
|
"read_count": 0,
|
|
"write_count": 2,
|
|
"unknown_count": 0,
|
|
"width_hints": [
|
|
"word"
|
|
],
|
|
"width": "word",
|
|
"first_access": 9679,
|
|
"last_access": 9774,
|
|
"accesses": [
|
|
{
|
|
"address": 63220,
|
|
"instruction_address": 9679,
|
|
"instruction": "CLR.W @H'F6F4",
|
|
"mnemonic": "CLR.W",
|
|
"direction": "write",
|
|
"width": "word",
|
|
"operand": "@H'F6F4",
|
|
"operand_index": 0
|
|
},
|
|
{
|
|
"address": 63220,
|
|
"instruction_address": 9774,
|
|
"instruction": "CLR.W @H'F6F4",
|
|
"mnemonic": "CLR.W",
|
|
"direction": "write",
|
|
"width": "word",
|
|
"operand": "@H'F6F4",
|
|
"operand_index": 0
|
|
}
|
|
]
|
|
},
|
|
{
|
|
"address": 63222,
|
|
"name": "ram_F6F6",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram",
|
|
"access_count": 4,
|
|
"read_count": 0,
|
|
"write_count": 4,
|
|
"unknown_count": 0,
|
|
"width_hints": [
|
|
"byte"
|
|
],
|
|
"width": "byte",
|
|
"first_access": 9472,
|
|
"last_access": 9769,
|
|
"accesses": [
|
|
{
|
|
"address": 63222,
|
|
"instruction_address": 9472,
|
|
"instruction": "CLR.B @H'F6F6",
|
|
"mnemonic": "CLR.B",
|
|
"direction": "write",
|
|
"width": "byte",
|
|
"operand": "@H'F6F6",
|
|
"operand_index": 0
|
|
},
|
|
{
|
|
"address": 63222,
|
|
"instruction_address": 9542,
|
|
"instruction": "CLR.B @H'F6F6",
|
|
"mnemonic": "CLR.B",
|
|
"direction": "write",
|
|
"width": "byte",
|
|
"operand": "@H'F6F6",
|
|
"operand_index": 0
|
|
},
|
|
{
|
|
"address": 63222,
|
|
"instruction_address": 9674,
|
|
"instruction": "MOV:G.B #H'C0, @H'F6F6",
|
|
"mnemonic": "MOV:G.B",
|
|
"direction": "write",
|
|
"width": "byte",
|
|
"operand": "@H'F6F6",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63222,
|
|
"instruction_address": 9769,
|
|
"instruction": "MOV:G.B #H'80, @H'F6F6",
|
|
"mnemonic": "MOV:G.B",
|
|
"direction": "write",
|
|
"width": "byte",
|
|
"operand": "@H'F6F6",
|
|
"operand_index": 1
|
|
}
|
|
]
|
|
},
|
|
{
|
|
"address": 63280,
|
|
"name": "ram_F730",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram",
|
|
"access_count": 4,
|
|
"read_count": 4,
|
|
"write_count": 0,
|
|
"unknown_count": 0,
|
|
"width_hints": [
|
|
"byte"
|
|
],
|
|
"width": "byte",
|
|
"first_access": 9137,
|
|
"last_access": 9409,
|
|
"accesses": [
|
|
{
|
|
"address": 63280,
|
|
"instruction_address": 9137,
|
|
"instruction": "BTST.B #7, @H'F730",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F730",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63280,
|
|
"instruction_address": 9256,
|
|
"instruction": "BTST.B #7, @H'F730",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F730",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63280,
|
|
"instruction_address": 9344,
|
|
"instruction": "BTST.B #7, @H'F730",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F730",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63280,
|
|
"instruction_address": 9409,
|
|
"instruction": "BTST.B #7, @H'F730",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F730",
|
|
"operand_index": 1
|
|
}
|
|
]
|
|
},
|
|
{
|
|
"address": 63281,
|
|
"name": "ram_F731",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram",
|
|
"access_count": 7,
|
|
"read_count": 7,
|
|
"write_count": 0,
|
|
"unknown_count": 0,
|
|
"width_hints": [
|
|
"byte"
|
|
],
|
|
"width": "byte",
|
|
"first_access": 9111,
|
|
"last_access": 9691,
|
|
"accesses": [
|
|
{
|
|
"address": 63281,
|
|
"instruction_address": 9111,
|
|
"instruction": "CMP:G.B #H'02, @H'F731",
|
|
"mnemonic": "CMP:G.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F731",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63281,
|
|
"instruction_address": 9231,
|
|
"instruction": "CMP:G.B #H'02, @H'F731",
|
|
"mnemonic": "CMP:G.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F731",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63281,
|
|
"instruction_address": 9391,
|
|
"instruction": "CMP:G.B #H'02, @H'F731",
|
|
"mnemonic": "CMP:G.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F731",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63281,
|
|
"instruction_address": 9454,
|
|
"instruction": "CMP:G.B #H'02, @H'F731",
|
|
"mnemonic": "CMP:G.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F731",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63281,
|
|
"instruction_address": 9524,
|
|
"instruction": "CMP:G.B #H'02, @H'F731",
|
|
"mnemonic": "CMP:G.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F731",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63281,
|
|
"instruction_address": 9595,
|
|
"instruction": "CMP:G.B #H'02, @H'F731",
|
|
"mnemonic": "CMP:G.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F731",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63281,
|
|
"instruction_address": 9691,
|
|
"instruction": "CMP:G.B #H'02, @H'F731",
|
|
"mnemonic": "CMP:G.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F731",
|
|
"operand_index": 1
|
|
}
|
|
]
|
|
},
|
|
{
|
|
"address": 63377,
|
|
"name": "ram_F791",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram",
|
|
"access_count": 11,
|
|
"read_count": 11,
|
|
"write_count": 0,
|
|
"unknown_count": 0,
|
|
"width_hints": [
|
|
"byte"
|
|
],
|
|
"width": "byte",
|
|
"first_access": 9172,
|
|
"last_access": 9790,
|
|
"accesses": [
|
|
{
|
|
"address": 63377,
|
|
"instruction_address": 9172,
|
|
"instruction": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F791",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63377,
|
|
"instruction_address": 9206,
|
|
"instruction": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F791",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63377,
|
|
"instruction_address": 9291,
|
|
"instruction": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F791",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63377,
|
|
"instruction_address": 9326,
|
|
"instruction": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F791",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63377,
|
|
"instruction_address": 9367,
|
|
"instruction": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F791",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63377,
|
|
"instruction_address": 9430,
|
|
"instruction": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F791",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63377,
|
|
"instruction_address": 9500,
|
|
"instruction": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F791",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63377,
|
|
"instruction_address": 9570,
|
|
"instruction": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F791",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63377,
|
|
"instruction_address": 9644,
|
|
"instruction": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F791",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63377,
|
|
"instruction_address": 9739,
|
|
"instruction": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F791",
|
|
"operand_index": 1
|
|
},
|
|
{
|
|
"address": 63377,
|
|
"instruction_address": 9790,
|
|
"instruction": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"direction": "read",
|
|
"width": "byte",
|
|
"operand": "@H'F791",
|
|
"operand_index": 1
|
|
}
|
|
]
|
|
}
|
|
],
|
|
"by_address": {
|
|
"57606": "mem_E106",
|
|
"57616": "mem_E110",
|
|
"57630": "mem_E11E",
|
|
"58630": "mem_E506",
|
|
"59654": "mem_E906",
|
|
"59678": "mem_E91E",
|
|
"59682": "mem_E922",
|
|
"62468": "mem_F404",
|
|
"63184": "ram_F6D0",
|
|
"63220": "ram_F6F4",
|
|
"63222": "ram_F6F6",
|
|
"63280": "ram_F730",
|
|
"63281": "ram_F731",
|
|
"63377": "ram_F791"
|
|
}
|
|
},
|
|
"lcd_text": {
|
|
"strings": [
|
|
{
|
|
"address": 9188,
|
|
"length": 4,
|
|
"text": "o X",
|
|
"trimmed": "o X",
|
|
"kind": "printable_run",
|
|
"score": 0.738,
|
|
"confidence": "low"
|
|
}
|
|
],
|
|
"regions": [],
|
|
"searches": [
|
|
{
|
|
"term": "CONNECT",
|
|
"literal_hits": [],
|
|
"candidate_hits": [],
|
|
"near_matches": [],
|
|
"status": "not_found"
|
|
}
|
|
],
|
|
"notes": [
|
|
"LCD text scan is byte-oriented and conservative; strings may be inline script fields.",
|
|
"Raw xrefs include MOV:I.W immediates to the string address and nearby record prefixes."
|
|
]
|
|
},
|
|
"lcd_driver": {
|
|
"addresses": [
|
|
{
|
|
"address": 61952,
|
|
"name": "lcd_status_control",
|
|
"role": "status/control register inferred from busy polling and command writes"
|
|
},
|
|
{
|
|
"address": 61953,
|
|
"name": "lcd_data",
|
|
"role": "data register inferred from paired data reads/writes"
|
|
}
|
|
],
|
|
"accesses": [],
|
|
"polling_loops": [],
|
|
"routines": [],
|
|
"instructions": {}
|
|
},
|
|
"instructions": [
|
|
{
|
|
"address": 9104,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6D0F1",
|
|
"text": "BTST.B #1, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#1, @H'F6D0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63184,
|
|
"name": null,
|
|
"symbol": "ram_F6D0",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9104,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9108,
|
|
"address_region": "program_or_external",
|
|
"bytes": "370070",
|
|
"text": "BEQ loc_2407",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2407",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9223
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9104,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9111,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F7310402",
|
|
"text": "CMP:G.B #H'02, @H'F731",
|
|
"mnemonic": "CMP:G.B",
|
|
"operands": "#H'02, @H'F731",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63281,
|
|
"name": null,
|
|
"symbol": "ram_F731",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9111,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9116,
|
|
"address_region": "program_or_external",
|
|
"bytes": "320068",
|
|
"text": "BHI loc_2407",
|
|
"mnemonic": "BHI",
|
|
"operands": "loc_2407",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9223
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9111,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9119,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE110FF",
|
|
"text": "BTST.W #15, @H'E110",
|
|
"mnemonic": "BTST.W",
|
|
"operands": "#15, @H'E110",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57616,
|
|
"name": null,
|
|
"symbol": "mem_E110",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9119,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9123,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2705",
|
|
"text": "BEQ loc_23AA",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_23AA",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9130
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9119,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9125,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E0340",
|
|
"text": "BSR loc_26E8",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_26E8",
|
|
"kind": "call",
|
|
"targets": [
|
|
9960
|
|
],
|
|
"cycles": {
|
|
"cycles": 14,
|
|
"base_cycles": 9,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9125,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9128,
|
|
"address_region": "program_or_external",
|
|
"bytes": "205D",
|
|
"text": "BRA loc_2407",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_2407",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9223
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"cycles": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9125,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9130,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6D0F2",
|
|
"text": "BTST.B #2, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#2, @H'F6D0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63184,
|
|
"name": null,
|
|
"symbol": "ram_F6D0",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9130,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9134,
|
|
"address_region": "program_or_external",
|
|
"bytes": "3600CF",
|
|
"text": "BNE loc_2480",
|
|
"mnemonic": "BNE",
|
|
"operands": "loc_2480",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9344
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9130,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9137,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F730F7",
|
|
"text": "BTST.B #7, @H'F730",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F730",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63280,
|
|
"name": null,
|
|
"symbol": "ram_F730",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9137,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9141,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2735",
|
|
"text": "BEQ loc_23EC",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_23EC",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9196
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9137,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9143,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE10680",
|
|
"text": "MOV:G.W @H'E106, R0",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "@H'E106, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57606,
|
|
"name": null,
|
|
"symbol": "mem_E106",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9143,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "memory_load"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 unknown after memory load"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9147,
|
|
"address_region": "program_or_external",
|
|
"bytes": "A81B",
|
|
"text": "SHLR.W R0",
|
|
"mnemonic": "SHLR.W",
|
|
"operands": "R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9147,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:SHLR.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R0"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9149,
|
|
"address_region": "program_or_external",
|
|
"bytes": "A881",
|
|
"text": "MOV:G.W R0, R1",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "R0, R1",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9149,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unknown_operand"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R1 unknown after MOV source"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9151,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2726",
|
|
"text": "BEQ loc_23E7",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_23E7",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9191
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9149,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9153,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE50651",
|
|
"text": "AND.W @H'E506, R1",
|
|
"mnemonic": "AND.W",
|
|
"operands": "@H'E506, R1",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 58630,
|
|
"name": null,
|
|
"symbol": "mem_E506",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9153,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:AND.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R1"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9157,
|
|
"address_region": "program_or_external",
|
|
"bytes": "0CFFC451",
|
|
"text": "AND.W #H'FFC4, R1",
|
|
"mnemonic": "AND.W",
|
|
"operands": "#H'FFC4, R1",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 4,
|
|
"base_cycles": 4,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9153,
|
|
"changes": [],
|
|
"notes": [
|
|
"unsupported operation invalidated R1"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9161,
|
|
"address_region": "program_or_external",
|
|
"bytes": "27F0",
|
|
"text": "BEQ loc_23BB",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_23BB",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9147
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9153,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9163,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE90691",
|
|
"text": "MOV:G.W R1, @H'E906",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "R1, @H'E906",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 59654,
|
|
"name": null,
|
|
"symbol": "mem_E906",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9163,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9167,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5280",
|
|
"text": "MOV:E.B #H'80, R2",
|
|
"mnemonic": "MOV:E.B",
|
|
"operands": "#H'80, R2",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 2,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9163,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R2 = 0x80"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9169,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5B0083",
|
|
"text": "MOV:I.W #H'0083, R3",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0083, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9163,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R3 = 0x0083"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9172,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F791F7",
|
|
"text": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F791",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63377,
|
|
"name": null,
|
|
"symbol": "ram_F791",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9163,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9176,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2708",
|
|
"text": "BEQ loc_23E2",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_23E2",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9186
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9163,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9178,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F404F5",
|
|
"text": "BTST.B #5, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#5, @H'F404",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 62468,
|
|
"name": null,
|
|
"symbol": "mem_F404",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9178,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9182,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2702",
|
|
"text": "BEQ loc_23E2",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_23E2",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9186
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9178,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9184,
|
|
"address_region": "program_or_external",
|
|
"bytes": "ABCE",
|
|
"text": "BSET.W #14, R3",
|
|
"mnemonic": "BSET.W",
|
|
"operands": "#14, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9184,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:BSET.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R3"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9186,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E1A6F",
|
|
"text": "BSR loc_3E54",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_3E54",
|
|
"kind": "call",
|
|
"targets": [
|
|
15956
|
|
],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 9,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9186,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9189,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2020",
|
|
"text": "BRA loc_2407",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_2407",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9223
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"cycles": 8,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9186,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9191,
|
|
"address_region": "program_or_external",
|
|
"bytes": "580004",
|
|
"text": "MOV:I.W #H'0004, R0",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0004, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9191,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 4,
|
|
"hex": "0x0004",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0004, R0"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 = 0x0004"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R0": {
|
|
"known": true,
|
|
"value": 4,
|
|
"hex": "0x0004",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0004, R0"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9194,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2048",
|
|
"text": "BRA loc_2434",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_2434",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9268
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"cycles": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9191,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R0": {
|
|
"known": true,
|
|
"value": 4,
|
|
"hex": "0x0004",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0004, R0"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9196,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE106D0",
|
|
"text": "BCLR.W #0, @H'E106",
|
|
"mnemonic": "BCLR.W",
|
|
"operands": "#0, @H'E106",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 9,
|
|
"base_cycles": 8,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57606,
|
|
"name": null,
|
|
"symbol": "mem_E106",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9196,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9200,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5C0000",
|
|
"text": "MOV:I.W #H'0000, R4",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0000, R4",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9196,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 0,
|
|
"hex": "0x0000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0000, R4"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R4 = 0x0000"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R4": {
|
|
"known": true,
|
|
"value": 0,
|
|
"hex": "0x0000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0000, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9203,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5B0083",
|
|
"text": "MOV:I.W #H'0083, R3",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0083, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9196,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R3 = 0x0083"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
},
|
|
"R4": {
|
|
"known": true,
|
|
"value": 0,
|
|
"hex": "0x0000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0000, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9206,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F791F7",
|
|
"text": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F791",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63377,
|
|
"name": null,
|
|
"symbol": "ram_F791",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9196,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
},
|
|
"R4": {
|
|
"known": true,
|
|
"value": 0,
|
|
"hex": "0x0000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0000, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9210,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2708",
|
|
"text": "BEQ loc_2404",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2404",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9220
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9196,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
},
|
|
"R4": {
|
|
"known": true,
|
|
"value": 0,
|
|
"hex": "0x0000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0000, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9212,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F404F5",
|
|
"text": "BTST.B #5, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#5, @H'F404",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 62468,
|
|
"name": null,
|
|
"symbol": "mem_F404",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9212,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9216,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2702",
|
|
"text": "BEQ loc_2404",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2404",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9220
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9212,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9218,
|
|
"address_region": "program_or_external",
|
|
"bytes": "ABCE",
|
|
"text": "BSET.W #14, R3",
|
|
"mnemonic": "BSET.W",
|
|
"operands": "#14, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9218,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:BSET.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R3"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9220,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1EF62E",
|
|
"text": "BSR loc_1A35",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_1A35",
|
|
"kind": "call",
|
|
"targets": [
|
|
6709
|
|
],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 9,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9220,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9223,
|
|
"address_region": "program_or_external",
|
|
"bytes": "19",
|
|
"text": "RTS",
|
|
"mnemonic": "RTS",
|
|
"operands": "",
|
|
"kind": "return",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 8,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word pop from stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9223,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9224,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6D0F2",
|
|
"text": "BTST.B #2, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#2, @H'F6D0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63184,
|
|
"name": null,
|
|
"symbol": "ram_F6D0",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9224,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9228,
|
|
"address_region": "program_or_external",
|
|
"bytes": "370070",
|
|
"text": "BEQ loc_247F",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_247F",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9343
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9224,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9231,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F7310402",
|
|
"text": "CMP:G.B #H'02, @H'F731",
|
|
"mnemonic": "CMP:G.B",
|
|
"operands": "#H'02, @H'F731",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63281,
|
|
"name": null,
|
|
"symbol": "ram_F731",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9231,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9236,
|
|
"address_region": "program_or_external",
|
|
"bytes": "320068",
|
|
"text": "BHI loc_247F",
|
|
"mnemonic": "BHI",
|
|
"operands": "loc_247F",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9343
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9231,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9239,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE110FF",
|
|
"text": "BTST.W #15, @H'E110",
|
|
"mnemonic": "BTST.W",
|
|
"operands": "#15, @H'E110",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57616,
|
|
"name": null,
|
|
"symbol": "mem_E110",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9239,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9243,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2705",
|
|
"text": "BEQ loc_2422",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2422",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9250
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9239,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9245,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E02C8",
|
|
"text": "BSR loc_26E8",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_26E8",
|
|
"kind": "call",
|
|
"targets": [
|
|
9960
|
|
],
|
|
"cycles": {
|
|
"cycles": 14,
|
|
"base_cycles": 9,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9245,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9248,
|
|
"address_region": "program_or_external",
|
|
"bytes": "205D",
|
|
"text": "BRA loc_247F",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_247F",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9343
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"cycles": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9245,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9250,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6D0F1",
|
|
"text": "BTST.B #1, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#1, @H'F6D0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63184,
|
|
"name": null,
|
|
"symbol": "ram_F6D0",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9250,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9254,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2658",
|
|
"text": "BNE loc_2480",
|
|
"mnemonic": "BNE",
|
|
"operands": "loc_2480",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9344
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9250,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9256,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F730F7",
|
|
"text": "BTST.B #7, @H'F730",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F730",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63280,
|
|
"name": null,
|
|
"symbol": "ram_F730",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9256,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9260,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2736",
|
|
"text": "BEQ loc_2464",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2464",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9316
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9256,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9262,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE10680",
|
|
"text": "MOV:G.W @H'E106, R0",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "@H'E106, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57606,
|
|
"name": null,
|
|
"symbol": "mem_E106",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9262,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "memory_load"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 unknown after memory load"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9266,
|
|
"address_region": "program_or_external",
|
|
"bytes": "A81A",
|
|
"text": "SHLL.W R0",
|
|
"mnemonic": "SHLL.W",
|
|
"operands": "R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9266,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:SHLL.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R0"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9268,
|
|
"address_region": "program_or_external",
|
|
"bytes": "A881",
|
|
"text": "MOV:G.W R0, R1",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "R0, R1",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9268,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unknown_operand"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R1 unknown after MOV source"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9270,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2726",
|
|
"text": "BEQ loc_245E",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_245E",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9310
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9268,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9272,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE50651",
|
|
"text": "AND.W @H'E506, R1",
|
|
"mnemonic": "AND.W",
|
|
"operands": "@H'E506, R1",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 58630,
|
|
"name": null,
|
|
"symbol": "mem_E506",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9272,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:AND.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R1"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9276,
|
|
"address_region": "program_or_external",
|
|
"bytes": "0CFFC451",
|
|
"text": "AND.W #H'FFC4, R1",
|
|
"mnemonic": "AND.W",
|
|
"operands": "#H'FFC4, R1",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 4,
|
|
"base_cycles": 4,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9272,
|
|
"changes": [],
|
|
"notes": [
|
|
"unsupported operation invalidated R1"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9280,
|
|
"address_region": "program_or_external",
|
|
"bytes": "27F0",
|
|
"text": "BEQ loc_2432",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2432",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9266
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9272,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9282,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE90691",
|
|
"text": "MOV:G.W R1, @H'E906",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "R1, @H'E906",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 59654,
|
|
"name": null,
|
|
"symbol": "mem_E906",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9282,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9286,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5280",
|
|
"text": "MOV:E.B #H'80, R2",
|
|
"mnemonic": "MOV:E.B",
|
|
"operands": "#H'80, R2",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 2,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9282,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R2 = 0x80"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9288,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5B0083",
|
|
"text": "MOV:I.W #H'0083, R3",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0083, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9282,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R3 = 0x0083"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9291,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F791F7",
|
|
"text": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F791",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63377,
|
|
"name": null,
|
|
"symbol": "ram_F791",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9282,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9295,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2708",
|
|
"text": "BEQ loc_2459",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2459",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9305
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9282,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9297,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F404F5",
|
|
"text": "BTST.B #5, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#5, @H'F404",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 62468,
|
|
"name": null,
|
|
"symbol": "mem_F404",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9297,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9301,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2702",
|
|
"text": "BEQ loc_2459",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2459",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9305
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9297,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9303,
|
|
"address_region": "program_or_external",
|
|
"bytes": "ABCE",
|
|
"text": "BSET.W #14, R3",
|
|
"mnemonic": "BSET.W",
|
|
"operands": "#14, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9303,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:BSET.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R3"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9305,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E19F8",
|
|
"text": "BSR loc_3E54",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_3E54",
|
|
"kind": "call",
|
|
"targets": [
|
|
15956
|
|
],
|
|
"cycles": {
|
|
"cycles": 14,
|
|
"base_cycles": 9,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9305,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9308,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2021",
|
|
"text": "BRA loc_247F",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_247F",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9343
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"cycles": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9305,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9310,
|
|
"address_region": "program_or_external",
|
|
"bytes": "588000",
|
|
"text": "MOV:I.W #H'8000, R0",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'8000, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9310,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 32768,
|
|
"hex": "0x8000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'8000, R0"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 = 0x8000"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R0": {
|
|
"known": true,
|
|
"value": 32768,
|
|
"hex": "0x8000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'8000, R0"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9313,
|
|
"address_region": "program_or_external",
|
|
"bytes": "30FF59",
|
|
"text": "BRA loc_23BD",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_23BD",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9149
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"cycles": 8,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9310,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R0": {
|
|
"known": true,
|
|
"value": 32768,
|
|
"hex": "0x8000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'8000, R0"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9316,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE106D0",
|
|
"text": "BCLR.W #0, @H'E106",
|
|
"mnemonic": "BCLR.W",
|
|
"operands": "#0, @H'E106",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 9,
|
|
"base_cycles": 8,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57606,
|
|
"name": null,
|
|
"symbol": "mem_E106",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9316,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9320,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5C0001",
|
|
"text": "MOV:I.W #H'0001, R4",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0001, R4",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9316,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 1,
|
|
"hex": "0x0001",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0001, R4"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R4 = 0x0001"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R4": {
|
|
"known": true,
|
|
"value": 1,
|
|
"hex": "0x0001",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0001, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9323,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5B0083",
|
|
"text": "MOV:I.W #H'0083, R3",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0083, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9316,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R3 = 0x0083"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
},
|
|
"R4": {
|
|
"known": true,
|
|
"value": 1,
|
|
"hex": "0x0001",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0001, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9326,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F791F7",
|
|
"text": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F791",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63377,
|
|
"name": null,
|
|
"symbol": "ram_F791",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9316,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
},
|
|
"R4": {
|
|
"known": true,
|
|
"value": 1,
|
|
"hex": "0x0001",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0001, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9330,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2708",
|
|
"text": "BEQ loc_247C",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_247C",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9340
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9316,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
},
|
|
"R4": {
|
|
"known": true,
|
|
"value": 1,
|
|
"hex": "0x0001",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0001, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9332,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F404F5",
|
|
"text": "BTST.B #5, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#5, @H'F404",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 62468,
|
|
"name": null,
|
|
"symbol": "mem_F404",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9332,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9336,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2702",
|
|
"text": "BEQ loc_247C",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_247C",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9340
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9332,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9338,
|
|
"address_region": "program_or_external",
|
|
"bytes": "ABCE",
|
|
"text": "BSET.W #14, R3",
|
|
"mnemonic": "BSET.W",
|
|
"operands": "#14, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9338,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:BSET.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R3"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9340,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1EF5B6",
|
|
"text": "BSR loc_1A35",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_1A35",
|
|
"kind": "call",
|
|
"targets": [
|
|
6709
|
|
],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 9,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9340,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9343,
|
|
"address_region": "program_or_external",
|
|
"bytes": "19",
|
|
"text": "RTS",
|
|
"mnemonic": "RTS",
|
|
"operands": "",
|
|
"kind": "return",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 8,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word pop from stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9343,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9344,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F730F7",
|
|
"text": "BTST.B #7, @H'F730",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F730",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63280,
|
|
"name": null,
|
|
"symbol": "ram_F730",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9344,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9348,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2705",
|
|
"text": "BEQ loc_248B",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_248B",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9355
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9344,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9350,
|
|
"address_region": "program_or_external",
|
|
"bytes": "584000",
|
|
"text": "MOV:I.W #H'4000, R0",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'4000, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9350,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 16384,
|
|
"hex": "0x4000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'4000, R0"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 = 0x4000"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R0": {
|
|
"known": true,
|
|
"value": 16384,
|
|
"hex": "0x4000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'4000, R0"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9353,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2003",
|
|
"text": "BRA loc_248E",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_248E",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9358
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"cycles": 8,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9350,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R0": {
|
|
"known": true,
|
|
"value": 16384,
|
|
"hex": "0x4000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'4000, R0"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9355,
|
|
"address_region": "program_or_external",
|
|
"bytes": "580020",
|
|
"text": "MOV:I.W #H'0020, R0",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0020, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9355,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 32,
|
|
"hex": "0x0020",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0020, R0"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 = 0x0020"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R0": {
|
|
"known": true,
|
|
"value": 32,
|
|
"hex": "0x0020",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0020, R0"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9358,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE90690",
|
|
"text": "MOV:G.W R0, @H'E906",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "R0, @H'E906",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 59654,
|
|
"name": null,
|
|
"symbol": "mem_E906",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9358,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9362,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5280",
|
|
"text": "MOV:E.B #H'80, R2",
|
|
"mnemonic": "MOV:E.B",
|
|
"operands": "#H'80, R2",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 2,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9358,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R2 = 0x80"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9364,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5B0083",
|
|
"text": "MOV:I.W #H'0083, R3",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0083, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9358,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R3 = 0x0083"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9367,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F791F7",
|
|
"text": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F791",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63377,
|
|
"name": null,
|
|
"symbol": "ram_F791",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9358,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9371,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2708",
|
|
"text": "BEQ loc_24A5",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_24A5",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9381
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9358,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9373,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F404F5",
|
|
"text": "BTST.B #5, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#5, @H'F404",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 62468,
|
|
"name": null,
|
|
"symbol": "mem_F404",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9373,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9377,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2702",
|
|
"text": "BEQ loc_24A5",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_24A5",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9381
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9373,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9379,
|
|
"address_region": "program_or_external",
|
|
"bytes": "ABCE",
|
|
"text": "BSET.W #14, R3",
|
|
"mnemonic": "BSET.W",
|
|
"operands": "#14, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9379,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:BSET.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R3"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9381,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E19AC",
|
|
"text": "BSR loc_3E54",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_3E54",
|
|
"kind": "call",
|
|
"targets": [
|
|
15956
|
|
],
|
|
"cycles": {
|
|
"cycles": 14,
|
|
"base_cycles": 9,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9381,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9384,
|
|
"address_region": "program_or_external",
|
|
"bytes": "19",
|
|
"text": "RTS",
|
|
"mnemonic": "RTS",
|
|
"operands": "",
|
|
"kind": "return",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 12,
|
|
"base_cycles": 8,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word pop from stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9381,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9385,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6D0F3",
|
|
"text": "BTST.B #3, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#3, @H'F6D0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63184,
|
|
"name": null,
|
|
"symbol": "ram_F6D0",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9385,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9389,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2738",
|
|
"text": "BEQ loc_24E7",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_24E7",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9447
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9385,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9391,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F7310402",
|
|
"text": "CMP:G.B #H'02, @H'F731",
|
|
"mnemonic": "CMP:G.B",
|
|
"operands": "#H'02, @H'F731",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63281,
|
|
"name": null,
|
|
"symbol": "ram_F731",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9391,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9396,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2231",
|
|
"text": "BHI loc_24E7",
|
|
"mnemonic": "BHI",
|
|
"operands": "loc_24E7",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9447
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9391,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9398,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE110FF",
|
|
"text": "BTST.W #15, @H'E110",
|
|
"mnemonic": "BTST.W",
|
|
"operands": "#15, @H'E110",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57616,
|
|
"name": null,
|
|
"symbol": "mem_E110",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9398,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9402,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2705",
|
|
"text": "BEQ loc_24C1",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_24C1",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9409
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9398,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9404,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E0229",
|
|
"text": "BSR loc_26E8",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_26E8",
|
|
"kind": "call",
|
|
"targets": [
|
|
9960
|
|
],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 9,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9404,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9407,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2026",
|
|
"text": "BRA loc_24E7",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_24E7",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9447
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"cycles": 8,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9404,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9409,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F730F7",
|
|
"text": "BTST.B #7, @H'F730",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F730",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63280,
|
|
"name": null,
|
|
"symbol": "ram_F730",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9409,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9413,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2720",
|
|
"text": "BEQ loc_24E7",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_24E7",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9447
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9409,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9415,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE10680",
|
|
"text": "MOV:G.W @H'E106, R0",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "@H'E106, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57606,
|
|
"name": null,
|
|
"symbol": "mem_E106",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9415,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "memory_load"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 unknown after memory load"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9419,
|
|
"address_region": "program_or_external",
|
|
"bytes": "A8E0",
|
|
"text": "BNOT.W #0, R0",
|
|
"mnemonic": "BNOT.W",
|
|
"operands": "#0, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9415,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "memory_load"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:BNOT.W"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R0"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9421,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE90690",
|
|
"text": "MOV:G.W R0, @H'E906",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "R0, @H'E906",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 59654,
|
|
"name": null,
|
|
"symbol": "mem_E906",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9415,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9425,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5280",
|
|
"text": "MOV:E.B #H'80, R2",
|
|
"mnemonic": "MOV:E.B",
|
|
"operands": "#H'80, R2",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 2,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9415,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R2 = 0x80"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9427,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5B0083",
|
|
"text": "MOV:I.W #H'0083, R3",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0083, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9415,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R3 = 0x0083"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9430,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F791F7",
|
|
"text": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F791",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63377,
|
|
"name": null,
|
|
"symbol": "ram_F791",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9415,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9434,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2708",
|
|
"text": "BEQ loc_24E4",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_24E4",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9444
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9415,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 131,
|
|
"hex": "0x0083",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0083, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9436,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F404F5",
|
|
"text": "BTST.B #5, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#5, @H'F404",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 62468,
|
|
"name": null,
|
|
"symbol": "mem_F404",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9436,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9440,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2702",
|
|
"text": "BEQ loc_24E4",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_24E4",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9444
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9436,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9442,
|
|
"address_region": "program_or_external",
|
|
"bytes": "ABCE",
|
|
"text": "BSET.W #14, R3",
|
|
"mnemonic": "BSET.W",
|
|
"operands": "#14, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9442,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:BSET.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R3"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9444,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E196D",
|
|
"text": "BSR loc_3E54",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_3E54",
|
|
"kind": "call",
|
|
"targets": [
|
|
15956
|
|
],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 9,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9444,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9447,
|
|
"address_region": "program_or_external",
|
|
"bytes": "19",
|
|
"text": "RTS",
|
|
"mnemonic": "RTS",
|
|
"operands": "",
|
|
"kind": "return",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 8,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word pop from stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9447,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9448,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6D0F7",
|
|
"text": "BTST.B #7, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F6D0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63184,
|
|
"name": null,
|
|
"symbol": "ram_F6D0",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9448,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9452,
|
|
"address_region": "program_or_external",
|
|
"bytes": "273F",
|
|
"text": "BEQ loc_252D",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_252D",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9517
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9448,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9454,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F7310402",
|
|
"text": "CMP:G.B #H'02, @H'F731",
|
|
"mnemonic": "CMP:G.B",
|
|
"operands": "#H'02, @H'F731",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63281,
|
|
"name": null,
|
|
"symbol": "ram_F731",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9454,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9459,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2238",
|
|
"text": "BHI loc_252D",
|
|
"mnemonic": "BHI",
|
|
"operands": "loc_252D",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9517
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9454,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9461,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE110FE",
|
|
"text": "BTST.W #14, @H'E110",
|
|
"mnemonic": "BTST.W",
|
|
"operands": "#14, @H'E110",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57616,
|
|
"name": null,
|
|
"symbol": "mem_E110",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9461,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9465,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2705",
|
|
"text": "BEQ loc_2500",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2500",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9472
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9461,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9467,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E01EA",
|
|
"text": "BSR loc_26E8",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_26E8",
|
|
"kind": "call",
|
|
"targets": [
|
|
9960
|
|
],
|
|
"cycles": {
|
|
"cycles": 14,
|
|
"base_cycles": 9,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9467,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9470,
|
|
"address_region": "program_or_external",
|
|
"bytes": "202D",
|
|
"text": "BRA loc_252D",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_252D",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9517
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"cycles": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9467,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9472,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6F613",
|
|
"text": "CLR.B @H'F6F6",
|
|
"mnemonic": "CLR.B",
|
|
"operands": "@H'F6F6",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 9,
|
|
"base_cycles": 8,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63222,
|
|
"name": null,
|
|
"symbol": "ram_F6F6",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9472,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9476,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE11E80",
|
|
"text": "MOV:G.W @H'E11E, R0",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "@H'E11E, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57630,
|
|
"name": null,
|
|
"symbol": "mem_E11E",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9472,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "memory_load"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 unknown after memory load"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9480,
|
|
"address_region": "program_or_external",
|
|
"bytes": "A8FF",
|
|
"text": "BTST.W #15, R0",
|
|
"mnemonic": "BTST.W",
|
|
"operands": "#15, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9472,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9482,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2605",
|
|
"text": "BNE loc_2511",
|
|
"mnemonic": "BNE",
|
|
"operands": "loc_2511",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9489
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9472,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9484,
|
|
"address_region": "program_or_external",
|
|
"bytes": "588000",
|
|
"text": "MOV:I.W #H'8000, R0",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'8000, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9484,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 32768,
|
|
"hex": "0x8000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'8000, R0"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 = 0x8000"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R0": {
|
|
"known": true,
|
|
"value": 32768,
|
|
"hex": "0x8000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'8000, R0"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9487,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2002",
|
|
"text": "BRA loc_2513",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_2513",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9491
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"cycles": 8,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9484,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R0": {
|
|
"known": true,
|
|
"value": 32768,
|
|
"hex": "0x8000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'8000, R0"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9489,
|
|
"address_region": "program_or_external",
|
|
"bytes": "A813",
|
|
"text": "CLR.W R0",
|
|
"mnemonic": "CLR.W",
|
|
"operands": "R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9489,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 0,
|
|
"hex": "0x0000",
|
|
"width": 16,
|
|
"source": "CLR.W R0"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 cleared"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R0": {
|
|
"known": true,
|
|
"value": 0,
|
|
"hex": "0x0000",
|
|
"width": 16,
|
|
"source": "CLR.W R0"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9491,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE91E90",
|
|
"text": "MOV:G.W R0, @H'E91E",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "R0, @H'E91E",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 59678,
|
|
"name": null,
|
|
"symbol": "mem_E91E",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9491,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9495,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5280",
|
|
"text": "MOV:E.B #H'80, R2",
|
|
"mnemonic": "MOV:E.B",
|
|
"operands": "#H'80, R2",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 2,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9491,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R2 = 0x80"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9497,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5B008F",
|
|
"text": "MOV:I.W #H'008F, R3",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'008F, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9491,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 143,
|
|
"hex": "0x008F",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'008F, R3"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R3 = 0x008F"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 143,
|
|
"hex": "0x008F",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'008F, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9500,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F791F7",
|
|
"text": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F791",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63377,
|
|
"name": null,
|
|
"symbol": "ram_F791",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9491,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 143,
|
|
"hex": "0x008F",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'008F, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9504,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2708",
|
|
"text": "BEQ loc_252A",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_252A",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9514
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9491,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 143,
|
|
"hex": "0x008F",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'008F, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9506,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F404F4",
|
|
"text": "BTST.B #4, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#4, @H'F404",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 62468,
|
|
"name": null,
|
|
"symbol": "mem_F404",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9506,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9510,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2702",
|
|
"text": "BEQ loc_252A",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_252A",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9514
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9506,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9512,
|
|
"address_region": "program_or_external",
|
|
"bytes": "ABCE",
|
|
"text": "BSET.W #14, R3",
|
|
"mnemonic": "BSET.W",
|
|
"operands": "#14, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9512,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:BSET.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R3"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9514,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E1927",
|
|
"text": "BSR loc_3E54",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_3E54",
|
|
"kind": "call",
|
|
"targets": [
|
|
15956
|
|
],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 9,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9514,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9517,
|
|
"address_region": "program_or_external",
|
|
"bytes": "19",
|
|
"text": "RTS",
|
|
"mnemonic": "RTS",
|
|
"operands": "",
|
|
"kind": "return",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 8,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word pop from stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9517,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9518,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6D0F6",
|
|
"text": "BTST.B #6, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#6, @H'F6D0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63184,
|
|
"name": null,
|
|
"symbol": "ram_F6D0",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9518,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9522,
|
|
"address_region": "program_or_external",
|
|
"bytes": "273F",
|
|
"text": "BEQ loc_2573",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2573",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9587
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9518,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9524,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F7310402",
|
|
"text": "CMP:G.B #H'02, @H'F731",
|
|
"mnemonic": "CMP:G.B",
|
|
"operands": "#H'02, @H'F731",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63281,
|
|
"name": null,
|
|
"symbol": "ram_F731",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9524,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9529,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2238",
|
|
"text": "BHI loc_2573",
|
|
"mnemonic": "BHI",
|
|
"operands": "loc_2573",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9587
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9524,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9531,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE110FE",
|
|
"text": "BTST.W #14, @H'E110",
|
|
"mnemonic": "BTST.W",
|
|
"operands": "#14, @H'E110",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57616,
|
|
"name": null,
|
|
"symbol": "mem_E110",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9531,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9535,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2705",
|
|
"text": "BEQ loc_2546",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2546",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9542
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9531,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9537,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E01A4",
|
|
"text": "BSR loc_26E8",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_26E8",
|
|
"kind": "call",
|
|
"targets": [
|
|
9960
|
|
],
|
|
"cycles": {
|
|
"cycles": 14,
|
|
"base_cycles": 9,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9537,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9540,
|
|
"address_region": "program_or_external",
|
|
"bytes": "202D",
|
|
"text": "BRA loc_2573",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_2573",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9587
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"cycles": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9537,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9542,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6F613",
|
|
"text": "CLR.B @H'F6F6",
|
|
"mnemonic": "CLR.B",
|
|
"operands": "@H'F6F6",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 9,
|
|
"base_cycles": 8,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63222,
|
|
"name": null,
|
|
"symbol": "ram_F6F6",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9542,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9546,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE11E80",
|
|
"text": "MOV:G.W @H'E11E, R0",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "@H'E11E, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57630,
|
|
"name": null,
|
|
"symbol": "mem_E11E",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9542,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "memory_load"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 unknown after memory load"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9550,
|
|
"address_region": "program_or_external",
|
|
"bytes": "A8FD",
|
|
"text": "BTST.W #13, R0",
|
|
"mnemonic": "BTST.W",
|
|
"operands": "#13, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9542,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9552,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2605",
|
|
"text": "BNE loc_2557",
|
|
"mnemonic": "BNE",
|
|
"operands": "loc_2557",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9559
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9542,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9554,
|
|
"address_region": "program_or_external",
|
|
"bytes": "582000",
|
|
"text": "MOV:I.W #H'2000, R0",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'2000, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9554,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 8192,
|
|
"hex": "0x2000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'2000, R0"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 = 0x2000"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R0": {
|
|
"known": true,
|
|
"value": 8192,
|
|
"hex": "0x2000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'2000, R0"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9557,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2002",
|
|
"text": "BRA loc_2559",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_2559",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9561
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"cycles": 8,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9554,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R0": {
|
|
"known": true,
|
|
"value": 8192,
|
|
"hex": "0x2000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'2000, R0"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9559,
|
|
"address_region": "program_or_external",
|
|
"bytes": "A813",
|
|
"text": "CLR.W R0",
|
|
"mnemonic": "CLR.W",
|
|
"operands": "R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9559,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 0,
|
|
"hex": "0x0000",
|
|
"width": 16,
|
|
"source": "CLR.W R0"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 cleared"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R0": {
|
|
"known": true,
|
|
"value": 0,
|
|
"hex": "0x0000",
|
|
"width": 16,
|
|
"source": "CLR.W R0"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9561,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE91E90",
|
|
"text": "MOV:G.W R0, @H'E91E",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "R0, @H'E91E",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 59678,
|
|
"name": null,
|
|
"symbol": "mem_E91E",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9561,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9565,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5280",
|
|
"text": "MOV:E.B #H'80, R2",
|
|
"mnemonic": "MOV:E.B",
|
|
"operands": "#H'80, R2",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 2,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9561,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R2 = 0x80"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9567,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5B008F",
|
|
"text": "MOV:I.W #H'008F, R3",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'008F, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9561,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 143,
|
|
"hex": "0x008F",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'008F, R3"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R3 = 0x008F"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 143,
|
|
"hex": "0x008F",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'008F, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9570,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F791F7",
|
|
"text": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F791",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63377,
|
|
"name": null,
|
|
"symbol": "ram_F791",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9561,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 143,
|
|
"hex": "0x008F",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'008F, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9574,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2708",
|
|
"text": "BEQ loc_2570",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2570",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9584
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9561,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 143,
|
|
"hex": "0x008F",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'008F, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9576,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F404F4",
|
|
"text": "BTST.B #4, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#4, @H'F404",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 62468,
|
|
"name": null,
|
|
"symbol": "mem_F404",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9576,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9580,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2702",
|
|
"text": "BEQ loc_2570",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2570",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9584
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9576,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9582,
|
|
"address_region": "program_or_external",
|
|
"bytes": "ABCE",
|
|
"text": "BSET.W #14, R3",
|
|
"mnemonic": "BSET.W",
|
|
"operands": "#14, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9582,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:BSET.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R3"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9584,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E18E1",
|
|
"text": "BSR loc_3E54",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_3E54",
|
|
"kind": "call",
|
|
"targets": [
|
|
15956
|
|
],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 9,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9584,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9587,
|
|
"address_region": "program_or_external",
|
|
"bytes": "19",
|
|
"text": "RTS",
|
|
"mnemonic": "RTS",
|
|
"operands": "",
|
|
"kind": "return",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 8,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word pop from stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9587,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9588,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6D0F4",
|
|
"text": "BTST.B #4, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#4, @H'F6D0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63184,
|
|
"name": null,
|
|
"symbol": "ram_F6D0",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9588,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9592,
|
|
"address_region": "program_or_external",
|
|
"bytes": "370145",
|
|
"text": "BEQ loc_26C0",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_26C0",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9920
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9588,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9595,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F7310402",
|
|
"text": "CMP:G.B #H'02, @H'F731",
|
|
"mnemonic": "CMP:G.B",
|
|
"operands": "#H'02, @H'F731",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63281,
|
|
"name": null,
|
|
"symbol": "ram_F731",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9595,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9600,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2251",
|
|
"text": "BHI loc_25D3",
|
|
"mnemonic": "BHI",
|
|
"operands": "loc_25D3",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9683
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9595,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9602,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE110FE",
|
|
"text": "BTST.W #14, @H'E110",
|
|
"mnemonic": "BTST.W",
|
|
"operands": "#14, @H'E110",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57616,
|
|
"name": null,
|
|
"symbol": "mem_E110",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9602,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9606,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2705",
|
|
"text": "BEQ loc_258D",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_258D",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9613
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9602,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9608,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E015D",
|
|
"text": "BSR loc_26E8",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_26E8",
|
|
"kind": "call",
|
|
"targets": [
|
|
9960
|
|
],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 9,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9608,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9611,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2046",
|
|
"text": "BRA loc_25D3",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_25D3",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9683
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"cycles": 8,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9608,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9613,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE11E80",
|
|
"text": "MOV:G.W @H'E11E, R0",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "@H'E11E, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57630,
|
|
"name": null,
|
|
"symbol": "mem_E11E",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9613,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "memory_load"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 unknown after memory load"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9617,
|
|
"address_region": "program_or_external",
|
|
"bytes": "A8FF",
|
|
"text": "BTST.W #15, R0",
|
|
"mnemonic": "BTST.W",
|
|
"operands": "#15, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9613,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9619,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2606",
|
|
"text": "BNE loc_259B",
|
|
"mnemonic": "BNE",
|
|
"operands": "loc_259B",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9627
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9613,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9621,
|
|
"address_region": "program_or_external",
|
|
"bytes": "A8FD",
|
|
"text": "BTST.W #13, R0",
|
|
"mnemonic": "BTST.W",
|
|
"operands": "#13, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9621,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9623,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2626",
|
|
"text": "BNE loc_25BF",
|
|
"mnemonic": "BNE",
|
|
"operands": "loc_25BF",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9663
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9621,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9625,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2038",
|
|
"text": "BRA loc_25D3",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_25D3",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9683
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"cycles": 8,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9625,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9627,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6D0F5",
|
|
"text": "BTST.B #5, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#5, @H'F6D0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63184,
|
|
"name": null,
|
|
"symbol": "ram_F6D0",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9627,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9631,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2705",
|
|
"text": "BEQ loc_25A6",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_25A6",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9638
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9627,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9633,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E008F",
|
|
"text": "BSR loc_2633",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_2633",
|
|
"kind": "call",
|
|
"targets": [
|
|
9779
|
|
],
|
|
"cycles": {
|
|
"cycles": 14,
|
|
"base_cycles": 9,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9633,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9636,
|
|
"address_region": "program_or_external",
|
|
"bytes": "202D",
|
|
"text": "BRA loc_25D3",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_25D3",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9683
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"cycles": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9633,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9638,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5C0000",
|
|
"text": "MOV:I.W #H'0000, R4",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0000, R4",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9638,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 0,
|
|
"hex": "0x0000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0000, R4"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R4 = 0x0000"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R4": {
|
|
"known": true,
|
|
"value": 0,
|
|
"hex": "0x0000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0000, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9641,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5B0091",
|
|
"text": "MOV:I.W #H'0091, R3",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0091, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9638,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 145,
|
|
"hex": "0x0091",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0091, R3"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R3 = 0x0091"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R3": {
|
|
"known": true,
|
|
"value": 145,
|
|
"hex": "0x0091",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0091, R3"
|
|
},
|
|
"R4": {
|
|
"known": true,
|
|
"value": 0,
|
|
"hex": "0x0000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0000, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9644,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F791F7",
|
|
"text": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F791",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63377,
|
|
"name": null,
|
|
"symbol": "ram_F791",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9638,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R3": {
|
|
"known": true,
|
|
"value": 145,
|
|
"hex": "0x0091",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0091, R3"
|
|
},
|
|
"R4": {
|
|
"known": true,
|
|
"value": 0,
|
|
"hex": "0x0000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0000, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9648,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2708",
|
|
"text": "BEQ loc_25BA",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_25BA",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9658
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9638,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R3": {
|
|
"known": true,
|
|
"value": 145,
|
|
"hex": "0x0091",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0091, R3"
|
|
},
|
|
"R4": {
|
|
"known": true,
|
|
"value": 0,
|
|
"hex": "0x0000",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0000, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9650,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F404F4",
|
|
"text": "BTST.B #4, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#4, @H'F404",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 62468,
|
|
"name": null,
|
|
"symbol": "mem_F404",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9650,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9654,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2702",
|
|
"text": "BEQ loc_25BA",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_25BA",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9658
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9650,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9656,
|
|
"address_region": "program_or_external",
|
|
"bytes": "ABCE",
|
|
"text": "BSET.W #14, R3",
|
|
"mnemonic": "BSET.W",
|
|
"operands": "#14, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9656,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:BSET.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R3"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9658,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1EF478",
|
|
"text": "BSR loc_1A35",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_1A35",
|
|
"kind": "call",
|
|
"targets": [
|
|
6709
|
|
],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 9,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9658,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9661,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2014",
|
|
"text": "BRA loc_25D3",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_25D3",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9683
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"cycles": 8,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9658,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9663,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6D0F5",
|
|
"text": "BTST.B #5, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#5, @H'F6D0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63184,
|
|
"name": null,
|
|
"symbol": "ram_F6D0",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9663,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9667,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2705",
|
|
"text": "BEQ loc_25CA",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_25CA",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9674
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9663,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9669,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E00FF",
|
|
"text": "BSR loc_26C7",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_26C7",
|
|
"kind": "call",
|
|
"targets": [
|
|
9927
|
|
],
|
|
"cycles": {
|
|
"cycles": 14,
|
|
"base_cycles": 9,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9669,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9672,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2009",
|
|
"text": "BRA loc_25D3",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_25D3",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9683
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"cycles": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9669,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9674,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6F606C0",
|
|
"text": "MOV:G.B #H'C0, @H'F6F6",
|
|
"mnemonic": "MOV:G.B",
|
|
"operands": "#H'C0, @H'F6F6",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 9,
|
|
"base_cycles": 8,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63222,
|
|
"name": null,
|
|
"symbol": "ram_F6F6",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9674,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9679,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DF6F413",
|
|
"text": "CLR.W @H'F6F4",
|
|
"mnemonic": "CLR.W",
|
|
"operands": "@H'F6F4",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 8,
|
|
"base_cycles": 8,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63220,
|
|
"name": null,
|
|
"symbol": "ram_F6F4",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9674,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9683,
|
|
"address_region": "program_or_external",
|
|
"bytes": "19",
|
|
"text": "RTS",
|
|
"mnemonic": "RTS",
|
|
"operands": "",
|
|
"kind": "return",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 8,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word pop from stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9683,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9684,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6D0F5",
|
|
"text": "BTST.B #5, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#5, @H'F6D0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63184,
|
|
"name": null,
|
|
"symbol": "ram_F6D0",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9684,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9688,
|
|
"address_region": "program_or_external",
|
|
"bytes": "3700E5",
|
|
"text": "BEQ loc_26C0",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_26C0",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9920
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9684,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9691,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F7310402",
|
|
"text": "CMP:G.B #H'02, @H'F731",
|
|
"mnemonic": "CMP:G.B",
|
|
"operands": "#H'02, @H'F731",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63281,
|
|
"name": null,
|
|
"symbol": "ram_F731",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9691,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9696,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2250",
|
|
"text": "BHI loc_2632",
|
|
"mnemonic": "BHI",
|
|
"operands": "loc_2632",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9778
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9691,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9698,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE110FE",
|
|
"text": "BTST.W #14, @H'E110",
|
|
"mnemonic": "BTST.W",
|
|
"operands": "#14, @H'E110",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57616,
|
|
"name": null,
|
|
"symbol": "mem_E110",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9698,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9702,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2705",
|
|
"text": "BEQ loc_25ED",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_25ED",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9709
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9698,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9704,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E00FD",
|
|
"text": "BSR loc_26E8",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_26E8",
|
|
"kind": "call",
|
|
"targets": [
|
|
9960
|
|
],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 9,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9704,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9707,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2045",
|
|
"text": "BRA loc_2632",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_2632",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9778
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"cycles": 8,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9704,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9709,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE11E80",
|
|
"text": "MOV:G.W @H'E11E, R0",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "@H'E11E, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 57630,
|
|
"name": null,
|
|
"symbol": "mem_E11E",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9709,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "memory_load"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R0 unknown after memory load"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9713,
|
|
"address_region": "program_or_external",
|
|
"bytes": "A8FF",
|
|
"text": "BTST.W #15, R0",
|
|
"mnemonic": "BTST.W",
|
|
"operands": "#15, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9709,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9715,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2606",
|
|
"text": "BNE loc_25FB",
|
|
"mnemonic": "BNE",
|
|
"operands": "loc_25FB",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9723
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9709,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9717,
|
|
"address_region": "program_or_external",
|
|
"bytes": "A8FD",
|
|
"text": "BTST.W #13, R0",
|
|
"mnemonic": "BTST.W",
|
|
"operands": "#13, R0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9717,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9719,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2625",
|
|
"text": "BNE loc_261E",
|
|
"mnemonic": "BNE",
|
|
"operands": "loc_261E",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9758
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9717,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9721,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2037",
|
|
"text": "BRA loc_2632",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_2632",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9778
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"cycles": 8,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9721,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9723,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6D0F4",
|
|
"text": "BTST.B #4, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#4, @H'F6D0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63184,
|
|
"name": null,
|
|
"symbol": "ram_F6D0",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9723,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9727,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2704",
|
|
"text": "BEQ loc_2605",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2605",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9733
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9723,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9729,
|
|
"address_region": "program_or_external",
|
|
"bytes": "0E30",
|
|
"text": "BSR loc_2633",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_2633",
|
|
"kind": "call",
|
|
"targets": [
|
|
9779
|
|
],
|
|
"cycles": {
|
|
"cycles": 14,
|
|
"base_cycles": 9,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9729,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9731,
|
|
"address_region": "program_or_external",
|
|
"bytes": "202D",
|
|
"text": "BRA loc_2632",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_2632",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9778
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"cycles": 8,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9729,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9733,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5C0001",
|
|
"text": "MOV:I.W #H'0001, R4",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0001, R4",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9733,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 1,
|
|
"hex": "0x0001",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0001, R4"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R4 = 0x0001"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R4": {
|
|
"known": true,
|
|
"value": 1,
|
|
"hex": "0x0001",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0001, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9736,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5B0091",
|
|
"text": "MOV:I.W #H'0091, R3",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0091, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9733,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 145,
|
|
"hex": "0x0091",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0091, R3"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R3 = 0x0091"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R3": {
|
|
"known": true,
|
|
"value": 145,
|
|
"hex": "0x0091",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0091, R3"
|
|
},
|
|
"R4": {
|
|
"known": true,
|
|
"value": 1,
|
|
"hex": "0x0001",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0001, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9739,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F791F7",
|
|
"text": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F791",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63377,
|
|
"name": null,
|
|
"symbol": "ram_F791",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9733,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R3": {
|
|
"known": true,
|
|
"value": 145,
|
|
"hex": "0x0091",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0091, R3"
|
|
},
|
|
"R4": {
|
|
"known": true,
|
|
"value": 1,
|
|
"hex": "0x0001",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0001, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9743,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2708",
|
|
"text": "BEQ loc_2619",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2619",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9753
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9733,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R3": {
|
|
"known": true,
|
|
"value": 145,
|
|
"hex": "0x0091",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0091, R3"
|
|
},
|
|
"R4": {
|
|
"known": true,
|
|
"value": 1,
|
|
"hex": "0x0001",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0001, R4"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9745,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F404F4",
|
|
"text": "BTST.B #4, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#4, @H'F404",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 6,
|
|
"base_cycles": 6,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 62468,
|
|
"name": null,
|
|
"symbol": "mem_F404",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9745,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9749,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2702",
|
|
"text": "BEQ loc_2619",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2619",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9753
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9745,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9751,
|
|
"address_region": "program_or_external",
|
|
"bytes": "ABCE",
|
|
"text": "BSET.W #14, R3",
|
|
"mnemonic": "BSET.W",
|
|
"operands": "#14, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9751,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:BSET.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R3"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9753,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1EF419",
|
|
"text": "BSR loc_1A35",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_1A35",
|
|
"kind": "call",
|
|
"targets": [
|
|
6709
|
|
],
|
|
"cycles": {
|
|
"cycles": 14,
|
|
"base_cycles": 9,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9753,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9756,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2014",
|
|
"text": "BRA loc_2632",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_2632",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9778
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"cycles": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9753,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9758,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6D0F4",
|
|
"text": "BTST.B #4, @H'F6D0",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#4, @H'F6D0",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63184,
|
|
"name": null,
|
|
"symbol": "ram_F6D0",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9758,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9762,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2705",
|
|
"text": "BEQ loc_2629",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_2629",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9769
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9758,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9764,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E00A0",
|
|
"text": "BSR loc_26C7",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_26C7",
|
|
"kind": "call",
|
|
"targets": [
|
|
9927
|
|
],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 9,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9764,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9767,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2009",
|
|
"text": "BRA loc_2632",
|
|
"mnemonic": "BRA",
|
|
"operands": "loc_2632",
|
|
"kind": "jump",
|
|
"targets": [
|
|
9778
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 8,
|
|
"base_taken": 7,
|
|
"alignment_adjustment_taken": 1,
|
|
"cycles": 8,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9764,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9769,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F6F60680",
|
|
"text": "MOV:G.B #H'80, @H'F6F6",
|
|
"mnemonic": "MOV:G.B",
|
|
"operands": "#H'80, @H'F6F6",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 9,
|
|
"base_cycles": 8,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63222,
|
|
"name": null,
|
|
"symbol": "ram_F6F6",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9769,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9774,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DF6F413",
|
|
"text": "CLR.W @H'F6F4",
|
|
"mnemonic": "CLR.W",
|
|
"operands": "@H'F6F4",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 9,
|
|
"base_cycles": 8,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63220,
|
|
"name": null,
|
|
"symbol": "ram_F6F4",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9769,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9778,
|
|
"address_region": "program_or_external",
|
|
"bytes": "19",
|
|
"text": "RTS",
|
|
"mnemonic": "RTS",
|
|
"operands": "",
|
|
"kind": "return",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 12,
|
|
"base_cycles": 8,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word pop from stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9778,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9779,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1DE922078000",
|
|
"text": "MOV:G.W #H'8000, @H'E922",
|
|
"mnemonic": "MOV:G.W",
|
|
"operands": "#H'8000, @H'E922",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 9,
|
|
"base_cycles": 9,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 59682,
|
|
"name": null,
|
|
"symbol": "mem_E922",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9779,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9785,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5280",
|
|
"text": "MOV:E.B #H'80, R2",
|
|
"mnemonic": "MOV:E.B",
|
|
"operands": "#H'80, R2",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 2,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9779,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R2 = 0x80"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9787,
|
|
"address_region": "program_or_external",
|
|
"bytes": "5B0091",
|
|
"text": "MOV:I.W #H'0091, R3",
|
|
"mnemonic": "MOV:I.W",
|
|
"operands": "#H'0091, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9779,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": true,
|
|
"value": 145,
|
|
"hex": "0x0091",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0091, R3"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"R3 = 0x0091"
|
|
],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 145,
|
|
"hex": "0x0091",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0091, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9790,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F791F7",
|
|
"text": "BTST.B #7, @H'F791",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#7, @H'F791",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 63377,
|
|
"name": null,
|
|
"symbol": "ram_F791",
|
|
"region": "on_chip_ram",
|
|
"kind": "ram"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9779,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 145,
|
|
"hex": "0x0091",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0091, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9794,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2708",
|
|
"text": "BEQ loc_264C",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_264C",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9804
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9779,
|
|
"changes": [],
|
|
"notes": [],
|
|
"known_after": {
|
|
"registers": {
|
|
"R2": {
|
|
"known": true,
|
|
"value": 128,
|
|
"hex": "0x80",
|
|
"width": 8,
|
|
"source": "MOV:E.B #H'80, R2"
|
|
},
|
|
"R3": {
|
|
"known": true,
|
|
"value": 145,
|
|
"hex": "0x0091",
|
|
"width": 16,
|
|
"source": "MOV:I.W #H'0091, R3"
|
|
}
|
|
}
|
|
}
|
|
}
|
|
},
|
|
{
|
|
"address": 9796,
|
|
"address_region": "program_or_external",
|
|
"bytes": "15F404F4",
|
|
"text": "BTST.B #4, @H'F404",
|
|
"mnemonic": "BTST.B",
|
|
"operands": "#4, @H'F404",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 7,
|
|
"base_cycles": 6,
|
|
"alignment_adjustment": 1,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [
|
|
{
|
|
"address": 62468,
|
|
"name": null,
|
|
"symbol": "mem_F404",
|
|
"region": "program_or_external",
|
|
"kind": "program"
|
|
}
|
|
],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9796,
|
|
"changes": [
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9800,
|
|
"address_region": "program_or_external",
|
|
"bytes": "2702",
|
|
"text": "BEQ loc_264C",
|
|
"mnemonic": "BEQ",
|
|
"operands": "loc_264C",
|
|
"kind": "branch",
|
|
"targets": [
|
|
9804
|
|
],
|
|
"cycles": {
|
|
"not_taken": 3,
|
|
"taken": 7,
|
|
"base_taken": 7,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9796,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
},
|
|
{
|
|
"address": 9802,
|
|
"address_region": "program_or_external",
|
|
"bytes": "ABCE",
|
|
"text": "BSET.W #14, R3",
|
|
"mnemonic": "BSET.W",
|
|
"operands": "#14, R3",
|
|
"kind": "normal",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 3,
|
|
"base_cycles": 3,
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9802,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "unsupported:BSET.W"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "flags"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"unsupported operation invalidated R3"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9804,
|
|
"address_region": "program_or_external",
|
|
"bytes": "1E1805",
|
|
"text": "BSR loc_3E54",
|
|
"mnemonic": "BSR",
|
|
"operands": "loc_3E54",
|
|
"kind": "call",
|
|
"targets": [
|
|
15956
|
|
],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 9,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word push to stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9804,
|
|
"changes": [
|
|
{
|
|
"kind": "register",
|
|
"name": "R0",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R1",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R2",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R3",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R4",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R5",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R6",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "register",
|
|
"name": "R7",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "CCR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "BR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "EP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "DP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "TP",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
},
|
|
{
|
|
"kind": "control",
|
|
"name": "SR",
|
|
"before": {
|
|
"known": false,
|
|
"reason": "block_entry"
|
|
},
|
|
"after": {
|
|
"known": false,
|
|
"reason": "call"
|
|
}
|
|
}
|
|
],
|
|
"notes": [
|
|
"call clobbers tracked register state"
|
|
]
|
|
}
|
|
},
|
|
{
|
|
"address": 9807,
|
|
"address_region": "program_or_external",
|
|
"bytes": "19",
|
|
"text": "RTS",
|
|
"mnemonic": "RTS",
|
|
"operands": "",
|
|
"kind": "return",
|
|
"targets": [],
|
|
"cycles": {
|
|
"cycles": 13,
|
|
"base_cycles": 8,
|
|
"alignment_adjustment": 1,
|
|
"stack_adjustment": 4,
|
|
"note": "PC word pop from stack",
|
|
"source": "manual Appendix A.4, tables A-7/A-8",
|
|
"assumption": "on-chip instruction fetch/operand access, no external wait states"
|
|
},
|
|
"references": [],
|
|
"comment": "",
|
|
"valid": true,
|
|
"dataflow": {
|
|
"block": 9804,
|
|
"changes": [],
|
|
"notes": []
|
|
}
|
|
}
|
|
],
|
|
"decompiler_consistency": {
|
|
"kind": "decompiler_pseudocode_consistency",
|
|
"summary": "No byte-immediate-to-word destination cases found.",
|
|
"checks": []
|
|
},
|
|
"serial_semantics": {
|
|
"kind": "serial_semantics",
|
|
"protocol_semantics": [],
|
|
"fields": [],
|
|
"command_dispatch": null,
|
|
"commands": [],
|
|
"command_effects": [],
|
|
"response_candidates": [],
|
|
"response_schemas": [],
|
|
"response_schema": [],
|
|
"logical_table_map_candidates": [],
|
|
"table_map_candidates": [],
|
|
"state_variable_candidates": [],
|
|
"retry_error_model": null,
|
|
"gate_queue_model": null,
|
|
"tx_report_model": null,
|
|
"periodic_resend_model": null,
|
|
"timer_interrupt_model": null,
|
|
"confidence": "low",
|
|
"confidence_score": 0.0,
|
|
"caveat": "No protocol semantics are emitted without both RX and TX serial reconstruction candidates."
|
|
}
|
|
} |