{ "vectors": [ { "address": 0, "name": "reset", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 4, "name": "invalid_instruction", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 6, "name": "zero_divide", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 8, "name": "trap_vs", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 16, "name": "address_error", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 18, "name": "trace", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 22, "name": "nmi", "target": 17299, "target_label": "vec_nmi_4393" }, { "address": 32, "name": "trapa_0", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 34, "name": "trapa_1", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 36, "name": "trapa_2", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 38, "name": "trapa_3", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 40, "name": "trapa_4", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 42, "name": "trapa_5", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 44, "name": "trapa_6", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 46, "name": "trapa_7", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 48, "name": "trapa_8", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 50, "name": "trapa_9", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 52, "name": "trapa_a", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 54, "name": "trapa_b", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 56, "name": "trapa_c", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 58, "name": "trapa_d", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 60, "name": "trapa_e", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 62, "name": "trapa_f", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 64, "name": "irq0", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 66, "name": "interval_timer", "target": 49092, "target_label": "vec_interval_timer_BFC4" }, { "address": 72, "name": "irq1", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 80, "name": "irq2", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 82, "name": "irq3", "target": 15408, "target_label": "vec_irq3_3C30" }, { "address": 88, "name": "irq4", "target": 15047, "target_label": "vec_irq4_3AC7" }, { "address": 90, "name": "irq5", "target": 4096, "target_label": "vec_reset_1000" }, { "address": 98, "name": "frt1_ocia", "target": 48874, "target_label": "vec_frt1_ocia_BEEA" }, { "address": 106, "name": "frt2_ocia", "target": 48931, "target_label": "vec_frt2_ocia_BF23" }, { "address": 128, "name": "sci1_eri", "target": 47959, "target_label": "vec_sci1_eri_BB57" }, { "address": 130, "name": "sci1_rxi", "target": 47975, "target_label": "vec_sci1_rxi_BB67" }, { "address": 132, "name": "sci1_txi", "target": 47748, "target_label": "vec_sci1_txi_BA84" }, { "address": 144, "name": "ad_adi", "target": 15769, "target_label": "vec_ad_adi_3D99" } ], "dtc_vectors": [], "memory_regions": [ { "name": "exception_vectors", "start": 0, "end": 159, "kind": "vectors", "manual": "section 2 address space" }, { "name": "dtc_vectors", "start": 160, "end": 255, "kind": "dtc_vectors", "manual": "section 2 address space" }, { "name": "program_or_external", "start": 256, "end": 63103, "kind": "program", "manual": "section 2/17 mode-dependent ROM or external space" }, { "name": "on_chip_ram", "start": 63104, "end": 65151, "kind": "ram", "manual": "section 16 RAM" }, { "name": "register_field", "start": 65152, "end": 65535, "kind": "registers", "manual": "appendix B register map" } ], "data_candidates": { "strings": [], "pointer_tables": [] }, "call_graph": { "nodes": [], "edges": [] }, "timing_summary": { "blocks": [], "loops": [] }, "sci": { "clock_hz": null, "formulas": { "async": "B = clock_hz / (64 * 2^(2n) * (N + 1))", "sync": "B = clock_hz / (8 * 2^(2n) * (N + 1))" }, "manual_references": [ "Manual/0900766b802125d0.md:15837 SMR selects SCI mode and CKS1/CKS0 internal clock source", "Manual/0900766b802125d0.md:16027 SCR.CKE1 selects internal or external clock source", "Manual/0900766b802125d0.md:16177 BRR and SMR.CKS determine the baud-rate generator", "Manual/0900766b802125d0.md:16303 asynchronous BRR formula", "Manual/0900766b802125d0.md:16379 synchronous BRR formula", "Manual/0900766b802125d0.md:16410 SCI clock source selection tables" ], "channels": { "SCI1": { "writes": [], "configurations": [] }, "SCI2": { "writes": [], "configurations": [] } } }, "sci_protocol": { "manual_references": [ "Manual/0900766b802125d0.md:15748 SCI register map for RDR/TDR/SCR/SSR", "Manual/0900766b802125d0.md:15794 RDR stores received data and is CPU-readable", "Manual/0900766b802125d0.md:15823 TDR holds the next byte to transmit", "Manual/0900766b802125d0.md:15976 SCR.TIE enables/disables TXI on TDRE", "Manual/0900766b802125d0.md:15993 SCR.RIE enables RXI and ERI", "Manual/0900766b802125d0.md:16008 SCR.TE enables the transmitter", "Manual/0900766b802125d0.md:16028 SCR.RE enables the receiver", "Manual/0900766b802125d0.md:16090 SSR flags are cleared by writing zero", "Manual/0900766b802125d0.md:16100 SSR.TDRE means TDR can accept the next byte", "Manual/0900766b802125d0.md:16116 SSR.RDRF means received data reached RDR", "Manual/0900766b802125d0.md:16127 SSR.ORER reports receive overrun", "Manual/0900766b802125d0.md:16140 SSR.FER reports framing errors", "Manual/0900766b802125d0.md:16147 SSR.PER reports parity errors" ], "channels": { "SCI1": { "events": [] }, "SCI2": { "events": [] } }, "events": [] }, "serial_reconstruction": { "kind": "serial_reconstruction", "candidates": [], "ram_roles": [], "evidence": [], "required_evidence": { "tx": [ "tx_buffer_region", "tx_checksum_seed", "checksum_byte", "xor_checksum_chain", "initial_send_from_buffer_start", "tx_index_initialized_to_one", "tx_isr_indexed_send", "tx_index_increment", "tx_index_compare_frame_length" ], "rx": [ "rx_rdr_read", "rx_indexed_store", "rx_index_increment_store", "rx_isr_compare_frame_length", "rx_complete_timer", "rx_processor_requires_six_bytes", "rx_copy_capture_to_frame_buffer", "rx_checksum_seed", "rx_xor_checksum_validation" ] } }, "board_profile": { "board": "sony_rcp_tx7", "name": "Sony RCP-TX7", "summary": "Board trace ties the H8/536 SCI1 pins to a MAX202 RS232 transceiver.", "manual_references": [ "Manual/0900766b802125d0.md:2417 FP-80 H8/536 pin 66 is P95/TXD", "Manual/0900766b802125d0.md:2418 FP-80 H8/536 pin 67 is P96/RXD", "Manual/0900766b802125d0.md:11192 Port 9 carries SCI1 and SCI2 serial signals", "Manual/0900766b802125d0.md:11201 P96 is RXD1 input", "Manual/0900766b802125d0.md:11202 P95 is TXD1 output", "Manual/0900766b802125d0.md:15725 SCI1 RXD input pin", "Manual/0900766b802125d0.md:15726 SCI1 TXD output pin", "Manual/0900766b802125d0.md:15750 SCI register table starts with SCI1 RDR/TDR/SMR/SCR/SSR/BRR", "Manual/0900766b802125d0.md:15758 SCI register table lists SCI2 RDR/TDR/SMR/SCR/SSR/BRR", "Manual/0900766b802125d0.md:15794 RDR receive data register", "Manual/0900766b802125d0.md:15823 TDR transmit data register", "Manual/0900766b802125d0.md:15969 SCR enables and disables SCI functions", "Manual/0900766b802125d0.md:16009 SCR.TE makes the TXD pin output", "Manual/0900766b802125d0.md:16029 SCR.RE makes the RXD pin input", "Manual/0900766b802125d0.md:16090 SSR contains transmit/receive status flags", "Manual/0900766b802125d0.md:10560 SYSCR2 controls port 9 pin functions", "Manual/0900766b802125d0.md:10631 SYSCR2.P9SCI2E controls the SCI2 functions of P92-P94" ], "traces": [ { "channel": "SCI1", "signal": "TXD", "h8_pin": 66, "h8_pin_name": "P95/TXD", "h8_function": "TXD1", "max202_pin": 11, "evidence": "MAX202 pin 11 traces to H8 pin 66" }, { "channel": "SCI1", "signal": "RXD", "h8_pin": 67, "h8_pin_name": "P96/RXD", "h8_function": "RXD1", "max202_pin": 12, "evidence": "MAX202 pin 12 traces to H8 pin 67" } ], "channels": { "SCI1": { "traced_to_max202": true, "path": "RS232/MAX202", "pins": [ { "channel": "SCI1", "signal": "TXD", "h8_pin": 66, "h8_pin_name": "P95/TXD", "h8_function": "TXD1", "max202_pin": 11, "evidence": "MAX202 pin 11 traces to H8 pin 66" }, { "channel": "SCI1", "signal": "RXD", "h8_pin": 67, "h8_pin_name": "P96/RXD", "h8_function": "RXD1", "max202_pin": 12, "evidence": "MAX202 pin 12 traces to H8 pin 67" } ], "scr": { "value": 12, "value_hex": "H'0C", "tie": false, "rie": false, "tx_enabled": false, "rx_enabled": false }, "accesses": [] }, "SCI2": { "traced_to_max202": false, "path": null, "note": "Sony RCP-TX7 MAX202 board traces are on SCI1 P95/P96, not SCI2 P92/P93.", "p9sci2e": false, "scr": { "value": 12, "value_hex": "H'0C", "tie": false, "rie": false, "tx_enabled": false, "rx_enabled": false }, "accesses": [] } }, "instructions": {}, "state": { "SYSCR2": { "value": 128, "value_hex": "H'80" }, "P9SCI2E": false } }, "peripheral_access": { "manual_references": [ "Manual/0900766b802125d0.md:12185 FRT FRC/OCRA/OCRB/ICR use TEMP for 16-bit CPU access", "Manual/0900766b802125d0.md:12193 FRT byte access order is upper byte then lower byte", "Manual/0900766b802125d0.md:12212 OCRA/OCRB reads are direct; writes still use TEMP", "Manual/0900766b802125d0.md:17546 A/D ADDRA-ADDRD lower byte is accessed through TEMP", "Manual/0900766b802125d0.md:17556 A/D full-result byte reads must be upper byte then lower byte" ], "warnings": [] }, "indirect_flow": { "sites": [] }, "dataflow": { "blocks": [ { "start": 40832, "instructions": [ 40832, 40834, 40835, 40840, 40845, 40850, 40853 ], "end": 40853, "end_exclusive": 40855 }, { "start": 40855, "instructions": [ 40855 ], "end": 40855, "end_exclusive": 40856 }, { "start": 40856, "instructions": [ 40856 ], "end": 40856, "end_exclusive": 40858 }, { "start": 40858, "instructions": [ 40858 ], "end": 40858, "end_exclusive": 40860 }, { "start": 40860, "instructions": [ 40860 ], "end": 40860, "end_exclusive": 40862 }, { "start": 40862, "instructions": [ 40862, 40865 ], "end": 40865, "end_exclusive": 40867 }, { "start": 40867, "instructions": [ 40867 ], "end": 40867, "end_exclusive": 40869 }, { "start": 40869, "instructions": [ 40869 ], "end": 40869, "end_exclusive": 40871 }, { "start": 40871, "instructions": [ 40871, 40874, 40877, 40879, 40882 ], "end": 40882, "end_exclusive": 40884 }, { "start": 40884, "instructions": [ 40884 ], "end": 40884, "end_exclusive": 40885 }, { "start": 40885, "instructions": [ 40885 ], "end": 40885, "end_exclusive": 40887 }, { "start": 40887, "instructions": [ 40887 ], "end": 40887, "end_exclusive": 40890 }, { "start": 40890, "instructions": [ 40890 ], "end": 40890, "end_exclusive": 40892 }, { "start": 40892, "instructions": [ 40892, 40894, 40896, 40898 ], "end": 40898, "end_exclusive": 40900 }, { "start": 40900, "instructions": [ 40900, 40903, 40906, 40908, 40911, 40914, 40917 ], "end": 40917, "end_exclusive": 40918 }, { "start": 40918, "instructions": [ 40918, 40919, 40920, 40921, 40925 ], "end": 40925, "end_exclusive": 40926 }, { "start": 40926, "instructions": [ 40926, 40927, 40932, 40937, 40942, 40947, 40952, 40957, 40962, 40965 ], "end": 40965, "end_exclusive": 40967 }, { "start": 40967, "instructions": [ 40967 ], "end": 40967, "end_exclusive": 40968 }, { "start": 40968, "instructions": [ 40968 ], "end": 40968, "end_exclusive": 40970 }, { "start": 40970, "instructions": [ 40970 ], "end": 40970, "end_exclusive": 40972 }, { "start": 40972, "instructions": [ 40972 ], "end": 40972, "end_exclusive": 40974 }, { "start": 40974, "instructions": [ 40974, 40977 ], "end": 40977, "end_exclusive": 40979 }, { "start": 40979, "instructions": [ 40979 ], "end": 40979, "end_exclusive": 40981 }, { "start": 40981, "instructions": [ 40981 ], "end": 40981, "end_exclusive": 40983 }, { "start": 40983, "instructions": [ 40983, 40986, 40989, 40991, 40994 ], "end": 40994, "end_exclusive": 40996 }, { "start": 40996, "instructions": [ 40996 ], "end": 40996, "end_exclusive": 40997 }, { "start": 40997, "instructions": [ 40997 ], "end": 40997, "end_exclusive": 40999 }, { "start": 40999, "instructions": [ 40999, 41001 ], "end": 41001, "end_exclusive": 41004 }, { "start": 41004, "instructions": [ 41004, 41006, 41008 ], "end": 41008, "end_exclusive": 41010 }, { "start": 41010, "instructions": [ 41010 ], "end": 41010, "end_exclusive": 41012 }, { "start": 41012, "instructions": [ 41012, 41015, 41018, 41020, 41023, 41026, 41029 ], "end": 41029, "end_exclusive": 41030 }, { "start": 41030, "instructions": [ 41030 ], "end": 41030, "end_exclusive": 41031 }, { "start": 41031, "instructions": [ 41031, 41032, 41033, 41037 ], "end": 41037, "end_exclusive": 41038 }, { "start": 41038, "instructions": [ 41038, 41039, 41040 ], "end": 41040, "end_exclusive": 41041 }, { "start": 41041, "instructions": [ 41041, 41045 ], "end": 41045, "end_exclusive": 41046 }, { "start": 41046, "instructions": [ 41046, 41047, 41052, 41057, 41062, 41067, 41072, 41077, 41083, 41086 ], "end": 41086, "end_exclusive": 41089 } ], "registers": [ "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7" ], "control_registers": [ "CCR", "BR", "EP", "DP", "TP", "SR" ] }, "symbols": { "symbols": [ { "address": 63288, "name": "ram_F738", "region": "on_chip_ram", "kind": "ram", "access_count": 2, "read_count": 0, "write_count": 2, "unknown_count": 0, "width_hints": [ "word" ], "width": "word", "first_access": 40927, "last_access": 41047, "accesses": [ { "address": 63288, "instruction_address": 40927, "instruction": "MOV:G.W #H'00, @H'F738", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F738", "operand_index": 1 }, { "address": 63288, "instruction_address": 41047, "instruction": "MOV:G.W #H'00, @H'F738", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F738", "operand_index": 1 } ] }, { "address": 63290, "name": "ram_F73A", "region": "on_chip_ram", "kind": "ram", "access_count": 2, "read_count": 0, "write_count": 2, "unknown_count": 0, "width_hints": [ "word" ], "width": "word", "first_access": 40932, "last_access": 41052, "accesses": [ { "address": 63290, "instruction_address": 40932, "instruction": "MOV:G.W #H'00, @H'F73A", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F73A", "operand_index": 1 }, { "address": 63290, "instruction_address": 41052, "instruction": "MOV:G.W #H'00, @H'F73A", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F73A", "operand_index": 1 } ] }, { "address": 63292, "name": "ram_F73C", "region": "on_chip_ram", "kind": "ram", "access_count": 2, "read_count": 0, "write_count": 2, "unknown_count": 0, "width_hints": [ "word" ], "width": "word", "first_access": 40937, "last_access": 41057, "accesses": [ { "address": 63292, "instruction_address": 40937, "instruction": "MOV:G.W #H'00, @H'F73C", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F73C", "operand_index": 1 }, { "address": 63292, "instruction_address": 41057, "instruction": "MOV:G.W #H'00, @H'F73C", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F73C", "operand_index": 1 } ] }, { "address": 63294, "name": "ram_F73E", "region": "on_chip_ram", "kind": "ram", "access_count": 3, "read_count": 0, "write_count": 3, "unknown_count": 0, "width_hints": [ "word" ], "width": "word", "first_access": 40835, "last_access": 41067, "accesses": [ { "address": 63294, "instruction_address": 40835, "instruction": "MOV:G.W #H'00, @H'F73E", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F73E", "operand_index": 1 }, { "address": 63294, "instruction_address": 40947, "instruction": "MOV:G.W #H'00, @H'F73E", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F73E", "operand_index": 1 }, { "address": 63294, "instruction_address": 41067, "instruction": "MOV:G.W #H'00, @H'F73E", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F73E", "operand_index": 1 } ] }, { "address": 63296, "name": "ram_F740", "region": "on_chip_ram", "kind": "ram", "access_count": 2, "read_count": 0, "write_count": 2, "unknown_count": 0, "width_hints": [ "word" ], "width": "word", "first_access": 40942, "last_access": 41062, "accesses": [ { "address": 63296, "instruction_address": 40942, "instruction": "MOV:G.W #H'00, @H'F740", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F740", "operand_index": 1 }, { "address": 63296, "instruction_address": 41062, "instruction": "MOV:G.W #H'00, @H'F740", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F740", "operand_index": 1 } ] }, { "address": 63298, "name": "ram_F742", "region": "on_chip_ram", "kind": "ram", "access_count": 3, "read_count": 0, "write_count": 3, "unknown_count": 0, "width_hints": [ "word" ], "width": "word", "first_access": 40840, "last_access": 41072, "accesses": [ { "address": 63298, "instruction_address": 40840, "instruction": "MOV:G.W #H'00, @H'F742", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F742", "operand_index": 1 }, { "address": 63298, "instruction_address": 40952, "instruction": "MOV:G.W #H'00, @H'F742", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F742", "operand_index": 1 }, { "address": 63298, "instruction_address": 41072, "instruction": "MOV:G.W #H'00, @H'F742", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F742", "operand_index": 1 } ] }, { "address": 63316, "name": "ram_F754", "region": "on_chip_ram", "kind": "ram", "access_count": 3, "read_count": 0, "write_count": 3, "unknown_count": 0, "width_hints": [ "word" ], "width": "word", "first_access": 40845, "last_access": 41077, "accesses": [ { "address": 63316, "instruction_address": 40845, "instruction": "MOV:G.W #H'00, @H'F754", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F754", "operand_index": 1 }, { "address": 63316, "instruction_address": 40957, "instruction": "MOV:G.W #H'00, @H'F754", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F754", "operand_index": 1 }, { "address": 63316, "instruction_address": 41077, "instruction": "MOV:G.W #H'00B9, @H'F754", "mnemonic": "MOV:G.W", "direction": "write", "width": "word", "operand": "@H'F754", "operand_index": 1 } ] } ], "by_address": { "63288": "ram_F738", "63290": "ram_F73A", "63292": "ram_F73C", "63294": "ram_F73E", "63296": "ram_F740", "63298": "ram_F742", "63316": "ram_F754" } }, "lcd_text": { "strings": [ { "address": 40856, "length": 14, "text": " COPY ", "trimmed": "COPY", "kind": "printable_run", "score": 1.0, "confidence": "medium", "xrefs": [ { "address": 40871, "kind": "decoded_operand", "target": 40855, "delta": -1, "instruction": "MOV:I.W #H'9F97, R0" }, { "address": 40871, "kind": "raw_mov_iw", "target": 40855, "delta": -1, "register": "R0", "instruction": "MOV:I.W #H'9F97, R0", "following_bsr": { "address": 40874, "target": 23185, "instruction": "BSR H'5A91" } } ], "xref_count": 2 }, { "address": 40885, "length": 14, "text": " IN PROGRESS ", "trimmed": "IN PROGRESS", "kind": "printable_run", "score": 0.982, "confidence": "medium", "xrefs": [ { "address": 40900, "kind": "decoded_operand", "target": 40884, "delta": -1, "instruction": "MOV:I.W #H'9FB4, R0" }, { "address": 40900, "kind": "raw_mov_iw", "target": 40884, "delta": -1, "register": "R0", "instruction": "MOV:I.W #H'9FB4, R0", "following_bsr": { "address": 40903, "target": 23185, "instruction": "BSR H'5A91" } } ], "xref_count": 2 }, { "address": 40968, "length": 14, "text": " COPY ", "trimmed": "COPY", "kind": "printable_run", "score": 1.0, "confidence": "medium", "xrefs": [ { "address": 40983, "kind": "decoded_operand", "target": 40967, "delta": -1, "instruction": "MOV:I.W #H'A007, R0" }, { "address": 40983, "kind": "raw_mov_iw", "target": 40967, "delta": -1, "register": "R0", "instruction": "MOV:I.W #H'A007, R0", "following_bsr": { "address": 40986, "target": 23185, "instruction": "BSR H'5A91" } } ], "xref_count": 2 }, { "address": 40997, "length": 14, "text": " COMPLETED ", "trimmed": "COMPLETED", "kind": "printable_run", "score": 1.0, "confidence": "medium", "xrefs": [ { "address": 41012, "kind": "decoded_operand", "target": 40996, "delta": -1, "instruction": "MOV:I.W #H'A024, R0" }, { "address": 41012, "kind": "raw_mov_iw", "target": 40996, "delta": -1, "register": "R0", "instruction": "MOV:I.W #H'A024, R0", "following_bsr": { "address": 41015, "target": 23185, "instruction": "BSR H'5A91" } } ], "xref_count": 2 } ], "regions": [ { "start": 40856, "end": 41011, "count": 4, "samples": [ "COPY", "IN PROGRESS", "COPY", "COMPLETED" ] } ], "searches": [ { "term": "CONNECT", "literal_hits": [], "candidate_hits": [], "near_matches": [ { "address": 40997, "text": " COMPLETED ", "trimmed": "COMPLETED", "score": 0.5 }, { "address": 40856, "text": " COPY ", "trimmed": "COPY", "score": 0.364 }, { "address": 40968, "text": " COPY ", "trimmed": "COPY", "score": 0.364 } ], "status": "not_found" } ], "notes": [ "LCD text scan is byte-oriented and conservative; strings may be inline script fields.", "Raw xrefs include MOV:I.W immediates to the string address and nearby record prefixes." ] }, "lcd_driver": { "addresses": [ { "address": 61952, "name": "lcd_status_control", "role": "status/control register inferred from busy polling and command writes" }, { "address": 61953, "name": "lcd_data", "role": "data register inferred from paired data reads/writes" } ], "accesses": [], "polling_loops": [], "routines": [], "instructions": {} }, "instructions": [ { "address": 40832, "address_region": "program_or_external", "bytes": "4006", "text": "CMP:E #H'06, R0", "mnemonic": "CMP:E", "operands": "#H'06, R0", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40832, "changes": [ { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [] } }, { "address": 40834, "address_region": "program_or_external", "bytes": "00", "text": "NOP", "mnemonic": "NOP", "operands": "", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40832, "changes": [], "notes": [] } }, { "address": 40835, "address_region": "program_or_external", "bytes": "1DF73E0600", "text": "MOV:G.W #H'00, @H'F73E", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F73E", "kind": "normal", "targets": [], "cycles": { "cycles": 9, "base_cycles": 9, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63294, "name": null, "symbol": "ram_F73E", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 40832, "changes": [], "notes": [] } }, { "address": 40840, "address_region": "program_or_external", "bytes": "1DF7420600", "text": "MOV:G.W #H'00, @H'F742", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F742", "kind": "normal", "targets": [], "cycles": { "cycles": 11, "base_cycles": 9, "alignment_adjustment": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63298, "name": null, "symbol": "ram_F742", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 40832, "changes": [], "notes": [] } }, { "address": 40845, "address_region": "program_or_external", "bytes": "1DF7540600", "text": "MOV:G.W #H'00, @H'F754", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F754", "kind": "normal", "targets": [], "cycles": { "cycles": 9, "base_cycles": 9, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63316, "name": null, "symbol": "ram_F754", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 40832, "changes": [], "notes": [] } }, { "address": 40850, "address_region": "program_or_external", "bytes": "1EC171", "text": "BSR loc_6106", "mnemonic": "BSR", "operands": "loc_6106", "kind": "call", "targets": [ 24838 ], "cycles": { "cycles": 13, "base_cycles": 9, "stack_adjustment": 4, "note": "PC word push to stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40832, "changes": [ { "kind": "register", "name": "R0", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R1", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R2", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R3", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R4", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R5", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R6", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R7", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "flags" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "BR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "EP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "DP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "TP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "SR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } } ], "notes": [ "call clobbers tracked register state" ] } }, { "address": 40853, "address_region": "program_or_external", "bytes": "2010", "text": "BRA loc_9FA7", "mnemonic": "BRA", "operands": "loc_9FA7", "kind": "jump", "targets": [ 40871 ], "cycles": { "not_taken": 3, "taken": 8, "base_taken": 7, "alignment_adjustment_taken": 1, "cycles": 8, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40832, "changes": [], "notes": [] } }, { "address": 40855, "address_region": "program_or_external", "bytes": "06", "text": ".db H'06", "mnemonic": ".db", "operands": "H'06", "kind": "invalid", "targets": [], "cycles": null, "references": [], "comment": "", "valid": false, "dataflow": { "block": 40855, "changes": [ { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [] } }, { "address": 40856, "address_region": "program_or_external", "bytes": "2020", "text": "BRA loc_9FBA", "mnemonic": "BRA", "operands": "loc_9FBA", "kind": "jump", "targets": [ 40890 ], "cycles": { "not_taken": 3, "taken": 7, "base_taken": 7, "cycles": 7, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40856, "changes": [], "notes": [] } }, { "address": 40858, "address_region": "program_or_external", "bytes": "2020", "text": "BRA loc_9FBC", "mnemonic": "BRA", "operands": "loc_9FBC", "kind": "jump", "targets": [ 40892 ], "cycles": { "not_taken": 3, "taken": 7, "base_taken": 7, "cycles": 7, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40858, "changes": [], "notes": [] } }, { "address": 40860, "address_region": "program_or_external", "bytes": "2043", "text": "BRA loc_9FE1", "mnemonic": "BRA", "operands": "loc_9FE1", "kind": "jump", "targets": [ 40929 ], "cycles": { "not_taken": 3, "taken": 7, "base_taken": 7, "cycles": 7, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40860, "changes": [], "notes": [] } }, { "address": 40862, "address_region": "program_or_external", "bytes": "4F5059", "text": "CMP:I #H'5059, R7", "mnemonic": "CMP:I", "operands": "#H'5059, R7", "kind": "normal", "targets": [], "cycles": { "cycles": 3, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40862, "changes": [ { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [] } }, { "address": 40865, "address_region": "program_or_external", "bytes": "2020", "text": "BRA loc_9FC3", "mnemonic": "BRA", "operands": "loc_9FC3", "kind": "jump", "targets": [ 40899 ], "cycles": { "not_taken": 3, "taken": 8, "base_taken": 7, "alignment_adjustment_taken": 1, "cycles": 8, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40862, "changes": [], "notes": [] } }, { "address": 40867, "address_region": "program_or_external", "bytes": "2020", "text": "BRA loc_9FC5", "mnemonic": "BRA", "operands": "loc_9FC5", "kind": "jump", "targets": [ 40901 ], "cycles": { "not_taken": 3, "taken": 8, "base_taken": 7, "alignment_adjustment_taken": 1, "cycles": 8, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40867, "changes": [], "notes": [] } }, { "address": 40869, "address_region": "program_or_external", "bytes": "2007", "text": "BRA loc_9FAE", "mnemonic": "BRA", "operands": "loc_9FAE", "kind": "jump", "targets": [ 40878 ], "cycles": { "not_taken": 3, "taken": 8, "base_taken": 7, "alignment_adjustment_taken": 1, "cycles": 8, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40869, "changes": [], "notes": [] } }, { "address": 40871, "address_region": "program_or_external", "bytes": "589F97", "text": "MOV:I.W #H'9F97, R0", "mnemonic": "MOV:I.W", "operands": "#H'9F97, R0", "kind": "normal", "targets": [], "cycles": { "cycles": 3, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40871, "changes": [ { "kind": "register", "name": "R0", "before": { "known": false, "reason": "block_entry" }, "after": { "known": true, "value": 40855, "hex": "0x9F97", "width": 16, "source": "MOV:I.W #H'9F97, R0" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [ "R0 = 0x9F97" ], "known_after": { "registers": { "R0": { "known": true, "value": 40855, "hex": "0x9F97", "width": 16, "source": "MOV:I.W #H'9F97, R0" } } } }, "lcd_text": { "comment": "LCD text xref H'9F98 'COPY'" } }, { "address": 40874, "address_region": "program_or_external", "bytes": "1EBAE4", "text": "BSR loc_5A91", "mnemonic": "BSR", "operands": "loc_5A91", "kind": "call", "targets": [ 23185 ], "cycles": { "cycles": 13, "base_cycles": 9, "stack_adjustment": 4, "note": "PC word push to stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40871, "changes": [ { "kind": "register", "name": "R0", "before": { "known": true, "value": 40855, "hex": "0x9F97", "width": 16, "source": "MOV:I.W #H'9F97, R0" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R1", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R2", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R3", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R4", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R5", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R6", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R7", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "flags" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "BR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "EP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "DP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "TP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "SR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } } ], "notes": [ "call clobbers tracked register state" ] } }, { "address": 40877, "address_region": "program_or_external", "bytes": "5501", "text": "MOV:E.B #H'01, R5", "mnemonic": "MOV:E.B", "operands": "#H'01, R5", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40871, "changes": [ { "kind": "register", "name": "R5", "before": { "known": false, "reason": "call" }, "after": { "known": true, "value": 1, "hex": "0x01", "width": 8, "source": "MOV:E.B #H'01, R5" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "call" }, "after": { "known": false, "reason": "flags" } } ], "notes": [ "R5 = 0x01" ], "known_after": { "registers": { "R5": { "known": true, "value": 1, "hex": "0x01", "width": 8, "source": "MOV:E.B #H'01, R5" } } } } }, { "address": 40879, "address_region": "program_or_external", "bytes": "1E9F1A", "text": "BSR loc_3ECC", "mnemonic": "BSR", "operands": "loc_3ECC", "kind": "call", "targets": [ 16076 ], "cycles": { "cycles": 14, "base_cycles": 9, "alignment_adjustment": 1, "stack_adjustment": 4, "note": "PC word push to stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40871, "changes": [ { "kind": "register", "name": "R5", "before": { "known": true, "value": 1, "hex": "0x01", "width": 8, "source": "MOV:E.B #H'01, R5" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "flags" }, "after": { "known": false, "reason": "call" } } ], "notes": [ "call clobbers tracked register state" ] } }, { "address": 40882, "address_region": "program_or_external", "bytes": "2010", "text": "BRA loc_9FC4", "mnemonic": "BRA", "operands": "loc_9FC4", "kind": "jump", "targets": [ 40900 ], "cycles": { "not_taken": 3, "taken": 7, "base_taken": 7, "cycles": 7, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40871, "changes": [], "notes": [] } }, { "address": 40884, "address_region": "program_or_external", "bytes": "06", "text": ".db H'06", "mnemonic": ".db", "operands": "H'06", "kind": "invalid", "targets": [], "cycles": null, "references": [], "comment": "", "valid": false, "dataflow": { "block": 40884, "changes": [ { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [] } }, { "address": 40885, "address_region": "program_or_external", "bytes": "2049", "text": "BRA loc_A000", "mnemonic": "BRA", "operands": "loc_A000", "kind": "jump", "targets": [ 40960 ], "cycles": { "not_taken": 3, "taken": 8, "base_taken": 7, "alignment_adjustment_taken": 1, "cycles": 8, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40885, "changes": [], "notes": [] } }, { "address": 40887, "address_region": "program_or_external", "bytes": "4E2050", "text": "CMP:I #H'2050, R6", "mnemonic": "CMP:I", "operands": "#H'2050, R6", "kind": "normal", "targets": [], "cycles": { "cycles": 3, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40887, "changes": [ { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [] } }, { "address": 40890, "address_region": "program_or_external", "bytes": "524F", "text": "MOV:E.B #H'4F, R2", "mnemonic": "MOV:E.B", "operands": "#H'4F, R2", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40890, "changes": [ { "kind": "register", "name": "R2", "before": { "known": false, "reason": "block_entry" }, "after": { "known": true, "value": 79, "hex": "0x4F", "width": 8, "source": "MOV:E.B #H'4F, R2" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [ "R2 = 0x4F" ], "known_after": { "registers": { "R2": { "known": true, "value": 79, "hex": "0x4F", "width": 8, "source": "MOV:E.B #H'4F, R2" } } } } }, { "address": 40892, "address_region": "program_or_external", "bytes": "4752", "text": "CMP:E #H'52, R7", "mnemonic": "CMP:E", "operands": "#H'52, R7", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40892, "changes": [ { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [] } }, { "address": 40894, "address_region": "program_or_external", "bytes": "4553", "text": "CMP:E #H'53, R5", "mnemonic": "CMP:E", "operands": "#H'53, R5", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40892, "changes": [], "notes": [] } }, { "address": 40896, "address_region": "program_or_external", "bytes": "5320", "text": "MOV:E.B #H'20, R3", "mnemonic": "MOV:E.B", "operands": "#H'20, R3", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40892, "changes": [ { "kind": "register", "name": "R3", "before": { "known": false, "reason": "block_entry" }, "after": { "known": true, "value": 32, "hex": "0x20", "width": 8, "source": "MOV:E.B #H'20, R3" } } ], "notes": [ "R3 = 0x20" ], "known_after": { "registers": { "R3": { "known": true, "value": 32, "hex": "0x20", "width": 8, "source": "MOV:E.B #H'20, R3" } } } } }, { "address": 40898, "address_region": "program_or_external", "bytes": "2007", "text": "BRA loc_9FCB", "mnemonic": "BRA", "operands": "loc_9FCB", "kind": "jump", "targets": [ 40907 ], "cycles": { "not_taken": 3, "taken": 7, "base_taken": 7, "cycles": 7, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40892, "changes": [], "notes": [], "known_after": { "registers": { "R3": { "known": true, "value": 32, "hex": "0x20", "width": 8, "source": "MOV:E.B #H'20, R3" } } } } }, { "address": 40900, "address_region": "program_or_external", "bytes": "589FB4", "text": "MOV:I.W #H'9FB4, R0", "mnemonic": "MOV:I.W", "operands": "#H'9FB4, R0", "kind": "normal", "targets": [], "cycles": { "cycles": 3, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40900, "changes": [ { "kind": "register", "name": "R0", "before": { "known": false, "reason": "block_entry" }, "after": { "known": true, "value": 40884, "hex": "0x9FB4", "width": 16, "source": "MOV:I.W #H'9FB4, R0" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [ "R0 = 0x9FB4" ], "known_after": { "registers": { "R0": { "known": true, "value": 40884, "hex": "0x9FB4", "width": 16, "source": "MOV:I.W #H'9FB4, R0" } } } }, "lcd_text": { "comment": "LCD text xref H'9FB5 'IN PROGRESS'" } }, { "address": 40903, "address_region": "program_or_external", "bytes": "1EBAC7", "text": "BSR loc_5A91", "mnemonic": "BSR", "operands": "loc_5A91", "kind": "call", "targets": [ 23185 ], "cycles": { "cycles": 14, "base_cycles": 9, "alignment_adjustment": 1, "stack_adjustment": 4, "note": "PC word push to stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40900, "changes": [ { "kind": "register", "name": "R0", "before": { "known": true, "value": 40884, "hex": "0x9FB4", "width": 16, "source": "MOV:I.W #H'9FB4, R0" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R1", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R2", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R3", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R4", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R5", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R6", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R7", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "flags" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "BR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "EP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "DP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "TP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "SR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } } ], "notes": [ "call clobbers tracked register state" ] } }, { "address": 40906, "address_region": "program_or_external", "bytes": "5502", "text": "MOV:E.B #H'02, R5", "mnemonic": "MOV:E.B", "operands": "#H'02, R5", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40900, "changes": [ { "kind": "register", "name": "R5", "before": { "known": false, "reason": "call" }, "after": { "known": true, "value": 2, "hex": "0x02", "width": 8, "source": "MOV:E.B #H'02, R5" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "call" }, "after": { "known": false, "reason": "flags" } } ], "notes": [ "R5 = 0x02" ], "known_after": { "registers": { "R5": { "known": true, "value": 2, "hex": "0x02", "width": 8, "source": "MOV:E.B #H'02, R5" } } } } }, { "address": 40908, "address_region": "program_or_external", "bytes": "1E9EFD", "text": "BSR loc_3ECC", "mnemonic": "BSR", "operands": "loc_3ECC", "kind": "call", "targets": [ 16076 ], "cycles": { "cycles": 13, "base_cycles": 9, "stack_adjustment": 4, "note": "PC word push to stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40900, "changes": [ { "kind": "register", "name": "R5", "before": { "known": true, "value": 2, "hex": "0x02", "width": 8, "source": "MOV:E.B #H'02, R5" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "flags" }, "after": { "known": false, "reason": "call" } } ], "notes": [ "call clobbers tracked register state" ] } }, { "address": 40911, "address_region": "program_or_external", "bytes": "1EC16A", "text": "BSR loc_613C", "mnemonic": "BSR", "operands": "loc_613C", "kind": "call", "targets": [ 24892 ], "cycles": { "cycles": 14, "base_cycles": 9, "alignment_adjustment": 1, "stack_adjustment": 4, "note": "PC word push to stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40900, "changes": [], "notes": [ "call clobbers tracked register state" ] } }, { "address": 40914, "address_region": "program_or_external", "bytes": "1EBA2F", "text": "BSR loc_5A04", "mnemonic": "BSR", "operands": "loc_5A04", "kind": "call", "targets": [ 23044 ], "cycles": { "cycles": 13, "base_cycles": 9, "stack_adjustment": 4, "note": "PC word push to stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40900, "changes": [], "notes": [ "call clobbers tracked register state" ] } }, { "address": 40917, "address_region": "program_or_external", "bytes": "19", "text": "RTS", "mnemonic": "RTS", "operands": "", "kind": "return", "targets": [], "cycles": { "cycles": 13, "base_cycles": 8, "alignment_adjustment": 1, "stack_adjustment": 4, "note": "PC word pop from stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40900, "changes": [], "notes": [] } }, { "address": 40918, "address_region": "program_or_external", "bytes": "00", "text": "NOP", "mnemonic": "NOP", "operands": "", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40918, "changes": [], "notes": [] } }, { "address": 40919, "address_region": "program_or_external", "bytes": "00", "text": "NOP", "mnemonic": "NOP", "operands": "", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40918, "changes": [], "notes": [] } }, { "address": 40920, "address_region": "program_or_external", "bytes": "00", "text": "NOP", "mnemonic": "NOP", "operands": "", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40918, "changes": [], "notes": [] } }, { "address": 40921, "address_region": "program_or_external", "bytes": "FF1DF736", "text": "SUB.W @(H'1DF7,R7), R6", "mnemonic": "SUB.W", "operands": "@(H'1DF7,R7), R6", "kind": "normal", "targets": [], "cycles": { "cycles": 6, "base_cycles": 6, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40918, "changes": [ { "kind": "register", "name": "R6", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "memory_load" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [ "R6 unknown after arithmetic memory source" ] } }, { "address": 40925, "address_region": "program_or_external", "bytes": "06", "text": ".db H'06", "mnemonic": ".db", "operands": "H'06", "kind": "invalid", "targets": [], "cycles": null, "references": [], "comment": "", "valid": false, "dataflow": { "block": 40918, "changes": [], "notes": [] } }, { "address": 40926, "address_region": "program_or_external", "bytes": "00", "text": "NOP", "mnemonic": "NOP", "operands": "", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40926, "changes": [], "notes": [] } }, { "address": 40927, "address_region": "program_or_external", "bytes": "1DF7380600", "text": "MOV:G.W #H'00, @H'F738", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F738", "kind": "normal", "targets": [], "cycles": { "cycles": 9, "base_cycles": 9, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63288, "name": null, "symbol": "ram_F738", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 40926, "changes": [ { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [] } }, { "address": 40932, "address_region": "program_or_external", "bytes": "1DF73A0600", "text": "MOV:G.W #H'00, @H'F73A", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F73A", "kind": "normal", "targets": [], "cycles": { "cycles": 11, "base_cycles": 9, "alignment_adjustment": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63290, "name": null, "symbol": "ram_F73A", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 40926, "changes": [], "notes": [] } }, { "address": 40937, "address_region": "program_or_external", "bytes": "1DF73C0600", "text": "MOV:G.W #H'00, @H'F73C", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F73C", "kind": "normal", "targets": [], "cycles": { "cycles": 9, "base_cycles": 9, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63292, "name": null, "symbol": "ram_F73C", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 40926, "changes": [], "notes": [] } }, { "address": 40942, "address_region": "program_or_external", "bytes": "1DF7400600", "text": "MOV:G.W #H'00, @H'F740", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F740", "kind": "normal", "targets": [], "cycles": { "cycles": 11, "base_cycles": 9, "alignment_adjustment": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63296, "name": null, "symbol": "ram_F740", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 40926, "changes": [], "notes": [] } }, { "address": 40947, "address_region": "program_or_external", "bytes": "1DF73E0600", "text": "MOV:G.W #H'00, @H'F73E", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F73E", "kind": "normal", "targets": [], "cycles": { "cycles": 9, "base_cycles": 9, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63294, "name": null, "symbol": "ram_F73E", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 40926, "changes": [], "notes": [] } }, { "address": 40952, "address_region": "program_or_external", "bytes": "1DF7420600", "text": "MOV:G.W #H'00, @H'F742", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F742", "kind": "normal", "targets": [], "cycles": { "cycles": 11, "base_cycles": 9, "alignment_adjustment": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63298, "name": null, "symbol": "ram_F742", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 40926, "changes": [], "notes": [] } }, { "address": 40957, "address_region": "program_or_external", "bytes": "1DF7540600", "text": "MOV:G.W #H'00, @H'F754", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F754", "kind": "normal", "targets": [], "cycles": { "cycles": 9, "base_cycles": 9, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63316, "name": null, "symbol": "ram_F754", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 40926, "changes": [], "notes": [] } }, { "address": 40962, "address_region": "program_or_external", "bytes": "1EC101", "text": "BSR loc_6106", "mnemonic": "BSR", "operands": "loc_6106", "kind": "call", "targets": [ 24838 ], "cycles": { "cycles": 13, "base_cycles": 9, "stack_adjustment": 4, "note": "PC word push to stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40926, "changes": [ { "kind": "register", "name": "R0", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R1", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R2", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R3", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R4", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R5", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R6", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R7", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "flags" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "BR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "EP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "DP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "TP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "SR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } } ], "notes": [ "call clobbers tracked register state" ] } }, { "address": 40965, "address_region": "program_or_external", "bytes": "2010", "text": "BRA loc_A017", "mnemonic": "BRA", "operands": "loc_A017", "kind": "jump", "targets": [ 40983 ], "cycles": { "not_taken": 3, "taken": 8, "base_taken": 7, "alignment_adjustment_taken": 1, "cycles": 8, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40926, "changes": [], "notes": [] } }, { "address": 40967, "address_region": "program_or_external", "bytes": "06", "text": ".db H'06", "mnemonic": ".db", "operands": "H'06", "kind": "invalid", "targets": [], "cycles": null, "references": [], "comment": "", "valid": false, "dataflow": { "block": 40967, "changes": [ { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [] } }, { "address": 40968, "address_region": "program_or_external", "bytes": "2020", "text": "BRA loc_A02A", "mnemonic": "BRA", "operands": "loc_A02A", "kind": "jump", "targets": [ 41002 ], "cycles": { "not_taken": 3, "taken": 7, "base_taken": 7, "cycles": 7, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40968, "changes": [], "notes": [] } }, { "address": 40970, "address_region": "program_or_external", "bytes": "2020", "text": "BRA loc_A02C", "mnemonic": "BRA", "operands": "loc_A02C", "kind": "jump", "targets": [ 41004 ], "cycles": { "not_taken": 3, "taken": 7, "base_taken": 7, "cycles": 7, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40970, "changes": [], "notes": [] } }, { "address": 40972, "address_region": "program_or_external", "bytes": "2043", "text": "BRA loc_A051", "mnemonic": "BRA", "operands": "loc_A051", "kind": "jump", "targets": [ 41041 ], "cycles": { "not_taken": 3, "taken": 7, "base_taken": 7, "cycles": 7, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40972, "changes": [], "notes": [] } }, { "address": 40974, "address_region": "program_or_external", "bytes": "4F5059", "text": "CMP:I #H'5059, R7", "mnemonic": "CMP:I", "operands": "#H'5059, R7", "kind": "normal", "targets": [], "cycles": { "cycles": 3, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40974, "changes": [ { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [] } }, { "address": 40977, "address_region": "program_or_external", "bytes": "2020", "text": "BRA loc_A033", "mnemonic": "BRA", "operands": "loc_A033", "kind": "jump", "targets": [ 41011 ], "cycles": { "not_taken": 3, "taken": 8, "base_taken": 7, "alignment_adjustment_taken": 1, "cycles": 8, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40974, "changes": [], "notes": [] } }, { "address": 40979, "address_region": "program_or_external", "bytes": "2020", "text": "BRA loc_A035", "mnemonic": "BRA", "operands": "loc_A035", "kind": "jump", "targets": [ 41013 ], "cycles": { "not_taken": 3, "taken": 8, "base_taken": 7, "alignment_adjustment_taken": 1, "cycles": 8, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40979, "changes": [], "notes": [] } }, { "address": 40981, "address_region": "program_or_external", "bytes": "2007", "text": "BRA loc_A01E", "mnemonic": "BRA", "operands": "loc_A01E", "kind": "jump", "targets": [ 40990 ], "cycles": { "not_taken": 3, "taken": 8, "base_taken": 7, "alignment_adjustment_taken": 1, "cycles": 8, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40981, "changes": [], "notes": [] } }, { "address": 40983, "address_region": "program_or_external", "bytes": "58A007", "text": "MOV:I.W #H'A007, R0", "mnemonic": "MOV:I.W", "operands": "#H'A007, R0", "kind": "normal", "targets": [], "cycles": { "cycles": 3, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40983, "changes": [ { "kind": "register", "name": "R0", "before": { "known": false, "reason": "block_entry" }, "after": { "known": true, "value": 40967, "hex": "0xA007", "width": 16, "source": "MOV:I.W #H'A007, R0" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [ "R0 = 0xA007" ], "known_after": { "registers": { "R0": { "known": true, "value": 40967, "hex": "0xA007", "width": 16, "source": "MOV:I.W #H'A007, R0" } } } }, "lcd_text": { "comment": "LCD text xref H'A008 'COPY'" } }, { "address": 40986, "address_region": "program_or_external", "bytes": "1EBA74", "text": "BSR loc_5A91", "mnemonic": "BSR", "operands": "loc_5A91", "kind": "call", "targets": [ 23185 ], "cycles": { "cycles": 13, "base_cycles": 9, "stack_adjustment": 4, "note": "PC word push to stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40983, "changes": [ { "kind": "register", "name": "R0", "before": { "known": true, "value": 40967, "hex": "0xA007", "width": 16, "source": "MOV:I.W #H'A007, R0" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R1", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R2", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R3", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R4", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R5", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R6", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R7", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "flags" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "BR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "EP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "DP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "TP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "SR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } } ], "notes": [ "call clobbers tracked register state" ] } }, { "address": 40989, "address_region": "program_or_external", "bytes": "5501", "text": "MOV:E.B #H'01, R5", "mnemonic": "MOV:E.B", "operands": "#H'01, R5", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40983, "changes": [ { "kind": "register", "name": "R5", "before": { "known": false, "reason": "call" }, "after": { "known": true, "value": 1, "hex": "0x01", "width": 8, "source": "MOV:E.B #H'01, R5" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "call" }, "after": { "known": false, "reason": "flags" } } ], "notes": [ "R5 = 0x01" ], "known_after": { "registers": { "R5": { "known": true, "value": 1, "hex": "0x01", "width": 8, "source": "MOV:E.B #H'01, R5" } } } } }, { "address": 40991, "address_region": "program_or_external", "bytes": "1E9EAA", "text": "BSR loc_3ECC", "mnemonic": "BSR", "operands": "loc_3ECC", "kind": "call", "targets": [ 16076 ], "cycles": { "cycles": 14, "base_cycles": 9, "alignment_adjustment": 1, "stack_adjustment": 4, "note": "PC word push to stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40983, "changes": [ { "kind": "register", "name": "R5", "before": { "known": true, "value": 1, "hex": "0x01", "width": 8, "source": "MOV:E.B #H'01, R5" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "flags" }, "after": { "known": false, "reason": "call" } } ], "notes": [ "call clobbers tracked register state" ] } }, { "address": 40994, "address_region": "program_or_external", "bytes": "2010", "text": "BRA loc_A034", "mnemonic": "BRA", "operands": "loc_A034", "kind": "jump", "targets": [ 41012 ], "cycles": { "not_taken": 3, "taken": 7, "base_taken": 7, "cycles": 7, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40983, "changes": [], "notes": [] } }, { "address": 40996, "address_region": "program_or_external", "bytes": "06", "text": ".db H'06", "mnemonic": ".db", "operands": "H'06", "kind": "invalid", "targets": [], "cycles": null, "references": [], "comment": "", "valid": false, "dataflow": { "block": 40996, "changes": [ { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [] } }, { "address": 40997, "address_region": "program_or_external", "bytes": "2020", "text": "BRA loc_A047", "mnemonic": "BRA", "operands": "loc_A047", "kind": "jump", "targets": [ 41031 ], "cycles": { "not_taken": 3, "taken": 8, "base_taken": 7, "alignment_adjustment_taken": 1, "cycles": 8, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40997, "changes": [], "notes": [] } }, { "address": 40999, "address_region": "program_or_external", "bytes": "434F", "text": "CMP:E #H'4F, R3", "mnemonic": "CMP:E", "operands": "#H'4F, R3", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40999, "changes": [ { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [] } }, { "address": 41001, "address_region": "program_or_external", "bytes": "4D504C", "text": "CMP:I #H'504C, R5", "mnemonic": "CMP:I", "operands": "#H'504C, R5", "kind": "normal", "targets": [], "cycles": { "cycles": 3, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 40999, "changes": [], "notes": [] } }, { "address": 41004, "address_region": "program_or_external", "bytes": "4554", "text": "CMP:E #H'54, R5", "mnemonic": "CMP:E", "operands": "#H'54, R5", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41004, "changes": [ { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [] } }, { "address": 41006, "address_region": "program_or_external", "bytes": "4544", "text": "CMP:E #H'44, R5", "mnemonic": "CMP:E", "operands": "#H'44, R5", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41004, "changes": [], "notes": [] } }, { "address": 41008, "address_region": "program_or_external", "bytes": "2020", "text": "BRA loc_A052", "mnemonic": "BRA", "operands": "loc_A052", "kind": "jump", "targets": [ 41042 ], "cycles": { "not_taken": 3, "taken": 7, "base_taken": 7, "cycles": 7, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41004, "changes": [], "notes": [] } }, { "address": 41010, "address_region": "program_or_external", "bytes": "2007", "text": "BRA loc_A03B", "mnemonic": "BRA", "operands": "loc_A03B", "kind": "jump", "targets": [ 41019 ], "cycles": { "not_taken": 3, "taken": 7, "base_taken": 7, "cycles": 7, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41010, "changes": [], "notes": [] } }, { "address": 41012, "address_region": "program_or_external", "bytes": "58A024", "text": "MOV:I.W #H'A024, R0", "mnemonic": "MOV:I.W", "operands": "#H'A024, R0", "kind": "normal", "targets": [], "cycles": { "cycles": 3, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41012, "changes": [ { "kind": "register", "name": "R0", "before": { "known": false, "reason": "block_entry" }, "after": { "known": true, "value": 40996, "hex": "0xA024", "width": 16, "source": "MOV:I.W #H'A024, R0" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [ "R0 = 0xA024" ], "known_after": { "registers": { "R0": { "known": true, "value": 40996, "hex": "0xA024", "width": 16, "source": "MOV:I.W #H'A024, R0" } } } }, "lcd_text": { "comment": "LCD text xref H'A025 'COMPLETED'" } }, { "address": 41015, "address_region": "program_or_external", "bytes": "1EBA57", "text": "BSR loc_5A91", "mnemonic": "BSR", "operands": "loc_5A91", "kind": "call", "targets": [ 23185 ], "cycles": { "cycles": 14, "base_cycles": 9, "alignment_adjustment": 1, "stack_adjustment": 4, "note": "PC word push to stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41012, "changes": [ { "kind": "register", "name": "R0", "before": { "known": true, "value": 40996, "hex": "0xA024", "width": 16, "source": "MOV:I.W #H'A024, R0" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R1", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R2", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R3", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R4", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R5", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R6", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "register", "name": "R7", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "flags" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "BR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "EP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "DP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "TP", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "SR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "call" } } ], "notes": [ "call clobbers tracked register state" ] } }, { "address": 41018, "address_region": "program_or_external", "bytes": "5502", "text": "MOV:E.B #H'02, R5", "mnemonic": "MOV:E.B", "operands": "#H'02, R5", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41012, "changes": [ { "kind": "register", "name": "R5", "before": { "known": false, "reason": "call" }, "after": { "known": true, "value": 2, "hex": "0x02", "width": 8, "source": "MOV:E.B #H'02, R5" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "call" }, "after": { "known": false, "reason": "flags" } } ], "notes": [ "R5 = 0x02" ], "known_after": { "registers": { "R5": { "known": true, "value": 2, "hex": "0x02", "width": 8, "source": "MOV:E.B #H'02, R5" } } } } }, { "address": 41020, "address_region": "program_or_external", "bytes": "1E9E8D", "text": "BSR loc_3ECC", "mnemonic": "BSR", "operands": "loc_3ECC", "kind": "call", "targets": [ 16076 ], "cycles": { "cycles": 13, "base_cycles": 9, "stack_adjustment": 4, "note": "PC word push to stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41012, "changes": [ { "kind": "register", "name": "R5", "before": { "known": true, "value": 2, "hex": "0x02", "width": 8, "source": "MOV:E.B #H'02, R5" }, "after": { "known": false, "reason": "call" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "flags" }, "after": { "known": false, "reason": "call" } } ], "notes": [ "call clobbers tracked register state" ] } }, { "address": 41023, "address_region": "program_or_external", "bytes": "1EC0FA", "text": "BSR loc_613C", "mnemonic": "BSR", "operands": "loc_613C", "kind": "call", "targets": [ 24892 ], "cycles": { "cycles": 14, "base_cycles": 9, "alignment_adjustment": 1, "stack_adjustment": 4, "note": "PC word push to stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41012, "changes": [], "notes": [ "call clobbers tracked register state" ] } }, { "address": 41026, "address_region": "program_or_external", "bytes": "1EB9BF", "text": "BSR loc_5A04", "mnemonic": "BSR", "operands": "loc_5A04", "kind": "call", "targets": [ 23044 ], "cycles": { "cycles": 13, "base_cycles": 9, "stack_adjustment": 4, "note": "PC word push to stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41012, "changes": [], "notes": [ "call clobbers tracked register state" ] } }, { "address": 41029, "address_region": "program_or_external", "bytes": "19", "text": "RTS", "mnemonic": "RTS", "operands": "", "kind": "return", "targets": [], "cycles": { "cycles": 13, "base_cycles": 8, "alignment_adjustment": 1, "stack_adjustment": 4, "note": "PC word pop from stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41012, "changes": [], "notes": [] } }, { "address": 41030, "address_region": "program_or_external", "bytes": "00", "text": "NOP", "mnemonic": "NOP", "operands": "", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41030, "changes": [], "notes": [] } }, { "address": 41031, "address_region": "program_or_external", "bytes": "00", "text": "NOP", "mnemonic": "NOP", "operands": "", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41031, "changes": [], "notes": [] } }, { "address": 41032, "address_region": "program_or_external", "bytes": "00", "text": "NOP", "mnemonic": "NOP", "operands": "", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41031, "changes": [], "notes": [] } }, { "address": 41033, "address_region": "program_or_external", "bytes": "FF1EC2FB", "text": "BTST.W #11, @(H'1EC2,R7)", "mnemonic": "BTST.W", "operands": "#11, @(H'1EC2,R7)", "kind": "normal", "targets": [], "cycles": { "cycles": 6, "base_cycles": 6, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41031, "changes": [ { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [] } }, { "address": 41037, "address_region": "program_or_external", "bytes": "19", "text": "RTS", "mnemonic": "RTS", "operands": "", "kind": "return", "targets": [], "cycles": { "cycles": 13, "base_cycles": 8, "alignment_adjustment": 1, "stack_adjustment": 4, "note": "PC word pop from stack", "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41031, "changes": [], "notes": [] } }, { "address": 41038, "address_region": "program_or_external", "bytes": "00", "text": "NOP", "mnemonic": "NOP", "operands": "", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41038, "changes": [], "notes": [] } }, { "address": 41039, "address_region": "program_or_external", "bytes": "00", "text": "NOP", "mnemonic": "NOP", "operands": "", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41038, "changes": [], "notes": [] } }, { "address": 41040, "address_region": "program_or_external", "bytes": "00", "text": "NOP", "mnemonic": "NOP", "operands": "", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41038, "changes": [], "notes": [] } }, { "address": 41041, "address_region": "program_or_external", "bytes": "FF1DF736", "text": "SUB.W @(H'1DF7,R7), R6", "mnemonic": "SUB.W", "operands": "@(H'1DF7,R7), R6", "kind": "normal", "targets": [], "cycles": { "cycles": 6, "base_cycles": 6, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41041, "changes": [ { "kind": "register", "name": "R6", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "memory_load" } }, { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [ "R6 unknown after arithmetic memory source" ] } }, { "address": 41045, "address_region": "program_or_external", "bytes": "06", "text": ".db H'06", "mnemonic": ".db", "operands": "H'06", "kind": "invalid", "targets": [], "cycles": null, "references": [], "comment": "", "valid": false, "dataflow": { "block": 41041, "changes": [], "notes": [] } }, { "address": 41046, "address_region": "program_or_external", "bytes": "00", "text": "NOP", "mnemonic": "NOP", "operands": "", "kind": "normal", "targets": [], "cycles": { "cycles": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41046, "changes": [], "notes": [] } }, { "address": 41047, "address_region": "program_or_external", "bytes": "1DF7380600", "text": "MOV:G.W #H'00, @H'F738", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F738", "kind": "normal", "targets": [], "cycles": { "cycles": 9, "base_cycles": 9, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63288, "name": null, "symbol": "ram_F738", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 41046, "changes": [ { "kind": "control", "name": "CCR", "before": { "known": false, "reason": "block_entry" }, "after": { "known": false, "reason": "flags" } } ], "notes": [] } }, { "address": 41052, "address_region": "program_or_external", "bytes": "1DF73A0600", "text": "MOV:G.W #H'00, @H'F73A", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F73A", "kind": "normal", "targets": [], "cycles": { "cycles": 11, "base_cycles": 9, "alignment_adjustment": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63290, "name": null, "symbol": "ram_F73A", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 41046, "changes": [], "notes": [] } }, { "address": 41057, "address_region": "program_or_external", "bytes": "1DF73C0600", "text": "MOV:G.W #H'00, @H'F73C", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F73C", "kind": "normal", "targets": [], "cycles": { "cycles": 9, "base_cycles": 9, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63292, "name": null, "symbol": "ram_F73C", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 41046, "changes": [], "notes": [] } }, { "address": 41062, "address_region": "program_or_external", "bytes": "1DF7400600", "text": "MOV:G.W #H'00, @H'F740", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F740", "kind": "normal", "targets": [], "cycles": { "cycles": 11, "base_cycles": 9, "alignment_adjustment": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63296, "name": null, "symbol": "ram_F740", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 41046, "changes": [], "notes": [] } }, { "address": 41067, "address_region": "program_or_external", "bytes": "1DF73E0600", "text": "MOV:G.W #H'00, @H'F73E", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F73E", "kind": "normal", "targets": [], "cycles": { "cycles": 9, "base_cycles": 9, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63294, "name": null, "symbol": "ram_F73E", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 41046, "changes": [], "notes": [] } }, { "address": 41072, "address_region": "program_or_external", "bytes": "1DF7420600", "text": "MOV:G.W #H'00, @H'F742", "mnemonic": "MOV:G.W", "operands": "#H'00, @H'F742", "kind": "normal", "targets": [], "cycles": { "cycles": 11, "base_cycles": 9, "alignment_adjustment": 2, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63298, "name": null, "symbol": "ram_F742", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 41046, "changes": [], "notes": [] } }, { "address": 41077, "address_region": "program_or_external", "bytes": "1DF7540700B9", "text": "MOV:G.W #H'00B9, @H'F754", "mnemonic": "MOV:G.W", "operands": "#H'00B9, @H'F754", "kind": "normal", "targets": [], "cycles": { "cycles": 9, "base_cycles": 9, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [ { "address": 63316, "name": null, "symbol": "ram_F754", "region": "on_chip_ram", "kind": "ram" } ], "comment": "", "valid": true, "dataflow": { "block": 41046, "changes": [], "notes": [] } }, { "address": 41083, "address_region": "program_or_external", "bytes": "5900A9", "text": "MOV:I.W #H'00A9, R1", "mnemonic": "MOV:I.W", "operands": "#H'00A9, R1", "kind": "normal", "targets": [], "cycles": { "cycles": 3, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41046, "changes": [ { "kind": "register", "name": "R1", "before": { "known": false, "reason": "block_entry" }, "after": { "known": true, "value": 169, "hex": "0x00A9", "width": 16, "source": "MOV:I.W #H'00A9, R1" } } ], "notes": [ "R1 = 0x00A9" ], "known_after": { "registers": { "R1": { "known": true, "value": 169, "hex": "0x00A9", "width": 16, "source": "MOV:I.W #H'00A9, R1" } } } } }, { "address": 41086, "address_region": "program_or_external", "bytes": "580000", "text": "MOV:I.W #H'0000, R0", "mnemonic": "MOV:I.W", "operands": "#H'0000, R0", "kind": "normal", "targets": [], "cycles": { "cycles": 3, "source": "manual Appendix A.4, tables A-7/A-8", "assumption": "on-chip instruction fetch/operand access, no external wait states" }, "references": [], "comment": "", "valid": true, "dataflow": { "block": 41046, "changes": [ { "kind": "register", "name": "R0", "before": { "known": false, "reason": "block_entry" }, "after": { "known": true, "value": 0, "hex": "0x0000", "width": 16, "source": "MOV:I.W #H'0000, R0" } } ], "notes": [ "R0 = 0x0000" ], "known_after": { "registers": { "R0": { "known": true, "value": 0, "hex": "0x0000", "width": 16, "source": "MOV:I.W #H'0000, R0" }, "R1": { "known": true, "value": 169, "hex": "0x00A9", "width": 16, "source": "MOV:I.W #H'00A9, R1" } } } } } ], "decompiler_consistency": { "kind": "decompiler_pseudocode_consistency", "summary": "16 byte-immediate-to-word destination case(s) require explicit zero-extension in pseudocode.", "checks": [ { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 40835, "address_hex": "H'9F83", "instruction": "MOV:G.W #H'00, @H'F73E", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 40840, "address_hex": "H'9F88", "instruction": "MOV:G.W #H'00, @H'F742", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 40845, "address_hex": "H'9F8D", "instruction": "MOV:G.W #H'00, @H'F754", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 40927, "address_hex": "H'9FDF", "instruction": "MOV:G.W #H'00, @H'F738", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 40932, "address_hex": "H'9FE4", "instruction": "MOV:G.W #H'00, @H'F73A", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 40937, "address_hex": "H'9FE9", "instruction": "MOV:G.W #H'00, @H'F73C", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 40942, "address_hex": "H'9FEE", "instruction": "MOV:G.W #H'00, @H'F740", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 40947, "address_hex": "H'9FF3", "instruction": "MOV:G.W #H'00, @H'F73E", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 40952, "address_hex": "H'9FF8", "instruction": "MOV:G.W #H'00, @H'F742", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 40957, "address_hex": "H'9FFD", "instruction": "MOV:G.W #H'00, @H'F754", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 41047, "address_hex": "H'A057", "instruction": "MOV:G.W #H'00, @H'F738", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 41052, "address_hex": "H'A05C", "instruction": "MOV:G.W #H'00, @H'F73A", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 41057, "address_hex": "H'A061", "instruction": "MOV:G.W #H'00, @H'F73C", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 41062, "address_hex": "H'A066", "instruction": "MOV:G.W #H'00, @H'F740", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 41067, "address_hex": "H'A06B", "instruction": "MOV:G.W #H'00, @H'F73E", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." }, { "kind": "byte_immediate_to_word_destination", "status": "requires_zero_extend8_to16_pseudocode", "address": 41072, "address_hex": "H'A070", "instruction": "MOV:G.W #H'00, @H'F742", "expected_pseudocode_hint": "zero_extend8_to16", "zero_extended_value_hex": "0x0000", "summary": "Word-sized MOV with an 8-bit immediate writes a zero-extended word. Pseudocode should not model this as a one-byte write or preserve the old low byte." } ] }, "serial_semantics": { "kind": "serial_semantics", "protocol_semantics": [], "fields": [], "command_dispatch": null, "commands": [], "command_effects": [], "response_candidates": [], "response_schemas": [], "response_schema": [], "logical_table_map_candidates": [], "table_map_candidates": [], "state_variable_candidates": [], "retry_error_model": null, "gate_queue_model": null, "tx_report_model": null, "periodic_resend_model": null, "timer_interrupt_model": null, "confidence": "low", "confidence_score": 0.0, "caveat": "No protocol semantics are emitted without both RX and TX serial reconstruction candidates." } }