RX side improvements
This commit is contained in:
Aiden
529
h8536/emulator/rx_divergence.py
Normal file
529
h8536/emulator/rx_divergence.py
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@@ -0,0 +1,529 @@
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from __future__ import annotations
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import argparse
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from collections import Counter
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from dataclasses import dataclass, field
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from pathlib import Path
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from typing import Iterable
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from ..formatting import h16, parse_int
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from .cli import load_rom
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from .constants import HEARTBEAT_FRAME
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from .memory import MemoryAccess
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from .runner import H8536Emulator
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from .rx_probe import (
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UartTiming,
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_inject_frame_uart_timed,
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_interrupt_mask,
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_rx_byte_consumed,
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_rx_ready,
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_run_until,
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_sci1_priority,
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format_frame,
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frame_checksum_ok,
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parse_frame,
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)
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DEFAULT_EEPROM_LOAD = Path("build") / "bench-sync-after-dip-reset.bin"
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DEFAULT_FRAMES = (
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bytes.fromhex("0000008000DA"),
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bytes.fromhex("01000000005B"),
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bytes.fromhex("07000000005D"),
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)
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BENCH_SIGNATURES = {
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bytes.fromhex("04000080805E"): "bench_cmd0_echo_80",
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bytes.fromhex("02000200005A"): "bench_connect_ok",
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bytes.fromhex("07804040A07D"): "bench_40a0_retry_echo_candidate_40",
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bytes.fromhex("07808040A0BD"): "bench_40a0_retry_echo_candidate_80",
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bytes.fromhex("0780C040A0FD"): "bench_40a0_retry_echo_candidate_c0",
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}
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WATCH_PCS = {
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0x3FD3: "report_scheduler_gate",
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0x3FEF: "report_scheduler_return",
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0x4007: "resend_or_session_gate",
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0xBBF0: "rx_checksum_compare",
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0xBE29: "rx_checksum_retry_error",
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0xBE4D: "retry_echo_stage",
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0xBC0F: "faa2_split",
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0xBC15: "initial_latch_faa2_bit7",
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0xBC33: "initial_dispatch_fallthrough",
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0xBC3A: "continuation_dispatch",
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0xBC5C: "continuation_clear_queued_ack",
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0xBC67: "continuation_reenter_initial",
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0xBC69: "cmd0_set_value",
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0xBCD7: "cmd1_read_value",
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0xBE05: "cmd7_copy_or_retry",
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0xBE70: "selector_queue_be70",
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0xBA26: "tx_builder_ba26",
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0xBA72: "tx_first_byte",
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0xBA84: "txi_entry_ba84",
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0xBA8A: "txi_faa2_bit3_test",
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0xBA90: "txi_rx_index_test",
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0xBA96: "txi_overlap_collapse",
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0xBA9A: "txi_clear_pending_mask",
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0xBAA2: "txi_disable_tie",
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0xBAB5: "txi_next_byte",
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0xBAF2: "report_dequeue_baf2",
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0xBB00: "report_session_latch",
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0xBB08: "report_selector_read",
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0xBB1C: "report_selector_encode",
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0xBB20: "report_selector_encode_hi",
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0xBB2B: "report_payload_read",
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0xBB35: "report_value_stage",
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0xBB43: "report_send",
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0xBE9E: "session_resend_gate",
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0xBED5: "session_resend_send",
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}
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WATCH_GROUPS = {
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"cmd0_reached_BC69": (0xBC69,),
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"cmd1_reached_BCD7": (0xBCD7,),
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"retry_echo": (0xBE29, 0xBE4D),
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"cmd7_replay": (0xBE05,),
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"autonomous_report": (0xBAF2, 0xBB00, 0xBB35, 0xBB43),
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"tx_rx_overlap_collapse": (0xBA96, 0xBA9A, 0xBAA2),
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}
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WATCH_WRITE_RANGES = (
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(0xF860, 0xF865, "rx_validation_F860_F865"),
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(0xF868, 0xF86D, "rx_capture_F868_F86D"),
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(0xF850, 0xF85D, "tx_staging_F850_F85D"),
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(0xF870, 0xF96F, "report_queue_F870_F96F"),
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(0xF970, 0xF9AF, "selector_queue_F970_F9AF"),
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(0xF9B0, 0xF9B0, "report_head_F9B0"),
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(0xF9B4, 0xF9B4, "selector_tail_F9B4"),
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(0xF9B5, 0xF9B5, "report_tail_F9B5"),
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(0xF9C0, 0xF9C0, "tx_gate_F9C0"),
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(0xF9C1, 0xF9C1, "rx_interbyte_timeout_F9C1"),
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(0xF9C3, 0xF9C3, "rx_index_F9C3"),
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(0xF9C5, 0xF9C5, "rx_session_timeout_F9C5"),
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(0xFAA2, 0xFAA6, "serial_latches_FAA2_FAA6"),
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(0xE000, 0xE001, "primary_table_E000"),
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(0xE800, 0xE801, "current_table_E800"),
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(0xEC00, 0xEC01, "flag_table_EC00"),
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)
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STATE_BYTES = {
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0xF9B0: "F9B0_report_head",
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0xF9B4: "F9B4_selector_tail",
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0xF9B5: "F9B5_report_tail",
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0xF9C0: "F9C0_tx_gate",
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0xF9C1: "F9C1_rx_interbyte_timeout",
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0xF9C3: "F9C3_rx_index",
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0xF9C5: "F9C5_rx_session_timeout",
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0xFAA2: "FAA2_session_flags",
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0xFAA3: "FAA3_pending_mask",
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0xFAA4: "FAA4_rx_error_latch",
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0xFAA5: "FAA5_retry_gate_flags",
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0xFAA6: "FAA6_retry_counter",
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}
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STATE_BUFFERS = {
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"F850_F85D_tx_staging": (0xF850, 14),
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"F860_F865_rx_validation": (0xF860, 6),
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"F868_F86D_rx_capture": (0xF868, 6),
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"F870_F87F_report_queue_head": (0xF870, 16),
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"F970_F97F_selector_queue_head": (0xF970, 16),
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"E000_E001_primary_0000": (0xE000, 2),
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"E800_E801_current_0000": (0xE800, 2),
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"EC00_EC01_flags_0000": (0xEC00, 2),
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"E880_E881_current_0040": (0xE880, 2),
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"E900_E901_current_0080": (0xE900, 2),
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"E980_E981_current_00C0": (0xE980, 2),
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}
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@dataclass
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class DivergenceContext:
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pc_hits: Counter[int] = field(default_factory=Counter)
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first_pcs: list[int] = field(default_factory=list)
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unsupported: str | None = None
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def record_pc(self, pc: int) -> None:
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if pc not in WATCH_PCS:
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return
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self.pc_hits[pc] += 1
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if len(self.first_pcs) < 32:
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self.first_pcs.append(pc)
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@dataclass(frozen=True)
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class RxDivergenceConfig:
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boot_steps: int = 250_000
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wait_heartbeats: int = 0
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wait_heartbeat_steps: int = 500_000
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post_frame_steps: int = 80_000
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per_byte_steps: int = 5_000
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interval_steps: int = 512
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frt1_ocia_steps: int | None = None
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frt2_ocia_steps: int | None = None
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clock_hz: int = 10_000_000
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uart_timing: bool = False
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uart_baud: int = 38_400
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p7_input: int = 0xFF
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p9_fast_path: bool = True
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p9_fast_input: int = 0xFF
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p9_fast_optimistic_wrapper: bool = False
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eeprom_seed: str = "blank"
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eeprom_load: Path | None = DEFAULT_EEPROM_LOAD
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stop_after_tx_frame: bool = False
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@dataclass(frozen=True)
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class FrameTrace:
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frame: bytes
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checksum_ok: bool
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rx_injection: str
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steps: int
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stopped_reason: str
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tx_frames: tuple[bytes, ...]
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state_changes: tuple[str, ...]
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writes: tuple[str, ...]
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context: DivergenceContext
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def outcome(self) -> str:
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flags = classify_hits(self.context.pc_hits)
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return " ".join(f"{name}={int(value)}" for name, value in flags.items())
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def lines(self, index: int, *, summary_only: bool = False) -> list[str]:
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lines = [
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(
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f"frame[{index}] host={format_frame(self.frame)} checksum_ok={int(self.checksum_ok)} "
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f"steps={self.steps} stopped={self.stopped_reason} {self.outcome()}"
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)
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]
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if self.tx_frames:
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lines.append(" tx=" + " | ".join(label_frame(frame) for frame in self.tx_frames))
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else:
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lines.append(" tx=none")
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if summary_only:
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return lines
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lines.append(f" rx_injection={self.rx_injection}")
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hit_lines = format_pc_hits(self.context)
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if hit_lines:
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lines.append(" pcs=" + " ".join(hit_lines))
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if self.state_changes:
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lines.append(" state=" + "; ".join(self.state_changes))
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if self.writes:
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lines.append(" writes:")
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lines.extend(f" {line}" for line in self.writes)
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if self.context.unsupported:
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lines.append(f" unsupported={self.context.unsupported}")
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return lines
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@dataclass(frozen=True)
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class RxDivergenceResult:
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rom_path: Path
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eeprom_load: Path | None
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reset_vector: int
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boot_summary: str
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heartbeat_summary: str | None
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traces: tuple[FrameTrace, ...]
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all_tx_frames: tuple[bytes, ...]
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def lines(self, *, summary_only: bool = False) -> list[str]:
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lines = [
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f"rom={self.rom_path}",
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f"eeprom_loaded={self.eeprom_load if self.eeprom_load else 'none'}",
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f"reset_vector={h16(self.reset_vector)}",
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self.boot_summary,
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bench_signature_line(),
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]
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if self.heartbeat_summary is not None:
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lines.append(self.heartbeat_summary)
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for index, trace in enumerate(self.traces):
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lines.extend(trace.lines(index, summary_only=summary_only))
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lines.append("all_tx=" + _format_frame_list(self.all_tx_frames))
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return lines
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def run_rx_divergence(
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frames: Iterable[bytes],
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*,
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rom_path: Path | None = None,
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config: RxDivergenceConfig = RxDivergenceConfig(),
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) -> RxDivergenceResult:
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rom_bytes, discovered_rom_path = load_rom(rom_path)
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emulator = H8536Emulator(
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rom_bytes,
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interval_steps=config.interval_steps,
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frt1_ocia_steps=config.frt1_ocia_steps,
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frt2_ocia_steps=config.frt2_ocia_steps,
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clock_hz=config.clock_hz,
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p9_fast_path_enabled=config.p9_fast_path,
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p9_fast_default_input_byte=config.p9_fast_input,
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p9_fast_default_wrapper_success=config.p9_fast_optimistic_wrapper,
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p7_input=config.p7_input,
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eeprom_seed=config.eeprom_seed,
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)
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eeprom_load = config.eeprom_load
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if eeprom_load is not None and eeprom_load.is_file():
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emulator.memory.load_eeprom_image(eeprom_load.read_bytes())
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boot_context = DivergenceContext()
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boot_steps_used, boot_reason = _run_until(emulator, config.boot_steps, _rx_ready, boot_context)
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boot_summary = (
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f"boot={boot_reason} steps={boot_steps_used} pc={h16(emulator.cpu.pc)} "
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f"SCR={emulator.sci1.scr:02X} SSR={emulator.sci1.ssr:02X} "
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f"rx_serviceable={int(_rx_ready(emulator))} "
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f"sci1_priority={_sci1_priority(emulator)} interrupt_mask={_interrupt_mask(emulator)} "
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f"clock_hz={emulator.clock_hz} p7_input={config.p7_input:#04x}"
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)
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heartbeat_summary = None
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if config.wait_heartbeats:
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heartbeat_summary = _wait_for_heartbeats(emulator, config.wait_heartbeats, config.wait_heartbeat_steps)
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traces = tuple(_trace_frame(emulator, frame, config) for frame in frames)
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return RxDivergenceResult(
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rom_path=discovered_rom_path,
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eeprom_load=eeprom_load if eeprom_load is not None and eeprom_load.is_file() else None,
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reset_vector=emulator.reset_vector(),
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boot_summary=boot_summary,
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heartbeat_summary=heartbeat_summary,
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traces=traces,
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all_tx_frames=tuple(emulator.sci1.tx_frames),
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)
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def build_arg_parser() -> argparse.ArgumentParser:
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parser = argparse.ArgumentParser(description="Focused H8/536 RX divergence trace around command dispatch and serial state.")
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parser.add_argument("frames", nargs="*", type=parse_frame, help="host frame hex; 5-byte inputs get a 0x5A-XOR checksum appended")
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parser.add_argument("--rom", type=Path, help="ROM image path; defaults to ROM/M27C512@DIP28_1.BIN")
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parser.add_argument("--default-frames", action="store_true", help="append the known bench-divergence frame trio")
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parser.add_argument("--boot-steps", type=int, default=RxDivergenceConfig.boot_steps)
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parser.add_argument("--eeprom-load", type=Path, default=DEFAULT_EEPROM_LOAD, help="logical EEPROM image loaded before boot")
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parser.add_argument("--no-eeprom-load", action="store_true", help="boot without loading the default bench EEPROM image")
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parser.add_argument("--p7-input", type=parse_int, default=RxDivergenceConfig.p7_input)
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parser.add_argument("--wait-heartbeats", type=int, default=RxDivergenceConfig.wait_heartbeats)
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parser.add_argument("--wait-heartbeat-steps", type=int, default=RxDivergenceConfig.wait_heartbeat_steps)
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parser.add_argument("--uart-timing", action="store_true", help="inject bytes at UART character timing instead of waiting for RDRF clear")
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parser.add_argument("--uart-baud", type=parse_int, default=RxDivergenceConfig.uart_baud)
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parser.add_argument("--post-frame-steps", type=int, default=RxDivergenceConfig.post_frame_steps)
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parser.add_argument("--per-byte-steps", type=int, default=RxDivergenceConfig.per_byte_steps)
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parser.add_argument("--clock-hz", type=parse_int, default=RxDivergenceConfig.clock_hz)
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parser.add_argument("--interval-steps", type=int, default=RxDivergenceConfig.interval_steps)
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parser.add_argument("--frt1-ocia-steps", type=int, default=RxDivergenceConfig.frt1_ocia_steps)
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parser.add_argument("--frt2-ocia-steps", type=int, default=RxDivergenceConfig.frt2_ocia_steps)
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parser.add_argument("--no-p9-fast-path", action="store_true")
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parser.add_argument("--p9-fast-input", type=parse_int, default=RxDivergenceConfig.p9_fast_input)
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parser.add_argument("--p9-fast-optimistic-wrapper", action="store_true")
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parser.add_argument("--eeprom-seed", choices=("blank", "factory"), default=RxDivergenceConfig.eeprom_seed)
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parser.add_argument("--stop-after-tx-frame", action="store_true", help="stop each post-frame run after the first new TX frame")
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parser.add_argument("--summary-only", action="store_true", help="omit detailed state/write trace lines")
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return parser
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def main(argv: list[str] | None = None) -> int:
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args = build_arg_parser().parse_args(argv)
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frames = list(args.frames)
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if args.default_frames:
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frames.extend(DEFAULT_FRAMES)
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if not frames:
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raise SystemExit("pass at least one frame, or use --default-frames")
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result = run_rx_divergence(
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frames,
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rom_path=args.rom,
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config=RxDivergenceConfig(
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boot_steps=args.boot_steps,
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wait_heartbeats=args.wait_heartbeats,
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wait_heartbeat_steps=args.wait_heartbeat_steps,
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post_frame_steps=args.post_frame_steps,
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per_byte_steps=args.per_byte_steps,
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interval_steps=args.interval_steps,
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frt1_ocia_steps=args.frt1_ocia_steps,
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frt2_ocia_steps=args.frt2_ocia_steps,
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clock_hz=args.clock_hz,
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uart_timing=args.uart_timing,
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uart_baud=args.uart_baud,
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p7_input=args.p7_input,
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p9_fast_path=not args.no_p9_fast_path,
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p9_fast_input=args.p9_fast_input,
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p9_fast_optimistic_wrapper=args.p9_fast_optimistic_wrapper,
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eeprom_seed=args.eeprom_seed,
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eeprom_load=None if args.no_eeprom_load else args.eeprom_load,
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stop_after_tx_frame=args.stop_after_tx_frame,
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),
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)
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for line in result.lines(summary_only=args.summary_only):
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print(line)
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return 0
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def _trace_frame(emulator: H8536Emulator, frame: bytes, config: RxDivergenceConfig) -> FrameTrace:
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state_before = snapshot_state(emulator)
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log_start = len(emulator.memory.access_log)
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tx_frame_start = len(emulator.sci1.tx_frames)
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context = DivergenceContext()
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steps_total = 0
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if config.uart_timing:
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timing = UartTiming(baud=config.uart_baud)
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steps_total, stopped_reason = _inject_frame_uart_timed(
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emulator,
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frame,
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timing=timing,
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max_steps_per_gap=config.per_byte_steps,
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context=context,
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)
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rx_injection = timing.summary(emulator.clock_hz)
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injected_all_bytes = stopped_reason == "frame_injected_uart_timing"
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else:
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rx_injection = "polite_wait_for_rdrf_clear"
|
||||
injected_all_bytes = True
|
||||
stopped_reason = "post_frame_steps"
|
||||
for offset, value in enumerate(frame):
|
||||
emulator.inject_sci1_rx_byte(value)
|
||||
steps, reason = _run_until(emulator, config.per_byte_steps, _rx_byte_consumed, context)
|
||||
steps_total += steps
|
||||
if reason != "predicate":
|
||||
stopped_reason = f"rx_byte_{offset}_{reason}"
|
||||
injected_all_bytes = False
|
||||
break
|
||||
|
||||
if injected_all_bytes:
|
||||
target_frame_count = tx_frame_start + 1
|
||||
|
||||
def stop_predicate(inner: H8536Emulator) -> bool:
|
||||
return config.stop_after_tx_frame and len(inner.sci1.tx_frames) >= target_frame_count
|
||||
|
||||
steps, reason = _run_until(emulator, config.post_frame_steps, stop_predicate, context)
|
||||
steps_total += steps
|
||||
stopped_reason = "tx_frame" if reason == "predicate" and config.stop_after_tx_frame else reason
|
||||
|
||||
log_end = len(emulator.memory.access_log)
|
||||
state_after = snapshot_state(emulator)
|
||||
return FrameTrace(
|
||||
frame=frame,
|
||||
checksum_ok=frame_checksum_ok(frame),
|
||||
rx_injection=rx_injection,
|
||||
steps=steps_total,
|
||||
stopped_reason=stopped_reason,
|
||||
tx_frames=tuple(emulator.sci1.tx_frames[tx_frame_start:]),
|
||||
state_changes=tuple(format_state_changes(state_before, state_after)),
|
||||
writes=tuple(format_interesting_writes(emulator.memory.access_log[log_start:log_end])),
|
||||
context=context,
|
||||
)
|
||||
|
||||
|
||||
def _wait_for_heartbeats(emulator: H8536Emulator, target_count: int, max_steps: int) -> str:
|
||||
start_count = _heartbeat_count(emulator.sci1.tx_frames)
|
||||
|
||||
def predicate(inner: H8536Emulator) -> bool:
|
||||
return _heartbeat_count(inner.sci1.tx_frames) - start_count >= target_count
|
||||
|
||||
context = DivergenceContext()
|
||||
steps, reason = _run_until(emulator, max_steps, predicate, context)
|
||||
seen = _heartbeat_count(emulator.sci1.tx_frames) - start_count
|
||||
return f"wait_heartbeats target={target_count} seen={seen} steps={steps} stopped={reason}"
|
||||
|
||||
|
||||
def snapshot_state(emulator: H8536Emulator) -> dict[str, int | bytes]:
|
||||
state: dict[str, int | bytes] = {}
|
||||
for address, name in STATE_BYTES.items():
|
||||
state[name] = emulator.memory.read8(address)
|
||||
for name, (address, length) in STATE_BUFFERS.items():
|
||||
state[name] = bytes(emulator.memory.read8(address + offset) for offset in range(length))
|
||||
return state
|
||||
|
||||
|
||||
def format_state_changes(before: dict[str, int | bytes], after: dict[str, int | bytes]) -> list[str]:
|
||||
lines = []
|
||||
for key in sorted(after):
|
||||
if before.get(key) == after[key]:
|
||||
continue
|
||||
lines.append(f"{key}:{_state_value(before.get(key))}->{_state_value(after[key])}")
|
||||
return lines
|
||||
|
||||
|
||||
def format_interesting_writes(accesses: Iterable[MemoryAccess], *, limit: int = 96) -> list[str]:
|
||||
lines = []
|
||||
total = 0
|
||||
for access in accesses:
|
||||
if access.kind != "write":
|
||||
continue
|
||||
label = write_label(access.address)
|
||||
if label is None:
|
||||
continue
|
||||
total += 1
|
||||
if len(lines) < limit:
|
||||
lines.append(f"{h16(access.address)}={access.value:02X} {label}")
|
||||
if total > limit:
|
||||
lines.append(f"... {total - limit} more watched writes")
|
||||
return lines
|
||||
|
||||
|
||||
def write_label(address: int) -> str | None:
|
||||
for start, end, label in WATCH_WRITE_RANGES:
|
||||
if start <= address <= end:
|
||||
return label
|
||||
return None
|
||||
|
||||
|
||||
def classify_hits(hits: Counter[int]) -> dict[str, bool]:
|
||||
return {name: any(hits.get(pc, 0) for pc in pcs) for name, pcs in WATCH_GROUPS.items()}
|
||||
|
||||
|
||||
def format_pc_hits(context: DivergenceContext) -> list[str]:
|
||||
lines = [f"{h16(pc)}:{WATCH_PCS[pc]}={context.pc_hits[pc]}" for pc in sorted(context.pc_hits)]
|
||||
if context.first_pcs:
|
||||
first = ",".join(h16(pc) for pc in context.first_pcs[:16])
|
||||
lines.append(f"first={first}")
|
||||
return lines
|
||||
|
||||
|
||||
def label_frame(frame: bytes) -> str:
|
||||
signature = BENCH_SIGNATURES.get(frame)
|
||||
if signature:
|
||||
return f"{format_frame(frame)} ({signature})"
|
||||
if frame == HEARTBEAT_FRAME:
|
||||
return f"{format_frame(frame)} (heartbeat)"
|
||||
return format_frame(frame)
|
||||
|
||||
|
||||
def bench_signature_line() -> str:
|
||||
return "bench_signatures=" + " | ".join(label_frame(frame) for frame in BENCH_SIGNATURES)
|
||||
|
||||
|
||||
def _heartbeat_count(frames: Iterable[bytes]) -> int:
|
||||
return sum(1 for frame in frames if frame == HEARTBEAT_FRAME)
|
||||
|
||||
|
||||
def _state_value(value: int | bytes | None) -> str:
|
||||
if isinstance(value, bytes):
|
||||
return format_frame(value)
|
||||
if isinstance(value, int):
|
||||
return f"{value:02X}"
|
||||
return "none"
|
||||
|
||||
|
||||
def _format_frame_list(frames: Iterable[bytes]) -> str:
|
||||
items = [label_frame(frame) for frame in frames]
|
||||
return " | ".join(items) if items else "none"
|
||||
|
||||
|
||||
__all__ = [
|
||||
"BENCH_SIGNATURES",
|
||||
"DEFAULT_EEPROM_LOAD",
|
||||
"DEFAULT_FRAMES",
|
||||
"DivergenceContext",
|
||||
"FrameTrace",
|
||||
"RxDivergenceConfig",
|
||||
"RxDivergenceResult",
|
||||
"bench_signature_line",
|
||||
"build_arg_parser",
|
||||
"classify_hits",
|
||||
"format_interesting_writes",
|
||||
"format_pc_hits",
|
||||
"format_state_changes",
|
||||
"label_frame",
|
||||
"main",
|
||||
"parse_frame",
|
||||
"run_rx_divergence",
|
||||
"write_label",
|
||||
]
|
||||
Reference in New Issue
Block a user