DTC and SCI improvements

h8536/formatting.py

@@ -1,7 +1,7 @@
 from __future__ import annotations
 
 from .model import EA
-from .tables import IO_BITFIELDS, IO_REGISTERS
+from .tables import IO_BITFIELDS, IO_DTE_BITS, IO_PRIORITY_FIELDS, IO_REGISTERS
 
 
 def h8(value: int) -> str:
@@ -66,6 +66,12 @@ def label_or_h(address: int, labels: dict[int, str]) -> str:
 
 
 def _bitfield_name(address: int, bit: int) -> str | None:
+    priority_name = _priority_bit_name(address, bit)
+    if priority_name:
+        return priority_name
+    dte_name = _dte_bit_name(address, bit)
+    if dte_name:
+        return dte_name
     return IO_BITFIELDS.get(address, {}).get(bit)
 
 
@@ -89,6 +95,54 @@ def _adcsr_semantics(value: int) -> str:
     return f"A/D {state}, {mode} {channels}, {conversion}, {interrupt}"
 
 
+def _priority_bit_name(address: int, bit: int) -> str | None:
+    for shift, source in IO_PRIORITY_FIELDS.get(address, ()):
+        if shift <= bit <= shift + 2:
+            return f"{source} priority bit {bit - shift}"
+    if address in IO_PRIORITY_FIELDS and bit in (7, 3):
+        return "reserved priority bit"
+    return None
+
+
+def _dte_bit_name(address: int, bit: int) -> str | None:
+    fields = IO_DTE_BITS.get(address)
+    if fields is None:
+        return None
+    source = fields.get(bit)
+    return f"{source} DTC enable" if source else "reserved DTE bit"
+
+
+def _ipr_semantics(address: int, value: int) -> str:
+    parts: list[str] = []
+    for shift, source in IO_PRIORITY_FIELDS[address]:
+        priority = (value >> shift) & 0x07
+        parts.append(f"{source} priority={priority}")
+    reserved = _set_bit_numbers(value, 0x88)
+    if reserved:
+        parts.append(f"reserved bits {reserved} should be 0")
+    return "; ".join(parts)
+
+
+def _dte_semantics(address: int, value: int) -> str:
+    fields = IO_DTE_BITS[address]
+    parts = [
+        f"{source} {'DTC enabled' if value & (1 << bit) else 'CPU interrupt'}"
+        for bit, source in sorted(fields.items(), reverse=True)
+    ]
+    assigned_mask = 0
+    for bit in fields:
+        assigned_mask |= 1 << bit
+    reserved = _set_bit_numbers(value, (~assigned_mask) & 0xFF)
+    if reserved:
+        parts.append(f"reserved bits {reserved} should be 0")
+    return "; ".join(parts)
+
+
+def _set_bit_numbers(value: int, mask: int) -> str:
+    bits = [str(bit) for bit in range(7, -1, -1) if value & mask & (1 << bit)]
+    return ", ".join(bits)
+
+
 def _sci_smr_semantics(value: int) -> str:
     mode = "sync" if value & 0x80 else "async"
     char_len = "7-bit" if value & 0x40 else "8-bit"
@@ -157,6 +211,10 @@ def _rstcsr_semantics(value: int) -> str:
 
 
 def _semantic_values(address: int, value: int) -> str:
+    if address in IO_PRIORITY_FIELDS:
+        return _ipr_semantics(address, value)
+    if address in IO_DTE_BITS:
+        return _dte_semantics(address, value)
     if address == 0xFEE8:
         return _adcsr_semantics(value)
     if address in (0xFED8, 0xFEF0):