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DTC and SCI improvements

This commit is contained in:
Aiden
2026-05-25 14:22:32 +10:00
parent 62d1c3c876
commit 80819448cf
21 changed files with 13823 additions and 86 deletions

View File

@@ -8,8 +8,11 @@ from .cycles import annotate_cycles
from .data_analysis import analyze_unreached_data
from .decoder import H8536Decoder
from .formatting import parse_int
from .peripheral_access import analyze_peripheral_access
from .render import format_callgraph_dot, format_listing, write_json
from .rom import Rom
from .sci import analyze_sci
from .timing import summarize_timing
from .vectors import read_dtc_vectors_max, read_dtc_vectors_min, read_vectors_max, read_vectors_min
@@ -31,10 +34,14 @@ def main() -> int:
parser.add_argument("--end", type=parse_int, default=None, help="decode upper address limit, exclusive")
parser.add_argument("--entry", type=parse_int, action="append", default=[], help="extra entry point to trace")
parser.add_argument("--br", type=parse_int, default=None, help="optional BR value for @aa:8 short absolute operands")
parser.add_argument("--clock-hz", type=parse_int, default=None, help="oscillator clock in Hz for SCI baud inference")
parser.add_argument("--linear", action="store_true", help="linear-sweep the selected range instead of tracing from vectors")
parser.add_argument("--cycles", action="store_true", help="append Appendix A cycle estimates to assembly comments")
parser.add_argument("--timing", action="store_true", help="include straight-line block and loop cycle summaries")
parser.add_argument("--callgraph-dot", type=Path, default=None, help="optional Graphviz DOT call graph output")
args = parser.parse_args()
if args.clock_hz is not None and args.clock_hz <= 0:
parser.error("--clock-hz must be positive")
data = args.rom.read_bytes()
rom = Rom(data)
@@ -65,6 +72,9 @@ def main() -> int:
annotate_cycles(instructions, args.mode)
data_candidates = analyze_unreached_data(rom, instructions, args.start, end)
call_graph = build_call_graph(instructions, vectors, labels)
timing_summary = summarize_timing(instructions, labels, call_graph) if args.timing else None
sci_analysis = analyze_sci(instructions, clock_hz=args.clock_hz)
peripheral_access = analyze_peripheral_access(instructions)
args.out.parent.mkdir(parents=True, exist_ok=True)
args.out.write_text(
@@ -78,7 +88,10 @@ def main() -> int:
traced=not args.linear,
dtc_vectors=dtc_vectors,
data_candidates=data_candidates,
timing_summary=timing_summary,
show_cycles=args.cycles,
sci_analysis=sci_analysis,
peripheral_access=peripheral_access,
),
encoding="utf-8",
)
@@ -92,6 +105,9 @@ def main() -> int:
dtc_vectors=dtc_vectors,
data_candidates=data_candidates,
call_graph=call_graph,
timing_summary=timing_summary,
sci_analysis=sci_analysis,
peripheral_access=peripheral_access,
)
if args.callgraph_dot:
args.callgraph_dot.parent.mkdir(parents=True, exist_ok=True)