Eprom emulation
This commit is contained in:
@@ -104,6 +104,7 @@ Current serial observations:
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- Emulator LCD finding: the ROM writes the boot/no-active-session message to the LCD bus as ` CONNECT:NOT ACT` on line 0 by the time SCI1 RX is serviceable. Valid and invalid six-byte host frames leave that display active while normal serial replies/heartbeats continue.
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- Board/P9 finding: traced MCU pin 62 `P91` reaches X24164 pin 6 `SCL`, and MCU pin 68 `P97` reaches the shared X24164 pin 5 `SDA` node. The emulator now treats the ROM's `C121/C08B/C0DB/C10C/C142` P9 routines as an X24164-style two-wire EEPROM bus, with ROM logical addresses `0x000-0x7FF` on the `H'A0/H'A1` control-byte family and `0x800-0xFFF` on `H'E0/H'E1`.
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- EEPROM role finding: `loc_40BB` checks `P7DR.7` and the `F402 == H'6B6F` signature before defaulting EEPROM/shadow tables; `loc_4103` writes ROM default words through `BFE0`, `loc_41D2` reads sixteen 8-byte records into `F7B0-F82F`, and the command-4 path at `BD2B-BD5F` can persist serial table writes when `F76E.7` is set.
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- Emulator board-state finding: P7 now reads external pin state for input bits, so the DIP-off default is modeled as `--p7-input 0xFF`; `--eeprom-seed factory` can pre-seed the X24164 devices and `F400-F4FF` shadow from the ROM default table for already-initialized-state experiments.
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- RX probe finding: the `--preset connect-lcd` sequence is sensitive to injection timing and modeled external state. With timed UART injection, the emulator can still reach `CONNECT: OK`/`02 00 02 00 00 5A`, while the real bench remains at `CONNECT NOT ACT`; this points to missing session/P9/external-panel context rather than a simple checksum or UART-spacing issue.
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- Bench follow-up: replaying the emulator CONNECT sequence on the real device did not switch the LCD to OK. The real device answered the `04 00 00 80 00 DE` step with `07 80 C0 60 20 5D` in the captured run and remained at `CONNECT NOT ACT`, so the next mismatch to chase is the missing visible `07 80 C0 60 20 5D` response/session context rather than the LCD OK branch.
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- Observed capture labels such as `cam_power_button_candidate` and `call_button_candidate` are deliberately treated as capture overlays, not protocol facts hard-coded in ROM.
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@@ -216,6 +217,8 @@ python h8536_emulator_rx_probe.py --help
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- `--frt1-ocia-steps N` / `--frt2-ocia-steps N`: optional legacy overrides for forcing rough FRT compare cadence in targeted tests.
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- `--p9-fast-path`: shortcut known P9 transfer routines for exploration. Fast-path byte/marker calls now feed the X24164 EEPROM model, and `BFE0/BFFE` wrapper shortcuts perform EEPROM word write-verify/read operations against the modeled banks.
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- `--p9-fast-optimistic-wrapper`: legacy fallback for older wrapper experiments; the known `BFE0/BFFE` EEPROM wrappers now use the X24164 model instead.
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- `--p7-input 0xFF`: set external P7 input pin state; this matters for the EEPROM defaulting gate at `P7DR.7` and the DIP-switch style inputs.
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- `--eeprom-seed blank|factory`: choose blank X24164 power-on state or pre-seed the X24164/shadow tables from the ROM defaults before reset.
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- `--trace-report-gates`, `--trace-report-queue`, and `--trace-ram-lifecycle`: inspect the serial report queue, `loc_4046`/`F9C4` gate, and watched RAM byte history.
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- `--target-frame "00 00 00 00 80 DA"`: compare staged/emitted TX bytes against an expected six-byte frame.
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- `h8536_emulator_rx_probe.py "04 00 00 80 00"`: append the checksum, inject the host frame through SCI1 RX, and summarize responses.
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@@ -23,6 +23,8 @@ from .constants import (
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IPRE,
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ON_CHIP_RAM_END,
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ON_CHIP_RAM_START,
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P7DDR,
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P7DR,
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P9DDR,
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P9DR,
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RAMCR,
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@@ -55,7 +57,7 @@ from .cpu import CPUState
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from .errors import EmulatorError, UnsupportedInstruction
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from .fast_paths import P9FastPath, P9FastPathConfig, P9FastPathEvent
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from .memory import MemoryAccess, MemoryMap, describe_regions
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from .peripherals import LCD, P9TraceEvent, X24164Bus, X24164Device, X24164TraceEvent
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from .peripherals import LCD, P9TraceEvent, X24164Bus, X24164Device, X24164TraceEvent, factory_default_words_from_rom
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from .runner import H8536Emulator, RunReport
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from .sci import SCI1, SciTxEvent
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from .uart import UartTiming
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@@ -88,6 +90,8 @@ __all__ = [
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"MemoryMap",
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"ON_CHIP_RAM_END",
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"ON_CHIP_RAM_START",
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"P7DDR",
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"P7DR",
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"P9DDR",
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"P9DR",
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"P9FastPath",
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@@ -130,6 +134,7 @@ __all__ = [
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"build_arg_parser",
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"describe_regions",
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"discover_rom_path",
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"factory_default_words_from_rom",
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"load_rom",
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"main",
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]
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@@ -181,6 +181,8 @@ class ReplayConfig:
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p9_fast_path: bool = True
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p9_fast_input: int = 0xFF
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p9_fast_optimistic_wrapper: bool = False
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p7_input: int = 0xFF
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eeprom_seed: str = "blank"
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def parse_bench_replay_log_text(text: str) -> BenchReplayLog:
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@@ -244,6 +246,8 @@ def run_bench_replay(log_path: Path, *, rom_path: Path | None = None, config: Re
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p9_fast_path_enabled=config.p9_fast_path,
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p9_fast_default_input_byte=config.p9_fast_input,
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p9_fast_default_wrapper_success=config.p9_fast_optimistic_wrapper,
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p7_input=config.p7_input,
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eeprom_seed=config.eeprom_seed,
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)
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context = RunContext()
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@@ -369,6 +373,8 @@ def build_arg_parser() -> argparse.ArgumentParser:
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parser.add_argument("--no-p9-fast-path", action="store_true", help="disable shortcut handling for known P9 routines")
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parser.add_argument("--p9-fast-input", type=lambda text: int(text, 0), default=ReplayConfig.p9_fast_input)
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parser.add_argument("--p9-fast-optimistic-wrapper", action="store_true", help="legacy fallback for older wrapper experiments; known BFE0/BFFE wrappers use the X24164 model")
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parser.add_argument("--p7-input", type=lambda text: int(text, 0), default=ReplayConfig.p7_input, help="external P7 pin state for input bits; DIP-off board default is 0xFF")
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parser.add_argument("--eeprom-seed", choices=("blank", "factory"), default=ReplayConfig.eeprom_seed, help="initial X24164/shadow state before reset")
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parser.add_argument("--assert-bench-parity", action="store_true", help="exit nonzero if emulator behavior diverges from the bench log")
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parser.add_argument("--json", action="store_true", help="emit JSON")
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return parser
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@@ -392,6 +398,8 @@ def main(argv: list[str] | None = None) -> int:
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p9_fast_path=not args.no_p9_fast_path,
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p9_fast_input=args.p9_fast_input,
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p9_fast_optimistic_wrapper=args.p9_fast_optimistic_wrapper,
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p7_input=args.p7_input,
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eeprom_seed=args.eeprom_seed,
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),
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)
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if args.json:
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@@ -45,6 +45,8 @@ def build_arg_parser() -> argparse.ArgumentParser:
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parser.add_argument("--p9-fast-path", action="store_true", help="shortcut known P9 bit-banged transfer routines for exploration")
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parser.add_argument("--p9-fast-input", type=parse_int, default=0xFF, help="default byte returned by the P9 fast-path read routine")
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parser.add_argument("--p9-fast-optimistic-wrapper", action="store_true", help="legacy fallback for older wrapper experiments; known BFE0/BFFE wrappers use the X24164 model")
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parser.add_argument("--p7-input", type=parse_int, default=0xFF, help="external P7 pin state for input bits; DIP-off board default is 0xFF")
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parser.add_argument("--eeprom-seed", choices=("blank", "factory"), default="blank", help="initial X24164/shadow state before reset")
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return parser
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@@ -65,6 +67,8 @@ def main(argv: list[str] | None = None) -> int:
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p9_fast_path_enabled=args.p9_fast_path,
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p9_fast_default_input_byte=args.p9_fast_input,
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p9_fast_default_wrapper_success=args.p9_fast_optimistic_wrapper,
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p7_input=args.p7_input,
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eeprom_seed=args.eeprom_seed,
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)
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print(f"rom={rom_path}")
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print(f"reset_vector={h16(emulator.reset_vector())}")
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@@ -8,6 +8,8 @@ SCI1_TDR = 0xFEDB
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SCI1_SSR = 0xFEDC
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SCI1_RDR = 0xFEDD
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P7DDR = 0xFE8C
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P7DR = 0xFE8E
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P9DDR = 0xFEFE
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P9DR = 0xFEFF
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@@ -9,6 +9,8 @@ from ..rom import Rom
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from .constants import (
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ON_CHIP_RAM_END,
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ON_CHIP_RAM_START,
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P7DDR,
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P7DR,
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P9DDR,
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P9DR,
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REGISTER_FIELD_END,
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@@ -22,6 +24,7 @@ from .constants import (
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)
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from .peripherals.lcd import LCD, LCD_E_CLOCK_DATA, LCD_E_CLOCK_STATUS
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from .peripherals.p9_bus import P9Bus
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from .peripherals.x24164 import factory_default_words_from_rom
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from .sci import SCI1
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@@ -35,7 +38,7 @@ class MemoryAccess:
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class MemoryMap:
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def __init__(self, rom_bytes: bytes, sci1: SCI1 | None = None) -> None:
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def __init__(self, rom_bytes: bytes, sci1: SCI1 | None = None, *, p7_input: int = 0xFF) -> None:
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self.rom = Rom(rom_bytes, base=0)
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self.sci1 = sci1 if sci1 is not None else SCI1()
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self.lcd = LCD()
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@@ -43,6 +46,7 @@ class MemoryMap:
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self.ram = bytearray(ON_CHIP_RAM_END - ON_CHIP_RAM_START + 1)
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self.registers = bytearray(REGISTER_FIELD_END - REGISTER_FIELD_START + 1)
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self.external: dict[int, int] = {}
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self.port_inputs: dict[int, int] = {P7DR: p7_input & 0xFF}
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self.access_log: list[MemoryAccess] = []
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self._set_register(SCI1_SMR, self.sci1.smr)
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@@ -64,6 +68,8 @@ class MemoryMap:
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value = self.lcd.read_status()
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elif address == LCD_E_CLOCK_DATA:
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value = self.lcd.read_data()
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elif address == P7DR:
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value = self._read_port_data(P7DDR, P7DR)
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elif address in self.external:
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value = self.external[address]
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elif ON_CHIP_RAM_START <= address <= ON_CHIP_RAM_END:
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@@ -101,6 +107,8 @@ class MemoryMap:
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self.external[address] = value
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elif ON_CHIP_RAM_START <= address <= ON_CHIP_RAM_END:
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self.ram[address - ON_CHIP_RAM_START] = value
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elif address in (P7DDR, P7DR):
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self._set_register(address, value)
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elif address == P9DDR:
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self._set_register(address, self.p9_bus.write_ddr(value))
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elif address == P9DR:
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@@ -140,9 +148,28 @@ class MemoryMap:
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self._set_register(address, (value >> 8) & 0xFF)
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self._set_register((address + 1) & 0xFFFF, value & 0xFF)
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def set_port_input(self, data_register: int, value: int, *, mask: int = 0xFF) -> None:
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data_register &= 0xFFFF
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old = self.port_inputs.get(data_register, 0xFF)
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self.port_inputs[data_register] = ((old & ~mask) | (value & mask)) & 0xFF
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def seed_factory_eeprom_and_shadow(self) -> None:
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for offset, word in factory_default_words_from_rom(self.rom.data):
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address = 0xF400 + offset
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self.external[address & 0xFFFF] = (word >> 8) & 0xFF
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self.external[(address + 1) & 0xFFFF] = word & 0xFF
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self.p9_bus.x24164_bus.seed_factory_defaults_from_rom(self.rom.data)
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self.p9_bus.clear_x24164_trace()
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def _set_register(self, address: int, value: int) -> None:
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self.registers[address - REGISTER_FIELD_START] = value & 0xFF
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def _read_port_data(self, direction_register: int, data_register: int) -> int:
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ddr = self.registers[direction_register - REGISTER_FIELD_START]
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latch = self.registers[data_register - REGISTER_FIELD_START]
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pins = self.port_inputs.get(data_register, 0xFF)
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return ((latch & ddr) | (pins & ~ddr)) & 0xFF
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def _log(self, kind: str, address: int, size: int, value: int) -> None:
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self.access_log.append(MemoryAccess(address, size, value, kind, self.region(address).name))
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@@ -2,7 +2,7 @@ from __future__ import annotations
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from .lcd import LCD, LCD_E_CLOCK_DATA, LCD_E_CLOCK_STATUS, LCD_LINE_WIDTH
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from .p9_bus import P9_ACK_BIT, P9_STROBE_BIT, P9Bus, P9StrobeEvent, P9TraceEvent
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from .x24164 import X24164Bus, X24164Device, X24164TraceEvent
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from .x24164 import X24164Bus, X24164Device, X24164TraceEvent, factory_default_words_from_rom
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__all__ = [
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"LCD_E_CLOCK_DATA",
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@@ -17,4 +17,5 @@ __all__ = [
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"X24164Bus",
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"X24164Device",
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"X24164TraceEvent",
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"factory_default_words_from_rom",
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]
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@@ -237,6 +237,10 @@ class P9Bus:
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self._append_x24164_trace()
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return success
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def clear_x24164_trace(self) -> None:
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self.x24164_bus.trace_events.clear()
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self._x24164_trace_index = 0
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def _record_transmitted_bit(self, bit: int) -> None:
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self.transmitted_bits.append(bit)
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self.trace_events.append(P9TraceEvent("tx_bit", self.ddr, self.dr_latch, bit=bit))
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@@ -4,6 +4,10 @@ from dataclasses import dataclass, field
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X24164_SIZE = 2048
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X24164_FACTORY_DEFAULT_BASE = 0xC964
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X24164_FACTORY_DEFAULT_BYTES = 0x0100
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X24164_LOGICAL_PAGE_SIZE = 0x0100
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X24164_LOGICAL_PAGE_COUNT = 0x10
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@dataclass
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@@ -214,6 +218,16 @@ class X24164Bus:
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)
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return True
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def seed_factory_defaults_from_rom(self, rom_bytes: bytes) -> None:
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for offset, word in factory_default_words_from_rom(rom_bytes):
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for page in range(X24164_LOGICAL_PAGE_COUNT):
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self.write_linear_word((page * X24164_LOGICAL_PAGE_SIZE) + offset, word)
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for page in range(X24164_LOGICAL_PAGE_COUNT):
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base = page * X24164_LOGICAL_PAGE_SIZE
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for offset in range(0, 8, 2):
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self.write_linear_word(base + offset, 0x2020)
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def trace_lines(self, limit: int | None = None) -> list[str]:
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events = self.trace_events if limit is None else self.trace_events[-limit:]
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return [event.line() for event in events]
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@@ -360,3 +374,15 @@ def default_x24164_devices() -> list[X24164Device]:
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X24164Device("x24164_a0_lower_2k", 0xA0),
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X24164Device("x24164_e0_upper_2k", 0xE0),
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]
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def factory_default_words_from_rom(rom_bytes: bytes) -> list[tuple[int, int]]:
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end = X24164_FACTORY_DEFAULT_BASE + X24164_FACTORY_DEFAULT_BYTES
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if len(rom_bytes) < end:
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raise ValueError(f"ROM is too small for X24164 factory default table at {X24164_FACTORY_DEFAULT_BASE:04X}")
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words: list[tuple[int, int]] = []
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for offset in range(0, X24164_FACTORY_DEFAULT_BYTES, 2):
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address = X24164_FACTORY_DEFAULT_BASE + offset
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word = (rom_bytes[address] << 8) | rom_bytes[address + 1]
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words.append((offset, word))
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return words
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@@ -92,11 +92,17 @@ class H8536Emulator:
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p9_fast_path_enabled: bool = False,
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p9_fast_default_input_byte: int = 0xFF,
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p9_fast_default_wrapper_success: bool = False,
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p7_input: int = 0xFF,
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eeprom_seed: str = "blank",
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) -> None:
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if not rom_bytes:
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raise ValueError("ROM image is empty")
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if eeprom_seed not in {"blank", "factory"}:
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raise ValueError("eeprom_seed must be 'blank' or 'factory'")
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self.sci1 = SCI1()
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self.memory = MemoryMap(rom_bytes, self.sci1)
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self.memory = MemoryMap(rom_bytes, self.sci1, p7_input=p7_input)
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if eeprom_seed == "factory":
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self.memory.seed_factory_eeprom_and_shadow()
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self.memory.p9_bus.default_wrapper_success = bool(p9_fast_default_wrapper_success)
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self.p9_fast_path = p9_fast_path or P9FastPath(
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P9FastPathConfig(enabled=p9_fast_path_enabled, default_input_byte=p9_fast_default_input_byte)
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@@ -214,6 +214,8 @@ def run_rx_probe(
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p9_fast_path: bool = True,
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p9_fast_input: int = 0xFF,
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p9_fast_optimistic_wrapper: bool = False,
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p7_input: int = 0xFF,
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eeprom_seed: str = "blank",
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stop_after_tx_frame: bool = True,
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) -> tuple[Path, H8536Emulator, str, list[FrameResult]]:
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rom_bytes, discovered_rom_path = load_rom(rom_path)
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@@ -226,6 +228,8 @@ def run_rx_probe(
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p9_fast_path_enabled=p9_fast_path,
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p9_fast_default_input_byte=p9_fast_input,
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p9_fast_default_wrapper_success=p9_fast_optimistic_wrapper,
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p7_input=p7_input,
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eeprom_seed=eeprom_seed,
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)
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boot_context = RunContext()
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@@ -271,6 +275,8 @@ def build_arg_parser() -> argparse.ArgumentParser:
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parser.add_argument("--no-p9-fast-path", action="store_true", help="disable shortcut handling for known P9 routines")
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parser.add_argument("--p9-fast-input", type=parse_int, default=0xFF, help="default byte returned by the P9 fast-path read routine")
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parser.add_argument("--p9-fast-optimistic-wrapper", action="store_true", help="legacy fallback for older wrapper experiments; known BFE0/BFFE wrappers use the X24164 model")
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parser.add_argument("--p7-input", type=parse_int, default=0xFF, help="external P7 pin state for input bits; DIP-off board default is 0xFF")
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parser.add_argument("--eeprom-seed", choices=("blank", "factory"), default="blank", help="initial X24164/shadow state before reset")
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return parser
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@@ -297,6 +303,8 @@ def main(argv: list[str] | None = None) -> int:
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p9_fast_path=not args.no_p9_fast_path,
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p9_fast_input=args.p9_fast_input,
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p9_fast_optimistic_wrapper=args.p9_fast_optimistic_wrapper,
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p7_input=args.p7_input,
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eeprom_seed=args.eeprom_seed,
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stop_after_tx_frame=not args.keep_listening,
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||||
)
|
||||
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
import unittest
|
||||
|
||||
from h8536.emulator import H8536Emulator
|
||||
from h8536.emulator import H8536Emulator, MemoryMap, P7DDR, P7DR
|
||||
|
||||
|
||||
def rom_with_reset(*, reset: int = 0x1000, size: int = 0x1100) -> bytearray:
|
||||
@@ -10,6 +10,35 @@ def rom_with_reset(*, reset: int = 0x1000, size: int = 0x1100) -> bytearray:
|
||||
|
||||
|
||||
class EmulatorAddressingTest(unittest.TestCase):
|
||||
def test_p7dr_reads_external_pin_state_for_input_bits(self):
|
||||
memory = MemoryMap(b"\x00" * 4, p7_input=0xFF)
|
||||
|
||||
memory.write8(P7DDR, 0x00)
|
||||
memory.write8(P7DR, 0x00)
|
||||
|
||||
self.assertEqual(memory.read8(P7DR), 0xFF)
|
||||
|
||||
def test_p7dr_output_bits_read_latch_while_input_bits_read_pins(self):
|
||||
memory = MemoryMap(b"\x00" * 4, p7_input=0x7F)
|
||||
|
||||
memory.write8(P7DDR, 0x80)
|
||||
memory.write8(P7DR, 0x00)
|
||||
|
||||
self.assertEqual(memory.read8(P7DR), 0x7F)
|
||||
|
||||
def test_factory_eeprom_seed_populates_shadow_and_page_labels(self):
|
||||
rom = bytearray([0xFF] * 0xCB00)
|
||||
rom[0xC966:0xC968] = b"\x6B\x6F"
|
||||
rom[0xC974:0xC976] = b"\x80\x00"
|
||||
|
||||
memory = MemoryMap(bytes(rom))
|
||||
memory.seed_factory_eeprom_and_shadow()
|
||||
|
||||
self.assertEqual(memory.read16(0xF402), 0x6B6F)
|
||||
self.assertEqual(memory.p9_bus.fast_read_word(0x0010), (True, 0x8000))
|
||||
self.assertEqual(memory.p9_bus.fast_read_word(0x0110), (True, 0x8000))
|
||||
self.assertEqual(memory.p9_bus.fast_read_word(0x0002), (True, 0x2020))
|
||||
|
||||
def test_txi_indexed_byte_load_uses_signed_word_displacement_and_full_index_register(self):
|
||||
rom = rom_with_reset()
|
||||
rom[0x1000:0x1004] = b"\xF0\xF8\x58\x80" # MOV:G.B @(-H'07A8,R0), R0
|
||||
@@ -62,7 +91,7 @@ class EmulatorAddressingTest(unittest.TestCase):
|
||||
rom = rom_with_reset()
|
||||
rom[0x1000:0x1003] = b"\xE1\xFE\x81" # MOV:G.B @(H'-02,R1), R1
|
||||
|
||||
emulator = H8536Emulator(bytes(rom))
|
||||
emulator = H8536Emulator(bytes(rom), p7_input=0x37)
|
||||
emulator.cpu.regs[1] = 0xFE90
|
||||
emulator.memory.write8(0xFE8E, 0x37)
|
||||
emulator.step()
|
||||
|
||||
Reference in New Issue
Block a user