diff --git a/README.md b/README.md
index d4ad7aa..2cdbad7 100644
--- a/README.md
+++ b/README.md
@@ -34,10 +34,13 @@ To turn the structured decompile output into conservative C-like pseudocode:
- Flags/manual-annotates TEMP-register access ordering for FRT and A/D 16-bit peripheral registers.
- Scans unreached ROM ranges for ASCII strings and pointer-table candidates.
- Emits function summaries and a direct-call graph in JSON, with optional Graphviz DOT output.
+- Tracks conservative per-basic-block register/control-register dataflow in JSON and comments known value changes.
+- Discovers RAM/external/global symbols from memory references and pointer tables, including read/write counts and xrefs.
+- Adds indirect `JSR/JMP @Rn` flow hints when a nearby indexed word load looks like a pointer table dispatch.
- Adds Appendix A cycle estimates to JSON and can append them to ASM comments.
- Summarizes straight-line block timing and backward-branch loop timing when requested.
- Handles the E-clock transfer instructions `MOVFPE` and `MOVTPE`.
-- Generates a separate C-like pseudocode view from the JSON, preserving labels, calls, branches, register names, comments, and optional cycle notes.
+- Generates a separate C-like pseudocode view from the JSON, preserving labels, calls, branches, register names, inferred symbols, metadata comments, optional cycle notes, and simple structured `if`/`do while` patterns.
The generated listing is written to:
@@ -76,6 +79,7 @@ python h8536_pseudocode.py --help
- `--no-asm`: omit original assembly text from pseudocode line comments.
- `--no-addresses`: omit instruction addresses from pseudocode line comments.
- `--cycles`: include cycle estimates from the JSON.
+- `--no-structure`: preserve label/goto output instead of simple structured `if`/loop output.
- `--max-functions N`: emit only the first `N` functions for focused review.
## Code Layout
@@ -90,6 +94,9 @@ python h8536_pseudocode.py --help
- `h8536/data_analysis.py`: unreached string and pointer-table candidate scans.
- `h8536/memory.py`: manual-derived memory-region tagging.
- `h8536/cycles.py`: Appendix A cycle estimate tables.
+- `h8536/dataflow.py`: conservative register/control-register value tracking.
+- `h8536/symbols.py`: RAM/external/global symbol discovery from references and data tables.
+- `h8536/indirect.py`: indirect call/jump and pointer-table dispatch hints.
- `h8536/timing.py`: block and loop cycle summaries.
- `h8536/sci.py`: SCI setup tracking and baud inference.
- `h8536/peripheral_access.py`: FRT/A-D TEMP-register access analysis.
diff --git a/build/rom_decompiled.asm b/build/rom_decompiled.asm
index 36ee00b..1d3d941 100644
--- a/build/rom_decompiled.asm
+++ b/build/rom_decompiled.asm
@@ -140,6 +140,89 @@
; ptrtbl H'B7CC count=3 -> H'F772, H'1627, H'11A0
; ptrtbl H'C212 count=5 -> H'1700, H'1682, H'1664, H'1647, H'1630
+; Symbols
+; mem_1011 H'1011 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_10FB H'10FB program_or_external memory r=0 w=0 width=unknown xrefs=2
+; mem_1161 H'1161 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_1170 H'1170 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_1179 H'1179 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_1188 H'1188 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_1197 H'1197 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_11A0 H'11A0 program_or_external memory r=0 w=0 width=unknown xrefs=2
+; mem_11A9 H'11A9 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_11DC H'11DC program_or_external memory r=0 w=0 width=unknown xrefs=2
+; mem_1206 H'1206 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_1215 H'1215 program_or_external memory r=0 w=0 width=unknown xrefs=3
+; mem_12A8 H'12A8 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_1314 H'1314 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_1617 H'1617 program_or_external memory r=0 w=0 width=unknown xrefs=2
+; mem_1627 H'1627 program_or_external memory r=0 w=0 width=unknown xrefs=6
+; mem_1630 H'1630 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_1647 H'1647 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_1664 H'1664 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_1682 H'1682 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_1700 H'1700 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_1819 H'1819 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_1A00 H'1A00 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_1AF8 H'1AF8 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_2815 H'2815 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_2CA6 H'2CA6 program_or_external memory r=0 w=0 width=unknown xrefs=429
+; mem_441D H'441D program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_449C H'449C program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_449E H'449E program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_44A0 H'44A0 program_or_external memory r=0 w=0 width=unknown xrefs=1
+; mem_E000 H'E000 program_or_external memory r=0 w=1 width=word
+; mem_E004 H'E004 program_or_external memory r=1 w=0 width=word
+; mem_E006 H'E006 program_or_external memory r=0 w=1 width=word
+; mem_E046 H'E046 program_or_external memory r=0 w=1 width=word
+; mem_E080 H'E080 program_or_external memory r=0 w=1 width=word
+; mem_E102 H'E102 program_or_external memory r=2 w=0 width=word
+; mem_E124 H'E124 program_or_external memory r=2 w=0 width=word
+; mem_E126 H'E126 program_or_external memory r=5 w=0 width=word
+; mem_E14E H'E14E program_or_external memory r=1 w=0 width=word
+; mem_E16E H'E16E program_or_external memory r=1 w=0 width=word
+; mem_E172 H'E172 program_or_external memory r=1 w=0 width=word
+; mem_E1EC H'E1EC program_or_external memory r=2 w=0 width=word
+; mem_E220 H'E220 program_or_external memory r=1 w=0 width=word
+; mem_E800 H'E800 program_or_external memory r=0 w=1 width=word
+; mem_E806 H'E806 program_or_external memory r=0 w=1 width=word
+; mem_E880 H'E880 program_or_external memory r=0 w=1 width=word
+; mem_E902 H'E902 program_or_external memory r=0 w=1 width=word
+; mem_E924 H'E924 program_or_external memory r=0 w=1 width=word
+; mem_E9EC H'E9EC program_or_external memory r=0 w=1 width=word
+; mem_F000 H'F000 program_or_external memory r=2 w=0 width=byte
+; mem_F001 H'F001 program_or_external memory r=2 w=1 width=byte
+; mem_F002 H'F002 program_or_external memory r=2 w=1 width=mixed
+; mem_F003 H'F003 program_or_external memory r=1 w=1 width=byte
+; mem_F004 H'F004 program_or_external memory r=2 w=1 width=mixed
+; mem_F005 H'F005 program_or_external memory r=1 w=1 width=byte
+; mem_F006 H'F006 program_or_external memory r=2 w=0 width=mixed
+; mem_F007 H'F007 program_or_external memory r=1 w=0 width=byte
+; mem_F008 H'F008 program_or_external memory r=2 w=0 width=mixed
+; mem_F009 H'F009 program_or_external memory r=1 w=1 width=byte
+; mem_F00A H'F00A program_or_external memory r=2 w=1 width=mixed
+; mem_F00B H'F00B program_or_external memory r=0 w=1 width=byte
+; mem_F00C H'F00C program_or_external memory r=2 w=1 width=mixed
+; mem_F00D H'F00D program_or_external memory r=0 w=1 width=byte
+; mem_F00E H'F00E program_or_external memory r=0 w=1 width=byte
+; mem_F00F H'F00F program_or_external memory r=1 w=1 width=byte
+; mem_F100 H'F100 program_or_external memory r=2 w=0 width=byte
+; mem_F101 H'F101 program_or_external memory r=2 w=1 width=byte
+; mem_F102 H'F102 program_or_external memory r=2 w=1 width=mixed
+; mem_F103 H'F103 program_or_external memory r=1 w=1 width=byte
+; mem_F104 H'F104 program_or_external memory r=2 w=1 width=mixed
+; mem_F105 H'F105 program_or_external memory r=1 w=1 width=byte
+; mem_F106 H'F106 program_or_external memory r=2 w=0 width=mixed
+; mem_F107 H'F107 program_or_external memory r=1 w=0 width=byte
+; mem_F108 H'F108 program_or_external memory r=2 w=0 width=mixed
+; mem_F109 H'F109 program_or_external memory r=1 w=1 width=byte
+; mem_F10A H'F10A program_or_external memory r=2 w=1 width=mixed
+; mem_F10B H'F10B program_or_external memory r=0 w=1 width=byte
+; mem_F10C H'F10C program_or_external memory r=2 w=1 width=mixed
+; mem_F10D H'F10D program_or_external memory r=0 w=1 width=byte
+; mem_F10E H'F10E program_or_external memory r=0 w=1 width=byte
+; ... 206 more symbols omitted from listing header
+
; Timing Summary
; Straight-line blocks
; block H'1000-H'10CB vec_reset_1000 ins=42 cycles=371 unknown=0
@@ -228,8 +311,8 @@
vec_reset_1000:
-1000: 5F FE 80 MOV:I.W #H'FE80, R7 ; cycles=3
-1003: 0C 07 00 88 LDC.W #H'0700, SR ; cycles=6
+1000: 5F FE 80 MOV:I.W #H'FE80, R7 ; dataflow R7=H'FE80; cycles=3
+1003: 0C 07 00 88 LDC.W #H'0700, SR ; dataflow SR=H'0700; cycles=6
1007: 15 FE 80 06 FF MOV:G.B #H'FF, @P1DDR ; P1DDR = H'FF; cycles=9
100C: 15 FE 82 06 00 MOV:G.B #H'00, @P1DR ; P1DR = H'00; cycles=9
1011: 15 FE 89 06 F9 MOV:G.B #H'F9, @P6DDR ; P6DDR = H'F9; cycles=9
@@ -272,469 +355,469 @@ vec_reset_1000:
10CB: 30 2E A8 BRA loc_3F76 ; cycles=8
loc_10CE:
-10CE: 5C 00 40 MOV:I.W #H'0040, R4 ; cycles=3
-10D1: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+10CE: 5C 00 40 MOV:I.W #H'0040, R4 ; dataflow R4=H'0040; cycles=3
+10D1: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
10D4: 1E 2D F5 BSR loc_3ECC ; cycles=13
-10D7: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-10DA: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+10D7: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+10DA: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
10DD: 1E 2D EC BSR loc_3ECC ; cycles=14
-10E0: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-10E3: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+10E0: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+10E3: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
10E6: 1E 2D E3 BSR loc_3ECC ; cycles=13
-10E9: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-10EC: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+10E9: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+10EC: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
10EF: 1E 2D DA BSR loc_3ECC ; cycles=14
-10F2: 5C 02 07 MOV:I.W #H'0207, R4 ; cycles=3
-10F5: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+10F2: 5C 02 07 MOV:I.W #H'0207, R4 ; dataflow R4=H'0207; cycles=3
+10F5: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
10F8: 1E 2D D1 BSR loc_3ECC ; cycles=13
-10FB: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-10FE: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+10FB: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+10FE: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1101: 1E 2D C8 BSR loc_3ECC ; cycles=14
-1104: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-1107: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1104: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+1107: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
110A: 1E 2D BF BSR loc_3ECC ; cycles=13
-110D: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-1110: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+110D: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+1110: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1113: 1E 2D B6 BSR loc_3ECC ; cycles=14
-1116: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-1119: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1116: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+1119: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
111C: 1E 2D AD BSR loc_3ECC ; cycles=13
-111F: 5C 00 48 MOV:I.W #H'0048, R4 ; cycles=3
-1122: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+111F: 5C 00 48 MOV:I.W #H'0048, R4 ; dataflow R4=H'0048; cycles=3
+1122: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1125: 1E 2D A4 BSR loc_3ECC ; cycles=14
-1128: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-112B: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1128: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+112B: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
112E: 1E 2D 9B BSR loc_3ECC ; cycles=13
-1131: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-1134: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1131: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+1134: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1137: 1E 2D 92 BSR loc_3ECC ; cycles=14
-113A: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-113D: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+113A: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+113D: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1140: 1E 2D 89 BSR loc_3ECC ; cycles=13
-1143: 5C 02 1B MOV:I.W #H'021B, R4 ; cycles=3
-1146: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1143: 5C 02 1B MOV:I.W #H'021B, R4 ; dataflow R4=H'021B; cycles=3
+1146: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1149: 1E 2D 80 BSR loc_3ECC ; cycles=14
-114C: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-114F: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+114C: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+114F: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1152: 1E 2D 77 BSR loc_3ECC ; cycles=13
-1155: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-1158: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1155: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+1158: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
115B: 1E 2D 6E BSR loc_3ECC ; cycles=14
-115E: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-1161: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+115E: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+1161: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1164: 1E 2D 65 BSR loc_3ECC ; cycles=13
-1167: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-116A: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1167: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+116A: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
116D: 1E 2D 5C BSR loc_3ECC ; cycles=14
-1170: 5C 00 50 MOV:I.W #H'0050, R4 ; cycles=3
-1173: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1170: 5C 00 50 MOV:I.W #H'0050, R4 ; dataflow R4=H'0050; cycles=3
+1173: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1176: 1E 2D 53 BSR loc_3ECC ; cycles=13
-1179: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-117C: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1179: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+117C: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
117F: 1E 2D 4A BSR loc_3ECC ; cycles=14
-1182: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-1185: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1182: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+1185: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1188: 1E 2D 41 BSR loc_3ECC ; cycles=13
-118B: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-118E: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+118B: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+118E: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1191: 1E 2D 38 BSR loc_3ECC ; cycles=14
-1194: 5C 02 1C MOV:I.W #H'021C, R4 ; cycles=3
-1197: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1194: 5C 02 1C MOV:I.W #H'021C, R4 ; dataflow R4=H'021C; cycles=3
+1197: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
119A: 1E 2D 2F BSR loc_3ECC ; cycles=13
-119D: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-11A0: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+119D: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+11A0: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
11A3: 1E 2D 26 BSR loc_3ECC ; cycles=14
-11A6: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-11A9: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+11A6: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+11A9: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
11AC: 1E 2D 1D BSR loc_3ECC ; cycles=13
-11AF: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-11B2: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+11AF: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+11B2: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
11B5: 1E 2D 14 BSR loc_3ECC ; cycles=14
-11B8: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-11BB: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+11B8: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+11BB: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
11BE: 1E 2D 0B BSR loc_3ECC ; cycles=13
-11C1: 5C 00 58 MOV:I.W #H'0058, R4 ; cycles=3
-11C4: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+11C1: 5C 00 58 MOV:I.W #H'0058, R4 ; dataflow R4=H'0058; cycles=3
+11C4: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
11C7: 1E 2D 02 BSR loc_3ECC ; cycles=14
-11CA: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-11CD: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+11CA: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+11CD: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
11D0: 1E 2C F9 BSR loc_3ECC ; cycles=13
-11D3: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-11D6: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+11D3: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+11D6: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
11D9: 1E 2C F0 BSR loc_3ECC ; cycles=14
-11DC: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-11DF: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+11DC: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+11DF: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
11E2: 1E 2C E7 BSR loc_3ECC ; cycles=13
-11E5: 5C 02 07 MOV:I.W #H'0207, R4 ; cycles=3
-11E8: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+11E5: 5C 02 07 MOV:I.W #H'0207, R4 ; dataflow R4=H'0207; cycles=3
+11E8: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
11EB: 1E 2C DE BSR loc_3ECC ; cycles=14
-11EE: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-11F1: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+11EE: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+11F1: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
11F4: 1E 2C D5 BSR loc_3ECC ; cycles=13
-11F7: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-11FA: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+11F7: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+11FA: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
11FD: 1E 2C CC BSR loc_3ECC ; cycles=14
-1200: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-1203: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1200: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+1203: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1206: 1E 2C C3 BSR loc_3ECC ; cycles=13
-1209: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-120C: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1209: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+120C: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
120F: 1E 2C BA BSR loc_3ECC ; cycles=14
-1212: 5C 00 60 MOV:I.W #H'0060, R4 ; cycles=3
-1215: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1212: 5C 00 60 MOV:I.W #H'0060, R4 ; dataflow R4=H'0060; cycles=3
+1215: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1218: 1E 2C B1 BSR loc_3ECC ; cycles=13
-121B: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-121E: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+121B: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+121E: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1221: 1E 2C A8 BSR loc_3ECC ; cycles=14
-1224: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-1227: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1224: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+1227: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
122A: 1E 2C 9F BSR loc_3ECC ; cycles=13
-122D: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-1230: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+122D: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+1230: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1233: 1E 2C 96 BSR loc_3ECC ; cycles=14
-1236: 5C 02 1B MOV:I.W #H'021B, R4 ; cycles=3
-1239: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1236: 5C 02 1B MOV:I.W #H'021B, R4 ; dataflow R4=H'021B; cycles=3
+1239: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
123C: 1E 2C 8D BSR loc_3ECC ; cycles=13
-123F: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-1242: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+123F: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+1242: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1245: 1E 2C 84 BSR loc_3ECC ; cycles=14
-1248: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-124B: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1248: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+124B: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
124E: 1E 2C 7B BSR loc_3ECC ; cycles=13
-1251: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-1254: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1251: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+1254: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1257: 1E 2C 72 BSR loc_3ECC ; cycles=14
-125A: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-125D: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+125A: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+125D: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1260: 1E 2C 69 BSR loc_3ECC ; cycles=13
-1263: 5C 00 68 MOV:I.W #H'0068, R4 ; cycles=3
-1266: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1263: 5C 00 68 MOV:I.W #H'0068, R4 ; dataflow R4=H'0068; cycles=3
+1266: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1269: 1E 2C 60 BSR loc_3ECC ; cycles=14
-126C: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-126F: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+126C: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+126F: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1272: 1E 2C 57 BSR loc_3ECC ; cycles=13
-1275: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-1278: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1275: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+1278: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
127B: 1E 2C 4E BSR loc_3ECC ; cycles=14
-127E: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-1281: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+127E: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+1281: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1284: 1E 2C 45 BSR loc_3ECC ; cycles=13
-1287: 5C 02 1C MOV:I.W #H'021C, R4 ; cycles=3
-128A: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1287: 5C 02 1C MOV:I.W #H'021C, R4 ; dataflow R4=H'021C; cycles=3
+128A: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
128D: 1E 2C 3C BSR loc_3ECC ; cycles=14
-1290: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-1293: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1290: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+1293: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1296: 1E 2C 33 BSR loc_3ECC ; cycles=13
-1299: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-129C: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1299: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+129C: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
129F: 1E 2C 2A BSR loc_3ECC ; cycles=14
-12A2: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-12A5: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+12A2: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+12A5: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
12A8: 1E 2C 21 BSR loc_3ECC ; cycles=13
-12AB: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-12AE: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+12AB: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+12AE: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
12B1: 1E 2C 18 BSR loc_3ECC ; cycles=14
-12B4: 5C 00 70 MOV:I.W #H'0070, R4 ; cycles=3
-12B7: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+12B4: 5C 00 70 MOV:I.W #H'0070, R4 ; dataflow R4=H'0070; cycles=3
+12B7: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
12BA: 1E 2C 0F BSR loc_3ECC ; cycles=13
-12BD: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-12C0: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+12BD: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+12C0: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
12C3: 1E 2C 06 BSR loc_3ECC ; cycles=14
-12C6: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-12C9: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+12C6: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+12C9: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
12CC: 1E 2B FD BSR loc_3ECC ; cycles=13
-12CF: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-12D2: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+12CF: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+12D2: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
12D5: 1E 2B F4 BSR loc_3ECC ; cycles=14
-12D8: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-12DB: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+12D8: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+12DB: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
12DE: 1E 2B EB BSR loc_3ECC ; cycles=13
-12E1: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-12E4: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+12E1: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+12E4: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
12E7: 1E 2B E2 BSR loc_3ECC ; cycles=14
-12EA: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-12ED: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+12EA: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+12ED: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
12F0: 1E 2B D9 BSR loc_3ECC ; cycles=13
-12F3: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-12F6: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+12F3: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+12F6: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
12F9: 1E 2B D0 BSR loc_3ECC ; cycles=14
-12FC: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-12FF: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+12FC: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+12FF: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1302: 1E 2B C7 BSR loc_3ECC ; cycles=13
-1305: 5C 00 78 MOV:I.W #H'0078, R4 ; cycles=3
-1308: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1305: 5C 00 78 MOV:I.W #H'0078, R4 ; dataflow R4=H'0078; cycles=3
+1308: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
130B: 1E 2B BE BSR loc_3ECC ; cycles=14
-130E: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-1311: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+130E: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+1311: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1314: 1E 2B B5 BSR loc_3ECC ; cycles=13
-1317: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-131A: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1317: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+131A: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
131D: 1E 2B AC BSR loc_3ECC ; cycles=14
-1320: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-1323: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1320: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+1323: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1326: 1E 2B A3 BSR loc_3ECC ; cycles=13
-1329: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-132C: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1329: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+132C: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
132F: 1E 2B 9A BSR loc_3ECC ; cycles=14
-1332: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-1335: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1332: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+1335: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1338: 1E 2B 91 BSR loc_3ECC ; cycles=13
-133B: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
-133E: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+133B: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
+133E: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1341: 1E 2B 88 BSR loc_3ECC ; cycles=14
-1344: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-1347: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+1344: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+1347: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
134A: 1E 2B 7F BSR loc_3ECC ; cycles=13
-134D: 5C 02 04 MOV:I.W #H'0204, R4 ; cycles=3
-1350: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+134D: 5C 02 04 MOV:I.W #H'0204, R4 ; dataflow R4=H'0204; cycles=3
+1350: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
1353: 1E 2B 76 BSR loc_3ECC ; cycles=14
1356: 19 RTS ; cycles=12
loc_15E0:
15E0: 1E 10 6D BSR loc_2650 ; cycles=13
-15E3: 15 F6 89 D7 BCLR.B #7, @H'F689 ; refs H'F689 in on_chip_ram; cycles=8
+15E3: 15 F6 89 D7 BCLR.B #7, @H'F689 ; refs ram_F689 in on_chip_ram; cycles=8
15E7: 27 10 BEQ loc_15F9 ; cycles=3/8 nt/t
-15E9: 1D F6 8E 81 MOV:G.W @H'F68E, R1 ; refs H'F68E in on_chip_ram; cycles=6
-15ED: 1D E9 02 91 MOV:G.W R1, @H'E902 ; refs H'E902 in program_or_external; cycles=6
-15F1: 52 80 MOV:E.B #H'80, R2 ; cycles=2
-15F3: 5B 00 81 MOV:I.W #H'0081, R3 ; cycles=3
+15E9: 1D F6 8E 81 MOV:G.W @H'F68E, R1 ; refs ram_F68E in on_chip_ram; cycles=6
+15ED: 1D E9 02 91 MOV:G.W R1, @H'E902 ; refs mem_E902 in program_or_external; cycles=6
+15F1: 52 80 MOV:E.B #H'80, R2 ; dataflow R2=H'80; cycles=2
+15F3: 5B 00 81 MOV:I.W #H'0081, R3 ; dataflow R3=H'0081; cycles=3
15F6: 1E 28 5B BSR loc_3E54 ; cycles=13
loc_15F9:
-15F9: 15 F6 F0 16 TST.B @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=6
+15F9: 15 F6 F0 16 TST.B @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=6
15FD: 27 3E BEQ loc_163D ; cycles=3/8 nt/t
-15FF: 15 F6 F0 D7 BCLR.B #7, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=8
+15FF: 15 F6 F0 D7 BCLR.B #7, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=8
1603: 27 03 BEQ loc_1608 ; cycles=3/8 nt/t
1605: 18 43 94 JSR @loc_4394 ; cycles=14
loc_1608:
-1608: 15 F6 F0 D6 BCLR.B #6, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=9
+1608: 15 F6 F0 D6 BCLR.B #6, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=9
160C: 27 03 BEQ loc_1611 ; cycles=3/7 nt/t
160E: 18 44 57 JSR @loc_4457 ; cycles=13
loc_1611:
-1611: 15 F6 F0 D5 BCLR.B #5, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=8
+1611: 15 F6 F0 D5 BCLR.B #5, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=8
1615: 27 03 BEQ loc_161A ; cycles=3/8 nt/t
1617: 18 45 1A JSR @loc_451A ; cycles=14
loc_161A:
-161A: 15 F6 F0 D4 BCLR.B #4, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=9
-161E: 15 F6 F0 D3 BCLR.B #3, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=9
+161A: 15 F6 F0 D4 BCLR.B #4, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=9
+161E: 15 F6 F0 D3 BCLR.B #3, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=9
1622: 27 03 BEQ loc_1627 ; cycles=3/7 nt/t
1624: 18 17 05 JSR @loc_1705 ; cycles=13
loc_1627:
-1627: 15 F6 F0 D2 BCLR.B #2, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=8
+1627: 15 F6 F0 D2 BCLR.B #2, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=8
162B: 27 03 BEQ loc_1630 ; cycles=3/8 nt/t
162D: 18 17 4D JSR @loc_174D ; cycles=14
loc_1630:
-1630: 15 F6 F0 D1 BCLR.B #1, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=9
+1630: 15 F6 F0 D1 BCLR.B #1, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=9
1634: 27 03 BEQ loc_1639 ; cycles=3/7 nt/t
1636: 18 17 95 JSR @loc_1795 ; cycles=13
loc_1639:
-1639: 15 F6 F0 D0 BCLR.B #0, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=8
+1639: 15 F6 F0 D0 BCLR.B #0, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=8
loc_163D:
-163D: 15 F6 F1 16 TST.B @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=6
+163D: 15 F6 F1 16 TST.B @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=6
1641: 27 43 BEQ loc_1686 ; cycles=3/8 nt/t
-1643: 15 F6 F1 D7 BCLR.B #7, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=8
+1643: 15 F6 F1 D7 BCLR.B #7, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=8
1647: 27 03 BEQ loc_164C ; cycles=3/8 nt/t
1649: 18 17 C9 JSR @loc_17C9 ; cycles=14
loc_164C:
-164C: 15 F6 F1 D6 BCLR.B #6, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=9
+164C: 15 F6 F1 D6 BCLR.B #6, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=9
1650: 27 03 BEQ loc_1655 ; cycles=3/7 nt/t
1652: 18 17 FB JSR @loc_17FB ; cycles=13
loc_1655:
-1655: 15 F6 F1 D5 BCLR.B #5, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=8
+1655: 15 F6 F1 D5 BCLR.B #5, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=8
1659: 27 03 BEQ loc_165E ; cycles=3/8 nt/t
165B: 18 18 2D JSR @loc_182D ; cycles=14
loc_165E:
-165E: 15 F6 F1 D4 BCLR.B #4, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=9
+165E: 15 F6 F1 D4 BCLR.B #4, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=9
1662: 27 03 BEQ loc_1667 ; cycles=3/7 nt/t
1664: 18 18 91 JSR @loc_1891 ; cycles=13
loc_1667:
-1667: 15 F6 F1 D3 BCLR.B #3, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=8
+1667: 15 F6 F1 D3 BCLR.B #3, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=8
166B: 27 03 BEQ loc_1670 ; cycles=3/8 nt/t
166D: 18 18 E7 JSR @loc_18E7 ; cycles=14
loc_1670:
-1670: 15 F6 F1 D2 BCLR.B #2, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=9
+1670: 15 F6 F1 D2 BCLR.B #2, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=9
1674: 27 03 BEQ loc_1679 ; cycles=3/7 nt/t
1676: 18 19 4A JSR @loc_194A ; cycles=13
loc_1679:
-1679: 15 F6 F1 D1 BCLR.B #1, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=8
+1679: 15 F6 F1 D1 BCLR.B #1, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=8
167D: 27 03 BEQ loc_1682 ; cycles=3/8 nt/t
167F: 18 19 79 JSR @loc_1979 ; cycles=14
loc_1682:
-1682: 15 F6 F1 D0 BCLR.B #0, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=9
+1682: 15 F6 F1 D0 BCLR.B #0, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=9
loc_1686:
-1686: 15 F6 F2 16 TST.B @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=7
+1686: 15 F6 F2 16 TST.B @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=7
168A: 27 48 BEQ loc_16D4 ; cycles=3/7 nt/t
-168C: 15 F6 F2 D7 BCLR.B #7, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=9
+168C: 15 F6 F2 D7 BCLR.B #7, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=9
1690: 27 03 BEQ loc_1695 ; cycles=3/7 nt/t
1692: 18 1B 2D JSR @loc_1B2D ; cycles=13
loc_1695:
-1695: 15 F6 F2 D6 BCLR.B #6, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=8
+1695: 15 F6 F2 D6 BCLR.B #6, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=8
1699: 27 03 BEQ loc_169E ; cycles=3/8 nt/t
169B: 18 1B 44 JSR @loc_1B44 ; cycles=14
loc_169E:
-169E: 15 F6 F2 D5 BCLR.B #5, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=9
+169E: 15 F6 F2 D5 BCLR.B #5, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=9
16A2: 27 03 BEQ loc_16A7 ; cycles=3/7 nt/t
16A4: 18 1B 5B JSR @loc_1B5B ; cycles=13
loc_16A7:
-16A7: 15 F6 F2 D4 BCLR.B #4, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=8
+16A7: 15 F6 F2 D4 BCLR.B #4, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=8
16AB: 27 03 BEQ loc_16B0 ; cycles=3/8 nt/t
16AD: 18 1B A0 JSR @loc_1BA0 ; cycles=14
loc_16B0:
-16B0: 15 F6 F2 D3 BCLR.B #3, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=9
+16B0: 15 F6 F2 D3 BCLR.B #3, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=9
16B4: 27 03 BEQ loc_16B9 ; cycles=3/7 nt/t
16B6: 18 1B B6 JSR @loc_1BB6 ; cycles=13
loc_16B9:
-16B9: 15 F6 F2 D2 BCLR.B #2, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=8
+16B9: 15 F6 F2 D2 BCLR.B #2, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=8
16BD: 27 03 BEQ loc_16C2 ; cycles=3/8 nt/t
16BF: 18 1B CC JSR @loc_1BCC ; cycles=14
loc_16C2:
-16C2: 15 F6 F2 D1 BCLR.B #1, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=9
+16C2: 15 F6 F2 D1 BCLR.B #1, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=9
16C6: 27 03 BEQ loc_16CB ; cycles=3/7 nt/t
16C8: 18 1B 72 JSR @loc_1B72 ; cycles=13
loc_16CB:
-16CB: 15 F6 F2 D0 BCLR.B #0, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=8
+16CB: 15 F6 F2 D0 BCLR.B #0, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=8
16CF: 27 03 BEQ loc_16D4 ; cycles=3/8 nt/t
16D1: 18 1B 89 JSR @loc_1B89 ; cycles=14
loc_16D4:
-16D4: 15 F6 F3 16 TST.B @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=7
+16D4: 15 F6 F3 16 TST.B @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=7
16D8: 27 2A BEQ loc_1704 ; cycles=3/7 nt/t
-16DA: 15 F6 F3 D7 BCLR.B #7, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
-16DE: 15 F6 F3 D6 BCLR.B #6, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
-16E2: 15 F6 F3 D5 BCLR.B #5, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
-16E6: 15 F6 F3 D4 BCLR.B #4, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
+16DA: 15 F6 F3 D7 BCLR.B #7, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
+16DE: 15 F6 F3 D6 BCLR.B #6, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
+16E2: 15 F6 F3 D5 BCLR.B #5, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
+16E6: 15 F6 F3 D4 BCLR.B #4, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
16EA: 27 03 BEQ loc_16EF ; cycles=3/7 nt/t
16EC: 18 1B E2 JSR @loc_1BE2 ; cycles=13
loc_16EF:
-16EF: 15 F6 F3 D3 BCLR.B #3, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=8
+16EF: 15 F6 F3 D3 BCLR.B #3, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=8
16F3: 27 03 BEQ loc_16F8 ; cycles=3/8 nt/t
16F5: 18 1B F8 JSR @loc_1BF8 ; cycles=14
loc_16F8:
-16F8: 15 F6 F3 D2 BCLR.B #2, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
-16FC: 15 F6 F3 D1 BCLR.B #1, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
-1700: 15 F6 F3 D0 BCLR.B #0, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
+16F8: 15 F6 F3 D2 BCLR.B #2, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
+16FC: 15 F6 F3 D1 BCLR.B #1, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
+1700: 15 F6 F3 D0 BCLR.B #0, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
loc_1704:
1704: 19 RTS ; cycles=12
loc_1705:
-1705: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs H'F731 in on_chip_ram; cycles=6
+1705: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=6
170A: 22 38 BHI loc_1744 ; cycles=3/7 nt/t
-170C: 1D E1 4E FF BTST.W #15, @H'E14E ; refs H'E14E in program_or_external; cycles=7
+170C: 1D E1 4E FF BTST.W #15, @H'E14E ; refs mem_E14E in program_or_external; cycles=7
1710: 26 24 BNE loc_1736 ; cycles=3/7 nt/t
-1712: 15 F7 30 F6 BTST.B #6, @H'F730 ; refs H'F730 in on_chip_ram; cycles=7
+1712: 15 F7 30 F6 BTST.B #6, @H'F730 ; refs ram_F730 in on_chip_ram; cycles=7
1716: 26 1E BNE loc_1736 ; cycles=3/7 nt/t
-1718: 15 FB 03 C7 BSET.B #7, @H'FB03 ; refs H'FB03 in on_chip_ram; cycles=9
+1718: 15 FB 03 C7 BSET.B #7, @H'FB03 ; refs ram_FB03 in on_chip_ram; cycles=9
171C: 26 08 BNE loc_1726 ; cycles=3/7 nt/t
-171E: 1D F7 32 81 MOV:G.W @H'F732, R1 ; refs H'F732 in on_chip_ram; cycles=7
-1722: 1D F7 34 91 MOV:G.W R1, @H'F734 ; refs H'F734 in on_chip_ram; cycles=7
+171E: 1D F7 32 81 MOV:G.W @H'F732, R1 ; refs ram_F732 in on_chip_ram; cycles=7
+1722: 1D F7 34 91 MOV:G.W R1, @H'F734 ; refs ram_F734 in on_chip_ram; cycles=7
loc_1726:
-1726: 1D F7 32 07 1C 07 MOV:G.W #H'1C07, @H'F732 ; refs H'F732 in on_chip_ram; cycles=11
-172C: 15 FB 02 06 14 MOV:G.B #H'14, @H'FB02 ; refs H'FB02 in on_chip_ram; cycles=9
+1726: 1D F7 32 07 1C 07 MOV:G.W #H'1C07, @H'F732 ; refs ram_F732 in on_chip_ram; cycles=11
+172C: 15 FB 02 06 14 MOV:G.B #H'14, @H'FB02 ; refs ram_FB02 in on_chip_ram; cycles=9
1731: 1E 31 C6 BSR loc_48FA ; cycles=14
1734: 20 0E BRA loc_1744 ; cycles=7
loc_1736:
-1736: 1D F6 96 84 MOV:G.W @H'F696, R4 ; refs H'F696 in on_chip_ram; cycles=7
-173A: 1D F6 B6 34 SUB.W @H'F6B6, R4 ; refs H'F6B6 in on_chip_ram; cycles=7
-173E: 5B 00 A9 MOV:I.W #H'00A9, R3 ; cycles=3
+1736: 1D F6 96 84 MOV:G.W @H'F696, R4 ; refs ram_F696 in on_chip_ram; cycles=7
+173A: 1D F6 B6 34 SUB.W @H'F6B6, R4 ; refs ram_F6B6 in on_chip_ram; cycles=7
+173E: 5B 00 A9 MOV:I.W #H'00A9, R3 ; dataflow R3=H'00A9; cycles=3
1741: 1E 02 5E BSR loc_19A2 ; cycles=14
loc_1744:
-1744: 1D F6 96 84 MOV:G.W @H'F696, R4 ; refs H'F696 in on_chip_ram; cycles=7
-1748: 1D F6 B6 94 MOV:G.W R4, @H'F6B6 ; refs H'F6B6 in on_chip_ram; cycles=7
+1744: 1D F6 96 84 MOV:G.W @H'F696, R4 ; refs ram_F696 in on_chip_ram; cycles=7
+1748: 1D F6 B6 94 MOV:G.W R4, @H'F6B6 ; refs ram_F6B6 in on_chip_ram; cycles=7
174C: 19 RTS ; cycles=12
loc_174D:
-174D: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs H'F731 in on_chip_ram; cycles=6
+174D: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=6
1752: 22 38 BHI loc_178C ; cycles=3/7 nt/t
-1754: 15 F7 30 F7 BTST.B #7, @H'F730 ; refs H'F730 in on_chip_ram; cycles=7
+1754: 15 F7 30 F7 BTST.B #7, @H'F730 ; refs ram_F730 in on_chip_ram; cycles=7
1758: 27 32 BEQ loc_178C ; cycles=3/7 nt/t
-175A: 1D E1 6E FD BTST.W #13, @H'E16E ; refs H'E16E in program_or_external; cycles=7
+175A: 1D E1 6E FD BTST.W #13, @H'E16E ; refs mem_E16E in program_or_external; cycles=7
175E: 26 1E BNE loc_177E ; cycles=3/7 nt/t
-1760: 15 FB 03 C7 BSET.B #7, @H'FB03 ; refs H'FB03 in on_chip_ram; cycles=9
+1760: 15 FB 03 C7 BSET.B #7, @H'FB03 ; refs ram_FB03 in on_chip_ram; cycles=9
1764: 26 08 BNE loc_176E ; cycles=3/7 nt/t
-1766: 1D F7 32 81 MOV:G.W @H'F732, R1 ; refs H'F732 in on_chip_ram; cycles=7
-176A: 1D F7 34 91 MOV:G.W R1, @H'F734 ; refs H'F734 in on_chip_ram; cycles=7
+1766: 1D F7 32 81 MOV:G.W @H'F732, R1 ; refs ram_F732 in on_chip_ram; cycles=7
+176A: 1D F7 34 91 MOV:G.W R1, @H'F734 ; refs ram_F734 in on_chip_ram; cycles=7
loc_176E:
-176E: 1D F7 32 07 1C 06 MOV:G.W #H'1C06, @H'F732 ; refs H'F732 in on_chip_ram; cycles=11
-1774: 15 FB 02 06 14 MOV:G.B #H'14, @H'FB02 ; refs H'FB02 in on_chip_ram; cycles=9
+176E: 1D F7 32 07 1C 06 MOV:G.W #H'1C06, @H'F732 ; refs ram_F732 in on_chip_ram; cycles=11
+1774: 15 FB 02 06 14 MOV:G.B #H'14, @H'FB02 ; refs ram_FB02 in on_chip_ram; cycles=9
1779: 1E 31 7E BSR loc_48FA ; cycles=14
177C: 20 0E BRA loc_178C ; cycles=7
loc_177E:
-177E: 1D F6 94 84 MOV:G.W @H'F694, R4 ; refs H'F694 in on_chip_ram; cycles=7
-1782: 1D F6 B4 34 SUB.W @H'F6B4, R4 ; refs H'F6B4 in on_chip_ram; cycles=7
-1786: 5B 00 C5 MOV:I.W #H'00C5, R3 ; cycles=3
+177E: 1D F6 94 84 MOV:G.W @H'F694, R4 ; refs ram_F694 in on_chip_ram; cycles=7
+1782: 1D F6 B4 34 SUB.W @H'F6B4, R4 ; refs ram_F6B4 in on_chip_ram; cycles=7
+1786: 5B 00 C5 MOV:I.W #H'00C5, R3 ; dataflow R3=H'00C5; cycles=3
1789: 1E 02 16 BSR loc_19A2 ; cycles=14
loc_178C:
-178C: 1D F6 94 84 MOV:G.W @H'F694, R4 ; refs H'F694 in on_chip_ram; cycles=7
-1790: 1D F6 B4 94 MOV:G.W R4, @H'F6B4 ; refs H'F6B4 in on_chip_ram; cycles=7
+178C: 1D F6 94 84 MOV:G.W @H'F694, R4 ; refs ram_F694 in on_chip_ram; cycles=7
+1790: 1D F6 B4 94 MOV:G.W R4, @H'F6B4 ; refs ram_F6B4 in on_chip_ram; cycles=7
1794: 19 RTS ; cycles=12
loc_1795:
-1795: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs H'F731 in on_chip_ram; cycles=6
+1795: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=6
179A: 22 24 BHI loc_17C0 ; cycles=3/7 nt/t
-179C: 1D E1 72 FD BTST.W #13, @H'E172 ; refs H'E172 in program_or_external; cycles=7
+179C: 1D E1 72 FD BTST.W #13, @H'E172 ; refs mem_E172 in program_or_external; cycles=7
17A0: 26 05 BNE loc_17A7 ; cycles=3/7 nt/t
17A2: 1E 09 82 BSR loc_2127 ; cycles=13
17A5: 20 19 BRA loc_17C0 ; cycles=8
loc_17A7:
-17A7: 1D E2 20 FF BTST.W #15, @H'E220 ; refs H'E220 in program_or_external; cycles=6
+17A7: 1D E2 20 FF BTST.W #15, @H'E220 ; refs mem_E220 in program_or_external; cycles=6
17AB: 27 05 BEQ loc_17B2 ; cycles=3/8 nt/t
17AD: 1E 09 77 BSR loc_2127 ; cycles=14
17B0: 20 0E BRA loc_17C0 ; cycles=7
loc_17B2:
-17B2: 1D F6 92 84 MOV:G.W @H'F692, R4 ; refs H'F692 in on_chip_ram; cycles=7
-17B6: 1D F6 B2 34 SUB.W @H'F6B2, R4 ; refs H'F6B2 in on_chip_ram; cycles=7
-17BA: 5B 00 BC MOV:I.W #H'00BC, R3 ; cycles=3
+17B2: 1D F6 92 84 MOV:G.W @H'F692, R4 ; refs ram_F692 in on_chip_ram; cycles=7
+17B6: 1D F6 B2 34 SUB.W @H'F6B2, R4 ; refs ram_F6B2 in on_chip_ram; cycles=7
+17BA: 5B 00 BC MOV:I.W #H'00BC, R3 ; dataflow R3=H'00BC; cycles=3
17BD: 1E 01 E2 BSR loc_19A2 ; cycles=14
loc_17C0:
-17C0: 1D F6 92 84 MOV:G.W @H'F692, R4 ; refs H'F692 in on_chip_ram; cycles=7
-17C4: 1D F6 B2 94 MOV:G.W R4, @H'F6B2 ; refs H'F6B2 in on_chip_ram; cycles=7
+17C0: 1D F6 92 84 MOV:G.W @H'F692, R4 ; refs ram_F692 in on_chip_ram; cycles=7
+17C4: 1D F6 B2 94 MOV:G.W R4, @H'F6B2 ; refs ram_F6B2 in on_chip_ram; cycles=7
17C8: 19 RTS ; cycles=12
loc_17C9:
-17C9: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs H'F731 in on_chip_ram; cycles=6
+17C9: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=6
17CE: 22 22 BHI loc_17F2 ; cycles=3/7 nt/t
-17D0: 1D E1 26 FC BTST.W #12, @H'E126 ; refs H'E126 in program_or_external; cycles=7
+17D0: 1D E1 26 FC BTST.W #12, @H'E126 ; refs mem_E126 in program_or_external; cycles=7
17D4: 27 1C BEQ loc_17F2 ; cycles=3/7 nt/t
-17D6: 1D F6 AE 84 MOV:G.W @H'F6AE, R4 ; refs H'F6AE in on_chip_ram; cycles=7
-17DA: 1D F6 CE 34 SUB.W @H'F6CE, R4 ; refs H'F6CE in on_chip_ram; cycles=7
-17DE: 5B 00 A3 MOV:I.W #H'00A3, R3 ; cycles=3
-17E1: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs H'F791 in on_chip_ram; cycles=6
+17D6: 1D F6 AE 84 MOV:G.W @H'F6AE, R4 ; refs ram_F6AE in on_chip_ram; cycles=7
+17DA: 1D F6 CE 34 SUB.W @H'F6CE, R4 ; refs ram_F6CE in on_chip_ram; cycles=7
+17DE: 5B 00 A3 MOV:I.W #H'00A3, R3 ; dataflow R3=H'00A3; cycles=3
+17E1: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs ram_F791 in on_chip_ram; cycles=6
17E5: 27 08 BEQ loc_17EF ; cycles=3/8 nt/t
-17E7: 15 F4 04 F3 BTST.B #3, @H'F404 ; refs H'F404 in program_or_external; cycles=6
+17E7: 15 F4 04 F3 BTST.B #3, @H'F404 ; refs mem_F404 in program_or_external; cycles=6
17EB: 27 02 BEQ loc_17EF ; cycles=3/8 nt/t
17ED: AB CE BSET.W #14, R3 ; cycles=3
@@ -742,21 +825,21 @@ loc_17EF:
17EF: 1E 01 B0 BSR loc_19A2 ; cycles=14
loc_17F2:
-17F2: 1D F6 AE 84 MOV:G.W @H'F6AE, R4 ; refs H'F6AE in on_chip_ram; cycles=7
-17F6: 1D F6 CE 94 MOV:G.W R4, @H'F6CE ; refs H'F6CE in on_chip_ram; cycles=7
+17F2: 1D F6 AE 84 MOV:G.W @H'F6AE, R4 ; refs ram_F6AE in on_chip_ram; cycles=7
+17F6: 1D F6 CE 94 MOV:G.W R4, @H'F6CE ; refs ram_F6CE in on_chip_ram; cycles=7
17FA: 19 RTS ; cycles=12
loc_17FB:
-17FB: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs H'F731 in on_chip_ram; cycles=6
+17FB: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=6
1800: 22 22 BHI loc_1824 ; cycles=3/7 nt/t
-1802: 1D E1 26 FC BTST.W #12, @H'E126 ; refs H'E126 in program_or_external; cycles=7
+1802: 1D E1 26 FC BTST.W #12, @H'E126 ; refs mem_E126 in program_or_external; cycles=7
1806: 27 1C BEQ loc_1824 ; cycles=3/7 nt/t
-1808: 1D F6 AC 84 MOV:G.W @H'F6AC, R4 ; refs H'F6AC in on_chip_ram; cycles=7
-180C: 1D F6 CC 34 SUB.W @H'F6CC, R4 ; refs H'F6CC in on_chip_ram; cycles=7
-1810: 5B 00 A4 MOV:I.W #H'00A4, R3 ; cycles=3
-1813: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs H'F791 in on_chip_ram; cycles=6
+1808: 1D F6 AC 84 MOV:G.W @H'F6AC, R4 ; refs ram_F6AC in on_chip_ram; cycles=7
+180C: 1D F6 CC 34 SUB.W @H'F6CC, R4 ; refs ram_F6CC in on_chip_ram; cycles=7
+1810: 5B 00 A4 MOV:I.W #H'00A4, R3 ; dataflow R3=H'00A4; cycles=3
+1813: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs ram_F791 in on_chip_ram; cycles=6
1817: 27 08 BEQ loc_1821 ; cycles=3/8 nt/t
-1819: 15 F4 04 F3 BTST.B #3, @H'F404 ; refs H'F404 in program_or_external; cycles=6
+1819: 15 F4 04 F3 BTST.B #3, @H'F404 ; refs mem_F404 in program_or_external; cycles=6
181D: 27 02 BEQ loc_1821 ; cycles=3/8 nt/t
181F: AB CE BSET.W #14, R3 ; cycles=3
@@ -764,23 +847,23 @@ loc_1821:
1821: 1E 01 7E BSR loc_19A2 ; cycles=14
loc_1824:
-1824: 1D F6 AC 84 MOV:G.W @H'F6AC, R4 ; refs H'F6AC in on_chip_ram; cycles=7
-1828: 1D F6 CC 94 MOV:G.W R4, @H'F6CC ; refs H'F6CC in on_chip_ram; cycles=7
+1824: 1D F6 AC 84 MOV:G.W @H'F6AC, R4 ; refs ram_F6AC in on_chip_ram; cycles=7
+1828: 1D F6 CC 94 MOV:G.W R4, @H'F6CC ; refs ram_F6CC in on_chip_ram; cycles=7
182C: 19 RTS ; cycles=12
loc_182D:
-182D: 15 F7 17 F2 BTST.B #2, @H'F717 ; refs H'F717 in on_chip_ram; cycles=6
+182D: 15 F7 17 F2 BTST.B #2, @H'F717 ; refs ram_F717 in on_chip_ram; cycles=6
1831: 26 32 BNE loc_1865 ; cycles=3/8 nt/t
-1833: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs H'F731 in on_chip_ram; cycles=6
+1833: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=6
1838: 22 22 BHI loc_185C ; cycles=3/7 nt/t
-183A: 1D E1 26 F5 BTST.W #5, @H'E126 ; refs H'E126 in program_or_external; cycles=7
+183A: 1D E1 26 F5 BTST.W #5, @H'E126 ; refs mem_E126 in program_or_external; cycles=7
183E: 27 1C BEQ loc_185C ; cycles=3/7 nt/t
-1840: 1D F6 AA 84 MOV:G.W @H'F6AA, R4 ; refs H'F6AA in on_chip_ram; cycles=7
-1844: 1D F6 CA 34 SUB.W @H'F6CA, R4 ; refs H'F6CA in on_chip_ram; cycles=7
-1848: 5B 00 A5 MOV:I.W #H'00A5, R3 ; cycles=3
-184B: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs H'F791 in on_chip_ram; cycles=6
+1840: 1D F6 AA 84 MOV:G.W @H'F6AA, R4 ; refs ram_F6AA in on_chip_ram; cycles=7
+1844: 1D F6 CA 34 SUB.W @H'F6CA, R4 ; refs ram_F6CA in on_chip_ram; cycles=7
+1848: 5B 00 A5 MOV:I.W #H'00A5, R3 ; dataflow R3=H'00A5; cycles=3
+184B: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs ram_F791 in on_chip_ram; cycles=6
184F: 27 08 BEQ loc_1859 ; cycles=3/8 nt/t
-1851: 15 F4 04 F2 BTST.B #2, @H'F404 ; refs H'F404 in program_or_external; cycles=6
+1851: 15 F4 04 F2 BTST.B #2, @H'F404 ; refs mem_F404 in program_or_external; cycles=6
1855: 27 02 BEQ loc_1859 ; cycles=3/8 nt/t
1857: AB CE BSET.W #14, R3 ; cycles=3
@@ -788,19 +871,19 @@ loc_1859:
1859: 1E 01 46 BSR loc_19A2 ; cycles=14
loc_185C:
-185C: 1D F6 AA 84 MOV:G.W @H'F6AA, R4 ; refs H'F6AA in on_chip_ram; cycles=7
-1860: 1D F6 CA 94 MOV:G.W R4, @H'F6CA ; refs H'F6CA in on_chip_ram; cycles=7
+185C: 1D F6 AA 84 MOV:G.W @H'F6AA, R4 ; refs ram_F6AA in on_chip_ram; cycles=7
+1860: 1D F6 CA 94 MOV:G.W R4, @H'F6CA ; refs ram_F6CA in on_chip_ram; cycles=7
1864: 19 RTS ; cycles=12
loc_1865:
-1865: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs H'F731 in on_chip_ram; cycles=6
+1865: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=6
186A: 22 1C BHI loc_1888 ; cycles=3/7 nt/t
-186C: 1D F6 AA 84 MOV:G.W @H'F6AA, R4 ; refs H'F6AA in on_chip_ram; cycles=7
-1870: 1D F6 CA 34 SUB.W @H'F6CA, R4 ; refs H'F6CA in on_chip_ram; cycles=7
-1874: 5B 00 D8 MOV:I.W #H'00D8, R3 ; cycles=3
-1877: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs H'F791 in on_chip_ram; cycles=6
+186C: 1D F6 AA 84 MOV:G.W @H'F6AA, R4 ; refs ram_F6AA in on_chip_ram; cycles=7
+1870: 1D F6 CA 34 SUB.W @H'F6CA, R4 ; refs ram_F6CA in on_chip_ram; cycles=7
+1874: 5B 00 D8 MOV:I.W #H'00D8, R3 ; dataflow R3=H'00D8; cycles=3
+1877: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs ram_F791 in on_chip_ram; cycles=6
187B: 27 08 BEQ loc_1885 ; cycles=3/8 nt/t
-187D: 15 F4 04 F1 BTST.B #1, @H'F404 ; refs H'F404 in program_or_external; cycles=6
+187D: 15 F4 04 F1 BTST.B #1, @H'F404 ; refs mem_F404 in program_or_external; cycles=6
1881: 27 02 BEQ loc_1885 ; cycles=3/8 nt/t
1883: AB CE BSET.W #14, R3 ; cycles=3
@@ -808,36 +891,36 @@ loc_1885:
1885: 1E 01 1A BSR loc_19A2 ; cycles=14
loc_1888:
-1888: 1D F6 AA 84 MOV:G.W @H'F6AA, R4 ; refs H'F6AA in on_chip_ram; cycles=7
-188C: 1D F6 CA 94 MOV:G.W R4, @H'F6CA ; refs H'F6CA in on_chip_ram; cycles=7
+1888: 1D F6 AA 84 MOV:G.W @H'F6AA, R4 ; refs ram_F6AA in on_chip_ram; cycles=7
+188C: 1D F6 CA 94 MOV:G.W R4, @H'F6CA ; refs ram_F6CA in on_chip_ram; cycles=7
1890: 19 RTS ; cycles=12
loc_1891:
-1891: 15 F7 17 F2 BTST.B #2, @H'F717 ; refs H'F717 in on_chip_ram; cycles=6
+1891: 15 F7 17 F2 BTST.B #2, @H'F717 ; refs ram_F717 in on_chip_ram; cycles=6
1895: 26 24 BNE loc_18BB ; cycles=3/8 nt/t
-1897: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs H'F731 in on_chip_ram; cycles=6
+1897: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=6
189C: 22 14 BHI loc_18B2 ; cycles=3/7 nt/t
-189E: 1D E1 26 F5 BTST.W #5, @H'E126 ; refs H'E126 in program_or_external; cycles=7
+189E: 1D E1 26 F5 BTST.W #5, @H'E126 ; refs mem_E126 in program_or_external; cycles=7
18A2: 27 0E BEQ loc_18B2 ; cycles=3/7 nt/t
-18A4: 1D F6 A8 84 MOV:G.W @H'F6A8, R4 ; refs H'F6A8 in on_chip_ram; cycles=7
-18A8: 1D F6 C8 34 SUB.W @H'F6C8, R4 ; refs H'F6C8 in on_chip_ram; cycles=7
-18AC: 5B 00 80 MOV:I.W #H'0080, R3 ; cycles=3
+18A4: 1D F6 A8 84 MOV:G.W @H'F6A8, R4 ; refs ram_F6A8 in on_chip_ram; cycles=7
+18A8: 1D F6 C8 34 SUB.W @H'F6C8, R4 ; refs ram_F6C8 in on_chip_ram; cycles=7
+18AC: 5B 00 80 MOV:I.W #H'0080, R3 ; dataflow R3=H'0080; cycles=3
18AF: 1E 00 F0 BSR loc_19A2 ; cycles=14
loc_18B2:
-18B2: 1D F6 A8 84 MOV:G.W @H'F6A8, R4 ; refs H'F6A8 in on_chip_ram; cycles=7
-18B6: 1D F6 C8 94 MOV:G.W R4, @H'F6C8 ; refs H'F6C8 in on_chip_ram; cycles=7
+18B2: 1D F6 A8 84 MOV:G.W @H'F6A8, R4 ; refs ram_F6A8 in on_chip_ram; cycles=7
+18B6: 1D F6 C8 94 MOV:G.W R4, @H'F6C8 ; refs ram_F6C8 in on_chip_ram; cycles=7
18BA: 19 RTS ; cycles=12
loc_18BB:
-18BB: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs H'F731 in on_chip_ram; cycles=6
+18BB: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=6
18C0: 22 1C BHI loc_18DE ; cycles=3/7 nt/t
-18C2: 1D F6 A8 84 MOV:G.W @H'F6A8, R4 ; refs H'F6A8 in on_chip_ram; cycles=7
-18C6: 1D F6 C8 34 SUB.W @H'F6C8, R4 ; refs H'F6C8 in on_chip_ram; cycles=7
-18CA: 5B 00 D9 MOV:I.W #H'00D9, R3 ; cycles=3
-18CD: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs H'F791 in on_chip_ram; cycles=6
+18C2: 1D F6 A8 84 MOV:G.W @H'F6A8, R4 ; refs ram_F6A8 in on_chip_ram; cycles=7
+18C6: 1D F6 C8 34 SUB.W @H'F6C8, R4 ; refs ram_F6C8 in on_chip_ram; cycles=7
+18CA: 5B 00 D9 MOV:I.W #H'00D9, R3 ; dataflow R3=H'00D9; cycles=3
+18CD: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs ram_F791 in on_chip_ram; cycles=6
18D1: 27 08 BEQ loc_18DB ; cycles=3/8 nt/t
-18D3: 15 F4 04 F1 BTST.B #1, @H'F404 ; refs H'F404 in program_or_external; cycles=6
+18D3: 15 F4 04 F1 BTST.B #1, @H'F404 ; refs mem_F404 in program_or_external; cycles=6
18D7: 27 02 BEQ loc_18DB ; cycles=3/8 nt/t
18D9: AB CE BSET.W #14, R3 ; cycles=3
@@ -845,23 +928,23 @@ loc_18DB:
18DB: 1E 00 C4 BSR loc_19A2 ; cycles=14
loc_18DE:
-18DE: 1D F6 A8 84 MOV:G.W @H'F6A8, R4 ; refs H'F6A8 in on_chip_ram; cycles=7
-18E2: 1D F6 C8 94 MOV:G.W R4, @H'F6C8 ; refs H'F6C8 in on_chip_ram; cycles=7
+18DE: 1D F6 A8 84 MOV:G.W @H'F6A8, R4 ; refs ram_F6A8 in on_chip_ram; cycles=7
+18E2: 1D F6 C8 94 MOV:G.W R4, @H'F6C8 ; refs ram_F6C8 in on_chip_ram; cycles=7
18E6: 19 RTS ; cycles=12
loc_18E7:
-18E7: 15 F7 17 F2 BTST.B #2, @H'F717 ; refs H'F717 in on_chip_ram; cycles=6
+18E7: 15 F7 17 F2 BTST.B #2, @H'F717 ; refs ram_F717 in on_chip_ram; cycles=6
18EB: 26 32 BNE loc_191F ; cycles=3/8 nt/t
-18ED: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs H'F731 in on_chip_ram; cycles=6
+18ED: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=6
18F2: 22 22 BHI loc_1916 ; cycles=3/7 nt/t
-18F4: 1D E1 26 F5 BTST.W #5, @H'E126 ; refs H'E126 in program_or_external; cycles=7
+18F4: 1D E1 26 F5 BTST.W #5, @H'E126 ; refs mem_E126 in program_or_external; cycles=7
18F8: 27 1C BEQ loc_1916 ; cycles=3/7 nt/t
-18FA: 1D F6 A6 84 MOV:G.W @H'F6A6, R4 ; refs H'F6A6 in on_chip_ram; cycles=7
-18FE: 1D F6 C6 34 SUB.W @H'F6C6, R4 ; refs H'F6C6 in on_chip_ram; cycles=7
-1902: 5B 00 A6 MOV:I.W #H'00A6, R3 ; cycles=3
-1905: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs H'F791 in on_chip_ram; cycles=6
+18FA: 1D F6 A6 84 MOV:G.W @H'F6A6, R4 ; refs ram_F6A6 in on_chip_ram; cycles=7
+18FE: 1D F6 C6 34 SUB.W @H'F6C6, R4 ; refs ram_F6C6 in on_chip_ram; cycles=7
+1902: 5B 00 A6 MOV:I.W #H'00A6, R3 ; dataflow R3=H'00A6; cycles=3
+1905: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs ram_F791 in on_chip_ram; cycles=6
1909: 27 08 BEQ loc_1913 ; cycles=3/8 nt/t
-190B: 15 F4 04 F2 BTST.B #2, @H'F404 ; refs H'F404 in program_or_external; cycles=6
+190B: 15 F4 04 F2 BTST.B #2, @H'F404 ; refs mem_F404 in program_or_external; cycles=6
190F: 27 02 BEQ loc_1913 ; cycles=3/8 nt/t
1911: AB CE BSET.W #14, R3 ; cycles=3
@@ -869,19 +952,19 @@ loc_1913:
1913: 1E 00 8C BSR loc_19A2 ; cycles=14
loc_1916:
-1916: 1D F6 A6 84 MOV:G.W @H'F6A6, R4 ; refs H'F6A6 in on_chip_ram; cycles=7
-191A: 1D F6 C6 94 MOV:G.W R4, @H'F6C6 ; refs H'F6C6 in on_chip_ram; cycles=7
+1916: 1D F6 A6 84 MOV:G.W @H'F6A6, R4 ; refs ram_F6A6 in on_chip_ram; cycles=7
+191A: 1D F6 C6 94 MOV:G.W R4, @H'F6C6 ; refs ram_F6C6 in on_chip_ram; cycles=7
191E: 19 RTS ; cycles=12
loc_191F:
-191F: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs H'F731 in on_chip_ram; cycles=6
+191F: 15 F7 31 04 02 CMP:G.B #H'02, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=6
1924: 22 1B BHI loc_1941 ; cycles=3/7 nt/t
-1926: 1D F6 A6 84 MOV:G.W @H'F6A6, R4 ; refs H'F6A6 in on_chip_ram; cycles=7
-192A: 1D F6 C6 34 SUB.W @H'F6C6, R4 ; refs H'F6C6 in on_chip_ram; cycles=7
-192E: 5B 00 DA MOV:I.W #H'00DA, R3 ; cycles=3
-1931: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs H'F791 in on_chip_ram; cycles=6
+1926: 1D F6 A6 84 MOV:G.W @H'F6A6, R4 ; refs ram_F6A6 in on_chip_ram; cycles=7
+192A: 1D F6 C6 34 SUB.W @H'F6C6, R4 ; refs ram_F6C6 in on_chip_ram; cycles=7
+192E: 5B 00 DA MOV:I.W #H'00DA, R3 ; dataflow R3=H'00DA; cycles=3
+1931: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs ram_F791 in on_chip_ram; cycles=6
1935: 27 08 BEQ loc_193F ; cycles=3/8 nt/t
-1937: 15 F4 04 F1 BTST.B #1, @H'F404 ; refs H'F404 in program_or_external; cycles=6
+1937: 15 F4 04 F1 BTST.B #1, @H'F404 ; refs mem_F404 in program_or_external; cycles=6
193B: 27 02 BEQ loc_193F ; cycles=3/8 nt/t
193D: AB CE BSET.W #14, R3 ; cycles=3
@@ -889,41 +972,41 @@ loc_193F:
193F: 0E 61 BSR loc_19A2 ; cycles=14
loc_1941:
-1941: 1D F6 A6 84 MOV:G.W @H'F6A6, R4 ; refs H'F6A6 in on_chip_ram; cycles=6
-1945: 1D F6 C6 94 MOV:G.W R4, @H'F6C6 ; refs H'F6C6 in on_chip_ram; cycles=6
+1941: 1D F6 A6 84 MOV:G.W @H'F6A6, R4 ; refs ram_F6A6 in on_chip_ram; cycles=6
+1945: 1D F6 C6 94 MOV:G.W R4, @H'F6C6 ; refs ram_F6C6 in on_chip_ram; cycles=6
1949: 19 RTS ; cycles=13
loc_194A:
-194A: 15 F7 31 04 03 CMP:G.B #H'03, @H'F731 ; refs H'F731 in on_chip_ram; cycles=7
+194A: 15 F7 31 04 03 CMP:G.B #H'03, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=7
194F: 22 1F BHI loc_1970 ; cycles=3/8 nt/t
-1951: 1D F6 A4 84 MOV:G.W @H'F6A4, R4 ; refs H'F6A4 in on_chip_ram; cycles=6
-1955: 1D F6 C4 34 SUB.W @H'F6C4, R4 ; refs H'F6C4 in on_chip_ram; cycles=6
+1951: 1D F6 A4 84 MOV:G.W @H'F6A4, R4 ; refs ram_F6A4 in on_chip_ram; cycles=6
+1955: 1D F6 C4 34 SUB.W @H'F6C4, R4 ; refs ram_F6C4 in on_chip_ram; cycles=6
1959: 15 FE 8E F4 BTST.B #4, @P7DR ; refs P7DR in register_field; cycles=6
195D: 26 00 BNE loc_195F ; cycles=3/8 nt/t
loc_195F:
-195F: 5B 00 80 MOV:I.W #H'0080, R3 ; cycles=3
-1962: 15 F7 91 F5 BTST.B #5, @H'F791 ; refs H'F791 in on_chip_ram; cycles=7
+195F: 5B 00 80 MOV:I.W #H'0080, R3 ; dataflow R3=H'0080; cycles=3
+1962: 15 F7 91 F5 BTST.B #5, @H'F791 ; refs ram_F791 in on_chip_ram; cycles=7
1966: 27 02 BEQ loc_196A ; cycles=3/7 nt/t
1968: AB CE BSET.W #14, R3 ; cycles=3
loc_196A:
196A: 0E 36 BSR loc_19A2 ; cycles=13
-196C: 15 F7 6D C7 BSET.B #7, @H'F76D ; refs H'F76D in on_chip_ram; cycles=9
+196C: 15 F7 6D C7 BSET.B #7, @H'F76D ; refs ram_F76D in on_chip_ram; cycles=9
loc_1970:
-1970: 1D F6 A4 84 MOV:G.W @H'F6A4, R4 ; refs H'F6A4 in on_chip_ram; cycles=7
-1974: 1D F6 C4 94 MOV:G.W R4, @H'F6C4 ; refs H'F6C4 in on_chip_ram; cycles=7
+1970: 1D F6 A4 84 MOV:G.W @H'F6A4, R4 ; refs ram_F6A4 in on_chip_ram; cycles=7
+1974: 1D F6 C4 94 MOV:G.W R4, @H'F6C4 ; refs ram_F6C4 in on_chip_ram; cycles=7
1978: 19 RTS ; cycles=12
loc_1979:
-1979: 15 F7 31 04 03 CMP:G.B #H'03, @H'F731 ; refs H'F731 in on_chip_ram; cycles=6
+1979: 15 F7 31 04 03 CMP:G.B #H'03, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=6
197E: 22 19 BHI loc_1999 ; cycles=3/7 nt/t
-1980: 1D F6 A2 80 MOV:G.W @H'F6A2, R0 ; refs H'F6A2 in on_chip_ram; cycles=7
-1984: 1D F6 C2 30 SUB.W @H'F6C2, R0 ; refs H'F6C2 in on_chip_ram; cycles=7
-1988: 1D F6 8C A8 MULXU.W @H'F68C, R0 ; refs H'F68C in on_chip_ram; cycles=26
-198C: 5B 00 81 MOV:I.W #H'0081, R3 ; cycles=3
-198F: 15 F7 91 F5 BTST.B #5, @H'F791 ; refs H'F791 in on_chip_ram; cycles=6
+1980: 1D F6 A2 80 MOV:G.W @H'F6A2, R0 ; refs ram_F6A2 in on_chip_ram; cycles=7
+1984: 1D F6 C2 30 SUB.W @H'F6C2, R0 ; refs ram_F6C2 in on_chip_ram; cycles=7
+1988: 1D F6 8C A8 MULXU.W @H'F68C, R0 ; refs ram_F68C in on_chip_ram; cycles=26
+198C: 5B 00 81 MOV:I.W #H'0081, R3 ; dataflow R3=H'0081; cycles=3
+198F: 15 F7 91 F5 BTST.B #5, @H'F791 ; refs ram_F791 in on_chip_ram; cycles=6
1993: 27 02 BEQ loc_1997 ; cycles=3/8 nt/t
1995: AB CE BSET.W #14, R3 ; cycles=3
@@ -931,8 +1014,8 @@ loc_1997:
1997: 0E 42 BSR loc_19DB ; cycles=14
loc_1999:
-1999: 1D F6 A2 84 MOV:G.W @H'F6A2, R4 ; refs H'F6A2 in on_chip_ram; cycles=6
-199D: 1D F6 C2 94 MOV:G.W R4, @H'F6C2 ; refs H'F6C2 in on_chip_ram; cycles=6
+1999: 1D F6 A2 84 MOV:G.W @H'F6A2, R4 ; refs ram_F6A2 in on_chip_ram; cycles=6
+199D: 1D F6 C2 94 MOV:G.W R4, @H'F6C2 ; refs ram_F6C2 in on_chip_ram; cycles=6
19A1: 19 RTS ; cycles=13
loc_19A2:
@@ -942,7 +1025,7 @@ loc_19A2:
19AA: FB E4 00 80 MOV:G.W @(-H'1C00,R3), R0 ; cycles=7
19AE: 48 FC 00 CMP:I #H'FC00, R0 ; cycles=3
19B1: 22 03 BHI loc_19B6 ; cycles=3/8 nt/t
-19B3: 58 FE 00 MOV:I.W #H'FE00, R0 ; cycles=3
+19B3: 58 FE 00 MOV:I.W #H'FE00, R0 ; dataflow R0=H'FE00; cycles=3
loc_19B6:
19B6: A8 15 NOT.W R0 ; cycles=3
@@ -953,11 +1036,11 @@ loc_19B6:
19C2: 24 0F BCC loc_19D3 ; cycles=3/7 nt/t
19C4: 4C 80 00 CMP:I #H'8000, R4 ; cycles=3
19C7: 24 05 BCC loc_19CE ; cycles=3/8 nt/t
-19C9: 5C 00 1A MOV:I.W #H'001A, R4 ; cycles=3
+19C9: 5C 00 1A MOV:I.W #H'001A, R4 ; dataflow R4=H'001A; cycles=3
19CC: 20 09 BRA loc_19D7 ; cycles=7
loc_19CE:
-19CE: 5C FF 1C MOV:I.W #H'FF1C, R4 ; cycles=3
+19CE: 5C FF 1C MOV:I.W #H'FF1C, R4 ; dataflow R4=H'FF1C; cycles=3
19D1: 20 04 BRA loc_19D7 ; cycles=8
loc_19D3:
@@ -980,20 +1063,20 @@ loc_19E3:
19ED: A8 32 SUB.W R0, R2 ; cycles=3
19EF: 4A 80 00 CMP:I #H'8000, R2 ; cycles=3
19F2: 23 0F BLS loc_1A03 ; cycles=3/7 nt/t
-19F4: 59 00 00 MOV:I.W #H'0000, R1 ; cycles=3
+19F4: 59 00 00 MOV:I.W #H'0000, R1 ; dataflow R1=H'0000; cycles=3
19F7: 20 0A BRA loc_1A03 ; cycles=8
loc_19F9:
19F9: AA 30 SUB.W R2, R0 ; cycles=3
19FB: 48 80 00 CMP:I #H'8000, R0 ; cycles=3
19FE: 23 03 BLS loc_1A03 ; cycles=3/7 nt/t
-1A00: 59 FF FF MOV:I.W #H'FFFF, R1 ; cycles=3
+1A00: 59 FF FF MOV:I.W #H'FFFF, R1 ; dataflow R1=H'FFFF; cycles=3
loc_1A03:
1A03: FB E0 00 71 CMP:G.W @(-H'2000,R3), R1 ; cycles=6
1A07: 27 0B BEQ loc_1A14 ; cycles=3/8 nt/t
1A09: FB E8 00 91 MOV:G.W R1, @(-H'1800,R3) ; cycles=6
-1A0D: 52 80 MOV:E.B #H'80, R2 ; cycles=2
+1A0D: 52 80 MOV:E.B #H'80, R2 ; dataflow R2=H'80; cycles=2
1A0F: AD 83 MOV:G.W R5, R3 ; cycles=3
1A11: 1E 24 40 BSR loc_3E54 ; cycles=14
@@ -1039,7 +1122,7 @@ loc_1A6B:
1A6B: FB E0 00 70 CMP:G.W @(-H'2000,R3), R0 ; cycles=6
1A6F: 27 0B BEQ loc_1A7C ; cycles=3/8 nt/t
1A71: FB E8 00 90 MOV:G.W R0, @(-H'1800,R3) ; cycles=6
-1A75: 52 80 MOV:E.B #H'80, R2 ; cycles=2
+1A75: 52 80 MOV:E.B #H'80, R2 ; dataflow R2=H'80; cycles=2
1A77: AD 83 MOV:G.W R5, R3 ; cycles=3
1A79: 1E 23 D8 BSR loc_3E54 ; cycles=14
@@ -1060,7 +1143,7 @@ loc_1A8B:
1A8B: 20 B8 BRA loc_1A45 ; cycles=8
loc_1A8D:
-1A8D: 59 00 0F MOV:I.W #H'000F, R1 ; cycles=3
+1A8D: 59 00 0F MOV:I.W #H'000F, R1 ; dataflow R1=H'000F; cycles=3
loc_1A90:
1A90: A8 79 BTST.W R1, R0 ; cycles=3
@@ -1068,7 +1151,7 @@ loc_1A90:
1A94: 01 B9 F9 SCB/F R1, loc_1A90 ; cycles=3/4/8 false/-1/t
loc_1A97:
-1A97: A8 13 CLR.W R0 ; cycles=3
+1A97: A8 13 CLR.W R0 ; dataflow R0=H'0000; cycles=3
1A99: A8 49 BSET.W R1, R0 ; cycles=3
1A9B: 19 RTS ; cycles=13
@@ -1076,7 +1159,7 @@ loc_1A9C:
1A9C: AB 16 TST.W R3 ; cycles=3
1A9E: 27 32 BEQ loc_1AD2 ; cycles=3/7 nt/t
1AA0: AB 1A SHLL.W R3 ; cycles=3
-1AA2: 15 F7 33 80 MOV:G.B @H'F733, R0 ; refs H'F733 in on_chip_ram; cycles=7
+1AA2: 15 F7 33 80 MOV:G.B @H'F733, R0 ; refs ram_F733 in on_chip_ram; cycles=7
1AA6: A0 15 NOT.B R0 ; cycles=2
1AA8: 04 0F 50 AND.B #H'0F, R0 ; cycles=3
1AAB: AC 16 TST.W R4 ; cycles=3
@@ -1098,24 +1181,24 @@ loc_1ABC:
loc_1AC7:
1AC7: A0 15 NOT.B R0 ; cycles=2
1AC9: 04 0F 50 AND.B #H'0F, R0 ; cycles=3
-1ACC: 15 F7 33 90 MOV:G.B R0, @H'F733 ; refs H'F733 in on_chip_ram; cycles=7
+1ACC: 15 F7 33 90 MOV:G.B R0, @H'F733 ; refs ram_F733 in on_chip_ram; cycles=7
1AD0: 20 0E BRA loc_1AE0 ; cycles=7
loc_1AD2:
1AD2: AC 16 TST.W R4 ; cycles=3
1AD4: 26 06 BNE loc_1ADC ; cycles=3/7 nt/t
-1AD6: 15 F7 33 08 ADD:Q.B #1, @H'F733 ; refs H'F733 in on_chip_ram; cycles=9
+1AD6: 15 F7 33 08 ADD:Q.B #1, @H'F733 ; refs ram_F733 in on_chip_ram; cycles=9
1ADA: 20 04 BRA loc_1AE0 ; cycles=7
loc_1ADC:
-1ADC: 15 F7 33 0C ADD:Q.B #-1, @H'F733 ; refs H'F733 in on_chip_ram; cycles=9
+1ADC: 15 F7 33 0C ADD:Q.B #-1, @H'F733 ; refs ram_F733 in on_chip_ram; cycles=9
loc_1AE0:
1AE0: 1E 2E 17 BSR loc_48FA ; cycles=13
1AE3: 19 RTS ; cycles=13
loc_1AE4:
-1AE4: 15 F7 5B 80 MOV:G.B @H'F75B, R0 ; refs H'F75B in on_chip_ram; cycles=7
+1AE4: 15 F7 5B 80 MOV:G.B @H'F75B, R0 ; refs ram_F75B in on_chip_ram; cycles=7
1AE8: A0 12 EXTU.B R0 ; cycles=3
1AEA: F0 F7 5D 81 MOV:G.B @(-H'08A3,R0), R1 ; cycles=7
1AEE: AC 16 TST.W R4 ; cycles=3
@@ -1123,13 +1206,13 @@ loc_1AE4:
1AF2: A1 08 ADD:Q.B #1, R1 ; cycles=4
1AF4: 41 2E CMP:E #H'2E, R1 ; cycles=2
1AF6: 23 0B BLS loc_1B03 ; cycles=3/7 nt/t
-1AF8: 51 00 MOV:E.B #H'00, R1 ; cycles=2
+1AF8: 51 00 MOV:E.B #H'00, R1 ; dataflow R1=H'00; cycles=2
1AFA: 20 07 BRA loc_1B03 ; cycles=7
loc_1AFC:
1AFC: 04 01 31 SUB.B #H'01, R1 ; cycles=3
1AFF: 24 02 BCC loc_1B03 ; cycles=3/8 nt/t
-1B01: 51 2E MOV:E.B #H'2E, R1 ; cycles=2
+1B01: 51 2E MOV:E.B #H'2E, R1 ; dataflow R1=H'2E; cycles=2
loc_1B03:
1B03: F0 F7 5D 91 MOV:G.B R1, @(-H'08A3,R0) ; cycles=6
@@ -1137,114 +1220,114 @@ loc_1B03:
1B0A: 19 RTS ; cycles=12
loc_1B0B:
-1B0B: 15 F7 5B 80 MOV:G.B @H'F75B, R0 ; refs H'F75B in on_chip_ram; cycles=6
+1B0B: 15 F7 5B 80 MOV:G.B @H'F75B, R0 ; refs ram_F75B in on_chip_ram; cycles=6
1B0F: AC 16 TST.W R4 ; cycles=3
1B11: 26 0A BNE loc_1B1D ; cycles=3/8 nt/t
1B13: A0 08 ADD:Q.B #1, R0 ; cycles=4
1B15: 40 08 CMP:E #H'08, R0 ; cycles=2
1B17: 23 0C BLS loc_1B25 ; cycles=3/8 nt/t
-1B19: 50 08 MOV:E.B #H'08, R0 ; cycles=2
+1B19: 50 08 MOV:E.B #H'08, R0 ; dataflow R0=H'08; cycles=2
1B1B: 20 08 BRA loc_1B25 ; cycles=8
loc_1B1D:
1B1D: A0 0C ADD:Q.B #-1, R0 ; cycles=4
1B1F: 40 01 CMP:E #H'01, R0 ; cycles=2
1B21: 24 02 BCC loc_1B25 ; cycles=3/8 nt/t
-1B23: 50 01 MOV:E.B #H'01, R0 ; cycles=2
+1B23: 50 01 MOV:E.B #H'01, R0 ; dataflow R0=H'01; cycles=2
loc_1B25:
-1B25: 15 F7 5B 90 MOV:G.B R0, @H'F75B ; refs H'F75B in on_chip_ram; cycles=6
+1B25: 15 F7 5B 90 MOV:G.B R0, @H'F75B ; refs ram_F75B in on_chip_ram; cycles=6
1B29: 1E 2D CE BSR loc_48FA ; cycles=14
1B2C: 19 RTS ; cycles=12
loc_1B2D:
-1B2D: 15 F6 D7 84 MOV:G.B @H'F6D7, R4 ; refs H'F6D7 in on_chip_ram; cycles=6
-1B31: 15 F6 E7 64 XOR.B @H'F6E7, R4 ; refs H'F6E7 in on_chip_ram; cycles=6
-1B35: 5D 00 7E MOV:I.W #H'007E, R5 ; cycles=3
+1B2D: 15 F6 D7 84 MOV:G.B @H'F6D7, R4 ; refs ram_F6D7 in on_chip_ram; cycles=6
+1B31: 15 F6 E7 64 XOR.B @H'F6E7, R4 ; refs ram_F6E7 in on_chip_ram; cycles=6
+1B35: 5D 00 7E MOV:I.W #H'007E, R5 ; dataflow R5=H'007E; cycles=3
1B38: 1E 00 D3 BSR loc_1C0E ; cycles=13
-1B3B: 15 F6 D7 84 MOV:G.B @H'F6D7, R4 ; refs H'F6D7 in on_chip_ram; cycles=6
-1B3F: 15 F6 E7 94 MOV:G.B R4, @H'F6E7 ; refs H'F6E7 in on_chip_ram; cycles=6
+1B3B: 15 F6 D7 84 MOV:G.B @H'F6D7, R4 ; refs ram_F6D7 in on_chip_ram; cycles=6
+1B3F: 15 F6 E7 94 MOV:G.B R4, @H'F6E7 ; refs ram_F6E7 in on_chip_ram; cycles=6
1B43: 19 RTS ; cycles=13
loc_1B44:
-1B44: 15 F6 D6 84 MOV:G.B @H'F6D6, R4 ; refs H'F6D6 in on_chip_ram; cycles=7
-1B48: 15 F6 E6 64 XOR.B @H'F6E6, R4 ; refs H'F6E6 in on_chip_ram; cycles=7
-1B4C: 5D 00 6E MOV:I.W #H'006E, R5 ; cycles=3
+1B44: 15 F6 D6 84 MOV:G.B @H'F6D6, R4 ; refs ram_F6D6 in on_chip_ram; cycles=7
+1B48: 15 F6 E6 64 XOR.B @H'F6E6, R4 ; refs ram_F6E6 in on_chip_ram; cycles=7
+1B4C: 5D 00 6E MOV:I.W #H'006E, R5 ; dataflow R5=H'006E; cycles=3
1B4F: 1E 00 BC BSR loc_1C0E ; cycles=14
-1B52: 15 F6 D6 84 MOV:G.B @H'F6D6, R4 ; refs H'F6D6 in on_chip_ram; cycles=7
-1B56: 15 F6 E6 94 MOV:G.B R4, @H'F6E6 ; refs H'F6E6 in on_chip_ram; cycles=7
+1B52: 15 F6 D6 84 MOV:G.B @H'F6D6, R4 ; refs ram_F6D6 in on_chip_ram; cycles=7
+1B56: 15 F6 E6 94 MOV:G.B R4, @H'F6E6 ; refs ram_F6E6 in on_chip_ram; cycles=7
1B5A: 19 RTS ; cycles=12
loc_1B5B:
-1B5B: 15 F6 D5 84 MOV:G.B @H'F6D5, R4 ; refs H'F6D5 in on_chip_ram; cycles=6
-1B5F: 15 F6 E5 64 XOR.B @H'F6E5, R4 ; refs H'F6E5 in on_chip_ram; cycles=6
-1B63: 5D 00 5E MOV:I.W #H'005E, R5 ; cycles=3
+1B5B: 15 F6 D5 84 MOV:G.B @H'F6D5, R4 ; refs ram_F6D5 in on_chip_ram; cycles=6
+1B5F: 15 F6 E5 64 XOR.B @H'F6E5, R4 ; refs ram_F6E5 in on_chip_ram; cycles=6
+1B63: 5D 00 5E MOV:I.W #H'005E, R5 ; dataflow R5=H'005E; cycles=3
1B66: 1E 00 A5 BSR loc_1C0E ; cycles=13
-1B69: 15 F6 D5 84 MOV:G.B @H'F6D5, R4 ; refs H'F6D5 in on_chip_ram; cycles=6
-1B6D: 15 F6 E5 94 MOV:G.B R4, @H'F6E5 ; refs H'F6E5 in on_chip_ram; cycles=6
+1B69: 15 F6 D5 84 MOV:G.B @H'F6D5, R4 ; refs ram_F6D5 in on_chip_ram; cycles=6
+1B6D: 15 F6 E5 94 MOV:G.B R4, @H'F6E5 ; refs ram_F6E5 in on_chip_ram; cycles=6
1B71: 19 RTS ; cycles=13
loc_1B72:
-1B72: 15 F6 D1 84 MOV:G.B @H'F6D1, R4 ; refs H'F6D1 in on_chip_ram; cycles=7
-1B76: 15 F6 E1 64 XOR.B @H'F6E1, R4 ; refs H'F6E1 in on_chip_ram; cycles=7
-1B7A: 5D 00 1E MOV:I.W #H'001E, R5 ; cycles=3
+1B72: 15 F6 D1 84 MOV:G.B @H'F6D1, R4 ; refs ram_F6D1 in on_chip_ram; cycles=7
+1B76: 15 F6 E1 64 XOR.B @H'F6E1, R4 ; refs ram_F6E1 in on_chip_ram; cycles=7
+1B7A: 5D 00 1E MOV:I.W #H'001E, R5 ; dataflow R5=H'001E; cycles=3
1B7D: 1E 00 8E BSR loc_1C0E ; cycles=14
-1B80: 15 F6 D1 84 MOV:G.B @H'F6D1, R4 ; refs H'F6D1 in on_chip_ram; cycles=7
-1B84: 15 F6 E1 94 MOV:G.B R4, @H'F6E1 ; refs H'F6E1 in on_chip_ram; cycles=7
+1B80: 15 F6 D1 84 MOV:G.B @H'F6D1, R4 ; refs ram_F6D1 in on_chip_ram; cycles=7
+1B84: 15 F6 E1 94 MOV:G.B R4, @H'F6E1 ; refs ram_F6E1 in on_chip_ram; cycles=7
1B88: 19 RTS ; cycles=12
loc_1B89:
-1B89: 15 F6 D0 84 MOV:G.B @H'F6D0, R4 ; refs H'F6D0 in on_chip_ram; cycles=6
-1B8D: 15 F6 E0 64 XOR.B @H'F6E0, R4 ; refs H'F6E0 in on_chip_ram; cycles=6
-1B91: 5D 00 0E MOV:I.W #H'000E, R5 ; cycles=3
+1B89: 15 F6 D0 84 MOV:G.B @H'F6D0, R4 ; refs ram_F6D0 in on_chip_ram; cycles=6
+1B8D: 15 F6 E0 64 XOR.B @H'F6E0, R4 ; refs ram_F6E0 in on_chip_ram; cycles=6
+1B91: 5D 00 0E MOV:I.W #H'000E, R5 ; dataflow R5=H'000E; cycles=3
1B94: 1E 00 77 BSR loc_1C0E ; cycles=13
-1B97: 15 F6 D0 84 MOV:G.B @H'F6D0, R4 ; refs H'F6D0 in on_chip_ram; cycles=6
-1B9B: 15 F6 E0 94 MOV:G.B R4, @H'F6E0 ; refs H'F6E0 in on_chip_ram; cycles=6
+1B97: 15 F6 D0 84 MOV:G.B @H'F6D0, R4 ; refs ram_F6D0 in on_chip_ram; cycles=6
+1B9B: 15 F6 E0 94 MOV:G.B R4, @H'F6E0 ; refs ram_F6E0 in on_chip_ram; cycles=6
1B9F: 19 RTS ; cycles=13
loc_1BA0:
-1BA0: 15 F6 D4 84 MOV:G.B @H'F6D4, R4 ; refs H'F6D4 in on_chip_ram; cycles=7
-1BA4: 15 F6 E4 64 XOR.B @H'F6E4, R4 ; refs H'F6E4 in on_chip_ram; cycles=7
-1BA8: 5D 00 4E MOV:I.W #H'004E, R5 ; cycles=3
+1BA0: 15 F6 D4 84 MOV:G.B @H'F6D4, R4 ; refs ram_F6D4 in on_chip_ram; cycles=7
+1BA4: 15 F6 E4 64 XOR.B @H'F6E4, R4 ; refs ram_F6E4 in on_chip_ram; cycles=7
+1BA8: 5D 00 4E MOV:I.W #H'004E, R5 ; dataflow R5=H'004E; cycles=3
1BAB: 0E 61 BSR loc_1C0E ; cycles=14
-1BAD: 15 F6 D4 84 MOV:G.B @H'F6D4, R4 ; refs H'F6D4 in on_chip_ram; cycles=6
-1BB1: 15 F6 E4 94 MOV:G.B R4, @H'F6E4 ; refs H'F6E4 in on_chip_ram; cycles=6
+1BAD: 15 F6 D4 84 MOV:G.B @H'F6D4, R4 ; refs ram_F6D4 in on_chip_ram; cycles=6
+1BB1: 15 F6 E4 94 MOV:G.B R4, @H'F6E4 ; refs ram_F6E4 in on_chip_ram; cycles=6
1BB5: 19 RTS ; cycles=13
loc_1BB6:
-1BB6: 15 F6 D3 84 MOV:G.B @H'F6D3, R4 ; refs H'F6D3 in on_chip_ram; cycles=7
-1BBA: 15 F6 E3 64 XOR.B @H'F6E3, R4 ; refs H'F6E3 in on_chip_ram; cycles=7
-1BBE: 5D 00 3E MOV:I.W #H'003E, R5 ; cycles=3
+1BB6: 15 F6 D3 84 MOV:G.B @H'F6D3, R4 ; refs ram_F6D3 in on_chip_ram; cycles=7
+1BBA: 15 F6 E3 64 XOR.B @H'F6E3, R4 ; refs ram_F6E3 in on_chip_ram; cycles=7
+1BBE: 5D 00 3E MOV:I.W #H'003E, R5 ; dataflow R5=H'003E; cycles=3
1BC1: 0E 4B BSR loc_1C0E ; cycles=14
-1BC3: 15 F6 D3 84 MOV:G.B @H'F6D3, R4 ; refs H'F6D3 in on_chip_ram; cycles=6
-1BC7: 15 F6 E3 94 MOV:G.B R4, @H'F6E3 ; refs H'F6E3 in on_chip_ram; cycles=6
+1BC3: 15 F6 D3 84 MOV:G.B @H'F6D3, R4 ; refs ram_F6D3 in on_chip_ram; cycles=6
+1BC7: 15 F6 E3 94 MOV:G.B R4, @H'F6E3 ; refs ram_F6E3 in on_chip_ram; cycles=6
1BCB: 19 RTS ; cycles=13
loc_1BCC:
-1BCC: 15 F6 D2 84 MOV:G.B @H'F6D2, R4 ; refs H'F6D2 in on_chip_ram; cycles=7
-1BD0: 15 F6 E2 64 XOR.B @H'F6E2, R4 ; refs H'F6E2 in on_chip_ram; cycles=7
-1BD4: 5D 00 2E MOV:I.W #H'002E, R5 ; cycles=3
+1BCC: 15 F6 D2 84 MOV:G.B @H'F6D2, R4 ; refs ram_F6D2 in on_chip_ram; cycles=7
+1BD0: 15 F6 E2 64 XOR.B @H'F6E2, R4 ; refs ram_F6E2 in on_chip_ram; cycles=7
+1BD4: 5D 00 2E MOV:I.W #H'002E, R5 ; dataflow R5=H'002E; cycles=3
1BD7: 0E 35 BSR loc_1C0E ; cycles=14
-1BD9: 15 F6 D2 84 MOV:G.B @H'F6D2, R4 ; refs H'F6D2 in on_chip_ram; cycles=6
-1BDD: 15 F6 E2 94 MOV:G.B R4, @H'F6E2 ; refs H'F6E2 in on_chip_ram; cycles=6
+1BD9: 15 F6 D2 84 MOV:G.B @H'F6D2, R4 ; refs ram_F6D2 in on_chip_ram; cycles=6
+1BDD: 15 F6 E2 94 MOV:G.B R4, @H'F6E2 ; refs ram_F6E2 in on_chip_ram; cycles=6
1BE1: 19 RTS ; cycles=13
loc_1BE2:
-1BE2: 15 F6 DC 84 MOV:G.B @H'F6DC, R4 ; refs H'F6DC in on_chip_ram; cycles=7
-1BE6: 15 F6 EC 64 XOR.B @H'F6EC, R4 ; refs H'F6EC in on_chip_ram; cycles=7
-1BEA: 5D 00 CE MOV:I.W #H'00CE, R5 ; cycles=3
+1BE2: 15 F6 DC 84 MOV:G.B @H'F6DC, R4 ; refs ram_F6DC in on_chip_ram; cycles=7
+1BE6: 15 F6 EC 64 XOR.B @H'F6EC, R4 ; refs ram_F6EC in on_chip_ram; cycles=7
+1BEA: 5D 00 CE MOV:I.W #H'00CE, R5 ; dataflow R5=H'00CE; cycles=3
1BED: 0E 1F BSR loc_1C0E ; cycles=14
-1BEF: 15 F6 DC 84 MOV:G.B @H'F6DC, R4 ; refs H'F6DC in on_chip_ram; cycles=6
-1BF3: 15 F6 EC 94 MOV:G.B R4, @H'F6EC ; refs H'F6EC in on_chip_ram; cycles=6
+1BEF: 15 F6 DC 84 MOV:G.B @H'F6DC, R4 ; refs ram_F6DC in on_chip_ram; cycles=6
+1BF3: 15 F6 EC 94 MOV:G.B R4, @H'F6EC ; refs ram_F6EC in on_chip_ram; cycles=6
1BF7: 19 RTS ; cycles=13
loc_1BF8:
-1BF8: 15 F6 DB 84 MOV:G.B @H'F6DB, R4 ; refs H'F6DB in on_chip_ram; cycles=7
-1BFC: 15 F6 EB 64 XOR.B @H'F6EB, R4 ; refs H'F6EB in on_chip_ram; cycles=7
-1C00: 5D 00 BE MOV:I.W #H'00BE, R5 ; cycles=3
+1BF8: 15 F6 DB 84 MOV:G.B @H'F6DB, R4 ; refs ram_F6DB in on_chip_ram; cycles=7
+1BFC: 15 F6 EB 64 XOR.B @H'F6EB, R4 ; refs ram_F6EB in on_chip_ram; cycles=7
+1C00: 5D 00 BE MOV:I.W #H'00BE, R5 ; dataflow R5=H'00BE; cycles=3
1C03: 0E 09 BSR loc_1C0E ; cycles=14
-1C05: 15 F6 DB 84 MOV:G.B @H'F6DB, R4 ; refs H'F6DB in on_chip_ram; cycles=6
-1C09: 15 F6 EB 94 MOV:G.B R4, @H'F6EB ; refs H'F6EB in on_chip_ram; cycles=6
+1C05: 15 F6 DB 84 MOV:G.B @H'F6DB, R4 ; refs ram_F6DB in on_chip_ram; cycles=6
+1C09: 15 F6 EB 94 MOV:G.B R4, @H'F6EB ; refs ram_F6EB in on_chip_ram; cycles=6
1C0D: 19 RTS ; cycles=13
loc_1C0E:
@@ -1252,7 +1335,7 @@ loc_1C0E:
1C10: 24 0A BCC loc_1C1C ; cycles=3/7 nt/t
1C12: FD 27 06 80 MOV:G.W @(H'2706,R5), R0 ; cycles=7
1C16: 12 30 STM.W {R4,R5}, @-SP ; cycles=12
-1C18: 11 D8 JSR @R0 ; cycles=13
+1C18: 11 D8 JSR @R0 ; JSR @R0 uses R0; target not resolved; cycles=13
1C1A: 02 30 LDM.W @SP+, {R4,R5} ; cycles=14
loc_1C1C:
@@ -1265,77 +1348,77 @@ loc_1C24:
1C24: 19 RTS ; cycles=12
loc_2127:
-2127: 15 FB 03 C7 BSET.B #7, @H'FB03 ; refs H'FB03 in on_chip_ram; cycles=8
+2127: 15 FB 03 C7 BSET.B #7, @H'FB03 ; refs ram_FB03 in on_chip_ram; cycles=8
212B: 26 08 BNE loc_2135 ; cycles=3/8 nt/t
-212D: 1D F7 32 81 MOV:G.W @H'F732, R1 ; refs H'F732 in on_chip_ram; cycles=6
-2131: 1D F7 34 91 MOV:G.W R1, @H'F734 ; refs H'F734 in on_chip_ram; cycles=6
+212D: 1D F7 32 81 MOV:G.W @H'F732, R1 ; refs ram_F732 in on_chip_ram; cycles=6
+2131: 1D F7 34 91 MOV:G.W R1, @H'F734 ; refs ram_F734 in on_chip_ram; cycles=6
loc_2135:
-2135: 1D F7 32 07 1C 03 MOV:G.W #H'1C03, @H'F732 ; refs H'F732 in on_chip_ram; cycles=9
-213B: 15 FB 02 06 14 MOV:G.B #H'14, @H'FB02 ; refs H'FB02 in on_chip_ram; cycles=9
+2135: 1D F7 32 07 1C 03 MOV:G.W #H'1C03, @H'F732 ; refs ram_F732 in on_chip_ram; cycles=9
+213B: 15 FB 02 06 14 MOV:G.B #H'14, @H'FB02 ; refs ram_FB02 in on_chip_ram; cycles=9
2140: 1E 27 B7 BSR loc_48FA ; cycles=13
2143: 19 RTS ; cycles=13
loc_2650:
-2650: 15 F6 F6 D5 BCLR.B #5, @H'F6F6 ; refs H'F6F6 in on_chip_ram; cycles=9
+2650: 15 F6 F6 D5 BCLR.B #5, @H'F6F6 ; refs ram_F6F6 in on_chip_ram; cycles=9
2654: 37 00 68 BEQ loc_26BF ; cycles=3/7 nt/t
-2657: 1D E1 24 80 MOV:G.W @H'E124, R0 ; refs H'E124 in program_or_external; cycles=6
+2657: 1D E1 24 80 MOV:G.W @H'E124, R0 ; refs mem_E124 in program_or_external; cycles=6
265B: A8 1A SHLL.W R0 ; cycles=3
265D: A0 10 SWAP.B R0 ; cycles=3
-265F: 15 F6 F6 F6 BTST.B #6, @H'F6F6 ; refs H'F6F6 in on_chip_ram; cycles=6
+265F: 15 F6 F6 F6 BTST.B #6, @H'F6F6 ; refs ram_F6F6 in on_chip_ram; cycles=6
2663: 26 08 BNE loc_266D ; cycles=3/8 nt/t
2665: A0 08 ADD:Q.B #1, R0 ; cycles=4
2667: 24 1A BCC loc_2683 ; cycles=3/8 nt/t
-2669: 50 FF MOV:E.B #H'FF, R0 ; cycles=2
+2669: 50 FF MOV:E.B #H'FF, R0 ; dataflow R0=H'FF; cycles=2
266B: 20 16 BRA loc_2683 ; cycles=8
loc_266D:
266D: A0 0C ADD:Q.B #-1, R0 ; cycles=4
-266F: 1D E0 04 FD BTST.W #13, @H'E004 ; refs H'E004 in program_or_external; cycles=6
+266F: 1D E0 04 FD BTST.W #13, @H'E004 ; refs mem_E004 in program_or_external; cycles=6
2673: 26 08 BNE loc_267D ; cycles=3/8 nt/t
2675: 40 49 CMP:E #H'49, R0 ; cycles=2
2677: 24 0A BCC loc_2683 ; cycles=3/8 nt/t
-2679: 50 49 MOV:E.B #H'49, R0 ; cycles=2
+2679: 50 49 MOV:E.B #H'49, R0 ; dataflow R0=H'49; cycles=2
267B: 20 06 BRA loc_2683 ; cycles=8
loc_267D:
267D: 40 16 CMP:E #H'16, R0 ; cycles=2
267F: 24 02 BCC loc_2683 ; cycles=3/8 nt/t
-2681: 50 16 MOV:E.B #H'16, R0 ; cycles=2
+2681: 50 16 MOV:E.B #H'16, R0 ; dataflow R0=H'16; cycles=2
loc_2683:
2683: A0 12 EXTU.B R0 ; cycles=3
2685: A0 10 SWAP.B R0 ; cycles=3
2687: A8 1B SHLR.W R0 ; cycles=3
2689: A8 CF BSET.W #15, R0 ; cycles=3
-268B: 1D E1 24 70 CMP:G.W @H'E124, R0 ; refs H'E124 in program_or_external; cycles=6
+268B: 1D E1 24 70 CMP:G.W @H'E124, R0 ; refs mem_E124 in program_or_external; cycles=6
268F: 27 2E BEQ loc_26BF ; cycles=3/8 nt/t
-2691: 1D E9 24 90 MOV:G.W R0, @H'E924 ; refs H'E924 in program_or_external; cycles=6
-2695: 52 80 MOV:E.B #H'80, R2 ; cycles=2
-2697: 5B 00 92 MOV:I.W #H'0092, R3 ; cycles=3
-269A: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs H'F791 in on_chip_ram; cycles=7
+2691: 1D E9 24 90 MOV:G.W R0, @H'E924 ; refs mem_E924 in program_or_external; cycles=6
+2695: 52 80 MOV:E.B #H'80, R2 ; dataflow R2=H'80; cycles=2
+2697: 5B 00 92 MOV:I.W #H'0092, R3 ; dataflow R3=H'0092; cycles=3
+269A: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs ram_F791 in on_chip_ram; cycles=7
269E: 27 08 BEQ loc_26A8 ; cycles=3/7 nt/t
-26A0: 15 F4 04 F4 BTST.B #4, @H'F404 ; refs H'F404 in program_or_external; cycles=7
+26A0: 15 F4 04 F4 BTST.B #4, @H'F404 ; refs mem_F404 in program_or_external; cycles=7
26A4: 27 02 BEQ loc_26A8 ; cycles=3/7 nt/t
26A6: AB CE BSET.W #14, R3 ; cycles=3
loc_26A8:
26A8: 1E 17 A9 BSR loc_3E54 ; cycles=13
-26AB: 15 F6 F6 C0 BSET.B #0, @H'F6F6 ; refs H'F6F6 in on_chip_ram; cycles=8
+26AB: 15 F6 F6 C0 BSET.B #0, @H'F6F6 ; refs ram_F6F6 in on_chip_ram; cycles=8
26AF: 26 08 BNE loc_26B9 ; cycles=3/8 nt/t
-26B1: 1D F6 F4 07 07 D0 MOV:G.W #H'07D0, @H'F6F4 ; refs H'F6F4 in on_chip_ram; cycles=9
+26B1: 1D F6 F4 07 07 D0 MOV:G.W #H'07D0, @H'F6F4 ; refs ram_F6F4 in on_chip_ram; cycles=9
26B7: 20 06 BRA loc_26BF ; cycles=8
loc_26B9:
-26B9: 1D F6 F4 07 00 C8 MOV:G.W #H'00C8, @H'F6F4 ; refs H'F6F4 in on_chip_ram; cycles=9
+26B9: 1D F6 F4 07 00 C8 MOV:G.W #H'00C8, @H'F6F4 ; refs ram_F6F4 in on_chip_ram; cycles=9
loc_26BF:
26BF: 19 RTS ; cycles=13
loc_2806:
-2806: 15 F9 B9 81 MOV:G.B @H'F9B9, R1 ; refs H'F9B9 in on_chip_ram; cycles=7
+2806: 15 F9 B9 81 MOV:G.B @H'F9B9, R1 ; refs ram_F9B9 in on_chip_ram; cycles=7
280A: A1 12 EXTU.B R1 ; cycles=3
-280C: 15 F9 B4 71 CMP:G.B @H'F9B4, R1 ; refs H'F9B4 in on_chip_ram; cycles=7
+280C: 15 F9 B4 71 CMP:G.B @H'F9B4, R1 ; refs ram_F9B4 in on_chip_ram; cycles=7
2810: 26 03 BNE loc_2815 ; cycles=3/7 nt/t
2812: 30 04 91 BRA loc_2CA6 ; cycles=7
@@ -1345,7 +1428,7 @@ loc_2815:
2819: F8 F9 70 80 MOV:G.W @(-H'0690,R0), R0 ; cycles=6
281D: A1 08 ADD:Q.B #1, R1 ; cycles=4
281F: 04 1F 51 AND.B #H'1F, R1 ; cycles=3
-2822: 15 F9 B9 91 MOV:G.B R1, @H'F9B9 ; refs H'F9B9 in on_chip_ram; cycles=7
+2822: 15 F9 B9 91 MOV:G.B R1, @H'F9B9 ; refs ram_F9B9 in on_chip_ram; cycles=7
2826: 0C 01 FF 50 AND.W #H'01FF, R0 ; cycles=4
282A: A8 85 MOV:G.W R0, R5 ; cycles=3
282C: 1E 39 D7 BSR loc_6206 ; cycles=13
@@ -1353,56 +1436,56 @@ loc_2815:
2831: AC 1A SHLL.W R4 ; cycles=3
2833: A8 16 TST.W R0 ; cycles=3
2835: 27 68 BEQ loc_289F ; cycles=3/8 nt/t
-2837: 1D F7 36 81 MOV:G.W @H'F736, R1 ; refs H'F736 in on_chip_ram; cycles=6
+2837: 1D F7 36 81 MOV:G.W @H'F736, R1 ; refs ram_F736 in on_chip_ram; cycles=6
283B: 0C 01 FF 51 AND.W #H'01FF, R1 ; cycles=4
283F: A9 70 CMP:G.W R1, R0 ; cycles=3
2841: 37 04 67 BEQ loc_2CAB ; cycles=3/8 nt/t
-2844: 1D F7 38 81 MOV:G.W @H'F738, R1 ; refs H'F738 in on_chip_ram; cycles=7
+2844: 1D F7 38 81 MOV:G.W @H'F738, R1 ; refs ram_F738 in on_chip_ram; cycles=7
2848: 0C 01 FF 51 AND.W #H'01FF, R1 ; cycles=4
284C: A9 70 CMP:G.W R1, R0 ; cycles=3
284E: 37 04 5A BEQ loc_2CAB ; cycles=3/7 nt/t
-2851: 1D F7 3A 81 MOV:G.W @H'F73A, R1 ; refs H'F73A in on_chip_ram; cycles=6
+2851: 1D F7 3A 81 MOV:G.W @H'F73A, R1 ; refs ram_F73A in on_chip_ram; cycles=6
2855: 0C 01 FF 51 AND.W #H'01FF, R1 ; cycles=4
2859: A9 70 CMP:G.W R1, R0 ; cycles=3
285B: 37 04 4D BEQ loc_2CAB ; cycles=3/8 nt/t
-285E: 1D F7 3C 81 MOV:G.W @H'F73C, R1 ; refs H'F73C in on_chip_ram; cycles=7
+285E: 1D F7 3C 81 MOV:G.W @H'F73C, R1 ; refs ram_F73C in on_chip_ram; cycles=7
2862: 0C 01 FF 51 AND.W #H'01FF, R1 ; cycles=4
2866: A9 70 CMP:G.W R1, R0 ; cycles=3
2868: 37 04 40 BEQ loc_2CAB ; cycles=3/7 nt/t
-286B: 1D F7 3E 81 MOV:G.W @H'F73E, R1 ; refs H'F73E in on_chip_ram; cycles=6
+286B: 1D F7 3E 81 MOV:G.W @H'F73E, R1 ; refs ram_F73E in on_chip_ram; cycles=6
286F: 0C 01 FF 51 AND.W #H'01FF, R1 ; cycles=4
2873: A9 70 CMP:G.W R1, R0 ; cycles=3
2875: 37 04 33 BEQ loc_2CAB ; cycles=3/8 nt/t
-2878: 1D F7 40 81 MOV:G.W @H'F740, R1 ; refs H'F740 in on_chip_ram; cycles=7
+2878: 1D F7 40 81 MOV:G.W @H'F740, R1 ; refs ram_F740 in on_chip_ram; cycles=7
287C: 0C 01 FF 51 AND.W #H'01FF, R1 ; cycles=4
2880: A9 70 CMP:G.W R1, R0 ; cycles=3
2882: 37 04 26 BEQ loc_2CAB ; cycles=3/7 nt/t
-2885: 1D F7 42 81 MOV:G.W @H'F742, R1 ; refs H'F742 in on_chip_ram; cycles=6
+2885: 1D F7 42 81 MOV:G.W @H'F742, R1 ; refs ram_F742 in on_chip_ram; cycles=6
2889: 0C 01 FF 51 AND.W #H'01FF, R1 ; cycles=4
288D: A9 70 CMP:G.W R1, R0 ; cycles=3
288F: 37 04 19 BEQ loc_2CAB ; cycles=3/8 nt/t
-2892: 1D F7 54 81 MOV:G.W @H'F754, R1 ; refs H'F754 in on_chip_ram; cycles=7
+2892: 1D F7 54 81 MOV:G.W @H'F754, R1 ; refs ram_F754 in on_chip_ram; cycles=7
2896: 0C 01 FF 51 AND.W #H'01FF, R1 ; cycles=4
289A: A9 70 CMP:G.W R1, R0 ; cycles=3
289C: 37 04 0C BEQ loc_2CAB ; cycles=3/7 nt/t
loc_289F:
289F: FC 28 A6 81 MOV:G.W @(H'28A6,R4), R1 ; cycles=6
-28A3: 11 D1 JMP @R1 ; cycles=7
+28A3: 11 D1 JMP @R1 ; JMP @R1 uses R1 loaded from pointer table H'28A6 via R4 (103/128 decoded targets); cycles=7
loc_2CA6:
-2CA6: 15 F7 69 D7 BCLR.B #7, @H'F769 ; refs H'F769 in on_chip_ram; cycles=9
+2CA6: 15 F7 69 D7 BCLR.B #7, @H'F769 ; refs ram_F769 in on_chip_ram; cycles=9
2CAA: 19 RTS ; cycles=12
loc_2CAB:
2CAB: 12 31 STM.W {R0,R4,R5}, @-SP ; cycles=15
2CAD: 1E 1C 4A BSR loc_48FA ; cycles=14
2CB0: 02 31 LDM.W @SP+, {R0,R4,R5} ; cycles=18
-2CB2: 15 F7 69 C7 BSET.B #7, @H'F769 ; refs H'F769 in on_chip_ram; cycles=9
+2CB2: 15 F7 69 C7 BSET.B #7, @H'F769 ; refs ram_F769 in on_chip_ram; cycles=9
2CB6: 30 FB E6 BRA loc_289F ; cycles=7
loc_3930:
-3930: 58 00 07 MOV:I.W #H'0007, R0 ; cycles=3
+3930: 58 00 07 MOV:I.W #H'0007, R0 ; dataflow R0=H'0007; cycles=3
loc_3933:
3933: 15 FE 8E 78 BTST.B R0, @P7DR ; refs P7DR in register_field; cycles=6
@@ -1417,22 +1500,22 @@ loc_3943:
loc_3947:
3947: F0 F6 80 04 FF CMP:G.B #H'FF, @(-H'0980,R0) ; cycles=6
394C: 26 06 BNE loc_3954 ; cycles=3/7 nt/t
-394E: 15 F6 88 48 BSET.B R0, @H'F688 ; refs H'F688 in on_chip_ram; cycles=9
+394E: 15 F6 88 48 BSET.B R0, @H'F688 ; refs ram_F688 in on_chip_ram; cycles=9
3952: 20 0B BRA loc_395F ; cycles=7
loc_3954:
3954: F0 F6 80 04 00 CMP:G.B #H'00, @(-H'0980,R0) ; cycles=7
3959: 26 04 BNE loc_395F ; cycles=3/8 nt/t
-395B: 15 F6 88 58 BCLR.B R0, @H'F688 ; refs H'F688 in on_chip_ram; cycles=8
+395B: 15 F6 88 58 BCLR.B R0, @H'F688 ; refs ram_F688 in on_chip_ram; cycles=8
loc_395F:
395F: 01 B8 D1 SCB/F R0, loc_3933 ; cycles=3/4/9 false/-1/t
-3962: 15 F7 22 08 ADD:Q.B #1, @H'F722 ; refs H'F722 in on_chip_ram; cycles=9
-3966: 15 F7 22 04 3C CMP:G.B #H'3C, @H'F722 ; refs H'F722 in on_chip_ram; cycles=7
+3962: 15 F7 22 08 ADD:Q.B #1, @H'F722 ; refs ram_F722 in on_chip_ram; cycles=9
+3966: 15 F7 22 04 3C CMP:G.B #H'3C, @H'F722 ; refs ram_F722 in on_chip_ram; cycles=7
396B: 27 0F BEQ loc_397C ; cycles=3/8 nt/t
-396D: 15 F7 22 04 78 CMP:G.B #H'78, @H'F722 ; refs H'F722 in on_chip_ram; cycles=6
+396D: 15 F7 22 04 78 CMP:G.B #H'78, @H'F722 ; refs ram_F722 in on_chip_ram; cycles=6
3972: 27 0B BEQ loc_397F ; cycles=3/7 nt/t
-3974: 15 F7 22 04 B4 CMP:G.B #H'B4, @H'F722 ; refs H'F722 in on_chip_ram; cycles=7
+3974: 15 F7 22 04 B4 CMP:G.B #H'B4, @H'F722 ; refs ram_F722 in on_chip_ram; cycles=7
3979: 27 08 BEQ loc_3983 ; cycles=3/8 nt/t
397B: 19 RTS ; cycles=13
@@ -1446,7 +1529,7 @@ loc_397F:
loc_3983:
3983: 0E 05 BSR loc_398A ; cycles=14
-3985: 15 F7 22 13 CLR.B @H'F722 ; refs H'F722 in on_chip_ram; cycles=8
+3985: 15 F7 22 13 CLR.B @H'F722 ; refs ram_F722 in on_chip_ram; cycles=8
3989: 19 RTS ; cycles=13
loc_398A:
@@ -1458,98 +1541,98 @@ loc_3994:
3994: 19 RTS ; cycles=12
loc_3995:
-3995: 15 F7 20 16 TST.B @H'F720 ; refs H'F720 in on_chip_ram; cycles=6
+3995: 15 F7 20 16 TST.B @H'F720 ; refs ram_F720 in on_chip_ram; cycles=6
3999: 36 00 91 BNE loc_3A2D ; cycles=3/8 nt/t
-399C: 15 F1 01 06 A0 MOV:G.B #H'A0, @H'F101 ; refs H'F101 in program_or_external; cycles=9
-39A1: 15 F1 00 F1 BTST.B #1, @H'F100 ; refs H'F100 in program_or_external; cycles=6
+399C: 15 F1 01 06 A0 MOV:G.B #H'A0, @H'F101 ; refs mem_F101 in program_or_external; cycles=9
+39A1: 15 F1 00 F1 BTST.B #1, @H'F100 ; refs mem_F100 in program_or_external; cycles=6
39A5: 37 00 85 BEQ loc_3A2D ; cycles=3/8 nt/t
-39A8: 15 F7 1B 80 MOV:G.B @H'F71B, R0 ; refs H'F71B in on_chip_ram; cycles=7
-39AC: 15 F7 23 40 OR.B @H'F723, R0 ; refs H'F723 in on_chip_ram; cycles=7
-39B0: 15 F7 13 50 AND.B @H'F713, R0 ; refs H'F713 in on_chip_ram; cycles=7
-39B4: 15 F1 02 90 MOV:G.B R0, @H'F102 ; refs H'F102 in program_or_external; cycles=7
-39B8: 15 F7 1A 80 MOV:G.B @H'F71A, R0 ; refs H'F71A in on_chip_ram; cycles=7
-39BC: 15 F7 23 40 OR.B @H'F723, R0 ; refs H'F723 in on_chip_ram; cycles=7
-39C0: 15 F7 12 50 AND.B @H'F712, R0 ; refs H'F712 in on_chip_ram; cycles=7
-39C4: 15 F1 03 90 MOV:G.B R0, @H'F103 ; refs H'F103 in program_or_external; cycles=7
-39C8: 15 F7 19 80 MOV:G.B @H'F719, R0 ; refs H'F719 in on_chip_ram; cycles=7
-39CC: 15 F7 23 40 OR.B @H'F723, R0 ; refs H'F723 in on_chip_ram; cycles=7
-39D0: 15 F7 11 50 AND.B @H'F711, R0 ; refs H'F711 in on_chip_ram; cycles=7
-39D4: 15 F1 04 90 MOV:G.B R0, @H'F104 ; refs H'F104 in program_or_external; cycles=7
-39D8: 15 F7 18 80 MOV:G.B @H'F718, R0 ; refs H'F718 in on_chip_ram; cycles=7
-39DC: 15 F7 23 40 OR.B @H'F723, R0 ; refs H'F723 in on_chip_ram; cycles=7
-39E0: 15 F7 10 50 AND.B @H'F710, R0 ; refs H'F710 in on_chip_ram; cycles=7
-39E4: 15 F1 05 90 MOV:G.B R0, @H'F105 ; refs H'F105 in program_or_external; cycles=7
-39E8: 15 F7 02 80 MOV:G.B @H'F702, R0 ; refs H'F702 in on_chip_ram; cycles=7
-39EC: 15 F1 09 90 MOV:G.B R0, @H'F109 ; refs H'F109 in program_or_external; cycles=7
-39F0: 15 F7 03 80 MOV:G.B @H'F703, R0 ; refs H'F703 in on_chip_ram; cycles=7
-39F4: 15 F1 0A 90 MOV:G.B R0, @H'F10A ; refs H'F10A in program_or_external; cycles=7
-39F8: 15 F7 04 80 MOV:G.B @H'F704, R0 ; refs H'F704 in on_chip_ram; cycles=7
-39FC: 15 F1 0B 90 MOV:G.B R0, @H'F10B ; refs H'F10B in program_or_external; cycles=7
-3A00: 15 F7 05 80 MOV:G.B @H'F705, R0 ; refs H'F705 in on_chip_ram; cycles=7
-3A04: 15 F1 0C 90 MOV:G.B R0, @H'F10C ; refs H'F10C in program_or_external; cycles=7
-3A08: 15 F7 00 80 MOV:G.B @H'F700, R0 ; refs H'F700 in on_chip_ram; cycles=7
-3A0C: 15 F1 0D 90 MOV:G.B R0, @H'F10D ; refs H'F10D in program_or_external; cycles=7
-3A10: 15 F7 01 80 MOV:G.B @H'F701, R0 ; refs H'F701 in on_chip_ram; cycles=7
-3A14: 15 F1 0E 90 MOV:G.B R0, @H'F10E ; refs H'F10E in program_or_external; cycles=7
+39A8: 15 F7 1B 80 MOV:G.B @H'F71B, R0 ; refs ram_F71B in on_chip_ram; cycles=7
+39AC: 15 F7 23 40 OR.B @H'F723, R0 ; refs ram_F723 in on_chip_ram; cycles=7
+39B0: 15 F7 13 50 AND.B @H'F713, R0 ; refs ram_F713 in on_chip_ram; cycles=7
+39B4: 15 F1 02 90 MOV:G.B R0, @H'F102 ; refs mem_F102 in program_or_external; cycles=7
+39B8: 15 F7 1A 80 MOV:G.B @H'F71A, R0 ; refs ram_F71A in on_chip_ram; cycles=7
+39BC: 15 F7 23 40 OR.B @H'F723, R0 ; refs ram_F723 in on_chip_ram; cycles=7
+39C0: 15 F7 12 50 AND.B @H'F712, R0 ; refs ram_F712 in on_chip_ram; cycles=7
+39C4: 15 F1 03 90 MOV:G.B R0, @H'F103 ; refs mem_F103 in program_or_external; cycles=7
+39C8: 15 F7 19 80 MOV:G.B @H'F719, R0 ; refs ram_F719 in on_chip_ram; cycles=7
+39CC: 15 F7 23 40 OR.B @H'F723, R0 ; refs ram_F723 in on_chip_ram; cycles=7
+39D0: 15 F7 11 50 AND.B @H'F711, R0 ; refs ram_F711 in on_chip_ram; cycles=7
+39D4: 15 F1 04 90 MOV:G.B R0, @H'F104 ; refs mem_F104 in program_or_external; cycles=7
+39D8: 15 F7 18 80 MOV:G.B @H'F718, R0 ; refs ram_F718 in on_chip_ram; cycles=7
+39DC: 15 F7 23 40 OR.B @H'F723, R0 ; refs ram_F723 in on_chip_ram; cycles=7
+39E0: 15 F7 10 50 AND.B @H'F710, R0 ; refs ram_F710 in on_chip_ram; cycles=7
+39E4: 15 F1 05 90 MOV:G.B R0, @H'F105 ; refs mem_F105 in program_or_external; cycles=7
+39E8: 15 F7 02 80 MOV:G.B @H'F702, R0 ; refs ram_F702 in on_chip_ram; cycles=7
+39EC: 15 F1 09 90 MOV:G.B R0, @H'F109 ; refs mem_F109 in program_or_external; cycles=7
+39F0: 15 F7 03 80 MOV:G.B @H'F703, R0 ; refs ram_F703 in on_chip_ram; cycles=7
+39F4: 15 F1 0A 90 MOV:G.B R0, @H'F10A ; refs mem_F10A in program_or_external; cycles=7
+39F8: 15 F7 04 80 MOV:G.B @H'F704, R0 ; refs ram_F704 in on_chip_ram; cycles=7
+39FC: 15 F1 0B 90 MOV:G.B R0, @H'F10B ; refs mem_F10B in program_or_external; cycles=7
+3A00: 15 F7 05 80 MOV:G.B @H'F705, R0 ; refs ram_F705 in on_chip_ram; cycles=7
+3A04: 15 F1 0C 90 MOV:G.B R0, @H'F10C ; refs mem_F10C in program_or_external; cycles=7
+3A08: 15 F7 00 80 MOV:G.B @H'F700, R0 ; refs ram_F700 in on_chip_ram; cycles=7
+3A0C: 15 F1 0D 90 MOV:G.B R0, @H'F10D ; refs mem_F10D in program_or_external; cycles=7
+3A10: 15 F7 01 80 MOV:G.B @H'F701, R0 ; refs ram_F701 in on_chip_ram; cycles=7
+3A14: 15 F1 0E 90 MOV:G.B R0, @H'F10E ; refs mem_F10E in program_or_external; cycles=7
3A18: 15 FE 8E 80 MOV:G.B @P7DR, R0 ; refs P7DR in register_field; cycles=7
3A1C: A0 15 NOT.B R0 ; cycles=2
3A1E: 04 03 50 AND.B #H'03, R0 ; cycles=3
3A21: 04 A0 40 OR.B #H'A0, R0 ; cycles=3
-3A24: 15 F1 0F 90 MOV:G.B R0, @H'F10F ; refs H'F10F in program_or_external; cycles=7
-3A28: 15 F7 20 06 03 MOV:G.B #H'03, @H'F720 ; refs H'F720 in on_chip_ram; cycles=9
+3A24: 15 F1 0F 90 MOV:G.B R0, @H'F10F ; refs mem_F10F in program_or_external; cycles=7
+3A28: 15 F7 20 06 03 MOV:G.B #H'03, @H'F720 ; refs ram_F720 in on_chip_ram; cycles=9
loc_3A2D:
3A2D: 19 RTS ; cycles=13
loc_3A2E:
-3A2E: 15 F7 21 16 TST.B @H'F721 ; refs H'F721 in on_chip_ram; cycles=7
+3A2E: 15 F7 21 16 TST.B @H'F721 ; refs ram_F721 in on_chip_ram; cycles=7
3A32: 36 00 91 BNE loc_3AC6 ; cycles=3/7 nt/t
-3A35: 15 F0 01 06 A0 MOV:G.B #H'A0, @H'F001 ; refs H'F001 in program_or_external; cycles=9
-3A3A: 15 F0 00 F1 BTST.B #1, @H'F000 ; refs H'F000 in program_or_external; cycles=7
+3A35: 15 F0 01 06 A0 MOV:G.B #H'A0, @H'F001 ; refs mem_F001 in program_or_external; cycles=9
+3A3A: 15 F0 00 F1 BTST.B #1, @H'F000 ; refs mem_F000 in program_or_external; cycles=7
3A3E: 37 00 85 BEQ loc_3AC6 ; cycles=3/7 nt/t
-3A41: 15 F7 1F 80 MOV:G.B @H'F71F, R0 ; refs H'F71F in on_chip_ram; cycles=6
-3A45: 15 F7 23 40 OR.B @H'F723, R0 ; refs H'F723 in on_chip_ram; cycles=6
-3A49: 15 F7 17 50 AND.B @H'F717, R0 ; refs H'F717 in on_chip_ram; cycles=6
-3A4D: 15 F0 02 90 MOV:G.B R0, @H'F002 ; refs H'F002 in program_or_external; cycles=6
-3A51: 15 F7 1E 80 MOV:G.B @H'F71E, R0 ; refs H'F71E in on_chip_ram; cycles=6
-3A55: 15 F7 23 40 OR.B @H'F723, R0 ; refs H'F723 in on_chip_ram; cycles=6
-3A59: 15 F7 16 50 AND.B @H'F716, R0 ; refs H'F716 in on_chip_ram; cycles=6
-3A5D: 15 F0 03 90 MOV:G.B R0, @H'F003 ; refs H'F003 in program_or_external; cycles=6
-3A61: 15 F7 1D 80 MOV:G.B @H'F71D, R0 ; refs H'F71D in on_chip_ram; cycles=6
-3A65: 15 F7 23 40 OR.B @H'F723, R0 ; refs H'F723 in on_chip_ram; cycles=6
-3A69: 15 F7 15 50 AND.B @H'F715, R0 ; refs H'F715 in on_chip_ram; cycles=6
-3A6D: 15 F0 04 90 MOV:G.B R0, @H'F004 ; refs H'F004 in program_or_external; cycles=6
-3A71: 15 F7 1C 80 MOV:G.B @H'F71C, R0 ; refs H'F71C in on_chip_ram; cycles=6
-3A75: 15 F7 23 40 OR.B @H'F723, R0 ; refs H'F723 in on_chip_ram; cycles=6
-3A79: 15 F7 14 50 AND.B @H'F714, R0 ; refs H'F714 in on_chip_ram; cycles=6
-3A7D: 15 F0 05 90 MOV:G.B R0, @H'F005 ; refs H'F005 in program_or_external; cycles=6
-3A81: 15 F7 08 80 MOV:G.B @H'F708, R0 ; refs H'F708 in on_chip_ram; cycles=6
-3A85: 15 F0 09 90 MOV:G.B R0, @H'F009 ; refs H'F009 in program_or_external; cycles=6
-3A89: 15 F7 09 80 MOV:G.B @H'F709, R0 ; refs H'F709 in on_chip_ram; cycles=6
-3A8D: 15 F0 0A 90 MOV:G.B R0, @H'F00A ; refs H'F00A in program_or_external; cycles=6
-3A91: 15 F7 0A 80 MOV:G.B @H'F70A, R0 ; refs H'F70A in on_chip_ram; cycles=6
-3A95: 15 F0 0B 90 MOV:G.B R0, @H'F00B ; refs H'F00B in program_or_external; cycles=6
-3A99: 15 F7 0B 80 MOV:G.B @H'F70B, R0 ; refs H'F70B in on_chip_ram; cycles=6
-3A9D: 15 F0 0C 90 MOV:G.B R0, @H'F00C ; refs H'F00C in program_or_external; cycles=6
-3AA1: 15 F7 06 80 MOV:G.B @H'F706, R0 ; refs H'F706 in on_chip_ram; cycles=6
-3AA5: 15 F0 0D 90 MOV:G.B R0, @H'F00D ; refs H'F00D in program_or_external; cycles=6
-3AA9: 15 F7 07 80 MOV:G.B @H'F707, R0 ; refs H'F707 in on_chip_ram; cycles=6
-3AAD: 15 F0 0E 90 MOV:G.B R0, @H'F00E ; refs H'F00E in program_or_external; cycles=6
+3A41: 15 F7 1F 80 MOV:G.B @H'F71F, R0 ; refs ram_F71F in on_chip_ram; cycles=6
+3A45: 15 F7 23 40 OR.B @H'F723, R0 ; refs ram_F723 in on_chip_ram; cycles=6
+3A49: 15 F7 17 50 AND.B @H'F717, R0 ; refs ram_F717 in on_chip_ram; cycles=6
+3A4D: 15 F0 02 90 MOV:G.B R0, @H'F002 ; refs mem_F002 in program_or_external; cycles=6
+3A51: 15 F7 1E 80 MOV:G.B @H'F71E, R0 ; refs ram_F71E in on_chip_ram; cycles=6
+3A55: 15 F7 23 40 OR.B @H'F723, R0 ; refs ram_F723 in on_chip_ram; cycles=6
+3A59: 15 F7 16 50 AND.B @H'F716, R0 ; refs ram_F716 in on_chip_ram; cycles=6
+3A5D: 15 F0 03 90 MOV:G.B R0, @H'F003 ; refs mem_F003 in program_or_external; cycles=6
+3A61: 15 F7 1D 80 MOV:G.B @H'F71D, R0 ; refs ram_F71D in on_chip_ram; cycles=6
+3A65: 15 F7 23 40 OR.B @H'F723, R0 ; refs ram_F723 in on_chip_ram; cycles=6
+3A69: 15 F7 15 50 AND.B @H'F715, R0 ; refs ram_F715 in on_chip_ram; cycles=6
+3A6D: 15 F0 04 90 MOV:G.B R0, @H'F004 ; refs mem_F004 in program_or_external; cycles=6
+3A71: 15 F7 1C 80 MOV:G.B @H'F71C, R0 ; refs ram_F71C in on_chip_ram; cycles=6
+3A75: 15 F7 23 40 OR.B @H'F723, R0 ; refs ram_F723 in on_chip_ram; cycles=6
+3A79: 15 F7 14 50 AND.B @H'F714, R0 ; refs ram_F714 in on_chip_ram; cycles=6
+3A7D: 15 F0 05 90 MOV:G.B R0, @H'F005 ; refs mem_F005 in program_or_external; cycles=6
+3A81: 15 F7 08 80 MOV:G.B @H'F708, R0 ; refs ram_F708 in on_chip_ram; cycles=6
+3A85: 15 F0 09 90 MOV:G.B R0, @H'F009 ; refs mem_F009 in program_or_external; cycles=6
+3A89: 15 F7 09 80 MOV:G.B @H'F709, R0 ; refs ram_F709 in on_chip_ram; cycles=6
+3A8D: 15 F0 0A 90 MOV:G.B R0, @H'F00A ; refs mem_F00A in program_or_external; cycles=6
+3A91: 15 F7 0A 80 MOV:G.B @H'F70A, R0 ; refs ram_F70A in on_chip_ram; cycles=6
+3A95: 15 F0 0B 90 MOV:G.B R0, @H'F00B ; refs mem_F00B in program_or_external; cycles=6
+3A99: 15 F7 0B 80 MOV:G.B @H'F70B, R0 ; refs ram_F70B in on_chip_ram; cycles=6
+3A9D: 15 F0 0C 90 MOV:G.B R0, @H'F00C ; refs mem_F00C in program_or_external; cycles=6
+3AA1: 15 F7 06 80 MOV:G.B @H'F706, R0 ; refs ram_F706 in on_chip_ram; cycles=6
+3AA5: 15 F0 0D 90 MOV:G.B R0, @H'F00D ; refs mem_F00D in program_or_external; cycles=6
+3AA9: 15 F7 07 80 MOV:G.B @H'F707, R0 ; refs ram_F707 in on_chip_ram; cycles=6
+3AAD: 15 F0 0E 90 MOV:G.B R0, @H'F00E ; refs mem_F00E in program_or_external; cycles=6
3AB1: 15 FE 8E 80 MOV:G.B @P7DR, R0 ; refs P7DR in register_field; cycles=6
3AB5: A0 15 NOT.B R0 ; cycles=2
3AB7: 04 03 50 AND.B #H'03, R0 ; cycles=3
3ABA: 04 A0 40 OR.B #H'A0, R0 ; cycles=3
-3ABD: 15 F0 0F 90 MOV:G.B R0, @H'F00F ; refs H'F00F in program_or_external; cycles=6
-3AC1: 15 F7 21 06 03 MOV:G.B #H'03, @H'F721 ; refs H'F721 in on_chip_ram; cycles=9
+3ABD: 15 F0 0F 90 MOV:G.B R0, @H'F00F ; refs mem_F00F in program_or_external; cycles=6
+3AC1: 15 F7 21 06 03 MOV:G.B #H'03, @H'F721 ; refs ram_F721 in on_chip_ram; cycles=9
loc_3AC6:
3AC6: 19 RTS ; cycles=12
vec_irq4_3AC7:
3AC7: BF 90 MOV:G.W R0, @-R7 ; cycles=5
-3AC9: 15 F1 00 F1 BTST.B #1, @H'F100 ; refs H'F100 in program_or_external; cycles=6
+3AC9: 15 F1 00 F1 BTST.B #1, @H'F100 ; refs mem_F100 in program_or_external; cycles=6
3ACD: 36 01 5D BNE loc_3C2D ; cycles=3/8 nt/t
-3AD0: 15 F1 0F 80 MOV:G.B @H'F10F, R0 ; refs H'F10F in program_or_external; cycles=7
+3AD0: 15 F1 0F 80 MOV:G.B @H'F10F, R0 ; refs mem_F10F in program_or_external; cycles=7
3AD4: 40 A9 CMP:E #H'A9, R0 ; cycles=2
3AD6: 27 08 BEQ loc_3AE0 ; cycles=3/7 nt/t
3AD8: 40 A8 CMP:E #H'A8, R0 ; cycles=2
@@ -1557,132 +1640,132 @@ vec_irq4_3AC7:
3ADD: 30 01 4D BRA loc_3C2D ; cycles=8
loc_3AE0:
-3AE0: 15 F6 F0 80 MOV:G.B @H'F6F0, R0 ; refs H'F6F0 in on_chip_ram; cycles=7
+3AE0: 15 F6 F0 80 MOV:G.B @H'F6F0, R0 ; refs ram_F6F0 in on_chip_ram; cycles=7
3AE4: 04 C0 50 AND.B #H'C0, R0 ; cycles=3
-3AE7: 15 F6 F0 90 MOV:G.B R0, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=6
-3AEB: 1D F1 0C 80 MOV:G.W @H'F10C, R0 ; refs H'F10C in program_or_external; cycles=6
-3AEF: 1D F6 9A 70 CMP:G.W @H'F69A, R0 ; refs H'F69A in on_chip_ram; cycles=6
+3AE7: 15 F6 F0 90 MOV:G.B R0, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=6
+3AEB: 1D F1 0C 80 MOV:G.W @H'F10C, R0 ; refs mem_F10C in program_or_external; cycles=6
+3AEF: 1D F6 9A 70 CMP:G.W @H'F69A, R0 ; refs ram_F69A in on_chip_ram; cycles=6
3AF3: 27 08 BEQ loc_3AFD ; cycles=3/8 nt/t
-3AF5: 15 F6 F0 C5 BSET.B #5, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=8
-3AF9: 1D F6 9A 90 MOV:G.W R0, @H'F69A ; refs H'F69A in on_chip_ram; cycles=6
+3AF5: 15 F6 F0 C5 BSET.B #5, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=8
+3AF9: 1D F6 9A 90 MOV:G.W R0, @H'F69A ; refs ram_F69A in on_chip_ram; cycles=6
loc_3AFD:
-3AFD: 1D F1 0A 80 MOV:G.W @H'F10A, R0 ; refs H'F10A in program_or_external; cycles=6
-3B01: 1D F6 98 70 CMP:G.W @H'F698, R0 ; refs H'F698 in on_chip_ram; cycles=6
+3AFD: 1D F1 0A 80 MOV:G.W @H'F10A, R0 ; refs mem_F10A in program_or_external; cycles=6
+3B01: 1D F6 98 70 CMP:G.W @H'F698, R0 ; refs ram_F698 in on_chip_ram; cycles=6
3B05: 27 08 BEQ loc_3B0F ; cycles=3/8 nt/t
-3B07: 15 F6 F0 C4 BSET.B #4, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=8
-3B0B: 1D F6 98 90 MOV:G.W R0, @H'F698 ; refs H'F698 in on_chip_ram; cycles=6
+3B07: 15 F6 F0 C4 BSET.B #4, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=8
+3B0B: 1D F6 98 90 MOV:G.W R0, @H'F698 ; refs ram_F698 in on_chip_ram; cycles=6
loc_3B0F:
-3B0F: 1D F1 08 80 MOV:G.W @H'F108, R0 ; refs H'F108 in program_or_external; cycles=6
-3B13: 1D F6 96 70 CMP:G.W @H'F696, R0 ; refs H'F696 in on_chip_ram; cycles=6
+3B0F: 1D F1 08 80 MOV:G.W @H'F108, R0 ; refs mem_F108 in program_or_external; cycles=6
+3B13: 1D F6 96 70 CMP:G.W @H'F696, R0 ; refs ram_F696 in on_chip_ram; cycles=6
3B17: 27 08 BEQ loc_3B21 ; cycles=3/8 nt/t
-3B19: 15 F6 F0 C3 BSET.B #3, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=8
-3B1D: 1D F6 96 90 MOV:G.W R0, @H'F696 ; refs H'F696 in on_chip_ram; cycles=6
+3B19: 15 F6 F0 C3 BSET.B #3, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=8
+3B1D: 1D F6 96 90 MOV:G.W R0, @H'F696 ; refs ram_F696 in on_chip_ram; cycles=6
loc_3B21:
-3B21: 1D F1 06 80 MOV:G.W @H'F106, R0 ; refs H'F106 in program_or_external; cycles=6
-3B25: 1D F6 94 70 CMP:G.W @H'F694, R0 ; refs H'F694 in on_chip_ram; cycles=6
+3B21: 1D F1 06 80 MOV:G.W @H'F106, R0 ; refs mem_F106 in program_or_external; cycles=6
+3B25: 1D F6 94 70 CMP:G.W @H'F694, R0 ; refs ram_F694 in on_chip_ram; cycles=6
3B29: 27 08 BEQ loc_3B33 ; cycles=3/8 nt/t
-3B2B: 15 F6 F0 C2 BSET.B #2, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=8
-3B2F: 1D F6 94 90 MOV:G.W R0, @H'F694 ; refs H'F694 in on_chip_ram; cycles=6
+3B2B: 15 F6 F0 C2 BSET.B #2, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=8
+3B2F: 1D F6 94 90 MOV:G.W R0, @H'F694 ; refs ram_F694 in on_chip_ram; cycles=6
loc_3B33:
-3B33: 1D F1 04 80 MOV:G.W @H'F104, R0 ; refs H'F104 in program_or_external; cycles=6
-3B37: 1D F6 92 70 CMP:G.W @H'F692, R0 ; refs H'F692 in on_chip_ram; cycles=6
+3B33: 1D F1 04 80 MOV:G.W @H'F104, R0 ; refs mem_F104 in program_or_external; cycles=6
+3B37: 1D F6 92 70 CMP:G.W @H'F692, R0 ; refs ram_F692 in on_chip_ram; cycles=6
3B3B: 27 08 BEQ loc_3B45 ; cycles=3/8 nt/t
-3B3D: 15 F6 F0 C1 BSET.B #1, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=8
-3B41: 1D F6 92 90 MOV:G.W R0, @H'F692 ; refs H'F692 in on_chip_ram; cycles=6
+3B3D: 15 F6 F0 C1 BSET.B #1, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=8
+3B41: 1D F6 92 90 MOV:G.W R0, @H'F692 ; refs ram_F692 in on_chip_ram; cycles=6
loc_3B45:
-3B45: 1D F1 02 80 MOV:G.W @H'F102, R0 ; refs H'F102 in program_or_external; cycles=6
-3B49: 1D F6 90 70 CMP:G.W @H'F690, R0 ; refs H'F690 in on_chip_ram; cycles=6
+3B45: 1D F1 02 80 MOV:G.W @H'F102, R0 ; refs mem_F102 in program_or_external; cycles=6
+3B49: 1D F6 90 70 CMP:G.W @H'F690, R0 ; refs ram_F690 in on_chip_ram; cycles=6
3B4D: 27 08 BEQ loc_3B57 ; cycles=3/8 nt/t
-3B4F: 15 F6 F0 C0 BSET.B #0, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=8
-3B53: 1D F6 90 90 MOV:G.W R0, @H'F690 ; refs H'F690 in on_chip_ram; cycles=6
+3B4F: 15 F6 F0 C0 BSET.B #0, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=8
+3B53: 1D F6 90 90 MOV:G.W R0, @H'F690 ; refs ram_F690 in on_chip_ram; cycles=6
loc_3B57:
-3B57: 15 F1 01 80 MOV:G.B @H'F101, R0 ; refs H'F101 in program_or_external; cycles=6
-3B5B: 15 F7 20 D0 BCLR.B #0, @H'F720 ; refs H'F720 in on_chip_ram; cycles=8
+3B57: 15 F1 01 80 MOV:G.B @H'F101, R0 ; refs mem_F101 in program_or_external; cycles=6
+3B5B: 15 F7 20 D0 BCLR.B #0, @H'F720 ; refs ram_F720 in on_chip_ram; cycles=8
3B5F: 30 00 CB BRA loc_3C2D ; cycles=8
loc_3B62:
-3B62: 15 F6 F0 80 MOV:G.B @H'F6F0, R0 ; refs H'F6F0 in on_chip_ram; cycles=7
+3B62: 15 F6 F0 80 MOV:G.B @H'F6F0, R0 ; refs ram_F6F0 in on_chip_ram; cycles=7
3B66: 04 3F 50 AND.B #H'3F, R0 ; cycles=3
-3B69: 15 F6 F0 90 MOV:G.B R0, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=6
-3B6D: 15 F6 F2 13 CLR.B @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=8
-3B71: 1D F1 0C 80 MOV:G.W @H'F10C, R0 ; refs H'F10C in program_or_external; cycles=6
-3B75: 1D F6 9E 70 CMP:G.W @H'F69E, R0 ; refs H'F69E in on_chip_ram; cycles=6
+3B69: 15 F6 F0 90 MOV:G.B R0, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=6
+3B6D: 15 F6 F2 13 CLR.B @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=8
+3B71: 1D F1 0C 80 MOV:G.W @H'F10C, R0 ; refs mem_F10C in program_or_external; cycles=6
+3B75: 1D F6 9E 70 CMP:G.W @H'F69E, R0 ; refs ram_F69E in on_chip_ram; cycles=6
3B79: 27 08 BEQ loc_3B83 ; cycles=3/8 nt/t
-3B7B: 15 F6 F0 C7 BSET.B #7, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=8
-3B7F: 1D F6 9E 90 MOV:G.W R0, @H'F69E ; refs H'F69E in on_chip_ram; cycles=6
+3B7B: 15 F6 F0 C7 BSET.B #7, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=8
+3B7F: 1D F6 9E 90 MOV:G.W R0, @H'F69E ; refs ram_F69E in on_chip_ram; cycles=6
loc_3B83:
-3B83: 1D F1 0A 80 MOV:G.W @H'F10A, R0 ; refs H'F10A in program_or_external; cycles=6
-3B87: 1D F6 9C 70 CMP:G.W @H'F69C, R0 ; refs H'F69C in on_chip_ram; cycles=6
+3B83: 1D F1 0A 80 MOV:G.W @H'F10A, R0 ; refs mem_F10A in program_or_external; cycles=6
+3B87: 1D F6 9C 70 CMP:G.W @H'F69C, R0 ; refs ram_F69C in on_chip_ram; cycles=6
3B8B: 27 08 BEQ loc_3B95 ; cycles=3/8 nt/t
-3B8D: 15 F6 F0 C6 BSET.B #6, @H'F6F0 ; refs H'F6F0 in on_chip_ram; cycles=8
-3B91: 1D F6 9C 90 MOV:G.W R0, @H'F69C ; refs H'F69C in on_chip_ram; cycles=6
+3B8D: 15 F6 F0 C6 BSET.B #6, @H'F6F0 ; refs ram_F6F0 in on_chip_ram; cycles=8
+3B91: 1D F6 9C 90 MOV:G.W R0, @H'F69C ; refs ram_F69C in on_chip_ram; cycles=6
loc_3B95:
-3B95: 15 F1 09 80 MOV:G.B @H'F109, R0 ; refs H'F109 in program_or_external; cycles=6
-3B99: 15 F6 D0 70 CMP:G.B @H'F6D0, R0 ; refs H'F6D0 in on_chip_ram; cycles=6
+3B95: 15 F1 09 80 MOV:G.B @H'F109, R0 ; refs mem_F109 in program_or_external; cycles=6
+3B99: 15 F6 D0 70 CMP:G.B @H'F6D0, R0 ; refs ram_F6D0 in on_chip_ram; cycles=6
3B9D: 27 08 BEQ loc_3BA7 ; cycles=3/8 nt/t
-3B9F: 15 F6 F2 C0 BSET.B #0, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=8
-3BA3: 15 F6 D0 90 MOV:G.B R0, @H'F6D0 ; refs H'F6D0 in on_chip_ram; cycles=6
+3B9F: 15 F6 F2 C0 BSET.B #0, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=8
+3BA3: 15 F6 D0 90 MOV:G.B R0, @H'F6D0 ; refs ram_F6D0 in on_chip_ram; cycles=6
loc_3BA7:
-3BA7: 15 F1 08 80 MOV:G.B @H'F108, R0 ; refs H'F108 in program_or_external; cycles=6
-3BAB: 15 F6 D1 70 CMP:G.B @H'F6D1, R0 ; refs H'F6D1 in on_chip_ram; cycles=6
+3BA7: 15 F1 08 80 MOV:G.B @H'F108, R0 ; refs mem_F108 in program_or_external; cycles=6
+3BAB: 15 F6 D1 70 CMP:G.B @H'F6D1, R0 ; refs ram_F6D1 in on_chip_ram; cycles=6
3BAF: 27 08 BEQ loc_3BB9 ; cycles=3/8 nt/t
-3BB1: 15 F6 F2 C1 BSET.B #1, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=8
-3BB5: 15 F6 D1 90 MOV:G.B R0, @H'F6D1 ; refs H'F6D1 in on_chip_ram; cycles=6
+3BB1: 15 F6 F2 C1 BSET.B #1, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=8
+3BB5: 15 F6 D1 90 MOV:G.B R0, @H'F6D1 ; refs ram_F6D1 in on_chip_ram; cycles=6
loc_3BB9:
-3BB9: 15 F1 07 80 MOV:G.B @H'F107, R0 ; refs H'F107 in program_or_external; cycles=6
-3BBD: 15 F6 D2 70 CMP:G.B @H'F6D2, R0 ; refs H'F6D2 in on_chip_ram; cycles=6
+3BB9: 15 F1 07 80 MOV:G.B @H'F107, R0 ; refs mem_F107 in program_or_external; cycles=6
+3BBD: 15 F6 D2 70 CMP:G.B @H'F6D2, R0 ; refs ram_F6D2 in on_chip_ram; cycles=6
3BC1: 27 08 BEQ loc_3BCB ; cycles=3/8 nt/t
-3BC3: 15 F6 F2 C2 BSET.B #2, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=8
-3BC7: 15 F6 D2 90 MOV:G.B R0, @H'F6D2 ; refs H'F6D2 in on_chip_ram; cycles=6
+3BC3: 15 F6 F2 C2 BSET.B #2, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=8
+3BC7: 15 F6 D2 90 MOV:G.B R0, @H'F6D2 ; refs ram_F6D2 in on_chip_ram; cycles=6
loc_3BCB:
-3BCB: 15 F1 06 80 MOV:G.B @H'F106, R0 ; refs H'F106 in program_or_external; cycles=6
-3BCF: 15 F6 D3 70 CMP:G.B @H'F6D3, R0 ; refs H'F6D3 in on_chip_ram; cycles=6
+3BCB: 15 F1 06 80 MOV:G.B @H'F106, R0 ; refs mem_F106 in program_or_external; cycles=6
+3BCF: 15 F6 D3 70 CMP:G.B @H'F6D3, R0 ; refs ram_F6D3 in on_chip_ram; cycles=6
3BD3: 27 08 BEQ loc_3BDD ; cycles=3/8 nt/t
-3BD5: 15 F6 F2 C3 BSET.B #3, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=8
-3BD9: 15 F6 D3 90 MOV:G.B R0, @H'F6D3 ; refs H'F6D3 in on_chip_ram; cycles=6
+3BD5: 15 F6 F2 C3 BSET.B #3, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=8
+3BD9: 15 F6 D3 90 MOV:G.B R0, @H'F6D3 ; refs ram_F6D3 in on_chip_ram; cycles=6
loc_3BDD:
-3BDD: 15 F1 05 80 MOV:G.B @H'F105, R0 ; refs H'F105 in program_or_external; cycles=6
-3BE1: 15 F6 D4 70 CMP:G.B @H'F6D4, R0 ; refs H'F6D4 in on_chip_ram; cycles=6
+3BDD: 15 F1 05 80 MOV:G.B @H'F105, R0 ; refs mem_F105 in program_or_external; cycles=6
+3BE1: 15 F6 D4 70 CMP:G.B @H'F6D4, R0 ; refs ram_F6D4 in on_chip_ram; cycles=6
3BE5: 27 08 BEQ loc_3BEF ; cycles=3/8 nt/t
-3BE7: 15 F6 F2 C4 BSET.B #4, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=8
-3BEB: 15 F6 D4 90 MOV:G.B R0, @H'F6D4 ; refs H'F6D4 in on_chip_ram; cycles=6
+3BE7: 15 F6 F2 C4 BSET.B #4, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=8
+3BEB: 15 F6 D4 90 MOV:G.B R0, @H'F6D4 ; refs ram_F6D4 in on_chip_ram; cycles=6
loc_3BEF:
-3BEF: 15 F1 04 80 MOV:G.B @H'F104, R0 ; refs H'F104 in program_or_external; cycles=6
-3BF3: 15 F6 D5 70 CMP:G.B @H'F6D5, R0 ; refs H'F6D5 in on_chip_ram; cycles=6
+3BEF: 15 F1 04 80 MOV:G.B @H'F104, R0 ; refs mem_F104 in program_or_external; cycles=6
+3BF3: 15 F6 D5 70 CMP:G.B @H'F6D5, R0 ; refs ram_F6D5 in on_chip_ram; cycles=6
3BF7: 27 08 BEQ loc_3C01 ; cycles=3/8 nt/t
-3BF9: 15 F6 F2 C5 BSET.B #5, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=8
-3BFD: 15 F6 D5 90 MOV:G.B R0, @H'F6D5 ; refs H'F6D5 in on_chip_ram; cycles=6
+3BF9: 15 F6 F2 C5 BSET.B #5, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=8
+3BFD: 15 F6 D5 90 MOV:G.B R0, @H'F6D5 ; refs ram_F6D5 in on_chip_ram; cycles=6
loc_3C01:
-3C01: 15 F1 03 80 MOV:G.B @H'F103, R0 ; refs H'F103 in program_or_external; cycles=6
-3C05: 15 F6 D6 70 CMP:G.B @H'F6D6, R0 ; refs H'F6D6 in on_chip_ram; cycles=6
+3C01: 15 F1 03 80 MOV:G.B @H'F103, R0 ; refs mem_F103 in program_or_external; cycles=6
+3C05: 15 F6 D6 70 CMP:G.B @H'F6D6, R0 ; refs ram_F6D6 in on_chip_ram; cycles=6
3C09: 27 08 BEQ loc_3C13 ; cycles=3/8 nt/t
-3C0B: 15 F6 F2 C6 BSET.B #6, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=8
-3C0F: 15 F6 D6 90 MOV:G.B R0, @H'F6D6 ; refs H'F6D6 in on_chip_ram; cycles=6
+3C0B: 15 F6 F2 C6 BSET.B #6, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=8
+3C0F: 15 F6 D6 90 MOV:G.B R0, @H'F6D6 ; refs ram_F6D6 in on_chip_ram; cycles=6
loc_3C13:
-3C13: 15 F1 02 80 MOV:G.B @H'F102, R0 ; refs H'F102 in program_or_external; cycles=6
-3C17: 15 F6 D7 70 CMP:G.B @H'F6D7, R0 ; refs H'F6D7 in on_chip_ram; cycles=6
+3C13: 15 F1 02 80 MOV:G.B @H'F102, R0 ; refs mem_F102 in program_or_external; cycles=6
+3C17: 15 F6 D7 70 CMP:G.B @H'F6D7, R0 ; refs ram_F6D7 in on_chip_ram; cycles=6
3C1B: 27 08 BEQ loc_3C25 ; cycles=3/8 nt/t
-3C1D: 15 F6 F2 C7 BSET.B #7, @H'F6F2 ; refs H'F6F2 in on_chip_ram; cycles=8
-3C21: 15 F6 D7 90 MOV:G.B R0, @H'F6D7 ; refs H'F6D7 in on_chip_ram; cycles=6
+3C1D: 15 F6 F2 C7 BSET.B #7, @H'F6F2 ; refs ram_F6F2 in on_chip_ram; cycles=8
+3C21: 15 F6 D7 90 MOV:G.B R0, @H'F6D7 ; refs ram_F6D7 in on_chip_ram; cycles=6
loc_3C25:
-3C25: 15 F1 01 80 MOV:G.B @H'F101, R0 ; refs H'F101 in program_or_external; cycles=6
-3C29: 15 F7 20 D1 BCLR.B #1, @H'F720 ; refs H'F720 in on_chip_ram; cycles=8
+3C25: 15 F1 01 80 MOV:G.B @H'F101, R0 ; refs mem_F101 in program_or_external; cycles=6
+3C29: 15 F7 20 D1 BCLR.B #1, @H'F720 ; refs ram_F720 in on_chip_ram; cycles=8
loc_3C2D:
3C2D: CF 80 MOV:G.W @R7+, R0 ; cycles=6
@@ -1690,9 +1773,9 @@ loc_3C2D:
vec_irq3_3C30:
3C30: BF 90 MOV:G.W R0, @-R7 ; cycles=6
-3C32: 15 F0 00 F1 BTST.B #1, @H'F000 ; refs H'F000 in program_or_external; cycles=7
+3C32: 15 F0 00 F1 BTST.B #1, @H'F000 ; refs mem_F000 in program_or_external; cycles=7
3C36: 36 01 5D BNE loc_3D96 ; cycles=3/7 nt/t
-3C39: 15 F0 0F 80 MOV:G.B @H'F00F, R0 ; refs H'F00F in program_or_external; cycles=6
+3C39: 15 F0 0F 80 MOV:G.B @H'F00F, R0 ; refs mem_F00F in program_or_external; cycles=6
3C3D: 40 A9 CMP:E #H'A9, R0 ; cycles=2
3C3F: 27 08 BEQ loc_3C49 ; cycles=3/8 nt/t
3C41: 40 A8 CMP:E #H'A8, R0 ; cycles=2
@@ -1700,132 +1783,132 @@ vec_irq3_3C30:
3C46: 30 01 4D BRA loc_3D96 ; cycles=7
loc_3C49:
-3C49: 15 F6 F1 80 MOV:G.B @H'F6F1, R0 ; refs H'F6F1 in on_chip_ram; cycles=6
+3C49: 15 F6 F1 80 MOV:G.B @H'F6F1, R0 ; refs ram_F6F1 in on_chip_ram; cycles=6
3C4D: 04 C0 50 AND.B #H'C0, R0 ; cycles=3
-3C50: 15 F6 F1 90 MOV:G.B R0, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=7
-3C54: 1D F0 0C 80 MOV:G.W @H'F00C, R0 ; refs H'F00C in program_or_external; cycles=7
-3C58: 1D F6 AA 70 CMP:G.W @H'F6AA, R0 ; refs H'F6AA in on_chip_ram; cycles=7
+3C50: 15 F6 F1 90 MOV:G.B R0, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=7
+3C54: 1D F0 0C 80 MOV:G.W @H'F00C, R0 ; refs mem_F00C in program_or_external; cycles=7
+3C58: 1D F6 AA 70 CMP:G.W @H'F6AA, R0 ; refs ram_F6AA in on_chip_ram; cycles=7
3C5C: 27 08 BEQ loc_3C66 ; cycles=3/7 nt/t
-3C5E: 15 F6 F1 C5 BSET.B #5, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=9
-3C62: 1D F6 AA 90 MOV:G.W R0, @H'F6AA ; refs H'F6AA in on_chip_ram; cycles=7
+3C5E: 15 F6 F1 C5 BSET.B #5, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=9
+3C62: 1D F6 AA 90 MOV:G.W R0, @H'F6AA ; refs ram_F6AA in on_chip_ram; cycles=7
loc_3C66:
-3C66: 1D F0 0A 80 MOV:G.W @H'F00A, R0 ; refs H'F00A in program_or_external; cycles=7
-3C6A: 1D F6 A8 70 CMP:G.W @H'F6A8, R0 ; refs H'F6A8 in on_chip_ram; cycles=7
+3C66: 1D F0 0A 80 MOV:G.W @H'F00A, R0 ; refs mem_F00A in program_or_external; cycles=7
+3C6A: 1D F6 A8 70 CMP:G.W @H'F6A8, R0 ; refs ram_F6A8 in on_chip_ram; cycles=7
3C6E: 27 08 BEQ loc_3C78 ; cycles=3/7 nt/t
-3C70: 15 F6 F1 C4 BSET.B #4, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=9
-3C74: 1D F6 A8 90 MOV:G.W R0, @H'F6A8 ; refs H'F6A8 in on_chip_ram; cycles=7
+3C70: 15 F6 F1 C4 BSET.B #4, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=9
+3C74: 1D F6 A8 90 MOV:G.W R0, @H'F6A8 ; refs ram_F6A8 in on_chip_ram; cycles=7
loc_3C78:
-3C78: 1D F0 08 80 MOV:G.W @H'F008, R0 ; refs H'F008 in program_or_external; cycles=7
-3C7C: 1D F6 A6 70 CMP:G.W @H'F6A6, R0 ; refs H'F6A6 in on_chip_ram; cycles=7
+3C78: 1D F0 08 80 MOV:G.W @H'F008, R0 ; refs mem_F008 in program_or_external; cycles=7
+3C7C: 1D F6 A6 70 CMP:G.W @H'F6A6, R0 ; refs ram_F6A6 in on_chip_ram; cycles=7
3C80: 27 08 BEQ loc_3C8A ; cycles=3/7 nt/t
-3C82: 15 F6 F1 C3 BSET.B #3, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=9
-3C86: 1D F6 A6 90 MOV:G.W R0, @H'F6A6 ; refs H'F6A6 in on_chip_ram; cycles=7
+3C82: 15 F6 F1 C3 BSET.B #3, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=9
+3C86: 1D F6 A6 90 MOV:G.W R0, @H'F6A6 ; refs ram_F6A6 in on_chip_ram; cycles=7
loc_3C8A:
-3C8A: 1D F0 06 80 MOV:G.W @H'F006, R0 ; refs H'F006 in program_or_external; cycles=7
-3C8E: 1D F6 A4 70 CMP:G.W @H'F6A4, R0 ; refs H'F6A4 in on_chip_ram; cycles=7
+3C8A: 1D F0 06 80 MOV:G.W @H'F006, R0 ; refs mem_F006 in program_or_external; cycles=7
+3C8E: 1D F6 A4 70 CMP:G.W @H'F6A4, R0 ; refs ram_F6A4 in on_chip_ram; cycles=7
3C92: 27 08 BEQ loc_3C9C ; cycles=3/7 nt/t
-3C94: 15 F6 F1 C2 BSET.B #2, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=9
-3C98: 1D F6 A4 90 MOV:G.W R0, @H'F6A4 ; refs H'F6A4 in on_chip_ram; cycles=7
+3C94: 15 F6 F1 C2 BSET.B #2, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=9
+3C98: 1D F6 A4 90 MOV:G.W R0, @H'F6A4 ; refs ram_F6A4 in on_chip_ram; cycles=7
loc_3C9C:
-3C9C: 1D F0 04 80 MOV:G.W @H'F004, R0 ; refs H'F004 in program_or_external; cycles=7
-3CA0: 1D F6 A2 70 CMP:G.W @H'F6A2, R0 ; refs H'F6A2 in on_chip_ram; cycles=7
+3C9C: 1D F0 04 80 MOV:G.W @H'F004, R0 ; refs mem_F004 in program_or_external; cycles=7
+3CA0: 1D F6 A2 70 CMP:G.W @H'F6A2, R0 ; refs ram_F6A2 in on_chip_ram; cycles=7
3CA4: 27 08 BEQ loc_3CAE ; cycles=3/7 nt/t
-3CA6: 15 F6 F1 C1 BSET.B #1, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=9
-3CAA: 1D F6 A2 90 MOV:G.W R0, @H'F6A2 ; refs H'F6A2 in on_chip_ram; cycles=7
+3CA6: 15 F6 F1 C1 BSET.B #1, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=9
+3CAA: 1D F6 A2 90 MOV:G.W R0, @H'F6A2 ; refs ram_F6A2 in on_chip_ram; cycles=7
loc_3CAE:
-3CAE: 1D F0 02 80 MOV:G.W @H'F002, R0 ; refs H'F002 in program_or_external; cycles=7
-3CB2: 1D F6 A0 70 CMP:G.W @H'F6A0, R0 ; refs H'F6A0 in on_chip_ram; cycles=7
+3CAE: 1D F0 02 80 MOV:G.W @H'F002, R0 ; refs mem_F002 in program_or_external; cycles=7
+3CB2: 1D F6 A0 70 CMP:G.W @H'F6A0, R0 ; refs ram_F6A0 in on_chip_ram; cycles=7
3CB6: 27 08 BEQ loc_3CC0 ; cycles=3/7 nt/t
-3CB8: 15 F6 F1 C0 BSET.B #0, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=9
-3CBC: 1D F6 A0 90 MOV:G.W R0, @H'F6A0 ; refs H'F6A0 in on_chip_ram; cycles=7
+3CB8: 15 F6 F1 C0 BSET.B #0, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=9
+3CBC: 1D F6 A0 90 MOV:G.W R0, @H'F6A0 ; refs ram_F6A0 in on_chip_ram; cycles=7
loc_3CC0:
-3CC0: 15 F0 01 80 MOV:G.B @H'F001, R0 ; refs H'F001 in program_or_external; cycles=7
-3CC4: 15 F7 21 D0 BCLR.B #0, @H'F721 ; refs H'F721 in on_chip_ram; cycles=9
+3CC0: 15 F0 01 80 MOV:G.B @H'F001, R0 ; refs mem_F001 in program_or_external; cycles=7
+3CC4: 15 F7 21 D0 BCLR.B #0, @H'F721 ; refs ram_F721 in on_chip_ram; cycles=9
3CC8: 30 00 CB BRA loc_3D96 ; cycles=7
loc_3CCB:
-3CCB: 15 F6 F1 80 MOV:G.B @H'F6F1, R0 ; refs H'F6F1 in on_chip_ram; cycles=6
+3CCB: 15 F6 F1 80 MOV:G.B @H'F6F1, R0 ; refs ram_F6F1 in on_chip_ram; cycles=6
3CCF: 04 3F 50 AND.B #H'3F, R0 ; cycles=3
-3CD2: 15 F6 F1 90 MOV:G.B R0, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=7
-3CD6: 15 F6 F3 13 CLR.B @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
-3CDA: 1D F0 0C 80 MOV:G.W @H'F00C, R0 ; refs H'F00C in program_or_external; cycles=7
-3CDE: 1D F6 AE 70 CMP:G.W @H'F6AE, R0 ; refs H'F6AE in on_chip_ram; cycles=7
+3CD2: 15 F6 F1 90 MOV:G.B R0, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=7
+3CD6: 15 F6 F3 13 CLR.B @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
+3CDA: 1D F0 0C 80 MOV:G.W @H'F00C, R0 ; refs mem_F00C in program_or_external; cycles=7
+3CDE: 1D F6 AE 70 CMP:G.W @H'F6AE, R0 ; refs ram_F6AE in on_chip_ram; cycles=7
3CE2: 27 08 BEQ loc_3CEC ; cycles=3/7 nt/t
-3CE4: 15 F6 F1 C7 BSET.B #7, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=9
-3CE8: 1D F6 AE 90 MOV:G.W R0, @H'F6AE ; refs H'F6AE in on_chip_ram; cycles=7
+3CE4: 15 F6 F1 C7 BSET.B #7, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=9
+3CE8: 1D F6 AE 90 MOV:G.W R0, @H'F6AE ; refs ram_F6AE in on_chip_ram; cycles=7
loc_3CEC:
-3CEC: 1D F0 0A 80 MOV:G.W @H'F00A, R0 ; refs H'F00A in program_or_external; cycles=7
-3CF0: 1D F6 AC 70 CMP:G.W @H'F6AC, R0 ; refs H'F6AC in on_chip_ram; cycles=7
+3CEC: 1D F0 0A 80 MOV:G.W @H'F00A, R0 ; refs mem_F00A in program_or_external; cycles=7
+3CF0: 1D F6 AC 70 CMP:G.W @H'F6AC, R0 ; refs ram_F6AC in on_chip_ram; cycles=7
3CF4: 27 08 BEQ loc_3CFE ; cycles=3/7 nt/t
-3CF6: 15 F6 F1 C6 BSET.B #6, @H'F6F1 ; refs H'F6F1 in on_chip_ram; cycles=9
-3CFA: 1D F6 AC 90 MOV:G.W R0, @H'F6AC ; refs H'F6AC in on_chip_ram; cycles=7
+3CF6: 15 F6 F1 C6 BSET.B #6, @H'F6F1 ; refs ram_F6F1 in on_chip_ram; cycles=9
+3CFA: 1D F6 AC 90 MOV:G.W R0, @H'F6AC ; refs ram_F6AC in on_chip_ram; cycles=7
loc_3CFE:
-3CFE: 15 F0 09 80 MOV:G.B @H'F009, R0 ; refs H'F009 in program_or_external; cycles=7
-3D02: 15 F6 D8 70 CMP:G.B @H'F6D8, R0 ; refs H'F6D8 in on_chip_ram; cycles=7
+3CFE: 15 F0 09 80 MOV:G.B @H'F009, R0 ; refs mem_F009 in program_or_external; cycles=7
+3D02: 15 F6 D8 70 CMP:G.B @H'F6D8, R0 ; refs ram_F6D8 in on_chip_ram; cycles=7
3D06: 27 08 BEQ loc_3D10 ; cycles=3/7 nt/t
-3D08: 15 F6 F3 C0 BSET.B #0, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
-3D0C: 15 F6 D8 90 MOV:G.B R0, @H'F6D8 ; refs H'F6D8 in on_chip_ram; cycles=7
+3D08: 15 F6 F3 C0 BSET.B #0, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
+3D0C: 15 F6 D8 90 MOV:G.B R0, @H'F6D8 ; refs ram_F6D8 in on_chip_ram; cycles=7
loc_3D10:
-3D10: 15 F0 08 80 MOV:G.B @H'F008, R0 ; refs H'F008 in program_or_external; cycles=7
-3D14: 15 F6 D9 70 CMP:G.B @H'F6D9, R0 ; refs H'F6D9 in on_chip_ram; cycles=7
+3D10: 15 F0 08 80 MOV:G.B @H'F008, R0 ; refs mem_F008 in program_or_external; cycles=7
+3D14: 15 F6 D9 70 CMP:G.B @H'F6D9, R0 ; refs ram_F6D9 in on_chip_ram; cycles=7
3D18: 27 08 BEQ loc_3D22 ; cycles=3/7 nt/t
-3D1A: 15 F6 F3 C1 BSET.B #1, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
-3D1E: 15 F6 D9 90 MOV:G.B R0, @H'F6D9 ; refs H'F6D9 in on_chip_ram; cycles=7
+3D1A: 15 F6 F3 C1 BSET.B #1, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
+3D1E: 15 F6 D9 90 MOV:G.B R0, @H'F6D9 ; refs ram_F6D9 in on_chip_ram; cycles=7
loc_3D22:
-3D22: 15 F0 07 80 MOV:G.B @H'F007, R0 ; refs H'F007 in program_or_external; cycles=7
-3D26: 15 F6 DA 70 CMP:G.B @H'F6DA, R0 ; refs H'F6DA in on_chip_ram; cycles=7
+3D22: 15 F0 07 80 MOV:G.B @H'F007, R0 ; refs mem_F007 in program_or_external; cycles=7
+3D26: 15 F6 DA 70 CMP:G.B @H'F6DA, R0 ; refs ram_F6DA in on_chip_ram; cycles=7
3D2A: 27 08 BEQ loc_3D34 ; cycles=3/7 nt/t
-3D2C: 15 F6 F3 C2 BSET.B #2, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
-3D30: 15 F6 DA 90 MOV:G.B R0, @H'F6DA ; refs H'F6DA in on_chip_ram; cycles=7
+3D2C: 15 F6 F3 C2 BSET.B #2, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
+3D30: 15 F6 DA 90 MOV:G.B R0, @H'F6DA ; refs ram_F6DA in on_chip_ram; cycles=7
loc_3D34:
-3D34: 15 F0 06 80 MOV:G.B @H'F006, R0 ; refs H'F006 in program_or_external; cycles=7
-3D38: 15 F6 DB 70 CMP:G.B @H'F6DB, R0 ; refs H'F6DB in on_chip_ram; cycles=7
+3D34: 15 F0 06 80 MOV:G.B @H'F006, R0 ; refs mem_F006 in program_or_external; cycles=7
+3D38: 15 F6 DB 70 CMP:G.B @H'F6DB, R0 ; refs ram_F6DB in on_chip_ram; cycles=7
3D3C: 27 08 BEQ loc_3D46 ; cycles=3/7 nt/t
-3D3E: 15 F6 F3 C3 BSET.B #3, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
-3D42: 15 F6 DB 90 MOV:G.B R0, @H'F6DB ; refs H'F6DB in on_chip_ram; cycles=7
+3D3E: 15 F6 F3 C3 BSET.B #3, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
+3D42: 15 F6 DB 90 MOV:G.B R0, @H'F6DB ; refs ram_F6DB in on_chip_ram; cycles=7
loc_3D46:
-3D46: 15 F0 05 80 MOV:G.B @H'F005, R0 ; refs H'F005 in program_or_external; cycles=7
-3D4A: 15 F6 DC 70 CMP:G.B @H'F6DC, R0 ; refs H'F6DC in on_chip_ram; cycles=7
+3D46: 15 F0 05 80 MOV:G.B @H'F005, R0 ; refs mem_F005 in program_or_external; cycles=7
+3D4A: 15 F6 DC 70 CMP:G.B @H'F6DC, R0 ; refs ram_F6DC in on_chip_ram; cycles=7
3D4E: 27 08 BEQ loc_3D58 ; cycles=3/7 nt/t
-3D50: 15 F6 F3 C4 BSET.B #4, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
-3D54: 15 F6 DC 90 MOV:G.B R0, @H'F6DC ; refs H'F6DC in on_chip_ram; cycles=7
+3D50: 15 F6 F3 C4 BSET.B #4, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
+3D54: 15 F6 DC 90 MOV:G.B R0, @H'F6DC ; refs ram_F6DC in on_chip_ram; cycles=7
loc_3D58:
-3D58: 15 F0 04 80 MOV:G.B @H'F004, R0 ; refs H'F004 in program_or_external; cycles=7
-3D5C: 15 F6 DD 70 CMP:G.B @H'F6DD, R0 ; refs H'F6DD in on_chip_ram; cycles=7
+3D58: 15 F0 04 80 MOV:G.B @H'F004, R0 ; refs mem_F004 in program_or_external; cycles=7
+3D5C: 15 F6 DD 70 CMP:G.B @H'F6DD, R0 ; refs ram_F6DD in on_chip_ram; cycles=7
3D60: 27 08 BEQ loc_3D6A ; cycles=3/7 nt/t
-3D62: 15 F6 F3 C5 BSET.B #5, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
-3D66: 15 F6 DD 90 MOV:G.B R0, @H'F6DD ; refs H'F6DD in on_chip_ram; cycles=7
+3D62: 15 F6 F3 C5 BSET.B #5, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
+3D66: 15 F6 DD 90 MOV:G.B R0, @H'F6DD ; refs ram_F6DD in on_chip_ram; cycles=7
loc_3D6A:
-3D6A: 15 F0 03 80 MOV:G.B @H'F003, R0 ; refs H'F003 in program_or_external; cycles=7
-3D6E: 15 F6 DE 70 CMP:G.B @H'F6DE, R0 ; refs H'F6DE in on_chip_ram; cycles=7
+3D6A: 15 F0 03 80 MOV:G.B @H'F003, R0 ; refs mem_F003 in program_or_external; cycles=7
+3D6E: 15 F6 DE 70 CMP:G.B @H'F6DE, R0 ; refs ram_F6DE in on_chip_ram; cycles=7
3D72: 27 08 BEQ loc_3D7C ; cycles=3/7 nt/t
-3D74: 15 F6 F3 C6 BSET.B #6, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
-3D78: 15 F6 DE 90 MOV:G.B R0, @H'F6DE ; refs H'F6DE in on_chip_ram; cycles=7
+3D74: 15 F6 F3 C6 BSET.B #6, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
+3D78: 15 F6 DE 90 MOV:G.B R0, @H'F6DE ; refs ram_F6DE in on_chip_ram; cycles=7
loc_3D7C:
-3D7C: 15 F0 02 80 MOV:G.B @H'F002, R0 ; refs H'F002 in program_or_external; cycles=7
-3D80: 15 F6 DF 70 CMP:G.B @H'F6DF, R0 ; refs H'F6DF in on_chip_ram; cycles=7
+3D7C: 15 F0 02 80 MOV:G.B @H'F002, R0 ; refs mem_F002 in program_or_external; cycles=7
+3D80: 15 F6 DF 70 CMP:G.B @H'F6DF, R0 ; refs ram_F6DF in on_chip_ram; cycles=7
3D84: 27 08 BEQ loc_3D8E ; cycles=3/7 nt/t
-3D86: 15 F6 F3 C7 BSET.B #7, @H'F6F3 ; refs H'F6F3 in on_chip_ram; cycles=9
-3D8A: 15 F6 DF 90 MOV:G.B R0, @H'F6DF ; refs H'F6DF in on_chip_ram; cycles=7
+3D86: 15 F6 F3 C7 BSET.B #7, @H'F6F3 ; refs ram_F6F3 in on_chip_ram; cycles=9
+3D8A: 15 F6 DF 90 MOV:G.B R0, @H'F6DF ; refs ram_F6DF in on_chip_ram; cycles=7
loc_3D8E:
-3D8E: 15 F0 01 80 MOV:G.B @H'F001, R0 ; refs H'F001 in program_or_external; cycles=7
-3D92: 15 F7 21 D1 BCLR.B #1, @H'F721 ; refs H'F721 in on_chip_ram; cycles=9
+3D8E: 15 F0 01 80 MOV:G.B @H'F001, R0 ; refs mem_F001 in program_or_external; cycles=7
+3D92: 15 F7 21 D1 BCLR.B #1, @H'F721 ; refs ram_F721 in on_chip_ram; cycles=9
loc_3D96:
3D96: CF 80 MOV:G.W @R7+, R0 ; cycles=5
@@ -1834,7 +1917,7 @@ loc_3D96:
vec_ad_adi_3D99:
3D99: 15 FE E8 D5 BCLR.B #5, @ADCSR ; clear ADST (bit 5) of ADCSR; cycles=8
3D9D: 12 3F STM.W {R0,R1,R2,R3,R4,R5}, @-SP ; cycles=24
-3D9F: 15 F6 8A 80 MOV:G.B @H'F68A, R0 ; refs H'F68A in on_chip_ram; cycles=6
+3D9F: 15 F6 8A 80 MOV:G.B @H'F68A, R0 ; refs ram_F68A in on_chip_ram; cycles=6
3DA3: 04 14 A8 MULXU.B #H'14, R0 ; cycles=19
3DA6: 1D FE E0 81 MOV:G.W @ADDRA_H, R1 ; ADDRA word read; TEMP byte-order hazard avoided; refs ADDRA_H in register_field; cycles=7
3DAA: A1 10 SWAP.B R1 ; cycles=3
@@ -1842,58 +1925,58 @@ vec_ad_adi_3D99:
3DAE: F1 CF B6 81 MOV:G.B @(-H'304A,R1), R1 ; cycles=7
3DB2: A9 20 ADD:G.W R1, R0 ; cycles=3
3DB4: 04 15 B8 DIVXU.B #H'15, R0 ; cycles=23
-3DB7: 15 F6 8A 70 CMP:G.B @H'F68A, R0 ; refs H'F68A in on_chip_ram; cycles=6
+3DB7: 15 F6 8A 70 CMP:G.B @H'F68A, R0 ; refs ram_F68A in on_chip_ram; cycles=6
3DBB: 27 4B BEQ loc_3E08 ; cycles=3/8 nt/t
-3DBD: 15 F6 8A 82 MOV:G.B @H'F68A, R2 ; refs H'F68A in on_chip_ram; cycles=6
-3DC1: 15 F6 8A 90 MOV:G.B R0, @H'F68A ; refs H'F68A in on_chip_ram; cycles=6
-3DC5: 15 F7 31 04 03 CMP:G.B #H'03, @H'F731 ; refs H'F731 in on_chip_ram; cycles=6
+3DBD: 15 F6 8A 82 MOV:G.B @H'F68A, R2 ; refs ram_F68A in on_chip_ram; cycles=6
+3DC1: 15 F6 8A 90 MOV:G.B R0, @H'F68A ; refs ram_F68A in on_chip_ram; cycles=6
+3DC5: 15 F7 31 04 03 CMP:G.B #H'03, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=6
3DCA: 22 3C BHI loc_3E08 ; cycles=3/7 nt/t
3DCC: A0 12 EXTU.B R0 ; cycles=3
3DCE: A2 12 EXTU.B R2 ; cycles=3
3DD0: 0C 01 01 A8 MULXU.W #H'0101, R0 ; cycles=25
3DD4: 0C 01 01 AA MULXU.W #H'0101, R2 ; cycles=25
3DD8: AB 31 SUB.W R3, R1 ; cycles=3
-3DDA: 1D E1 02 80 MOV:G.W @H'E102, R0 ; refs H'E102 in program_or_external; cycles=7
+3DDA: 1D E1 02 80 MOV:G.W @H'E102, R0 ; refs mem_E102 in program_or_external; cycles=7
3DDE: A8 21 ADD:G.W R0, R1 ; cycles=3
3DE0: A9 82 MOV:G.W R1, R2 ; cycles=3
3DE2: 25 0C BCS loc_3DF0 ; cycles=3/7 nt/t
3DE4: A8 32 SUB.W R0, R2 ; cycles=3
3DE6: 4A 80 00 CMP:I #H'8000, R2 ; cycles=3
3DE9: 23 0F BLS loc_3DFA ; cycles=3/8 nt/t
-3DEB: 59 00 00 MOV:I.W #H'0000, R1 ; cycles=3
+3DEB: 59 00 00 MOV:I.W #H'0000, R1 ; dataflow R1=H'0000; cycles=3
3DEE: 20 0A BRA loc_3DFA ; cycles=7
loc_3DF0:
3DF0: AA 30 SUB.W R2, R0 ; cycles=3
3DF2: 48 80 00 CMP:I #H'8000, R0 ; cycles=3
3DF5: 23 03 BLS loc_3DFA ; cycles=3/8 nt/t
-3DF7: 59 FF FF MOV:I.W #H'FFFF, R1 ; cycles=3
+3DF7: 59 FF FF MOV:I.W #H'FFFF, R1 ; dataflow R1=H'FFFF; cycles=3
loc_3DFA:
-3DFA: 1D E1 02 71 CMP:G.W @H'E102, R1 ; refs H'E102 in program_or_external; cycles=7
+3DFA: 1D E1 02 71 CMP:G.W @H'E102, R1 ; refs mem_E102 in program_or_external; cycles=7
3DFE: 27 08 BEQ loc_3E08 ; cycles=3/7 nt/t
-3E00: 1D F6 8E 91 MOV:G.W R1, @H'F68E ; refs H'F68E in on_chip_ram; cycles=7
-3E04: 15 F6 89 C7 BSET.B #7, @H'F689 ; refs H'F689 in on_chip_ram; cycles=9
+3E00: 1D F6 8E 91 MOV:G.W R1, @H'F68E ; refs ram_F68E in on_chip_ram; cycles=7
+3E04: 15 F6 89 C7 BSET.B #7, @H'F689 ; refs ram_F689 in on_chip_ram; cycles=9
loc_3E08:
-3E08: 15 F6 8B 80 MOV:G.B @H'F68B, R0 ; refs H'F68B in on_chip_ram; cycles=7
+3E08: 15 F6 8B 80 MOV:G.B @H'F68B, R0 ; refs ram_F68B in on_chip_ram; cycles=7
3E0C: 04 14 A8 MULXU.B #H'14, R0 ; cycles=19
3E0F: 1D FE E2 81 MOV:G.W @ADDRB_H, R1 ; ADDRB word read; TEMP byte-order hazard avoided; refs ADDRB_H in register_field; cycles=6
3E13: A1 10 SWAP.B R1 ; cycles=3
3E15: A1 12 EXTU.B R1 ; cycles=3
3E17: A9 20 ADD:G.W R1, R0 ; cycles=3
3E19: 04 15 B8 DIVXU.B #H'15, R0 ; cycles=23
-3E1C: 1D F6 8C 16 TST.W @H'F68C ; refs H'F68C in on_chip_ram; cycles=7
+3E1C: 1D F6 8C 16 TST.W @H'F68C ; refs ram_F68C in on_chip_ram; cycles=7
3E20: 27 06 BEQ loc_3E28 ; cycles=3/7 nt/t
-3E22: 15 F6 8B 70 CMP:G.B @H'F68B, R0 ; refs H'F68B in on_chip_ram; cycles=7
+3E22: 15 F6 8B 70 CMP:G.B @H'F68B, R0 ; refs ram_F68B in on_chip_ram; cycles=7
3E26: 27 25 BEQ loc_3E4D ; cycles=3/7 nt/t
loc_3E28:
-3E28: 15 F6 8B 90 MOV:G.B R0, @H'F68B ; refs H'F68B in on_chip_ram; cycles=7
+3E28: 15 F6 8B 90 MOV:G.B R0, @H'F68B ; refs ram_F68B in on_chip_ram; cycles=7
3E2C: A0 12 EXTU.B R0 ; cycles=3
3E2E: A8 83 MOV:G.W R0, R3 ; cycles=3
3E30: A3 AB MULXU.B R3, R3 ; cycles=18
-3E32: AA 13 CLR.W R2 ; cycles=3
+3E32: AA 13 CLR.W R2 ; dataflow R2=H'0000; cycles=3
3E34: 0C 00 C8 BA DIVXU.W #H'00C8, R2 ; cycles=29
3E38: 04 04 A8 MULXU.B #H'04, R0 ; cycles=19
3E3B: 0C 00 AB 20 ADD:G.W #H'00AB, R0 ; cycles=4
@@ -1903,7 +1986,7 @@ loc_3E28:
3E47: A8 1B SHLR.W R0 ; cycles=3
loc_3E49:
-3E49: 1D F6 8C 90 MOV:G.W R0, @H'F68C ; refs H'F68C in on_chip_ram; cycles=6
+3E49: 1D F6 8C 90 MOV:G.W R0, @H'F68C ; refs ram_F68C in on_chip_ram; cycles=6
loc_3E4D:
3E4D: 02 3F LDM.W @SP+, {R0,R1,R2,R3,R4,R5} ; cycles=30
@@ -1913,10 +1996,10 @@ loc_3E4D:
loc_3E54:
3E54: A2 F7 BTST.B #7, R2 ; cycles=2
3E56: 27 42 BEQ loc_3E9A ; cycles=3/7 nt/t
-3E58: 15 F9 B5 80 MOV:G.B @H'F9B5, R0 ; refs H'F9B5 in on_chip_ram; cycles=7
+3E58: 15 F9 B5 80 MOV:G.B @H'F9B5, R0 ; refs ram_F9B5 in on_chip_ram; cycles=7
3E5C: A0 12 EXTU.B R0 ; cycles=3
3E5E: A8 1A SHLL.W R0 ; cycles=3
-3E60: 15 F9 B0 81 MOV:G.B @H'F9B0, R1 ; refs H'F9B0 in on_chip_ram; cycles=7
+3E60: 15 F9 B0 81 MOV:G.B @H'F9B0, R1 ; refs ram_F9B0 in on_chip_ram; cycles=7
3E64: A1 12 EXTU.B R1 ; cycles=3
3E66: A9 1A SHLL.W R1 ; cycles=3
@@ -1930,14 +2013,14 @@ loc_3E68:
loc_3E76:
3E76: F9 F8 70 93 MOV:G.W R3, @(-H'0790,R1) ; cycles=7
-3E7A: 15 F9 B0 08 ADD:Q.B #1, @H'F9B0 ; refs H'F9B0 in on_chip_ram; cycles=9
-3E7E: 15 F9 B0 D7 BCLR.B #7, @H'F9B0 ; refs H'F9B0 in on_chip_ram; cycles=9
+3E7A: 15 F9 B0 08 ADD:Q.B #1, @H'F9B0 ; refs ram_F9B0 in on_chip_ram; cycles=9
+3E7E: 15 F9 B0 D7 BCLR.B #7, @H'F9B0 ; refs ram_F9B0 in on_chip_ram; cycles=9
loc_3E82:
-3E82: 15 F9 B0 80 MOV:G.B @H'F9B0, R0 ; refs H'F9B0 in on_chip_ram; cycles=7
+3E82: 15 F9 B0 80 MOV:G.B @H'F9B0, R0 ; refs ram_F9B0 in on_chip_ram; cycles=7
3E86: A0 08 ADD:Q.B #1, R0 ; cycles=4
3E88: 04 7F 50 AND.B #H'7F, R0 ; cycles=3
-3E8B: 15 F9 B5 70 CMP:G.B @H'F9B5, R0 ; refs H'F9B5 in on_chip_ram; cycles=6
+3E8B: 15 F9 B5 70 CMP:G.B @H'F9B5, R0 ; refs ram_F9B5 in on_chip_ram; cycles=6
3E8F: 26 09 BNE loc_3E9A ; cycles=3/8 nt/t
3E91: 12 0C STM.W {R2,R3}, @-SP ; cycles=12
3E93: 1E 01 3D BSR loc_3FD3 ; cycles=14
@@ -1947,10 +2030,10 @@ loc_3E82:
loc_3E9A:
3E9A: A2 F6 BTST.B #6, R2 ; cycles=2
3E9C: 27 2D BEQ loc_3ECB ; cycles=3/7 nt/t
-3E9E: 15 F9 B9 80 MOV:G.B @H'F9B9, R0 ; refs H'F9B9 in on_chip_ram; cycles=7
+3E9E: 15 F9 B9 80 MOV:G.B @H'F9B9, R0 ; refs ram_F9B9 in on_chip_ram; cycles=7
3EA2: A0 12 EXTU.B R0 ; cycles=3
3EA4: A8 1A SHLL.W R0 ; cycles=3
-3EA6: 15 F9 B4 81 MOV:G.B @H'F9B4, R1 ; refs H'F9B4 in on_chip_ram; cycles=7
+3EA6: 15 F9 B4 81 MOV:G.B @H'F9B4, R1 ; refs ram_F9B4 in on_chip_ram; cycles=7
3EAA: A1 12 EXTU.B R1 ; cycles=3
3EAC: A9 1A SHLL.W R1 ; cycles=3
@@ -1965,8 +2048,8 @@ loc_3EAE:
loc_3EBF:
3EBF: F9 F9 70 93 MOV:G.W R3, @(-H'0690,R1) ; cycles=6
-3EC3: 15 F9 B4 08 ADD:Q.B #1, @H'F9B4 ; refs H'F9B4 in on_chip_ram; cycles=8
-3EC7: 15 F9 B4 D5 BCLR.B #5, @H'F9B4 ; refs H'F9B4 in on_chip_ram; cycles=8
+3EC3: 15 F9 B4 08 ADD:Q.B #1, @H'F9B4 ; refs ram_F9B4 in on_chip_ram; cycles=8
+3EC7: 15 F9 B4 D5 BCLR.B #5, @H'F9B4 ; refs ram_F9B4 in on_chip_ram; cycles=8
loc_3ECB:
3ECB: 19 RTS ; cycles=13
@@ -1990,24 +2073,24 @@ loc_3ED9:
3EE7: 20 0F BRA loc_3EF8 ; cycles=8
loc_3EE9:
-3EE9: 5D 00 80 MOV:I.W #H'0080, R5 ; cycles=3
+3EE9: 5D 00 80 MOV:I.W #H'0080, R5 ; dataflow R5=H'0080; cycles=3
3EEC: 20 0D BRA loc_3EFB ; cycles=7
loc_3EEE:
-3EEE: 5D 00 C0 MOV:I.W #H'00C0, R5 ; cycles=3
+3EEE: 5D 00 C0 MOV:I.W #H'00C0, R5 ; dataflow R5=H'00C0; cycles=3
3EF1: 20 08 BRA loc_3EFB ; cycles=8
loc_3EF3:
-3EF3: 5D 00 90 MOV:I.W #H'0090, R5 ; cycles=3
+3EF3: 5D 00 90 MOV:I.W #H'0090, R5 ; dataflow R5=H'0090; cycles=3
3EF6: 20 03 BRA loc_3EFB ; cycles=7
loc_3EF8:
-3EF8: 5D 00 D0 MOV:I.W #H'00D0, R5 ; cycles=3
+3EF8: 5D 00 D0 MOV:I.W #H'00D0, R5 ; dataflow R5=H'00D0; cycles=3
loc_3EFB:
3EFB: 04 10 AB MULXU.B #H'10, R3 ; cycles=19
3EFE: 0C FA B0 23 ADD:G.W #H'FAB0, R3 ; cycles=4
-3F02: A9 13 CLR.W R1 ; cycles=3
+3F02: A9 13 CLR.W R1 ; dataflow R1=H'0000; cycles=3
loc_3F04:
3F04: F1 FA F0 82 MOV:G.B @(-H'0510,R1), R2 ; cycles=7
@@ -2024,8 +2107,8 @@ loc_3F10:
3F18: 20 EA BRA loc_3F04 ; cycles=7
loc_3F1A:
-3F1A: 1D FB 00 07 00 E0 MOV:G.W #H'00E0, @H'FB00 ; refs H'FB00 in on_chip_ram; cycles=11
-3F20: 5C 00 E0 MOV:I.W #H'00E0, R4 ; cycles=3
+3F1A: 1D FB 00 07 00 E0 MOV:G.W #H'00E0, @H'FB00 ; refs ram_FB00 in on_chip_ram; cycles=11
+3F20: 5C 00 E0 MOV:I.W #H'00E0, R4 ; dataflow R4=H'00E0; cycles=3
3F23: 0E 1B BSR loc_3F40 ; cycles=14
loc_3F25:
@@ -2035,13 +2118,13 @@ loc_3F25:
loc_3F28:
3F28: AD 84 MOV:G.W R5, R4 ; cycles=3
3F2A: A1 24 ADD:G.B R1, R4 ; cycles=2
-3F2C: 1D FB 00 74 CMP:G.W @H'FB00, R4 ; refs H'FB00 in on_chip_ram; cycles=7
+3F2C: 1D FB 00 74 CMP:G.W @H'FB00, R4 ; refs ram_FB00 in on_chip_ram; cycles=7
3F30: 27 06 BEQ loc_3F38 ; cycles=3/7 nt/t
-3F32: 1D FB 00 94 MOV:G.W R4, @H'FB00 ; refs H'FB00 in on_chip_ram; cycles=7
+3F32: 1D FB 00 94 MOV:G.W R4, @H'FB00 ; refs ram_FB00 in on_chip_ram; cycles=7
3F36: 0E 08 BSR loc_3F40 ; cycles=13
loc_3F38:
-3F38: 5C 02 00 MOV:I.W #H'0200, R4 ; cycles=3
+3F38: 5C 02 00 MOV:I.W #H'0200, R4 ; dataflow R4=H'0200; cycles=3
3F3B: A2 24 ADD:G.B R2, R4 ; cycles=2
3F3D: 0E 01 BSR loc_3F40 ; cycles=14
3F3F: 19 RTS ; cycles=13
@@ -2052,31 +2135,31 @@ loc_3F40:
3F46: 0C 06 00 48 ORC.W #H'0600, SR ; cycles=4
loc_3F4A:
-3F4A: 15 F2 00 00 80 MOVFPE.B @H'F200, R0 ; refs H'F200 in program_or_external; cycles=13
+3F4A: 15 F2 00 00 80 MOVFPE.B @H'F200, R0 ; refs mem_F200 in program_or_external; cycles=13
3F4F: A0 F7 BTST.B #7, R0 ; cycles=2
3F51: 26 F7 BNE loc_3F4A ; cycles=3/8 nt/t
3F53: AC F8 BTST.W #8, R4 ; cycles=3
3F55: 26 16 BNE loc_3F6D ; cycles=3/8 nt/t
3F57: AC F9 BTST.W #9, R4 ; cycles=3
3F59: 26 07 BNE loc_3F62 ; cycles=3/8 nt/t
-3F5B: 15 F2 00 00 94 MOVTPE.B R4, @H'F200 ; refs H'F200 in program_or_external; cycles=13
+3F5B: 15 F2 00 00 94 MOVTPE.B R4, @H'F200 ; refs mem_F200 in program_or_external; cycles=13
3F60: 20 10 BRA loc_3F72 ; cycles=7
loc_3F62:
-3F62: 15 F2 01 00 94 MOVTPE.B R4, @H'F201 ; refs H'F201 in program_or_external; cycles=13
-3F67: 1D FB 00 08 ADD:Q.W #1, @H'FB00 ; refs H'FB00 in on_chip_ram; cycles=8
+3F62: 15 F2 01 00 94 MOVTPE.B R4, @H'F201 ; refs mem_F201 in program_or_external; cycles=13
+3F67: 1D FB 00 08 ADD:Q.W #1, @H'FB00 ; refs ram_FB00 in on_chip_ram; cycles=8
3F6B: 20 05 BRA loc_3F72 ; cycles=8
loc_3F6D:
-3F6D: 15 F2 01 00 84 MOVFPE.B @H'F201, R4 ; refs H'F201 in program_or_external; cycles=13
+3F6D: 15 F2 01 00 84 MOVFPE.B @H'F201, R4 ; refs mem_F201 in program_or_external; cycles=13
loc_3F72:
3F72: CF 88 LDC.W @R7+, SR ; cycles=7
3F74: 19 RTS ; cycles=12
loc_3F76:
-3F76: 58 27 10 MOV:I.W #H'2710, R0 ; cycles=3
-3F79: 59 C3 50 MOV:I.W #H'C350, R1 ; cycles=3
+3F76: 58 27 10 MOV:I.W #H'2710, R0 ; dataflow R0=H'2710; cycles=3
+3F79: 59 C3 50 MOV:I.W #H'C350, R1 ; dataflow R1=H'C350; cycles=3
loc_3F7C:
3F7C: 15 FE 82 D7 BCLR.B #7, @P1DR ; clear bit 7 of P1DR; cycles=9
@@ -2085,7 +2168,7 @@ loc_3F7C:
loc_3F83:
3F83: 15 FE 82 C7 BSET.B #7, @P1DR ; set bit 7 of P1DR; cycles=8
3F87: 01 B9 F9 SCB/F R1, loc_3F83 ; cycles=3/4/9 false/-1/t
-3F8A: A8 13 CLR.W R0 ; cycles=3
+3F8A: A8 13 CLR.W R0 ; dataflow R0=H'0000; cycles=3
loc_3F8C:
3F8C: F8 E0 00 13 CLR.W @(-H'2000,R0) ; cycles=9
@@ -2103,7 +2186,7 @@ loc_3F8C:
loc_3FB1:
3FB1: 1D FE EC 07 5A 00 MOV:G.W #H'5A00, @WDT_TCSR_R ; WDT_TCSR_R = H'5A00 (OVF=0 WT/IT=0 TME=0 CKS2=0 CKS1=0 CKS0=0; TCNT password H'5A, counter write H'00); cycles=9
-3FB7: 15 F7 94 13 CLR.B @H'F794 ; refs H'F794 in on_chip_ram; cycles=8
+3FB7: 15 F7 94 13 CLR.B @H'F794 ; refs ram_F794 in on_chip_ram; cycles=8
3FBB: 0E 16 BSR loc_3FD3 ; cycles=14
3FBD: 1E 7B EB BSR loc_BBAB ; cycles=14
3FC0: 0E 2D BSR loc_3FEF ; cycles=13
@@ -2115,15 +2198,15 @@ loc_3FB1:
3FD1: 20 DE BRA loc_3FB1 ; cycles=8
loc_3FD3:
-3FD3: 15 FA A2 16 TST.B @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=6
+3FD3: 15 FA A2 16 TST.B @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=6
3FD7: 26 15 BNE loc_3FEE ; cycles=3/8 nt/t
-3FD9: 15 FA A5 F7 BTST.B #7, @H'FAA5 ; refs H'FAA5 in on_chip_ram; cycles=6
+3FD9: 15 FA A5 F7 BTST.B #7, @H'FAA5 ; refs ram_FAA5 in on_chip_ram; cycles=6
3FDD: 27 06 BEQ loc_3FE5 ; cycles=3/8 nt/t
-3FDF: 15 F9 C3 16 TST.B @H'F9C3 ; refs H'F9C3 in on_chip_ram; cycles=6
+3FDF: 15 F9 C3 16 TST.B @H'F9C3 ; refs ram_F9C3 in on_chip_ram; cycles=6
3FE3: 26 09 BNE loc_3FEE ; cycles=3/8 nt/t
loc_3FE5:
-3FE5: 15 F9 C0 16 TST.B @H'F9C0 ; refs H'F9C0 in on_chip_ram; cycles=6
+3FE5: 15 F9 C0 16 TST.B @H'F9C0 ; refs ram_F9C0 in on_chip_ram; cycles=6
3FE9: 26 03 BNE loc_3FEE ; cycles=3/8 nt/t
3FEB: 1E 7B 04 BSR loc_BAF2 ; cycles=14
@@ -2131,65 +2214,65 @@ loc_3FEE:
3FEE: 19 RTS ; cycles=12
loc_3FEF:
-3FEF: 15 F9 C5 16 TST.B @H'F9C5 ; refs H'F9C5 in on_chip_ram; cycles=6
+3FEF: 15 F9 C5 16 TST.B @H'F9C5 ; refs ram_F9C5 in on_chip_ram; cycles=6
3FF3: 26 12 BNE loc_4007 ; cycles=3/8 nt/t
-3FF5: 15 F9 B5 13 CLR.B @H'F9B5 ; refs H'F9B5 in on_chip_ram; cycles=8
-3FF9: 15 F9 B0 13 CLR.B @H'F9B0 ; refs H'F9B0 in on_chip_ram; cycles=8
-3FFD: 15 FA A5 D7 BCLR.B #7, @H'FAA5 ; refs H'FAA5 in on_chip_ram; cycles=8
+3FF5: 15 F9 B5 13 CLR.B @H'F9B5 ; refs ram_F9B5 in on_chip_ram; cycles=8
+3FF9: 15 F9 B0 13 CLR.B @H'F9B0 ; refs ram_F9B0 in on_chip_ram; cycles=8
+3FFD: 15 FA A5 D7 BCLR.B #7, @H'FAA5 ; refs ram_FAA5 in on_chip_ram; cycles=8
4001: 27 08 BEQ loc_400B ; cycles=3/8 nt/t
4003: 0E 07 BSR loc_400C ; cycles=14
4005: 20 04 BRA loc_400B ; cycles=8
loc_4007:
-4007: 15 FA A5 C7 BSET.B #7, @H'FAA5 ; refs H'FAA5 in on_chip_ram; cycles=8
+4007: 15 FA A5 C7 BSET.B #7, @H'FAA5 ; refs ram_FAA5 in on_chip_ram; cycles=8
loc_400B:
400B: 19 RTS ; cycles=13
loc_400C:
-400C: 15 F7 30 13 CLR.B @H'F730 ; refs H'F730 in on_chip_ram; cycles=9
-4010: 15 F7 56 13 CLR.B @H'F756 ; refs H'F756 in on_chip_ram; cycles=9
-4014: 15 F7 57 13 CLR.B @H'F757 ; refs H'F757 in on_chip_ram; cycles=9
-4018: 15 F7 58 13 CLR.B @H'F758 ; refs H'F758 in on_chip_ram; cycles=9
-401C: 15 F7 59 13 CLR.B @H'F759 ; refs H'F759 in on_chip_ram; cycles=9
-4020: 1D F7 32 13 CLR.W @H'F732 ; refs H'F732 in on_chip_ram; cycles=9
-4024: 1D F7 5C 13 CLR.W @H'F75C ; refs H'F75C in on_chip_ram; cycles=9
-4028: 15 FB 03 13 CLR.B @H'FB03 ; refs H'FB03 in on_chip_ram; cycles=9
-402C: 1D E0 46 13 CLR.W @H'E046 ; refs H'E046 in program_or_external; cycles=9
-4030: 1D F7 6A 13 CLR.W @H'F76A ; refs H'F76A in on_chip_ram; cycles=9
-4034: 15 F7 91 13 CLR.B @H'F791 ; refs H'F791 in on_chip_ram; cycles=9
-4038: 15 F7 95 13 CLR.B @H'F795 ; refs H'F795 in on_chip_ram; cycles=9
-403C: 15 F7 6E 13 CLR.B @H'F76E ; refs H'F76E in on_chip_ram; cycles=9
+400C: 15 F7 30 13 CLR.B @H'F730 ; refs ram_F730 in on_chip_ram; cycles=9
+4010: 15 F7 56 13 CLR.B @H'F756 ; refs ram_F756 in on_chip_ram; cycles=9
+4014: 15 F7 57 13 CLR.B @H'F757 ; refs ram_F757 in on_chip_ram; cycles=9
+4018: 15 F7 58 13 CLR.B @H'F758 ; refs ram_F758 in on_chip_ram; cycles=9
+401C: 15 F7 59 13 CLR.B @H'F759 ; refs ram_F759 in on_chip_ram; cycles=9
+4020: 1D F7 32 13 CLR.W @H'F732 ; refs ram_F732 in on_chip_ram; cycles=9
+4024: 1D F7 5C 13 CLR.W @H'F75C ; refs ram_F75C in on_chip_ram; cycles=9
+4028: 15 FB 03 13 CLR.B @H'FB03 ; refs ram_FB03 in on_chip_ram; cycles=9
+402C: 1D E0 46 13 CLR.W @H'E046 ; refs mem_E046 in program_or_external; cycles=9
+4030: 1D F7 6A 13 CLR.W @H'F76A ; refs ram_F76A in on_chip_ram; cycles=9
+4034: 15 F7 91 13 CLR.B @H'F791 ; refs ram_F791 in on_chip_ram; cycles=9
+4038: 15 F7 95 13 CLR.B @H'F795 ; refs ram_F795 in on_chip_ram; cycles=9
+403C: 15 F7 6E 13 CLR.B @H'F76E ; refs ram_F76E in on_chip_ram; cycles=9
4040: 0E 33 BSR loc_4075 ; cycles=13
4042: 1E 01 D2 BSR loc_4217 ; cycles=13
4045: 19 RTS ; cycles=13
loc_4046:
-4046: 15 F9 C4 16 TST.B @H'F9C4 ; refs H'F9C4 in on_chip_ram; cycles=7
+4046: 15 F9 C4 16 TST.B @H'F9C4 ; refs ram_F9C4 in on_chip_ram; cycles=7
404A: 26 0C BNE loc_4058 ; cycles=3/7 nt/t
-404C: 15 FA A5 F7 BTST.B #7, @H'FAA5 ; refs H'FAA5 in on_chip_ram; cycles=7
+404C: 15 FA A5 F7 BTST.B #7, @H'FAA5 ; refs ram_FAA5 in on_chip_ram; cycles=7
4050: 27 07 BEQ loc_4059 ; cycles=3/7 nt/t
-4052: 15 F9 C3 16 TST.B @H'F9C3 ; refs H'F9C3 in on_chip_ram; cycles=7
+4052: 15 F9 C3 16 TST.B @H'F9C3 ; refs ram_F9C3 in on_chip_ram; cycles=7
4056: 27 01 BEQ loc_4059 ; cycles=3/7 nt/t
loc_4058:
4058: 19 RTS ; cycles=12
loc_4059:
-4059: 15 F9 B0 82 MOV:G.B @H'F9B0, R2 ; refs H'F9B0 in on_chip_ram; cycles=6
+4059: 15 F9 B0 82 MOV:G.B @H'F9B0, R2 ; refs ram_F9B0 in on_chip_ram; cycles=6
405D: A2 12 EXTU.B R2 ; cycles=3
-405F: 15 F9 B5 72 CMP:G.B @H'F9B5, R2 ; refs H'F9B5 in on_chip_ram; cycles=6
+405F: 15 F9 B5 72 CMP:G.B @H'F9B5, R2 ; refs ram_F9B5 in on_chip_ram; cycles=6
4063: 26 0F BNE loc_4074 ; cycles=3/8 nt/t
4065: A2 1A SHLL.B R2 ; cycles=2
4067: FA F8 70 06 00 MOV:G.W #H'00, @(-H'0790,R2) ; cycles=11
-406C: 15 F9 B0 08 ADD:Q.B #1, @H'F9B0 ; refs H'F9B0 in on_chip_ram; cycles=9
-4070: 15 F9 B0 D7 BCLR.B #7, @H'F9B0 ; refs H'F9B0 in on_chip_ram; cycles=9
+406C: 15 F9 B0 08 ADD:Q.B #1, @H'F9B0 ; refs ram_F9B0 in on_chip_ram; cycles=9
+4070: 15 F9 B0 D7 BCLR.B #7, @H'F9B0 ; refs ram_F9B0 in on_chip_ram; cycles=9
loc_4074:
4074: 19 RTS ; cycles=12
loc_4075:
-4075: A8 13 CLR.W R0 ; cycles=3
+4075: A8 13 CLR.W R0 ; dataflow R0=H'0000; cycles=3
loc_4077:
4077: F8 E0 00 13 CLR.W @(-H'2000,R0) ; cycles=8
@@ -2207,16 +2290,16 @@ loc_408C:
4095: 19 RTS ; cycles=13
loc_4096:
-4096: 1D E0 00 07 00 80 MOV:G.W #H'0080, @H'E000 ; refs H'E000 in program_or_external; cycles=11
-409C: 1D E0 06 07 80 00 MOV:G.W #H'8000, @H'E006 ; refs H'E006 in program_or_external; cycles=11
-40A2: 1D E0 80 07 FF FF MOV:G.W #H'FFFF, @H'E080 ; refs H'E080 in program_or_external; cycles=11
-40A8: 1D E8 00 07 00 80 MOV:G.W #H'0080, @H'E800 ; refs H'E800 in program_or_external; cycles=11
-40AE: 1D E8 06 07 80 00 MOV:G.W #H'8000, @H'E806 ; refs H'E806 in program_or_external; cycles=11
-40B4: 1D E8 80 07 FF FF MOV:G.W #H'FFFF, @H'E880 ; refs H'E880 in program_or_external; cycles=11
+4096: 1D E0 00 07 00 80 MOV:G.W #H'0080, @H'E000 ; refs mem_E000 in program_or_external; cycles=11
+409C: 1D E0 06 07 80 00 MOV:G.W #H'8000, @H'E006 ; refs mem_E006 in program_or_external; cycles=11
+40A2: 1D E0 80 07 FF FF MOV:G.W #H'FFFF, @H'E080 ; refs mem_E080 in program_or_external; cycles=11
+40A8: 1D E8 00 07 00 80 MOV:G.W #H'0080, @H'E800 ; refs mem_E800 in program_or_external; cycles=11
+40AE: 1D E8 06 07 80 00 MOV:G.W #H'8000, @H'E806 ; refs mem_E806 in program_or_external; cycles=11
+40B4: 1D E8 80 07 FF FF MOV:G.W #H'FFFF, @H'E880 ; refs mem_E880 in program_or_external; cycles=11
40BA: 19 RTS ; cycles=12
loc_40BB:
-40BB: 58 00 40 MOV:I.W #H'0040, R0 ; cycles=3
+40BB: 58 00 40 MOV:I.W #H'0040, R0 ; dataflow R0=H'0040; cycles=3
loc_40BE:
40BE: F8 F8 6E 07 FF FF MOV:G.W #H'FFFF, @(-H'0792,R0) ; cycles=9
@@ -2226,17 +2309,17 @@ loc_40BE:
40D6: F8 F9 6E 07 FF FF MOV:G.W #H'FFFF, @(-H'0692,R0) ; cycles=9
40DC: A8 0D ADD:Q.W #-2, R0 ; cycles=4
40DE: 26 DE BNE loc_40BE ; cycles=3/7 nt/t
-40E0: 15 F9 C4 06 14 MOV:G.B #H'14, @H'F9C4 ; refs H'F9C4 in on_chip_ram; cycles=9
-40E5: 15 F6 F7 06 80 MOV:G.B #H'80, @H'F6F7 ; refs H'F6F7 in on_chip_ram; cycles=9
-40EA: 15 F6 F8 06 80 MOV:G.B #H'80, @H'F6F8 ; refs H'F6F8 in on_chip_ram; cycles=9
-40EF: 15 F6 F9 06 80 MOV:G.B #H'80, @H'F6F9 ; refs H'F6F9 in on_chip_ram; cycles=9
+40E0: 15 F9 C4 06 14 MOV:G.B #H'14, @H'F9C4 ; refs ram_F9C4 in on_chip_ram; cycles=9
+40E5: 15 F6 F7 06 80 MOV:G.B #H'80, @H'F6F7 ; refs ram_F6F7 in on_chip_ram; cycles=9
+40EA: 15 F6 F8 06 80 MOV:G.B #H'80, @H'F6F8 ; refs ram_F6F8 in on_chip_ram; cycles=9
+40EF: 15 F6 F9 06 80 MOV:G.B #H'80, @H'F6F9 ; refs ram_F6F9 in on_chip_ram; cycles=9
40F4: 15 FE 8E F7 BTST.B #7, @P7DR ; refs P7DR in register_field; cycles=7
40F8: 27 09 BEQ loc_4103 ; cycles=3/7 nt/t
-40FA: 1D F4 02 05 6B 6F CMP:G.W #H'6B6F, @H'F402 ; refs H'F402 in program_or_external; cycles=7
+40FA: 1D F4 02 05 6B 6F CMP:G.W #H'6B6F, @H'F402 ; refs mem_F402 in program_or_external; cycles=7
4100: 37 00 AD BEQ loc_41B0 ; cycles=3/7 nt/t
loc_4103:
-4103: 58 01 00 MOV:I.W #H'0100, R0 ; cycles=3
+4103: 58 01 00 MOV:I.W #H'0100, R0 ; dataflow R0=H'0100; cycles=3
loc_4106:
4106: A8 0D ADD:Q.W #-2, R0 ; cycles=4
@@ -2277,22 +2360,22 @@ loc_4106:
417D: 18 BF E0 JSR @loc_BFE0 ; cycles=14
4180: CF 80 MOV:G.W @R7+, R0 ; cycles=5
4182: 26 82 BNE loc_4106 ; cycles=3/7 nt/t
-4184: 58 00 0F MOV:I.W #H'000F, R0 ; cycles=3
+4184: 58 00 0F MOV:I.W #H'000F, R0 ; dataflow R0=H'000F; cycles=3
loc_4187:
4187: BF 90 MOV:G.W R0, @-R7 ; cycles=5
4189: A8 84 MOV:G.W R0, R4 ; cycles=3
418B: A4 10 SWAP.B R4 ; cycles=3
-418D: 5D 20 20 MOV:I.W #H'2020, R5 ; cycles=3
+418D: 5D 20 20 MOV:I.W #H'2020, R5 ; dataflow R5=H'2020; cycles=3
4190: 18 BF E0 JSR @loc_BFE0 ; cycles=13
4193: AC 09 ADD:Q.W #2, R4 ; cycles=4
-4195: 5D 20 20 MOV:I.W #H'2020, R5 ; cycles=3
+4195: 5D 20 20 MOV:I.W #H'2020, R5 ; dataflow R5=H'2020; cycles=3
4198: 18 BF E0 JSR @loc_BFE0 ; cycles=13
419B: AC 09 ADD:Q.W #2, R4 ; cycles=4
-419D: 5D 20 20 MOV:I.W #H'2020, R5 ; cycles=3
+419D: 5D 20 20 MOV:I.W #H'2020, R5 ; dataflow R5=H'2020; cycles=3
41A0: 18 BF E0 JSR @loc_BFE0 ; cycles=13
41A3: AC 09 ADD:Q.W #2, R4 ; cycles=4
-41A5: 5D 20 20 MOV:I.W #H'2020, R5 ; cycles=3
+41A5: 5D 20 20 MOV:I.W #H'2020, R5 ; dataflow R5=H'2020; cycles=3
41A8: 18 BF E0 JSR @loc_BFE0 ; cycles=13
41AB: CF 80 MOV:G.W @R7+, R0 ; cycles=6
41AD: 01 B8 D7 SCB/F R0, loc_4187 ; cycles=3/4/9 false/-1/t
@@ -2301,7 +2384,7 @@ loc_41B0:
41B0: 20 20 BRA loc_41D2 ; cycles=7
loc_41D2:
-41D2: 58 00 0F MOV:I.W #H'000F, R0 ; cycles=3
+41D2: 58 00 0F MOV:I.W #H'000F, R0 ; dataflow R0=H'000F; cycles=3
loc_41D5:
41D5: A8 81 MOV:G.W R0, R1 ; cycles=3
@@ -2333,78 +2416,78 @@ loc_41D5:
4216: 19 RTS ; cycles=12
loc_4217:
-4217: 15 F7 98 13 CLR.B @H'F798 ; refs H'F798 in on_chip_ram; cycles=8
-421B: 15 F7 31 C7 BSET.B #7, @H'F731 ; refs H'F731 in on_chip_ram; cycles=8
+4217: 15 F7 98 13 CLR.B @H'F798 ; refs ram_F798 in on_chip_ram; cycles=8
+421B: 15 F7 31 C7 BSET.B #7, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=8
421F: 15 FE 82 D2 BCLR.B #2, @P1DR ; clear bit 2 of P1DR; cycles=8
-4223: 1D F7 00 07 24 24 MOV:G.W #H'2424, @H'F700 ; refs H'F700 in on_chip_ram; cycles=9
-4229: 1D F7 02 07 24 24 MOV:G.W #H'2424, @H'F702 ; refs H'F702 in on_chip_ram; cycles=9
-422F: 1D F7 04 07 24 24 MOV:G.W #H'2424, @H'F704 ; refs H'F704 in on_chip_ram; cycles=9
-4235: 1D F7 06 07 24 24 MOV:G.W #H'2424, @H'F706 ; refs H'F706 in on_chip_ram; cycles=9
-423B: 15 F7 08 06 7F MOV:G.B #H'7F, @H'F708 ; refs H'F708 in on_chip_ram; cycles=9
-4240: 15 F7 09 06 24 MOV:G.B #H'24, @H'F709 ; refs H'F709 in on_chip_ram; cycles=9
-4245: 1D F7 0A 07 24 24 MOV:G.W #H'2424, @H'F70A ; refs H'F70A in on_chip_ram; cycles=9
-424B: 15 F7 10 13 CLR.B @H'F710 ; refs H'F710 in on_chip_ram; cycles=8
-424F: 15 F7 11 13 CLR.B @H'F711 ; refs H'F711 in on_chip_ram; cycles=8
-4253: 15 F7 12 13 CLR.B @H'F712 ; refs H'F712 in on_chip_ram; cycles=8
-4257: 15 F7 13 13 CLR.B @H'F713 ; refs H'F713 in on_chip_ram; cycles=8
-425B: 15 F7 14 13 CLR.B @H'F714 ; refs H'F714 in on_chip_ram; cycles=8
-425F: 15 F7 15 13 CLR.B @H'F715 ; refs H'F715 in on_chip_ram; cycles=8
-4263: 15 F7 16 13 CLR.B @H'F716 ; refs H'F716 in on_chip_ram; cycles=8
-4267: 15 F7 17 13 CLR.B @H'F717 ; refs H'F717 in on_chip_ram; cycles=8
-426B: 15 F7 18 06 FF MOV:G.B #H'FF, @H'F718 ; refs H'F718 in on_chip_ram; cycles=9
-4270: 15 F7 19 06 FF MOV:G.B #H'FF, @H'F719 ; refs H'F719 in on_chip_ram; cycles=9
-4275: 15 F7 1A 06 FF MOV:G.B #H'FF, @H'F71A ; refs H'F71A in on_chip_ram; cycles=9
-427A: 15 F7 1B 06 FF MOV:G.B #H'FF, @H'F71B ; refs H'F71B in on_chip_ram; cycles=9
-427F: 15 F7 1C 06 FF MOV:G.B #H'FF, @H'F71C ; refs H'F71C in on_chip_ram; cycles=9
-4284: 15 F7 1D 06 FF MOV:G.B #H'FF, @H'F71D ; refs H'F71D in on_chip_ram; cycles=9
-4289: 15 F7 1E 06 FF MOV:G.B #H'FF, @H'F71E ; refs H'F71E in on_chip_ram; cycles=9
-428E: 15 F7 1F 06 FF MOV:G.B #H'FF, @H'F71F ; refs H'F71F in on_chip_ram; cycles=9
-4293: 1D FA F0 07 20 43 MOV:G.W #H'2043, @H'FAF0 ; refs H'FAF0 in on_chip_ram; cycles=9
-4299: 1D FA F2 07 4F 4E MOV:G.W #H'4F4E, @H'FAF2 ; refs H'FAF2 in on_chip_ram; cycles=9
-429F: 1D FA F4 07 4E 45 MOV:G.W #H'4E45, @H'FAF4 ; refs H'FAF4 in on_chip_ram; cycles=9
-42A5: 1D FA F6 07 43 54 MOV:G.W #H'4354, @H'FAF6 ; refs H'FAF6 in on_chip_ram; cycles=9
-42AB: 1D FA F8 07 3A 4E MOV:G.W #H'3A4E, @H'FAF8 ; refs H'FAF8 in on_chip_ram; cycles=9
-42B1: 1D FA FA 07 4F 54 MOV:G.W #H'4F54, @H'FAFA ; refs H'FAFA in on_chip_ram; cycles=9
-42B7: 1D FA FC 07 20 41 MOV:G.W #H'2041, @H'FAFC ; refs H'FAFC in on_chip_ram; cycles=9
-42BD: 1D FA FE 07 43 54 MOV:G.W #H'4354, @H'FAFE ; refs H'FAFE in on_chip_ram; cycles=9
-42C3: 5D 00 00 MOV:I.W #H'0000, R5 ; cycles=3
+4223: 1D F7 00 07 24 24 MOV:G.W #H'2424, @H'F700 ; refs ram_F700 in on_chip_ram; cycles=9
+4229: 1D F7 02 07 24 24 MOV:G.W #H'2424, @H'F702 ; refs ram_F702 in on_chip_ram; cycles=9
+422F: 1D F7 04 07 24 24 MOV:G.W #H'2424, @H'F704 ; refs ram_F704 in on_chip_ram; cycles=9
+4235: 1D F7 06 07 24 24 MOV:G.W #H'2424, @H'F706 ; refs ram_F706 in on_chip_ram; cycles=9
+423B: 15 F7 08 06 7F MOV:G.B #H'7F, @H'F708 ; refs ram_F708 in on_chip_ram; cycles=9
+4240: 15 F7 09 06 24 MOV:G.B #H'24, @H'F709 ; refs ram_F709 in on_chip_ram; cycles=9
+4245: 1D F7 0A 07 24 24 MOV:G.W #H'2424, @H'F70A ; refs ram_F70A in on_chip_ram; cycles=9
+424B: 15 F7 10 13 CLR.B @H'F710 ; refs ram_F710 in on_chip_ram; cycles=8
+424F: 15 F7 11 13 CLR.B @H'F711 ; refs ram_F711 in on_chip_ram; cycles=8
+4253: 15 F7 12 13 CLR.B @H'F712 ; refs ram_F712 in on_chip_ram; cycles=8
+4257: 15 F7 13 13 CLR.B @H'F713 ; refs ram_F713 in on_chip_ram; cycles=8
+425B: 15 F7 14 13 CLR.B @H'F714 ; refs ram_F714 in on_chip_ram; cycles=8
+425F: 15 F7 15 13 CLR.B @H'F715 ; refs ram_F715 in on_chip_ram; cycles=8
+4263: 15 F7 16 13 CLR.B @H'F716 ; refs ram_F716 in on_chip_ram; cycles=8
+4267: 15 F7 17 13 CLR.B @H'F717 ; refs ram_F717 in on_chip_ram; cycles=8
+426B: 15 F7 18 06 FF MOV:G.B #H'FF, @H'F718 ; refs ram_F718 in on_chip_ram; cycles=9
+4270: 15 F7 19 06 FF MOV:G.B #H'FF, @H'F719 ; refs ram_F719 in on_chip_ram; cycles=9
+4275: 15 F7 1A 06 FF MOV:G.B #H'FF, @H'F71A ; refs ram_F71A in on_chip_ram; cycles=9
+427A: 15 F7 1B 06 FF MOV:G.B #H'FF, @H'F71B ; refs ram_F71B in on_chip_ram; cycles=9
+427F: 15 F7 1C 06 FF MOV:G.B #H'FF, @H'F71C ; refs ram_F71C in on_chip_ram; cycles=9
+4284: 15 F7 1D 06 FF MOV:G.B #H'FF, @H'F71D ; refs ram_F71D in on_chip_ram; cycles=9
+4289: 15 F7 1E 06 FF MOV:G.B #H'FF, @H'F71E ; refs ram_F71E in on_chip_ram; cycles=9
+428E: 15 F7 1F 06 FF MOV:G.B #H'FF, @H'F71F ; refs ram_F71F in on_chip_ram; cycles=9
+4293: 1D FA F0 07 20 43 MOV:G.W #H'2043, @H'FAF0 ; refs ram_FAF0 in on_chip_ram; cycles=9
+4299: 1D FA F2 07 4F 4E MOV:G.W #H'4F4E, @H'FAF2 ; refs ram_FAF2 in on_chip_ram; cycles=9
+429F: 1D FA F4 07 4E 45 MOV:G.W #H'4E45, @H'FAF4 ; refs ram_FAF4 in on_chip_ram; cycles=9
+42A5: 1D FA F6 07 43 54 MOV:G.W #H'4354, @H'FAF6 ; refs ram_FAF6 in on_chip_ram; cycles=9
+42AB: 1D FA F8 07 3A 4E MOV:G.W #H'3A4E, @H'FAF8 ; refs ram_FAF8 in on_chip_ram; cycles=9
+42B1: 1D FA FA 07 4F 54 MOV:G.W #H'4F54, @H'FAFA ; refs ram_FAFA in on_chip_ram; cycles=9
+42B7: 1D FA FC 07 20 41 MOV:G.W #H'2041, @H'FAFC ; refs ram_FAFC in on_chip_ram; cycles=9
+42BD: 1D FA FE 07 43 54 MOV:G.W #H'4354, @H'FAFE ; refs ram_FAFE in on_chip_ram; cycles=9
+42C3: 5D 00 00 MOV:I.W #H'0000, R5 ; dataflow R5=H'0000; cycles=3
42C6: 1E FC 03 BSR loc_3ECC ; cycles=13
-42C9: 1D FA F0 07 20 20 MOV:G.W #H'2020, @H'FAF0 ; refs H'FAF0 in on_chip_ram; cycles=9
-42CF: 1D FA F2 07 20 20 MOV:G.W #H'2020, @H'FAF2 ; refs H'FAF2 in on_chip_ram; cycles=9
-42D5: 1D FA F4 07 20 20 MOV:G.W #H'2020, @H'FAF4 ; refs H'FAF4 in on_chip_ram; cycles=9
-42DB: 1D FA F6 07 20 20 MOV:G.W #H'2020, @H'FAF6 ; refs H'FAF6 in on_chip_ram; cycles=9
-42E1: 1D FA F8 07 20 20 MOV:G.W #H'2020, @H'FAF8 ; refs H'FAF8 in on_chip_ram; cycles=9
-42E7: 1D FA FA 07 20 20 MOV:G.W #H'2020, @H'FAFA ; refs H'FAFA in on_chip_ram; cycles=9
-42ED: 1D FA FC 07 20 20 MOV:G.W #H'2020, @H'FAFC ; refs H'FAFC in on_chip_ram; cycles=9
-42F3: 1D FA FE 07 20 20 MOV:G.W #H'2020, @H'FAFE ; refs H'FAFE in on_chip_ram; cycles=9
-42F9: 5D 00 01 MOV:I.W #H'0001, R5 ; cycles=3
+42C9: 1D FA F0 07 20 20 MOV:G.W #H'2020, @H'FAF0 ; refs ram_FAF0 in on_chip_ram; cycles=9
+42CF: 1D FA F2 07 20 20 MOV:G.W #H'2020, @H'FAF2 ; refs ram_FAF2 in on_chip_ram; cycles=9
+42D5: 1D FA F4 07 20 20 MOV:G.W #H'2020, @H'FAF4 ; refs ram_FAF4 in on_chip_ram; cycles=9
+42DB: 1D FA F6 07 20 20 MOV:G.W #H'2020, @H'FAF6 ; refs ram_FAF6 in on_chip_ram; cycles=9
+42E1: 1D FA F8 07 20 20 MOV:G.W #H'2020, @H'FAF8 ; refs ram_FAF8 in on_chip_ram; cycles=9
+42E7: 1D FA FA 07 20 20 MOV:G.W #H'2020, @H'FAFA ; refs ram_FAFA in on_chip_ram; cycles=9
+42ED: 1D FA FC 07 20 20 MOV:G.W #H'2020, @H'FAFC ; refs ram_FAFC in on_chip_ram; cycles=9
+42F3: 1D FA FE 07 20 20 MOV:G.W #H'2020, @H'FAFE ; refs ram_FAFE in on_chip_ram; cycles=9
+42F9: 5D 00 01 MOV:I.W #H'0001, R5 ; dataflow R5=H'0001; cycles=3
42FC: 1E FB CD BSR loc_3ECC ; cycles=13
-42FF: 5D 00 02 MOV:I.W #H'0002, R5 ; cycles=3
+42FF: 5D 00 02 MOV:I.W #H'0002, R5 ; dataflow R5=H'0002; cycles=3
4302: 1E FB C7 BSR loc_3ECC ; cycles=13
-4305: 5D 00 03 MOV:I.W #H'0003, R5 ; cycles=3
+4305: 5D 00 03 MOV:I.W #H'0003, R5 ; dataflow R5=H'0003; cycles=3
4308: 1E FB C1 BSR loc_3ECC ; cycles=13
430B: 19 RTS ; cycles=13
loc_430C:
430C: 15 FE 8B D0 BCLR.B #0, @P6DR ; clear bit 0 of P6DR; cycles=9
-4310: 15 F5 55 06 AA MOV:G.B #H'AA, @H'F555 ; refs H'F555 in program_or_external; cycles=9
-4315: 15 F4 AA 06 55 MOV:G.B #H'55, @H'F4AA ; refs H'F4AA in program_or_external; cycles=9
-431A: 15 F5 55 06 CC MOV:G.B #H'CC, @H'F555 ; refs H'F555 in program_or_external; cycles=9
+4310: 15 F5 55 06 AA MOV:G.B #H'AA, @H'F555 ; refs mem_F555 in program_or_external; cycles=9
+4315: 15 F4 AA 06 55 MOV:G.B #H'55, @H'F4AA ; refs mem_F4AA in program_or_external; cycles=9
+431A: 15 F5 55 06 CC MOV:G.B #H'CC, @H'F555 ; refs mem_F555 in program_or_external; cycles=9
431F: 15 FE 8B C0 BSET.B #0, @P6DR ; set bit 0 of P6DR; cycles=8
4323: 19 RTS ; cycles=13
loc_4324:
-4324: 5C 00 38 MOV:I.W #H'0038, R4 ; cycles=3
-4327: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+4324: 5C 00 38 MOV:I.W #H'0038, R4 ; dataflow R4=H'0038; cycles=3
+4327: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
432A: 1E FB 9F BSR loc_3ECC ; cycles=13
-432D: 5C 00 01 MOV:I.W #H'0001, R4 ; cycles=3
-4330: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+432D: 5C 00 01 MOV:I.W #H'0001, R4 ; dataflow R4=H'0001; cycles=3
+4330: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
4333: 1E FB 96 BSR loc_3ECC ; cycles=14
-4336: 5C 00 0E MOV:I.W #H'000E, R4 ; cycles=3
-4339: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+4336: 5C 00 0E MOV:I.W #H'000E, R4 ; dataflow R4=H'000E; cycles=3
+4339: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
433C: 1E FB 8D BSR loc_3ECC ; cycles=13
-433F: 5C 00 06 MOV:I.W #H'0006, R4 ; cycles=3
-4342: 5D 00 04 MOV:I.W #H'0004, R5 ; cycles=3
+433F: 5C 00 06 MOV:I.W #H'0006, R4 ; dataflow R4=H'0006; cycles=3
+4342: 5D 00 04 MOV:I.W #H'0004, R5 ; dataflow R5=H'0004; cycles=3
4345: 1E FB 84 BSR loc_3ECC ; cycles=14
4348: 1E CD 83 BSR loc_10CE ; cycles=13
434B: 19 RTS ; cycles=13
@@ -2427,21 +2510,21 @@ loc_434C:
4388: 1D FE EC 07 A5 3F MOV:G.W #H'A53F, @WDT_TCSR_R ; WDT_TCSR_R = H'A53F (OVF=0 WT/IT=0 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, interval IRQ0, clock phi/4096); cycles=11
loc_438E:
-438E: 0C 03 00 88 LDC.W #H'0300, SR ; cycles=6
+438E: 0C 03 00 88 LDC.W #H'0300, SR ; dataflow SR=H'0300; cycles=6
4392: 19 RTS ; cycles=12
vec_nmi_4393:
4393: 0A RTE ; cycles=14
loc_4394:
-4394: 15 F7 31 04 01 CMP:G.B #H'01, @H'F731 ; refs H'F731 in on_chip_ram; cycles=7
+4394: 15 F7 31 04 01 CMP:G.B #H'01, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=7
4399: 32 00 86 BHI loc_4422 ; cycles=3/8 nt/t
-439C: 15 FB 03 F7 BTST.B #7, @H'FB03 ; refs H'FB03 in on_chip_ram; cycles=7
+439C: 15 FB 03 F7 BTST.B #7, @H'FB03 ; refs ram_FB03 in on_chip_ram; cycles=7
43A0: 36 00 7F BNE loc_4422 ; cycles=3/7 nt/t
-43A3: 1D F7 36 83 MOV:G.W @H'F736, R3 ; refs H'F736 in on_chip_ram; cycles=6
+43A3: 1D F7 36 83 MOV:G.W @H'F736, R3 ; refs ram_F736 in on_chip_ram; cycles=6
43A7: 37 00 78 BEQ loc_4422 ; cycles=3/8 nt/t
-43AA: 1D F6 9E 84 MOV:G.W @H'F69E, R4 ; refs H'F69E in on_chip_ram; cycles=7
-43AE: 1D F6 BE 34 SUB.W @H'F6BE, R4 ; refs H'F6BE in on_chip_ram; cycles=7
+43AA: 1D F6 9E 84 MOV:G.W @H'F69E, R4 ; refs ram_F69E in on_chip_ram; cycles=7
+43AE: 1D F6 BE 34 SUB.W @H'F6BE, R4 ; refs ram_F6BE in on_chip_ram; cycles=7
43B2: AB DF BCLR.W #15, R3 ; cycles=3
43B4: 26 19 BNE loc_43CF ; cycles=3/7 nt/t
43B6: AB DE BCLR.W #14, R3 ; cycles=3
@@ -2494,8 +2577,8 @@ loc_43FD:
43FD: 20 23 BRA loc_4422 ; cycles=8
loc_43FF:
-43FF: 15 F7 70 06 80 MOV:G.B #H'80, @H'F770 ; refs H'F770 in on_chip_ram; cycles=9
-4404: 1D F7 72 94 MOV:G.W R4, @H'F772 ; refs H'F772 in on_chip_ram; cycles=7
+43FF: 15 F7 70 06 80 MOV:G.B #H'80, @H'F770 ; refs ram_F770 in on_chip_ram; cycles=9
+4404: 1D F7 72 94 MOV:G.W R4, @H'F772 ; refs ram_F772 in on_chip_ram; cycles=7
4408: 1E 04 EF BSR loc_48FA ; cycles=13
440B: 20 15 BRA loc_4422 ; cycles=8
@@ -2503,50 +2586,50 @@ loc_440D:
440D: 0E 20 BSR loc_442F ; cycles=14
440F: 4C 00 02 CMP:I #H'0002, R4 ; cycles=3
4412: 27 0C BEQ loc_4420 ; cycles=3/7 nt/t
-4414: 15 F7 70 06 80 MOV:G.B #H'80, @H'F770 ; refs H'F770 in on_chip_ram; cycles=9
-4419: 1D F7 72 94 MOV:G.W R4, @H'F772 ; refs H'F772 in on_chip_ram; cycles=6
+4414: 15 F7 70 06 80 MOV:G.B #H'80, @H'F770 ; refs ram_F770 in on_chip_ram; cycles=9
+4419: 1D F7 72 94 MOV:G.W R4, @H'F772 ; refs ram_F772 in on_chip_ram; cycles=6
441D: 1E 04 DA BSR loc_48FA ; cycles=14
loc_4420:
4420: 20 00 BRA loc_4422 ; cycles=7
loc_4422:
-4422: 1D F6 9E 84 MOV:G.W @H'F69E, R4 ; refs H'F69E in on_chip_ram; cycles=7
-4426: 1D F6 BE 94 MOV:G.W R4, @H'F6BE ; refs H'F6BE in on_chip_ram; cycles=7
-442A: 15 FB 02 13 CLR.B @H'FB02 ; refs H'FB02 in on_chip_ram; cycles=9
+4422: 1D F6 9E 84 MOV:G.W @H'F69E, R4 ; refs ram_F69E in on_chip_ram; cycles=7
+4426: 1D F6 BE 94 MOV:G.W R4, @H'F6BE ; refs ram_F6BE in on_chip_ram; cycles=7
+442A: 15 FB 02 13 CLR.B @H'FB02 ; refs ram_FB02 in on_chip_ram; cycles=9
442E: 19 RTS ; cycles=12
loc_442F:
-442F: 15 F6 F7 24 ADD:G.B @H'F6F7, R4 ; refs H'F6F7 in on_chip_ram; cycles=6
+442F: 15 F6 F7 24 ADD:G.B @H'F6F7, R4 ; refs ram_F6F7 in on_chip_ram; cycles=6
4433: 44 88 CMP:E #H'88, R4 ; cycles=2
4435: 24 0D BCC loc_4444 ; cycles=3/8 nt/t
4437: 44 78 CMP:E #H'78, R4 ; cycles=2
4439: 23 13 BLS loc_444E ; cycles=3/8 nt/t
-443B: 15 F6 F7 94 MOV:G.B R4, @H'F6F7 ; refs H'F6F7 in on_chip_ram; cycles=6
-443F: 5C 00 02 MOV:I.W #H'0002, R4 ; cycles=3
+443B: 15 F6 F7 94 MOV:G.B R4, @H'F6F7 ; refs ram_F6F7 in on_chip_ram; cycles=6
+443F: 5C 00 02 MOV:I.W #H'0002, R4 ; dataflow R4=H'0002; cycles=3
4442: 20 12 BRA loc_4456 ; cycles=7
loc_4444:
-4444: 15 F6 F7 06 80 MOV:G.B #H'80, @H'F6F7 ; refs H'F6F7 in on_chip_ram; cycles=9
-4449: 5C 00 00 MOV:I.W #H'0000, R4 ; cycles=3
+4444: 15 F6 F7 06 80 MOV:G.B #H'80, @H'F6F7 ; refs ram_F6F7 in on_chip_ram; cycles=9
+4449: 5C 00 00 MOV:I.W #H'0000, R4 ; dataflow R4=H'0000; cycles=3
444C: 20 08 BRA loc_4456 ; cycles=7
loc_444E:
-444E: 15 F6 F7 06 80 MOV:G.B #H'80, @H'F6F7 ; refs H'F6F7 in on_chip_ram; cycles=9
-4453: 5C 00 01 MOV:I.W #H'0001, R4 ; cycles=3
+444E: 15 F6 F7 06 80 MOV:G.B #H'80, @H'F6F7 ; refs ram_F6F7 in on_chip_ram; cycles=9
+4453: 5C 00 01 MOV:I.W #H'0001, R4 ; dataflow R4=H'0001; cycles=3
loc_4456:
4456: 19 RTS ; cycles=12
loc_4457:
-4457: 15 F7 31 04 01 CMP:G.B #H'01, @H'F731 ; refs H'F731 in on_chip_ram; cycles=6
+4457: 15 F7 31 04 01 CMP:G.B #H'01, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=6
445C: 32 00 86 BHI loc_44E5 ; cycles=3/7 nt/t
-445F: 15 FB 03 F7 BTST.B #7, @H'FB03 ; refs H'FB03 in on_chip_ram; cycles=6
+445F: 15 FB 03 F7 BTST.B #7, @H'FB03 ; refs ram_FB03 in on_chip_ram; cycles=6
4463: 36 00 7F BNE loc_44E5 ; cycles=3/8 nt/t
-4466: 1D F7 38 83 MOV:G.W @H'F738, R3 ; refs H'F738 in on_chip_ram; cycles=7
+4466: 1D F7 38 83 MOV:G.W @H'F738, R3 ; refs ram_F738 in on_chip_ram; cycles=7
446A: 37 00 78 BEQ loc_44E5 ; cycles=3/7 nt/t
-446D: 1D F6 9C 84 MOV:G.W @H'F69C, R4 ; refs H'F69C in on_chip_ram; cycles=6
-4471: 1D F6 BC 34 SUB.W @H'F6BC, R4 ; refs H'F6BC in on_chip_ram; cycles=6
+446D: 1D F6 9C 84 MOV:G.W @H'F69C, R4 ; refs ram_F69C in on_chip_ram; cycles=6
+4471: 1D F6 BC 34 SUB.W @H'F6BC, R4 ; refs ram_F6BC in on_chip_ram; cycles=6
4475: AB DF BCLR.W #15, R3 ; cycles=3
4477: 26 19 BNE loc_4492 ; cycles=3/8 nt/t
4479: AB DE BCLR.W #14, R3 ; cycles=3
@@ -2599,8 +2682,8 @@ loc_44C0:
44C0: 20 23 BRA loc_44E5 ; cycles=7
loc_44C2:
-44C2: 15 F7 70 06 40 MOV:G.B #H'40, @H'F770 ; refs H'F770 in on_chip_ram; cycles=9
-44C7: 1D F7 72 94 MOV:G.W R4, @H'F772 ; refs H'F772 in on_chip_ram; cycles=6
+44C2: 15 F7 70 06 40 MOV:G.B #H'40, @H'F770 ; refs ram_F770 in on_chip_ram; cycles=9
+44C7: 1D F7 72 94 MOV:G.W R4, @H'F772 ; refs ram_F772 in on_chip_ram; cycles=6
44CB: 1E 04 2C BSR loc_48FA ; cycles=14
44CE: 20 15 BRA loc_44E5 ; cycles=7
@@ -2608,50 +2691,50 @@ loc_44D0:
44D0: 0E 20 BSR loc_44F2 ; cycles=13
44D2: 4C 00 02 CMP:I #H'0002, R4 ; cycles=3
44D5: 27 0C BEQ loc_44E3 ; cycles=3/8 nt/t
-44D7: 15 F7 70 06 40 MOV:G.B #H'40, @H'F770 ; refs H'F770 in on_chip_ram; cycles=9
-44DC: 1D F7 72 94 MOV:G.W R4, @H'F772 ; refs H'F772 in on_chip_ram; cycles=7
+44D7: 15 F7 70 06 40 MOV:G.B #H'40, @H'F770 ; refs ram_F770 in on_chip_ram; cycles=9
+44DC: 1D F7 72 94 MOV:G.W R4, @H'F772 ; refs ram_F772 in on_chip_ram; cycles=7
44E0: 1E 04 17 BSR loc_48FA ; cycles=13
loc_44E3:
44E3: 20 00 BRA loc_44E5 ; cycles=8
loc_44E5:
-44E5: 1D F6 9C 84 MOV:G.W @H'F69C, R4 ; refs H'F69C in on_chip_ram; cycles=6
-44E9: 1D F6 BC 94 MOV:G.W R4, @H'F6BC ; refs H'F6BC in on_chip_ram; cycles=6
-44ED: 15 FB 02 13 CLR.B @H'FB02 ; refs H'FB02 in on_chip_ram; cycles=8
+44E5: 1D F6 9C 84 MOV:G.W @H'F69C, R4 ; refs ram_F69C in on_chip_ram; cycles=6
+44E9: 1D F6 BC 94 MOV:G.W R4, @H'F6BC ; refs ram_F6BC in on_chip_ram; cycles=6
+44ED: 15 FB 02 13 CLR.B @H'FB02 ; refs ram_FB02 in on_chip_ram; cycles=8
44F1: 19 RTS ; cycles=13
loc_44F2:
-44F2: 15 F6 F8 24 ADD:G.B @H'F6F8, R4 ; refs H'F6F8 in on_chip_ram; cycles=7
+44F2: 15 F6 F8 24 ADD:G.B @H'F6F8, R4 ; refs ram_F6F8 in on_chip_ram; cycles=7
44F6: 44 88 CMP:E #H'88, R4 ; cycles=2
44F8: 24 0D BCC loc_4507 ; cycles=3/7 nt/t
44FA: 44 78 CMP:E #H'78, R4 ; cycles=2
44FC: 23 13 BLS loc_4511 ; cycles=3/7 nt/t
-44FE: 15 F6 F8 94 MOV:G.B R4, @H'F6F8 ; refs H'F6F8 in on_chip_ram; cycles=7
-4502: 5C 00 02 MOV:I.W #H'0002, R4 ; cycles=3
+44FE: 15 F6 F8 94 MOV:G.B R4, @H'F6F8 ; refs ram_F6F8 in on_chip_ram; cycles=7
+4502: 5C 00 02 MOV:I.W #H'0002, R4 ; dataflow R4=H'0002; cycles=3
4505: 20 12 BRA loc_4519 ; cycles=8
loc_4507:
-4507: 15 F6 F8 06 80 MOV:G.B #H'80, @H'F6F8 ; refs H'F6F8 in on_chip_ram; cycles=9
-450C: 5C 00 00 MOV:I.W #H'0000, R4 ; cycles=3
+4507: 15 F6 F8 06 80 MOV:G.B #H'80, @H'F6F8 ; refs ram_F6F8 in on_chip_ram; cycles=9
+450C: 5C 00 00 MOV:I.W #H'0000, R4 ; dataflow R4=H'0000; cycles=3
450F: 20 08 BRA loc_4519 ; cycles=8
loc_4511:
-4511: 15 F6 F8 06 80 MOV:G.B #H'80, @H'F6F8 ; refs H'F6F8 in on_chip_ram; cycles=9
-4516: 5C 00 01 MOV:I.W #H'0001, R4 ; cycles=3
+4511: 15 F6 F8 06 80 MOV:G.B #H'80, @H'F6F8 ; refs ram_F6F8 in on_chip_ram; cycles=9
+4516: 5C 00 01 MOV:I.W #H'0001, R4 ; dataflow R4=H'0001; cycles=3
loc_4519:
4519: 19 RTS ; cycles=13
loc_451A:
-451A: 15 F7 31 04 01 CMP:G.B #H'01, @H'F731 ; refs H'F731 in on_chip_ram; cycles=7
+451A: 15 F7 31 04 01 CMP:G.B #H'01, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=7
451F: 32 00 86 BHI loc_45A8 ; cycles=3/8 nt/t
-4522: 15 FB 03 F7 BTST.B #7, @H'FB03 ; refs H'FB03 in on_chip_ram; cycles=7
+4522: 15 FB 03 F7 BTST.B #7, @H'FB03 ; refs ram_FB03 in on_chip_ram; cycles=7
4526: 36 00 7F BNE loc_45A8 ; cycles=3/7 nt/t
-4529: 1D F7 3A 83 MOV:G.W @H'F73A, R3 ; refs H'F73A in on_chip_ram; cycles=6
+4529: 1D F7 3A 83 MOV:G.W @H'F73A, R3 ; refs ram_F73A in on_chip_ram; cycles=6
452D: 37 00 78 BEQ loc_45A8 ; cycles=3/8 nt/t
-4530: 1D F6 9A 84 MOV:G.W @H'F69A, R4 ; refs H'F69A in on_chip_ram; cycles=7
-4534: 1D F6 BA 34 SUB.W @H'F6BA, R4 ; refs H'F6BA in on_chip_ram; cycles=7
+4530: 1D F6 9A 84 MOV:G.W @H'F69A, R4 ; refs ram_F69A in on_chip_ram; cycles=7
+4534: 1D F6 BA 34 SUB.W @H'F6BA, R4 ; refs ram_F6BA in on_chip_ram; cycles=7
4538: AB DF BCLR.W #15, R3 ; cycles=3
453A: 26 19 BNE loc_4555 ; cycles=3/7 nt/t
453C: AB DE BCLR.W #14, R3 ; cycles=3
@@ -2704,8 +2787,8 @@ loc_4583:
4583: 20 23 BRA loc_45A8 ; cycles=8
loc_4585:
-4585: 15 F7 70 06 20 MOV:G.B #H'20, @H'F770 ; refs H'F770 in on_chip_ram; cycles=9
-458A: 1D F7 72 94 MOV:G.W R4, @H'F772 ; refs H'F772 in on_chip_ram; cycles=7
+4585: 15 F7 70 06 20 MOV:G.B #H'20, @H'F770 ; refs ram_F770 in on_chip_ram; cycles=9
+458A: 1D F7 72 94 MOV:G.W R4, @H'F772 ; refs ram_F772 in on_chip_ram; cycles=7
458E: 1E 03 69 BSR loc_48FA ; cycles=13
4591: 20 15 BRA loc_45A8 ; cycles=8
@@ -2713,71 +2796,71 @@ loc_4593:
4593: 0E 20 BSR loc_45B5 ; cycles=14
4595: 4C 00 02 CMP:I #H'0002, R4 ; cycles=3
4598: 27 0C BEQ loc_45A6 ; cycles=3/7 nt/t
-459A: 15 F7 70 06 20 MOV:G.B #H'20, @H'F770 ; refs H'F770 in on_chip_ram; cycles=9
-459F: 1D F7 72 94 MOV:G.W R4, @H'F772 ; refs H'F772 in on_chip_ram; cycles=6
+459A: 15 F7 70 06 20 MOV:G.B #H'20, @H'F770 ; refs ram_F770 in on_chip_ram; cycles=9
+459F: 1D F7 72 94 MOV:G.W R4, @H'F772 ; refs ram_F772 in on_chip_ram; cycles=6
45A3: 1E 03 54 BSR loc_48FA ; cycles=14
loc_45A6:
45A6: 20 00 BRA loc_45A8 ; cycles=7
loc_45A8:
-45A8: 1D F6 9A 84 MOV:G.W @H'F69A, R4 ; refs H'F69A in on_chip_ram; cycles=7
-45AC: 1D F6 BA 94 MOV:G.W R4, @H'F6BA ; refs H'F6BA in on_chip_ram; cycles=7
-45B0: 15 FB 02 13 CLR.B @H'FB02 ; refs H'FB02 in on_chip_ram; cycles=9
+45A8: 1D F6 9A 84 MOV:G.W @H'F69A, R4 ; refs ram_F69A in on_chip_ram; cycles=7
+45AC: 1D F6 BA 94 MOV:G.W R4, @H'F6BA ; refs ram_F6BA in on_chip_ram; cycles=7
+45B0: 15 FB 02 13 CLR.B @H'FB02 ; refs ram_FB02 in on_chip_ram; cycles=9
45B4: 19 RTS ; cycles=12
loc_45B5:
-45B5: 15 F6 F9 24 ADD:G.B @H'F6F9, R4 ; refs H'F6F9 in on_chip_ram; cycles=6
+45B5: 15 F6 F9 24 ADD:G.B @H'F6F9, R4 ; refs ram_F6F9 in on_chip_ram; cycles=6
45B9: 44 88 CMP:E #H'88, R4 ; cycles=2
45BB: 24 0D BCC loc_45CA ; cycles=3/8 nt/t
45BD: 44 78 CMP:E #H'78, R4 ; cycles=2
45BF: 23 13 BLS loc_45D4 ; cycles=3/8 nt/t
-45C1: 15 F6 F9 94 MOV:G.B R4, @H'F6F9 ; refs H'F6F9 in on_chip_ram; cycles=6
-45C5: 5C 00 02 MOV:I.W #H'0002, R4 ; cycles=3
+45C1: 15 F6 F9 94 MOV:G.B R4, @H'F6F9 ; refs ram_F6F9 in on_chip_ram; cycles=6
+45C5: 5C 00 02 MOV:I.W #H'0002, R4 ; dataflow R4=H'0002; cycles=3
45C8: 20 12 BRA loc_45DC ; cycles=7
loc_45CA:
-45CA: 15 F6 F9 06 80 MOV:G.B #H'80, @H'F6F9 ; refs H'F6F9 in on_chip_ram; cycles=9
-45CF: 5C 00 00 MOV:I.W #H'0000, R4 ; cycles=3
+45CA: 15 F6 F9 06 80 MOV:G.B #H'80, @H'F6F9 ; refs ram_F6F9 in on_chip_ram; cycles=9
+45CF: 5C 00 00 MOV:I.W #H'0000, R4 ; dataflow R4=H'0000; cycles=3
45D2: 20 08 BRA loc_45DC ; cycles=7
loc_45D4:
-45D4: 15 F6 F9 06 80 MOV:G.B #H'80, @H'F6F9 ; refs H'F6F9 in on_chip_ram; cycles=9
-45D9: 5C 00 01 MOV:I.W #H'0001, R4 ; cycles=3
+45D4: 15 F6 F9 06 80 MOV:G.B #H'80, @H'F6F9 ; refs ram_F6F9 in on_chip_ram; cycles=9
+45D9: 5C 00 01 MOV:I.W #H'0001, R4 ; dataflow R4=H'0001; cycles=3
loc_45DC:
45DC: 19 RTS ; cycles=12
loc_48EF:
-48EF: 1D F7 34 80 MOV:G.W @H'F734, R0 ; refs H'F734 in on_chip_ram; cycles=6
-48F3: 1D F7 32 90 MOV:G.W R0, @H'F732 ; refs H'F732 in on_chip_ram; cycles=6
+48EF: 1D F7 34 80 MOV:G.W @H'F734, R0 ; refs ram_F734 in on_chip_ram; cycles=6
+48F3: 1D F7 32 90 MOV:G.W R0, @H'F732 ; refs ram_F732 in on_chip_ram; cycles=6
48F7: 0E 01 BSR loc_48FA ; cycles=14
48F9: 19 RTS ; cycles=13
loc_48FA:
-48FA: 15 FB 03 F7 BTST.B #7, @H'FB03 ; refs H'FB03 in on_chip_ram; cycles=7
+48FA: 15 FB 03 F7 BTST.B #7, @H'FB03 ; refs ram_FB03 in on_chip_ram; cycles=7
48FE: 26 29 BNE loc_4929 ; cycles=3/7 nt/t
-4900: 15 F7 32 04 1A CMP:G.B #H'1A, @H'F732 ; refs H'F732 in on_chip_ram; cycles=7
+4900: 15 F7 32 04 1A CMP:G.B #H'1A, @H'F732 ; refs ram_F732 in on_chip_ram; cycles=7
4905: 27 22 BEQ loc_4929 ; cycles=3/8 nt/t
-4907: 1D F7 32 05 19 00 CMP:G.W #H'1900, @H'F732 ; refs H'F732 in on_chip_ram; cycles=6
+4907: 1D F7 32 05 19 00 CMP:G.W #H'1900, @H'F732 ; refs ram_F732 in on_chip_ram; cycles=6
490D: 27 1A BEQ loc_4929 ; cycles=3/8 nt/t
-490F: 1D E1 EC FD BTST.W #13, @H'E1EC ; refs H'E1EC in program_or_external; cycles=6
+490F: 1D E1 EC FD BTST.W #13, @H'E1EC ; refs mem_E1EC in program_or_external; cycles=6
4913: 27 14 BEQ loc_4929 ; cycles=3/8 nt/t
-4915: 1D E1 EC 80 MOV:G.W @H'E1EC, R0 ; refs H'E1EC in program_or_external; cycles=6
+4915: 1D E1 EC 80 MOV:G.W @H'E1EC, R0 ; refs mem_E1EC in program_or_external; cycles=6
4919: 0C 9F FF 50 AND.W #H'9FFF, R0 ; cycles=4
-491D: 1D E9 EC 90 MOV:G.W R0, @H'E9EC ; refs H'E9EC in program_or_external; cycles=6
-4921: 52 80 MOV:E.B #H'80, R2 ; cycles=2
-4923: 5B 00 F6 MOV:I.W #H'00F6, R3 ; cycles=3
+491D: 1D E9 EC 90 MOV:G.W R0, @H'E9EC ; refs mem_E9EC in program_or_external; cycles=6
+4921: 52 80 MOV:E.B #H'80, R2 ; dataflow R2=H'80; cycles=2
+4923: 5B 00 F6 MOV:I.W #H'00F6, R3 ; dataflow R3=H'00F6; cycles=3
4926: 1E F5 2B BSR loc_3E54 ; cycles=13
loc_4929:
-4929: 15 F7 6E F6 BTST.B #6, @H'F76E ; refs H'F76E in on_chip_ram; cycles=6
+4929: 15 F7 6E F6 BTST.B #6, @H'F76E ; refs ram_F76E in on_chip_ram; cycles=6
492D: 26 0E BNE loc_493D ; cycles=3/8 nt/t
-492F: 15 F7 32 80 MOV:G.B @H'F732, R0 ; refs H'F732 in on_chip_ram; cycles=6
+492F: 15 F7 32 80 MOV:G.B @H'F732, R0 ; refs ram_F732 in on_chip_ram; cycles=6
4933: A0 12 EXTU.B R0 ; cycles=3
4935: A0 1A SHLL.B R0 ; cycles=2
4937: F8 49 3E 80 MOV:G.W @(H'493E,R0), R0 ; cycles=6
-493B: 11 D8 JSR @R0 ; cycles=14
+493B: 11 D8 JSR @R0 ; JSR @R0 uses R0 loaded from pointer table H'493E via R0 (0/52 decoded targets); cycles=14
loc_493D:
493D: 19 RTS ; cycles=13
@@ -2822,112 +2905,112 @@ loc_622B:
loc_6244:
6244: 45 7F CMP:E #H'7F, R5 ; cycles=2
6246: 22 17 BHI loc_625F ; cycles=3/7 nt/t
-6248: 5C 00 00 MOV:I.W #H'0000, R4 ; cycles=3
+6248: 5C 00 00 MOV:I.W #H'0000, R4 ; dataflow R4=H'0000; cycles=3
624B: 20 17 BRA loc_6264 ; cycles=8
loc_624D:
624D: 45 FF CMP:E #H'FF, R5 ; cycles=2
624F: 22 0E BHI loc_625F ; cycles=3/8 nt/t
-6251: 5C 00 80 MOV:I.W #H'0080, R4 ; cycles=3
+6251: 5C 00 80 MOV:I.W #H'0080, R4 ; dataflow R4=H'0080; cycles=3
6254: 20 0E BRA loc_6264 ; cycles=7
loc_6256:
6256: 45 7F CMP:E #H'7F, R5 ; cycles=2
6258: 22 05 BHI loc_625F ; cycles=3/7 nt/t
-625A: 5C 01 80 MOV:I.W #H'0180, R4 ; cycles=3
+625A: 5C 01 80 MOV:I.W #H'0180, R4 ; dataflow R4=H'0180; cycles=3
625D: 20 05 BRA loc_6264 ; cycles=8
loc_625F:
-625F: AC 13 CLR.W R4 ; cycles=3
-6261: 5D 01 FF MOV:I.W #H'01FF, R5 ; cycles=3
+625F: AC 13 CLR.W R4 ; dataflow R4=H'0000; cycles=3
+6261: 5D 01 FF MOV:I.W #H'01FF, R5 ; dataflow R5=H'01FF; cycles=3
loc_6264:
6264: AC 25 ADD:G.W R4, R5 ; cycles=3
6266: 19 RTS ; cycles=12
loc_BA26:
-BA26: 15 F9 C0 16 TST.B @H'F9C0 ; refs H'F9C0 in on_chip_ram; cycles=7
+BA26: 15 F9 C0 16 TST.B @H'F9C0 ; refs ram_F9C0 in on_chip_ram; cycles=7
BA2A: 26 FA BNE loc_BA26 ; cycles=3/7 nt/t
-BA2C: 15 F9 C0 06 64 MOV:G.B #H'64, @H'F9C0 ; refs H'F9C0 in on_chip_ram; cycles=9
-BA31: 15 F9 C4 06 07 MOV:G.B #H'07, @H'F9C4 ; refs H'F9C4 in on_chip_ram; cycles=9
-BA36: 1D F8 50 80 MOV:G.W @H'F850, R0 ; refs H'F850 in on_chip_ram; cycles=7
-BA3A: 1D F8 58 90 MOV:G.W R0, @H'F858 ; refs H'F858 in on_chip_ram; cycles=7
-BA3E: 1D F8 52 80 MOV:G.W @H'F852, R0 ; refs H'F852 in on_chip_ram; cycles=7
-BA42: 1D F8 5A 90 MOV:G.W R0, @H'F85A ; refs H'F85A in on_chip_ram; cycles=7
-BA46: 15 F8 54 80 MOV:G.B @H'F854, R0 ; refs H'F854 in on_chip_ram; cycles=7
-BA4A: 15 F8 5C 90 MOV:G.B R0, @H'F85C ; refs H'F85C in on_chip_ram; cycles=7
-BA4E: 50 5A MOV:E.B #H'5A, R0 ; cycles=2
-BA50: 15 F8 58 60 XOR.B @H'F858, R0 ; refs H'F858 in on_chip_ram; cycles=7
-BA54: 15 F8 59 60 XOR.B @H'F859, R0 ; refs H'F859 in on_chip_ram; cycles=7
-BA58: 15 F8 5A 60 XOR.B @H'F85A, R0 ; refs H'F85A in on_chip_ram; cycles=7
-BA5C: 15 F8 5B 60 XOR.B @H'F85B, R0 ; refs H'F85B in on_chip_ram; cycles=7
-BA60: 15 F8 5C 60 XOR.B @H'F85C, R0 ; refs H'F85C in on_chip_ram; cycles=7
-BA64: 15 F8 5D 90 MOV:G.B R0, @H'F85D ; refs H'F85D in on_chip_ram; cycles=7
+BA2C: 15 F9 C0 06 64 MOV:G.B #H'64, @H'F9C0 ; refs ram_F9C0 in on_chip_ram; cycles=9
+BA31: 15 F9 C4 06 07 MOV:G.B #H'07, @H'F9C4 ; refs ram_F9C4 in on_chip_ram; cycles=9
+BA36: 1D F8 50 80 MOV:G.W @H'F850, R0 ; refs ram_F850 in on_chip_ram; cycles=7
+BA3A: 1D F8 58 90 MOV:G.W R0, @H'F858 ; refs ram_F858 in on_chip_ram; cycles=7
+BA3E: 1D F8 52 80 MOV:G.W @H'F852, R0 ; refs ram_F852 in on_chip_ram; cycles=7
+BA42: 1D F8 5A 90 MOV:G.W R0, @H'F85A ; refs ram_F85A in on_chip_ram; cycles=7
+BA46: 15 F8 54 80 MOV:G.B @H'F854, R0 ; refs ram_F854 in on_chip_ram; cycles=7
+BA4A: 15 F8 5C 90 MOV:G.B R0, @H'F85C ; refs ram_F85C in on_chip_ram; cycles=7
+BA4E: 50 5A MOV:E.B #H'5A, R0 ; dataflow R0=H'5A; cycles=2
+BA50: 15 F8 58 60 XOR.B @H'F858, R0 ; refs ram_F858 in on_chip_ram; cycles=7
+BA54: 15 F8 59 60 XOR.B @H'F859, R0 ; refs ram_F859 in on_chip_ram; cycles=7
+BA58: 15 F8 5A 60 XOR.B @H'F85A, R0 ; refs ram_F85A in on_chip_ram; cycles=7
+BA5C: 15 F8 5B 60 XOR.B @H'F85B, R0 ; refs ram_F85B in on_chip_ram; cycles=7
+BA60: 15 F8 5C 60 XOR.B @H'F85C, R0 ; refs ram_F85C in on_chip_ram; cycles=7
+BA64: 15 F8 5D 90 MOV:G.B R0, @H'F85D ; refs ram_F85D in on_chip_ram; cycles=7
loc_BA68:
BA68: 15 FE DC F7 BTST.B #7, @SCI1_SSR ; refs SCI1_SSR in register_field; cycles=7
BA6C: 27 FA BEQ loc_BA68 ; cycles=3/7 nt/t
-BA6E: 15 F8 58 80 MOV:G.B @H'F858, R0 ; refs H'F858 in on_chip_ram; cycles=7
+BA6E: 15 F8 58 80 MOV:G.B @H'F858, R0 ; refs ram_F858 in on_chip_ram; cycles=7
BA72: 15 FE DB 90 MOV:G.B R0, @SCI1_TDR ; SCI1_TDR; cycles=7
-BA76: 15 F9 C2 06 01 MOV:G.B #H'01, @H'F9C2 ; refs H'F9C2 in on_chip_ram; cycles=9
+BA76: 15 F9 C2 06 01 MOV:G.B #H'01, @H'F9C2 ; refs ram_F9C2 in on_chip_ram; cycles=9
BA7B: 15 FE DC D7 BCLR.B #7, @SCI1_SSR ; clear TDRE (bit 7) of SCI1_SSR; cycles=8
BA7F: 15 FE DA C7 BSET.B #7, @SCI1_SCR ; set TIE (bit 7) of SCI1_SCR; cycles=8
BA83: 19 RTS ; cycles=13
vec_sci1_txi_BA84:
-BA84: 15 FA A2 F3 BTST.B #3, @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=7
+BA84: 15 FA A2 F3 BTST.B #3, @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=7
BA88: 27 1F BEQ loc_BAA9 ; cycles=3/7 nt/t
-BA8A: 15 FA A5 F7 BTST.B #7, @H'FAA5 ; refs H'FAA5 in on_chip_ram; cycles=7
+BA8A: 15 FA A5 F7 BTST.B #7, @H'FAA5 ; refs ram_FAA5 in on_chip_ram; cycles=7
BA8E: 27 19 BEQ loc_BAA9 ; cycles=3/7 nt/t
-BA90: 15 F9 C3 16 TST.B @H'F9C3 ; refs H'F9C3 in on_chip_ram; cycles=7
+BA90: 15 F9 C3 16 TST.B @H'F9C3 ; refs ram_F9C3 in on_chip_ram; cycles=7
BA94: 27 13 BEQ loc_BAA9 ; cycles=3/7 nt/t
-BA96: 15 FA A2 D3 BCLR.B #3, @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=9
-BA9A: 15 FA A3 13 CLR.B @H'FAA3 ; refs H'FAA3 in on_chip_ram; cycles=9
+BA96: 15 FA A2 D3 BCLR.B #3, @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=9
+BA9A: 15 FA A3 13 CLR.B @H'FAA3 ; refs ram_FAA3 in on_chip_ram; cycles=9
BA9E: 15 FE DA D7 BCLR.B #7, @SCI1_SCR ; clear TIE (bit 7) of SCI1_SCR; cycles=9
-BAA2: 15 F9 C0 06 1F MOV:G.B #H'1F, @H'F9C0 ; refs H'F9C0 in on_chip_ram; cycles=9
+BAA2: 15 F9 C0 06 1F MOV:G.B #H'1F, @H'F9C0 ; refs ram_F9C0 in on_chip_ram; cycles=9
BAA7: 20 48 BRA loc_BAF1 ; cycles=8
loc_BAA9:
BAA9: BF 90 MOV:G.W R0, @-R7 ; cycles=5
-BAAB: 15 F9 C2 80 MOV:G.B @H'F9C2, R0 ; refs H'F9C2 in on_chip_ram; cycles=6
+BAAB: 15 F9 C2 80 MOV:G.B @H'F9C2, R0 ; refs ram_F9C2 in on_chip_ram; cycles=6
BAAF: A0 12 EXTU.B R0 ; cycles=3
BAB1: F0 F8 58 80 MOV:G.B @(-H'07A8,R0), R0 ; cycles=6
BAB5: 15 FE DB 90 MOV:G.B R0, @SCI1_TDR ; SCI1_TDR; cycles=6
BAB9: CF 80 MOV:G.W @R7+, R0 ; cycles=6
BABB: 15 FE DC D7 BCLR.B #7, @SCI1_SSR ; clear TDRE (bit 7) of SCI1_SSR; cycles=8
-BABF: 15 F9 C2 08 ADD:Q.B #1, @H'F9C2 ; refs H'F9C2 in on_chip_ram; cycles=8
-BAC3: 15 F9 C2 04 06 CMP:G.B #H'06, @H'F9C2 ; refs H'F9C2 in on_chip_ram; cycles=6
+BABF: 15 F9 C2 08 ADD:Q.B #1, @H'F9C2 ; refs ram_F9C2 in on_chip_ram; cycles=8
+BAC3: 15 F9 C2 04 06 CMP:G.B #H'06, @H'F9C2 ; refs ram_F9C2 in on_chip_ram; cycles=6
BAC8: 26 27 BNE loc_BAF1 ; cycles=3/7 nt/t
BACA: 15 FE DA D7 BCLR.B #7, @SCI1_SCR ; clear TIE (bit 7) of SCI1_SCR; cycles=9
-BACE: 15 F7 95 F6 BTST.B #6, @H'F795 ; refs H'F795 in on_chip_ram; cycles=7
+BACE: 15 F7 95 F6 BTST.B #6, @H'F795 ; refs ram_F795 in on_chip_ram; cycles=7
BAD2: 26 14 BNE loc_BAE8 ; cycles=3/7 nt/t
-BAD4: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs H'F791 in on_chip_ram; cycles=7
+BAD4: 15 F7 91 F7 BTST.B #7, @H'F791 ; refs ram_F791 in on_chip_ram; cycles=7
BAD8: 26 07 BNE loc_BAE1 ; cycles=3/7 nt/t
-BADA: 15 F9 C0 06 09 MOV:G.B #H'09, @H'F9C0 ; refs H'F9C0 in on_chip_ram; cycles=9
+BADA: 15 F9 C0 06 09 MOV:G.B #H'09, @H'F9C0 ; refs ram_F9C0 in on_chip_ram; cycles=9
BADF: 20 0C BRA loc_BAED ; cycles=8
loc_BAE1:
-BAE1: 15 F9 C0 06 09 MOV:G.B #H'09, @H'F9C0 ; refs H'F9C0 in on_chip_ram; cycles=9
+BAE1: 15 F9 C0 06 09 MOV:G.B #H'09, @H'F9C0 ; refs ram_F9C0 in on_chip_ram; cycles=9
BAE6: 20 05 BRA loc_BAED ; cycles=7
loc_BAE8:
-BAE8: 15 F9 C0 06 F0 MOV:G.B #H'F0, @H'F9C0 ; refs H'F9C0 in on_chip_ram; cycles=9
+BAE8: 15 F9 C0 06 F0 MOV:G.B #H'F0, @H'F9C0 ; refs ram_F9C0 in on_chip_ram; cycles=9
loc_BAED:
-BAED: 15 F9 C1 13 CLR.B @H'F9C1 ; refs H'F9C1 in on_chip_ram; cycles=8
+BAED: 15 F9 C1 13 CLR.B @H'F9C1 ; refs ram_F9C1 in on_chip_ram; cycles=8
loc_BAF1:
BAF1: 0A RTE ; cycles=14
loc_BAF2:
-BAF2: 15 F9 B5 81 MOV:G.B @H'F9B5, R1 ; refs H'F9B5 in on_chip_ram; cycles=7
+BAF2: 15 F9 B5 81 MOV:G.B @H'F9B5, R1 ; refs ram_F9B5 in on_chip_ram; cycles=7
BAF6: A1 12 EXTU.B R1 ; cycles=3
-BAF8: 15 F9 B0 71 CMP:G.B @H'F9B0, R1 ; refs H'F9B0 in on_chip_ram; cycles=7
+BAF8: 15 F9 B0 71 CMP:G.B @H'F9B0, R1 ; refs ram_F9B0 in on_chip_ram; cycles=7
BAFC: 26 02 BNE loc_BB00 ; cycles=3/7 nt/t
BAFE: 20 56 BRA loc_BB56 ; cycles=7
loc_BB00:
-BB00: 15 FA A2 C3 BSET.B #3, @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=9
+BB00: 15 FA A2 C3 BSET.B #3, @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=9
BB04: A9 80 MOV:G.W R1, R0 ; cycles=3
BB06: A8 1A SHLL.W R0 ; cycles=3
BB08: F8 F8 70 80 MOV:G.W @(-H'0790,R0), R0 ; cycles=7
@@ -2938,28 +3021,28 @@ BB13: A1 10 SWAP.B R1 ; cycles=3
BB15: A1 1B SHLR.B R1 ; cycles=2
BB17: A1 82 MOV:G.B R1, R2 ; cycles=2
BB19: 04 07 51 AND.B #H'07, R1 ; cycles=3
-BB1C: 15 F8 50 91 MOV:G.B R1, @H'F850 ; refs H'F850 in on_chip_ram; cycles=7
-BB20: 15 F8 52 95 MOV:G.B R5, @H'F852 ; refs H'F852 in on_chip_ram; cycles=7
+BB1C: 15 F8 50 91 MOV:G.B R1, @H'F850 ; refs ram_F850 in on_chip_ram; cycles=7
+BB20: 15 F8 52 95 MOV:G.B R5, @H'F852 ; refs ram_F852 in on_chip_ram; cycles=7
BB24: A5 10 SWAP.B R5 ; cycles=3
BB26: 04 78 52 AND.B #H'78, R2 ; cycles=3
BB29: A2 45 OR.B R2, R5 ; cycles=2
-BB2B: 15 F8 51 95 MOV:G.B R5, @H'F851 ; refs H'F851 in on_chip_ram; cycles=6
+BB2B: 15 F8 51 95 MOV:G.B R5, @H'F851 ; refs ram_F851 in on_chip_ram; cycles=6
BB2F: 0C 01 FF 50 AND.W #H'01FF, R0 ; cycles=4
BB33: A8 1A SHLL.W R0 ; cycles=3
BB35: F8 E8 00 84 MOV:G.W @(-H'1800,R0), R4 ; cycles=6
-BB39: 15 F8 54 94 MOV:G.B R4, @H'F854 ; refs H'F854 in on_chip_ram; cycles=6
+BB39: 15 F8 54 94 MOV:G.B R4, @H'F854 ; refs ram_F854 in on_chip_ram; cycles=6
BB3D: A4 10 SWAP.B R4 ; cycles=3
-BB3F: 15 F8 53 94 MOV:G.B R4, @H'F853 ; refs H'F853 in on_chip_ram; cycles=6
+BB3F: 15 F8 53 94 MOV:G.B R4, @H'F853 ; refs ram_F853 in on_chip_ram; cycles=6
BB43: 1E FE E0 BSR loc_BA26 ; cycles=14
-BB46: 1D F9 C6 07 01 F4 MOV:G.W #H'01F4, @H'F9C6 ; refs H'F9C6 in on_chip_ram; cycles=11
-BB4C: 15 F9 C8 06 14 MOV:G.B #H'14, @H'F9C8 ; refs H'F9C8 in on_chip_ram; cycles=9
-BB51: 15 FA A3 06 80 MOV:G.B #H'80, @H'FAA3 ; refs H'FAA3 in on_chip_ram; cycles=9
+BB46: 1D F9 C6 07 01 F4 MOV:G.W #H'01F4, @H'F9C6 ; refs ram_F9C6 in on_chip_ram; cycles=11
+BB4C: 15 F9 C8 06 14 MOV:G.B #H'14, @H'F9C8 ; refs ram_F9C8 in on_chip_ram; cycles=9
+BB51: 15 FA A3 06 80 MOV:G.B #H'80, @H'FAA3 ; refs ram_FAA3 in on_chip_ram; cycles=9
loc_BB56:
BB56: 19 RTS ; cycles=12
vec_sci1_eri_BB57:
-BB57: 15 FA A4 C7 BSET.B #7, @H'FAA4 ; refs H'FAA4 in on_chip_ram; cycles=8
+BB57: 15 FA A4 C7 BSET.B #7, @H'FAA4 ; refs ram_FAA4 in on_chip_ram; cycles=8
BB5B: 15 FE DC D5 BCLR.B #5, @SCI1_SSR ; clear ORER (bit 5) of SCI1_SSR; cycles=8
BB5F: 15 FE DC D4 BCLR.B #4, @SCI1_SSR ; clear FER (bit 4) of SCI1_SSR; cycles=8
BB63: 15 FE DC D3 BCLR.B #3, @SCI1_SSR ; clear PER (bit 3) of SCI1_SSR; cycles=8
@@ -2968,67 +3051,67 @@ vec_sci1_rxi_BB67:
BB67: 12 03 STM.W {R0,R1}, @-SP ; cycles=12
BB69: 15 FE DC D6 BCLR.B #6, @SCI1_SSR ; clear RDRF (bit 6) of SCI1_SSR; cycles=8
BB6D: 15 FE DD 80 MOV:G.B @SCI1_RDR, R0 ; refs SCI1_RDR in register_field; cycles=6
-BB71: 15 F9 C1 16 TST.B @H'F9C1 ; refs H'F9C1 in on_chip_ram; cycles=6
+BB71: 15 F9 C1 16 TST.B @H'F9C1 ; refs ram_F9C1 in on_chip_ram; cycles=6
BB75: 26 06 BNE loc_BB7D ; cycles=3/8 nt/t
-BB77: 15 F9 C3 13 CLR.B @H'F9C3 ; refs H'F9C3 in on_chip_ram; cycles=8
+BB77: 15 F9 C3 13 CLR.B @H'F9C3 ; refs ram_F9C3 in on_chip_ram; cycles=8
BB7B: 20 0D BRA loc_BB8A ; cycles=8
loc_BB7D:
-BB7D: 15 F9 C3 04 05 CMP:G.B #H'05, @H'F9C3 ; refs H'F9C3 in on_chip_ram; cycles=6
+BB7D: 15 F9 C3 04 05 CMP:G.B #H'05, @H'F9C3 ; refs ram_F9C3 in on_chip_ram; cycles=6
BB82: 23 06 BLS loc_BB8A ; cycles=3/7 nt/t
-BB84: 15 FA A4 13 CLR.B @H'FAA4 ; refs H'FAA4 in on_chip_ram; cycles=9
+BB84: 15 FA A4 13 CLR.B @H'FAA4 ; refs ram_FAA4 in on_chip_ram; cycles=9
BB88: 20 19 BRA loc_BBA3 ; cycles=7
loc_BB8A:
-BB8A: 15 F9 C3 81 MOV:G.B @H'F9C3, R1 ; refs H'F9C3 in on_chip_ram; cycles=7
+BB8A: 15 F9 C3 81 MOV:G.B @H'F9C3, R1 ; refs ram_F9C3 in on_chip_ram; cycles=7
BB8E: A1 12 EXTU.B R1 ; cycles=3
BB90: F1 F8 68 90 MOV:G.B R0, @(-H'0798,R1) ; cycles=7
BB94: A1 08 ADD:Q.B #1, R1 ; cycles=4
-BB96: 15 F9 C3 91 MOV:G.B R1, @H'F9C3 ; refs H'F9C3 in on_chip_ram; cycles=7
+BB96: 15 F9 C3 91 MOV:G.B R1, @H'F9C3 ; refs ram_F9C3 in on_chip_ram; cycles=7
BB9A: 41 06 CMP:E #H'06, R1 ; cycles=2
BB9C: 26 05 BNE loc_BBA3 ; cycles=3/7 nt/t
-BB9E: 15 F9 C5 06 14 MOV:G.B #H'14, @H'F9C5 ; refs H'F9C5 in on_chip_ram; cycles=9
+BB9E: 15 F9 C5 06 14 MOV:G.B #H'14, @H'F9C5 ; refs ram_F9C5 in on_chip_ram; cycles=9
loc_BBA3:
-BBA3: 15 F9 C1 06 05 MOV:G.B #H'05, @H'F9C1 ; refs H'F9C1 in on_chip_ram; cycles=9
+BBA3: 15 F9 C1 06 05 MOV:G.B #H'05, @H'F9C1 ; refs ram_F9C1 in on_chip_ram; cycles=9
BBA8: 02 03 LDM.W @SP+, {R0,R1} ; cycles=14
BBAA: 0A RTE ; cycles=13
loc_BBAB:
-BBAB: 15 F9 C3 04 06 CMP:G.B #H'06, @H'F9C3 ; refs H'F9C3 in on_chip_ram; cycles=6
+BBAB: 15 F9 C3 04 06 CMP:G.B #H'06, @H'F9C3 ; refs ram_F9C3 in on_chip_ram; cycles=6
BBB0: 36 02 BC BNE loc_BE6F ; cycles=3/7 nt/t
-BBB3: 1D F8 68 80 MOV:G.W @H'F868, R0 ; refs H'F868 in on_chip_ram; cycles=6
-BBB7: 1D F8 60 90 MOV:G.W R0, @H'F860 ; refs H'F860 in on_chip_ram; cycles=6
-BBBB: 1D F8 6A 80 MOV:G.W @H'F86A, R0 ; refs H'F86A in on_chip_ram; cycles=6
-BBBF: 1D F8 62 90 MOV:G.W R0, @H'F862 ; refs H'F862 in on_chip_ram; cycles=6
-BBC3: 1D F8 6C 80 MOV:G.W @H'F86C, R0 ; refs H'F86C in on_chip_ram; cycles=6
-BBC7: 1D F8 64 90 MOV:G.W R0, @H'F864 ; refs H'F864 in on_chip_ram; cycles=6
-BBCB: 15 F9 C3 13 CLR.B @H'F9C3 ; refs H'F9C3 in on_chip_ram; cycles=8
-BBCF: 15 FA A4 F7 BTST.B #7, @H'FAA4 ; refs H'FAA4 in on_chip_ram; cycles=6
+BBB3: 1D F8 68 80 MOV:G.W @H'F868, R0 ; refs ram_F868 in on_chip_ram; cycles=6
+BBB7: 1D F8 60 90 MOV:G.W R0, @H'F860 ; refs ram_F860 in on_chip_ram; cycles=6
+BBBB: 1D F8 6A 80 MOV:G.W @H'F86A, R0 ; refs ram_F86A in on_chip_ram; cycles=6
+BBBF: 1D F8 62 90 MOV:G.W R0, @H'F862 ; refs ram_F862 in on_chip_ram; cycles=6
+BBC3: 1D F8 6C 80 MOV:G.W @H'F86C, R0 ; refs ram_F86C in on_chip_ram; cycles=6
+BBC7: 1D F8 64 90 MOV:G.W R0, @H'F864 ; refs ram_F864 in on_chip_ram; cycles=6
+BBCB: 15 F9 C3 13 CLR.B @H'F9C3 ; refs ram_F9C3 in on_chip_ram; cycles=8
+BBCF: 15 FA A4 F7 BTST.B #7, @H'FAA4 ; refs ram_FAA4 in on_chip_ram; cycles=6
BBD3: 36 02 53 BNE loc_BE29 ; cycles=3/8 nt/t
-BBD6: 50 5A MOV:E.B #H'5A, R0 ; cycles=2
-BBD8: 15 F8 60 60 XOR.B @H'F860, R0 ; refs H'F860 in on_chip_ram; cycles=7
-BBDC: 15 F8 61 60 XOR.B @H'F861, R0 ; refs H'F861 in on_chip_ram; cycles=7
-BBE0: 15 F8 62 60 XOR.B @H'F862, R0 ; refs H'F862 in on_chip_ram; cycles=7
-BBE4: 15 F8 63 60 XOR.B @H'F863, R0 ; refs H'F863 in on_chip_ram; cycles=7
-BBE8: 15 F8 64 60 XOR.B @H'F864, R0 ; refs H'F864 in on_chip_ram; cycles=7
-BBEC: 15 F8 65 70 CMP:G.B @H'F865, R0 ; refs H'F865 in on_chip_ram; cycles=7
+BBD6: 50 5A MOV:E.B #H'5A, R0 ; dataflow R0=H'5A; cycles=2
+BBD8: 15 F8 60 60 XOR.B @H'F860, R0 ; refs ram_F860 in on_chip_ram; cycles=7
+BBDC: 15 F8 61 60 XOR.B @H'F861, R0 ; refs ram_F861 in on_chip_ram; cycles=7
+BBE0: 15 F8 62 60 XOR.B @H'F862, R0 ; refs ram_F862 in on_chip_ram; cycles=7
+BBE4: 15 F8 63 60 XOR.B @H'F863, R0 ; refs ram_F863 in on_chip_ram; cycles=7
+BBE8: 15 F8 64 60 XOR.B @H'F864, R0 ; refs ram_F864 in on_chip_ram; cycles=7
+BBEC: 15 F8 65 70 CMP:G.B @H'F865, R0 ; refs ram_F865 in on_chip_ram; cycles=7
BBF0: 36 02 36 BNE loc_BE29 ; cycles=3/7 nt/t
-BBF3: 15 FA A6 13 CLR.B @H'FAA6 ; refs H'FAA6 in on_chip_ram; cycles=8
-BBF7: 15 F8 61 85 MOV:G.B @H'F861, R5 ; refs H'F861 in on_chip_ram; cycles=6
+BBF3: 15 FA A6 13 CLR.B @H'FAA6 ; refs ram_FAA6 in on_chip_ram; cycles=8
+BBF7: 15 F8 61 85 MOV:G.B @H'F861, R5 ; refs ram_F861 in on_chip_ram; cycles=6
BBFB: A5 10 SWAP.B R5 ; cycles=3
-BBFD: 15 F8 62 85 MOV:G.B @H'F862, R5 ; refs H'F862 in on_chip_ram; cycles=6
+BBFD: 15 F8 62 85 MOV:G.B @H'F862, R5 ; refs ram_F862 in on_chip_ram; cycles=6
BC01: 1E A6 27 BSR loc_622B ; cycles=14
BC04: AD 84 MOV:G.W R5, R4 ; cycles=3
BC06: AC 1A SHLL.W R4 ; cycles=3
-BC08: 15 F8 60 80 MOV:G.B @H'F860, R0 ; refs H'F860 in on_chip_ram; cycles=7
+BC08: 15 F8 60 80 MOV:G.B @H'F860, R0 ; refs ram_F860 in on_chip_ram; cycles=7
BC0C: 04 07 50 AND.B #H'07, R0 ; cycles=3
-BC0F: 15 FA A2 16 TST.B @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=6
+BC0F: 15 FA A2 16 TST.B @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=6
BC13: 26 25 BNE loc_BC3A ; cycles=3/8 nt/t
loc_BC15:
-BC15: 15 FA A2 C7 BSET.B #7, @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=8
-BC19: 15 F8 61 F7 BTST.B #7, @H'F861 ; refs H'F861 in on_chip_ram; cycles=6
+BC15: 15 FA A2 C7 BSET.B #7, @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=8
+BC19: 15 F8 61 F7 BTST.B #7, @H'F861 ; refs ram_F861 in on_chip_ram; cycles=6
BC1D: 36 00 EB BNE loc_BD0B ; cycles=3/8 nt/t
BC20: 40 00 CMP:E #H'00, R0 ; cycles=2
BC22: 27 45 BEQ loc_BC69 ; cycles=3/7 nt/t
@@ -3038,13 +3121,13 @@ BC29: 40 02 CMP:E #H'02, R0 ; cycles=2
BC2B: 37 00 D6 BEQ loc_BD04 ; cycles=3/8 nt/t
BC2E: 40 07 CMP:E #H'07, R0 ; cycles=2
BC30: 37 01 D2 BEQ loc_BE05 ; cycles=3/7 nt/t
-BC33: 15 FA A2 13 CLR.B @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=8
+BC33: 15 FA A2 13 CLR.B @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=8
BC37: 30 02 35 BRA loc_BE6F ; cycles=8
loc_BC3A:
BC3A: A0 F2 BTST.B #2, R0 ; cycles=2
BC3C: 27 1E BEQ loc_BC5C ; cycles=3/7 nt/t
-BC3E: 15 F8 61 F7 BTST.B #7, @H'F861 ; refs H'F861 in on_chip_ram; cycles=7
+BC3E: 15 F8 61 F7 BTST.B #7, @H'F861 ; refs ram_F861 in on_chip_ram; cycles=7
BC42: 36 01 E2 BNE loc_BE27 ; cycles=3/7 nt/t
BC45: 40 04 CMP:E #H'04, R0 ; cycles=2
BC47: 37 00 C4 BEQ loc_BD0E ; cycles=3/8 nt/t
@@ -3057,28 +3140,28 @@ BC56: 37 01 AC BEQ loc_BE05 ; cycles=3/7 nt/t
BC59: 30 02 13 BRA loc_BE6F ; cycles=8
loc_BC5C:
-BC5C: 15 FA A2 D3 BCLR.B #3, @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=9
+BC5C: 15 FA A2 D3 BCLR.B #3, @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=9
BC60: 37 02 0C BEQ loc_BE6F ; cycles=3/7 nt/t
-BC63: 15 FA A3 13 CLR.B @H'FAA3 ; refs H'FAA3 in on_chip_ram; cycles=8
+BC63: 15 FA A3 13 CLR.B @H'FAA3 ; refs ram_FAA3 in on_chip_ram; cycles=8
BC67: 20 AC BRA loc_BC15 ; cycles=8
loc_BC69:
BC69: AD 16 TST.W R5 ; cycles=3
BC6B: 26 1E BNE loc_BC8B ; cycles=3/8 nt/t
-BC6D: 15 F8 63 80 MOV:G.B @H'F863, R0 ; refs H'F863 in on_chip_ram; cycles=6
+BC6D: 15 F8 63 80 MOV:G.B @H'F863, R0 ; refs ram_F863 in on_chip_ram; cycles=6
BC71: A0 10 SWAP.B R0 ; cycles=3
-BC73: 50 80 MOV:E.B #H'80, R0 ; cycles=2
+BC73: 50 80 MOV:E.B #H'80, R0 ; dataflow R0=H'80; cycles=2
BC75: FC E0 00 90 MOV:G.W R0, @(-H'2000,R4) ; cycles=6
BC79: FC E8 00 90 MOV:G.W R0, @(-H'1800,R4) ; cycles=6
-BC7D: 15 F8 64 06 80 MOV:G.B #H'80, @H'F864 ; refs H'F864 in on_chip_ram; cycles=9
+BC7D: 15 F8 64 06 80 MOV:G.B #H'80, @H'F864 ; refs ram_F864 in on_chip_ram; cycles=9
BC82: F5 EC 00 C7 BSET.B #7, @(-H'1400,R5) ; cycles=9
BC86: 1E 01 E7 BSR loc_BE70 ; cycles=13
BC89: 20 25 BRA loc_BCB0 ; cycles=8
loc_BC8B:
-BC8B: 15 F8 63 80 MOV:G.B @H'F863, R0 ; refs H'F863 in on_chip_ram; cycles=6
+BC8B: 15 F8 63 80 MOV:G.B @H'F863, R0 ; refs ram_F863 in on_chip_ram; cycles=6
BC8F: A0 10 SWAP.B R0 ; cycles=3
-BC91: 15 F8 64 80 MOV:G.B @H'F864, R0 ; refs H'F864 in on_chip_ram; cycles=6
+BC91: 15 F8 64 80 MOV:G.B @H'F864, R0 ; refs ram_F864 in on_chip_ram; cycles=6
BC95: FC E0 00 90 MOV:G.W R0, @(-H'2000,R4) ; cycles=6
BC99: FC E8 00 90 MOV:G.W R0, @(-H'1800,R4) ; cycles=6
BC9D: F5 EC 00 C7 BSET.B #7, @(-H'1400,R5) ; cycles=8
@@ -3091,33 +3174,33 @@ loc_BCAD:
BCAD: 1E 01 C0 BSR loc_BE70 ; cycles=14
loc_BCB0:
-BCB0: 15 F8 50 06 04 MOV:G.B #H'04, @H'F850 ; refs H'F850 in on_chip_ram; cycles=9
-BCB5: 15 F8 61 80 MOV:G.B @H'F861, R0 ; refs H'F861 in on_chip_ram; cycles=6
-BCB9: 15 F8 51 90 MOV:G.B R0, @H'F851 ; refs H'F851 in on_chip_ram; cycles=6
-BCBD: 1D F8 62 80 MOV:G.W @H'F862, R0 ; refs H'F862 in on_chip_ram; cycles=6
-BCC1: 1D F8 52 90 MOV:G.W R0, @H'F852 ; refs H'F852 in on_chip_ram; cycles=6
-BCC5: 15 F8 64 80 MOV:G.B @H'F864, R0 ; refs H'F864 in on_chip_ram; cycles=6
-BCC9: 15 F8 54 90 MOV:G.B R0, @H'F854 ; refs H'F854 in on_chip_ram; cycles=6
+BCB0: 15 F8 50 06 04 MOV:G.B #H'04, @H'F850 ; refs ram_F850 in on_chip_ram; cycles=9
+BCB5: 15 F8 61 80 MOV:G.B @H'F861, R0 ; refs ram_F861 in on_chip_ram; cycles=6
+BCB9: 15 F8 51 90 MOV:G.B R0, @H'F851 ; refs ram_F851 in on_chip_ram; cycles=6
+BCBD: 1D F8 62 80 MOV:G.W @H'F862, R0 ; refs ram_F862 in on_chip_ram; cycles=6
+BCC1: 1D F8 52 90 MOV:G.W R0, @H'F852 ; refs ram_F852 in on_chip_ram; cycles=6
+BCC5: 15 F8 64 80 MOV:G.B @H'F864, R0 ; refs ram_F864 in on_chip_ram; cycles=6
+BCC9: 15 F8 54 90 MOV:G.B R0, @H'F854 ; refs ram_F854 in on_chip_ram; cycles=6
BCCD: 1E FD 56 BSR loc_BA26 ; cycles=14
-BCD0: 15 FA A2 D7 BCLR.B #7, @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=9
+BCD0: 15 FA A2 D7 BCLR.B #7, @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=9
BCD4: 30 01 98 BRA loc_BE6F ; cycles=7
loc_BCD7:
-BCD7: 15 F8 50 06 04 MOV:G.B #H'04, @H'F850 ; refs H'F850 in on_chip_ram; cycles=9
-BCDC: 15 F8 61 80 MOV:G.B @H'F861, R0 ; refs H'F861 in on_chip_ram; cycles=7
-BCE0: 15 F8 51 90 MOV:G.B R0, @H'F851 ; refs H'F851 in on_chip_ram; cycles=7
-BCE4: 15 F8 62 80 MOV:G.B @H'F862, R0 ; refs H'F862 in on_chip_ram; cycles=7
-BCE8: 15 F8 51 90 MOV:G.B R0, @H'F851 ; refs H'F851 in on_chip_ram; cycles=7
+BCD7: 15 F8 50 06 04 MOV:G.B #H'04, @H'F850 ; refs ram_F850 in on_chip_ram; cycles=9
+BCDC: 15 F8 61 80 MOV:G.B @H'F861, R0 ; refs ram_F861 in on_chip_ram; cycles=7
+BCE0: 15 F8 51 90 MOV:G.B R0, @H'F851 ; refs ram_F851 in on_chip_ram; cycles=7
+BCE4: 15 F8 62 80 MOV:G.B @H'F862, R0 ; refs ram_F862 in on_chip_ram; cycles=7
+BCE8: 15 F8 51 90 MOV:G.B R0, @H'F851 ; refs ram_F851 in on_chip_ram; cycles=7
BCEC: FC E0 00 80 MOV:G.W @(-H'2000,R4), R0 ; cycles=7
-BCF0: 15 F8 54 90 MOV:G.B R0, @H'F854 ; refs H'F854 in on_chip_ram; cycles=7
+BCF0: 15 F8 54 90 MOV:G.B R0, @H'F854 ; refs ram_F854 in on_chip_ram; cycles=7
BCF4: A0 10 SWAP.B R0 ; cycles=3
-BCF6: 15 F8 53 90 MOV:G.B R0, @H'F853 ; refs H'F853 in on_chip_ram; cycles=7
+BCF6: 15 F8 53 90 MOV:G.B R0, @H'F853 ; refs ram_F853 in on_chip_ram; cycles=7
BCFA: 1E FD 29 BSR loc_BA26 ; cycles=13
-BCFD: 15 FA A2 D7 BCLR.B #7, @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=8
+BCFD: 15 FA A2 D7 BCLR.B #7, @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=8
BD01: 30 01 6B BRA loc_BE6F ; cycles=8
loc_BD04:
-BD04: 15 FA A2 D7 BCLR.B #7, @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=9
+BD04: 15 FA A2 D7 BCLR.B #7, @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=9
BD08: 30 01 64 BRA loc_BE6F ; cycles=7
loc_BD0B:
@@ -3126,9 +3209,9 @@ BD0B: 30 01 61 BRA loc_BE6F ; cycles=8
loc_BD0E:
BD0E: AD 16 TST.W R5 ; cycles=3
BD10: 26 19 BNE loc_BD2B ; cycles=3/7 nt/t
-BD12: 15 F8 63 80 MOV:G.B @H'F863, R0 ; refs H'F863 in on_chip_ram; cycles=7
+BD12: 15 F8 63 80 MOV:G.B @H'F863, R0 ; refs ram_F863 in on_chip_ram; cycles=7
BD16: A0 10 SWAP.B R0 ; cycles=3
-BD18: 50 80 MOV:E.B #H'80, R0 ; cycles=2
+BD18: 50 80 MOV:E.B #H'80, R0 ; dataflow R0=H'80; cycles=2
BD1A: FC E0 00 90 MOV:G.W R0, @(-H'2000,R4) ; cycles=7
BD1E: FC E8 00 90 MOV:G.W R0, @(-H'1800,R4) ; cycles=7
BD22: F5 EC 00 C7 BSET.B #7, @(-H'1400,R5) ; cycles=9
@@ -3136,19 +3219,19 @@ BD26: 1E 01 47 BSR loc_BE70 ; cycles=13
BD29: 20 3C BRA loc_BD67 ; cycles=8
loc_BD2B:
-BD2B: 15 F8 63 80 MOV:G.B @H'F863, R0 ; refs H'F863 in on_chip_ram; cycles=6
+BD2B: 15 F8 63 80 MOV:G.B @H'F863, R0 ; refs ram_F863 in on_chip_ram; cycles=6
BD2F: A0 10 SWAP.B R0 ; cycles=3
-BD31: 15 F8 64 80 MOV:G.B @H'F864, R0 ; refs H'F864 in on_chip_ram; cycles=6
+BD31: 15 F8 64 80 MOV:G.B @H'F864, R0 ; refs ram_F864 in on_chip_ram; cycles=6
BD35: FC E0 00 90 MOV:G.W R0, @(-H'2000,R4) ; cycles=6
BD39: F5 EC 00 C7 BSET.B #7, @(-H'1400,R5) ; cycles=8
BD3D: F4 C5 65 81 MOV:G.B @(-H'3A9B,R4), R1 ; cycles=6
BD41: A1 12 EXTU.B R1 ; cycles=3
BD43: 27 1F BEQ loc_BD64 ; cycles=3/8 nt/t
BD45: F9 F4 00 90 MOV:G.W R0, @(-H'0C00,R1) ; cycles=6
-BD49: 15 F7 6E F7 BTST.B #7, @H'F76E ; refs H'F76E in on_chip_ram; cycles=6
+BD49: 15 F7 6E F7 BTST.B #7, @H'F76E ; refs ram_F76E in on_chip_ram; cycles=6
BD4D: 27 15 BEQ loc_BD64 ; cycles=3/8 nt/t
BD4F: 12 31 STM.W {R0,R4,R5}, @-SP ; cycles=15
-BD51: 15 F7 6E 84 MOV:G.B @H'F76E, R4 ; refs H'F76E in on_chip_ram; cycles=6
+BD51: 15 F7 6E 84 MOV:G.B @H'F76E, R4 ; refs ram_F76E in on_chip_ram; cycles=6
BD55: A4 10 SWAP.B R4 ; cycles=3
BD57: A1 84 MOV:G.B R1, R4 ; cycles=2
BD59: 0C 0F FE 54 AND.W #H'0FFE, R4 ; cycles=4
@@ -3160,14 +3243,14 @@ loc_BD64:
BD64: 1E 01 09 BSR loc_BE70 ; cycles=13
loc_BD67:
-BD67: 15 FA A2 F3 BTST.B #3, @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=6
+BD67: 15 FA A2 F3 BTST.B #3, @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=6
BD6B: 27 08 BEQ loc_BD75 ; cycles=3/8 nt/t
-BD6D: 15 F9 B5 08 ADD:Q.B #1, @H'F9B5 ; refs H'F9B5 in on_chip_ram; cycles=8
-BD71: 15 F9 B5 D7 BCLR.B #7, @H'F9B5 ; refs H'F9B5 in on_chip_ram; cycles=8
+BD6D: 15 F9 B5 08 ADD:Q.B #1, @H'F9B5 ; refs ram_F9B5 in on_chip_ram; cycles=8
+BD71: 15 F9 B5 D7 BCLR.B #7, @H'F9B5 ; refs ram_F9B5 in on_chip_ram; cycles=8
loc_BD75:
-BD75: 15 FA A3 13 CLR.B @H'FAA3 ; refs H'FAA3 in on_chip_ram; cycles=8
-BD79: 15 FA A2 13 CLR.B @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=8
+BD75: 15 FA A3 13 CLR.B @H'FAA3 ; refs ram_FAA3 in on_chip_ram; cycles=8
+BD79: 15 FA A2 13 CLR.B @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=8
BD7D: 30 00 EF BRA loc_BE6F ; cycles=8
loc_BD80:
@@ -3179,7 +3262,7 @@ BD8A: 4D 00 6E CMP:I #H'006E, R5 ; cycles=3
BD8D: 27 30 BEQ loc_BDBF ; cycles=3/8 nt/t
BD8F: 4D 00 6E CMP:I #H'006E, R5 ; cycles=3
BD92: 27 2B BEQ loc_BDBF ; cycles=3/7 nt/t
-BD94: 15 F7 31 F7 BTST.B #7, @H'F731 ; refs H'F731 in on_chip_ram; cycles=7
+BD94: 15 F7 31 F7 BTST.B #7, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=7
BD98: 27 28 BEQ loc_BDC2 ; cycles=3/7 nt/t
BD9A: 4D 00 6B CMP:I #H'006B, R5 ; cycles=3
BD9D: 27 16 BEQ loc_BDB5 ; cycles=3/8 nt/t
@@ -3194,48 +3277,48 @@ BDB1: 27 02 BEQ loc_BDB5 ; cycles=3/8 nt/t
BDB3: 20 0D BRA loc_BDC2 ; cycles=8
loc_BDB5:
-BDB5: 15 F7 31 D7 BCLR.B #7, @H'F731 ; refs H'F731 in on_chip_ram; cycles=8
-BDB9: 15 F7 90 D7 BCLR.B #7, @H'F790 ; refs H'F790 in on_chip_ram; cycles=8
+BDB5: 15 F7 31 D7 BCLR.B #7, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=8
+BDB9: 15 F7 90 D7 BCLR.B #7, @H'F790 ; refs ram_F790 in on_chip_ram; cycles=8
BDBD: 20 03 BRA loc_BDC2 ; cycles=8
loc_BDBF:
BDBF: 1E 00 AE BSR loc_BE70 ; cycles=14
loc_BDC2:
-BDC2: 15 FA A2 F3 BTST.B #3, @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=7
+BDC2: 15 FA A2 F3 BTST.B #3, @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=7
BDC6: 27 08 BEQ loc_BDD0 ; cycles=3/7 nt/t
-BDC8: 15 F9 B5 08 ADD:Q.B #1, @H'F9B5 ; refs H'F9B5 in on_chip_ram; cycles=9
-BDCC: 15 F9 B5 D7 BCLR.B #7, @H'F9B5 ; refs H'F9B5 in on_chip_ram; cycles=9
+BDC8: 15 F9 B5 08 ADD:Q.B #1, @H'F9B5 ; refs ram_F9B5 in on_chip_ram; cycles=9
+BDCC: 15 F9 B5 D7 BCLR.B #7, @H'F9B5 ; refs ram_F9B5 in on_chip_ram; cycles=9
loc_BDD0:
-BDD0: 15 FA A3 13 CLR.B @H'FAA3 ; refs H'FAA3 in on_chip_ram; cycles=9
-BDD4: 15 FA A2 13 CLR.B @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=9
+BDD0: 15 FA A3 13 CLR.B @H'FAA3 ; refs ram_FAA3 in on_chip_ram; cycles=9
+BDD4: 15 FA A2 13 CLR.B @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=9
BDD8: 30 00 94 BRA loc_BE6F ; cycles=7
loc_BDDB:
-BDDB: 15 F8 63 80 MOV:G.B @H'F863, R0 ; refs H'F863 in on_chip_ram; cycles=6
+BDDB: 15 F8 63 80 MOV:G.B @H'F863, R0 ; refs ram_F863 in on_chip_ram; cycles=6
BDDF: A0 10 SWAP.B R0 ; cycles=3
-BDE1: 15 F8 64 80 MOV:G.B @H'F864, R0 ; refs H'F864 in on_chip_ram; cycles=6
+BDE1: 15 F8 64 80 MOV:G.B @H'F864, R0 ; refs ram_F864 in on_chip_ram; cycles=6
BDE5: FC E4 00 90 MOV:G.W R0, @(-H'1C00,R4) ; cycles=6
BDE9: F5 EC 00 C6 BSET.B #6, @(-H'1400,R5) ; cycles=8
-BDED: 15 FA A2 F3 BTST.B #3, @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=6
+BDED: 15 FA A2 F3 BTST.B #3, @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=6
BDF1: 27 08 BEQ loc_BDFB ; cycles=3/8 nt/t
-BDF3: 15 F9 B5 08 ADD:Q.B #1, @H'F9B5 ; refs H'F9B5 in on_chip_ram; cycles=8
-BDF7: 15 F9 B5 D7 BCLR.B #7, @H'F9B5 ; refs H'F9B5 in on_chip_ram; cycles=8
+BDF3: 15 F9 B5 08 ADD:Q.B #1, @H'F9B5 ; refs ram_F9B5 in on_chip_ram; cycles=8
+BDF7: 15 F9 B5 D7 BCLR.B #7, @H'F9B5 ; refs ram_F9B5 in on_chip_ram; cycles=8
loc_BDFB:
-BDFB: 15 FA A3 13 CLR.B @H'FAA3 ; refs H'FAA3 in on_chip_ram; cycles=8
-BDFF: 15 FA A2 13 CLR.B @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=8
+BDFB: 15 FA A3 13 CLR.B @H'FAA3 ; refs ram_FAA3 in on_chip_ram; cycles=8
+BDFF: 15 FA A2 13 CLR.B @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=8
BE03: 20 6A BRA loc_BE6F ; cycles=8
loc_BE05:
-BE05: 1D F8 58 80 MOV:G.W @H'F858, R0 ; refs H'F858 in on_chip_ram; cycles=6
-BE09: 1D F8 50 90 MOV:G.W R0, @H'F850 ; refs H'F850 in on_chip_ram; cycles=6
-BE0D: 1D F8 5A 80 MOV:G.W @H'F85A, R0 ; refs H'F85A in on_chip_ram; cycles=6
-BE11: 1D F8 52 90 MOV:G.W R0, @H'F852 ; refs H'F852 in on_chip_ram; cycles=6
-BE15: 1D F8 5C 80 MOV:G.W @H'F85C, R0 ; refs H'F85C in on_chip_ram; cycles=6
-BE19: 1D F8 54 90 MOV:G.W R0, @H'F854 ; refs H'F854 in on_chip_ram; cycles=6
-BE1D: 15 F9 C0 06 1F MOV:G.B #H'1F, @H'F9C0 ; refs H'F9C0 in on_chip_ram; cycles=9
+BE05: 1D F8 58 80 MOV:G.W @H'F858, R0 ; refs ram_F858 in on_chip_ram; cycles=6
+BE09: 1D F8 50 90 MOV:G.W R0, @H'F850 ; refs ram_F850 in on_chip_ram; cycles=6
+BE0D: 1D F8 5A 80 MOV:G.W @H'F85A, R0 ; refs ram_F85A in on_chip_ram; cycles=6
+BE11: 1D F8 52 90 MOV:G.W R0, @H'F852 ; refs ram_F852 in on_chip_ram; cycles=6
+BE15: 1D F8 5C 80 MOV:G.W @H'F85C, R0 ; refs ram_F85C in on_chip_ram; cycles=6
+BE19: 1D F8 54 90 MOV:G.W R0, @H'F854 ; refs ram_F854 in on_chip_ram; cycles=6
+BE1D: 15 F9 C0 06 1F MOV:G.B #H'1F, @H'F9C0 ; refs ram_F9C0 in on_chip_ram; cycles=9
BE22: 1E FC 01 BSR loc_BA26 ; cycles=13
BE25: 20 48 BRA loc_BE6F ; cycles=8
@@ -3243,25 +3326,25 @@ loc_BE27:
BE27: 20 46 BRA loc_BE6F ; cycles=8
loc_BE29:
-BE29: 15 FA A4 D7 BCLR.B #7, @H'FAA4 ; refs H'FAA4 in on_chip_ram; cycles=8
-BE2D: 15 FA A5 F7 BTST.B #7, @H'FAA5 ; refs H'FAA5 in on_chip_ram; cycles=6
+BE29: 15 FA A4 D7 BCLR.B #7, @H'FAA4 ; refs ram_FAA4 in on_chip_ram; cycles=8
+BE2D: 15 FA A5 F7 BTST.B #7, @H'FAA5 ; refs ram_FAA5 in on_chip_ram; cycles=6
BE31: 27 3A BEQ loc_BE6D ; cycles=3/8 nt/t
-BE33: 15 FA A6 08 ADD:Q.B #1, @H'FAA6 ; refs H'FAA6 in on_chip_ram; cycles=8
-BE37: 15 FA A6 04 02 CMP:G.B #H'02, @H'FAA6 ; refs H'FAA6 in on_chip_ram; cycles=6
+BE33: 15 FA A6 08 ADD:Q.B #1, @H'FAA6 ; refs ram_FAA6 in on_chip_ram; cycles=8
+BE37: 15 FA A6 04 02 CMP:G.B #H'02, @H'FAA6 ; refs ram_FAA6 in on_chip_ram; cycles=6
BE3C: 25 0F BCS loc_BE4D ; cycles=3/7 nt/t
-BE3E: 15 F9 C0 06 1F MOV:G.B #H'1F, @H'F9C0 ; refs H'F9C0 in on_chip_ram; cycles=9
-BE43: 15 FA A3 13 CLR.B @H'FAA3 ; refs H'FAA3 in on_chip_ram; cycles=8
-BE47: 15 FA A2 13 CLR.B @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=8
+BE3E: 15 F9 C0 06 1F MOV:G.B #H'1F, @H'F9C0 ; refs ram_F9C0 in on_chip_ram; cycles=9
+BE43: 15 FA A3 13 CLR.B @H'FAA3 ; refs ram_FAA3 in on_chip_ram; cycles=8
+BE47: 15 FA A2 13 CLR.B @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=8
BE4B: 20 20 BRA loc_BE6D ; cycles=8
loc_BE4D:
-BE4D: 15 F8 50 06 07 MOV:G.B #H'07, @H'F850 ; refs H'F850 in on_chip_ram; cycles=9
-BE52: 15 F8 61 80 MOV:G.B @H'F861, R0 ; refs H'F861 in on_chip_ram; cycles=7
-BE56: 15 F8 51 90 MOV:G.B R0, @H'F851 ; refs H'F851 in on_chip_ram; cycles=7
-BE5A: 1D F8 62 80 MOV:G.W @H'F862, R0 ; refs H'F862 in on_chip_ram; cycles=7
-BE5E: 1D F8 52 90 MOV:G.W R0, @H'F852 ; refs H'F852 in on_chip_ram; cycles=7
-BE62: 15 F8 64 80 MOV:G.B @H'F864, R0 ; refs H'F864 in on_chip_ram; cycles=7
-BE66: 15 F8 54 90 MOV:G.B R0, @H'F854 ; refs H'F854 in on_chip_ram; cycles=7
+BE4D: 15 F8 50 06 07 MOV:G.B #H'07, @H'F850 ; refs ram_F850 in on_chip_ram; cycles=9
+BE52: 15 F8 61 80 MOV:G.B @H'F861, R0 ; refs ram_F861 in on_chip_ram; cycles=7
+BE56: 15 F8 51 90 MOV:G.B R0, @H'F851 ; refs ram_F851 in on_chip_ram; cycles=7
+BE5A: 1D F8 62 80 MOV:G.W @H'F862, R0 ; refs ram_F862 in on_chip_ram; cycles=7
+BE5E: 1D F8 52 90 MOV:G.W R0, @H'F852 ; refs ram_F852 in on_chip_ram; cycles=7
+BE62: 15 F8 64 80 MOV:G.B @H'F864, R0 ; refs ram_F864 in on_chip_ram; cycles=7
+BE66: 15 F8 54 90 MOV:G.B R0, @H'F854 ; refs ram_F854 in on_chip_ram; cycles=7
BE6A: 1E FB B9 BSR loc_BA26 ; cycles=13
loc_BE6D:
@@ -3271,10 +3354,10 @@ loc_BE6F:
BE6F: 19 RTS ; cycles=13
loc_BE70:
-BE70: 15 F9 B9 83 MOV:G.B @H'F9B9, R3 ; refs H'F9B9 in on_chip_ram; cycles=7
+BE70: 15 F9 B9 83 MOV:G.B @H'F9B9, R3 ; refs ram_F9B9 in on_chip_ram; cycles=7
BE74: A3 12 EXTU.B R3 ; cycles=3
BE76: AB 1A SHLL.W R3 ; cycles=3
-BE78: 15 F9 B4 81 MOV:G.B @H'F9B4, R1 ; refs H'F9B4 in on_chip_ram; cycles=7
+BE78: 15 F9 B4 81 MOV:G.B @H'F9B4, R1 ; refs ram_F9B4 in on_chip_ram; cycles=7
BE7C: A1 12 EXTU.B R1 ; cycles=3
BE7E: A9 1A SHLL.W R1 ; cycles=3
@@ -3289,140 +3372,140 @@ BE8F: 20 EF BRA loc_BE80 ; cycles=8
loc_BE91:
BE91: F9 F9 70 95 MOV:G.W R5, @(-H'0690,R1) ; cycles=6
-BE95: 15 F9 B4 08 ADD:Q.B #1, @H'F9B4 ; refs H'F9B4 in on_chip_ram; cycles=8
-BE99: 15 F9 B4 D5 BCLR.B #5, @H'F9B4 ; refs H'F9B4 in on_chip_ram; cycles=8
+BE95: 15 F9 B4 08 ADD:Q.B #1, @H'F9B4 ; refs ram_F9B4 in on_chip_ram; cycles=8
+BE99: 15 F9 B4 D5 BCLR.B #5, @H'F9B4 ; refs ram_F9B4 in on_chip_ram; cycles=8
loc_BE9D:
BE9D: 19 RTS ; cycles=13
loc_BE9E:
-BE9E: 15 FA A5 80 MOV:G.B @H'FAA5, R0 ; refs H'FAA5 in on_chip_ram; cycles=7
+BE9E: 15 FA A5 80 MOV:G.B @H'FAA5, R0 ; refs ram_FAA5 in on_chip_ram; cycles=7
BEA2: 04 80 50 AND.B #H'80, R0 ; cycles=3
-BEA5: 15 FA A3 50 AND.B @H'FAA3, R0 ; refs H'FAA3 in on_chip_ram; cycles=6
-BEA9: 15 FA A3 90 MOV:G.B R0, @H'FAA3 ; refs H'FAA3 in on_chip_ram; cycles=6
+BEA5: 15 FA A3 50 AND.B @H'FAA3, R0 ; refs ram_FAA3 in on_chip_ram; cycles=6
+BEA9: 15 FA A3 90 MOV:G.B R0, @H'FAA3 ; refs ram_FAA3 in on_chip_ram; cycles=6
BEAD: 26 06 BNE loc_BEB5 ; cycles=3/8 nt/t
-BEAF: 15 FA A2 13 CLR.B @H'FAA2 ; refs H'FAA2 in on_chip_ram; cycles=8
+BEAF: 15 FA A2 13 CLR.B @H'FAA2 ; refs ram_FAA2 in on_chip_ram; cycles=8
BEB3: 20 33 BRA loc_BEE8 ; cycles=8
loc_BEB5:
-BEB5: 1D F9 C6 16 TST.W @H'F9C6 ; refs H'F9C6 in on_chip_ram; cycles=6
+BEB5: 1D F9 C6 16 TST.W @H'F9C6 ; refs ram_F9C6 in on_chip_ram; cycles=6
BEB9: 26 2D BNE loc_BEE8 ; cycles=3/8 nt/t
-BEBB: 15 F9 C8 16 TST.B @H'F9C8 ; refs H'F9C8 in on_chip_ram; cycles=6
+BEBB: 15 F9 C8 16 TST.B @H'F9C8 ; refs ram_F9C8 in on_chip_ram; cycles=6
BEBF: 27 23 BEQ loc_BEE4 ; cycles=3/8 nt/t
-BEC1: 15 F9 C8 0C ADD:Q.B #-1, @H'F9C8 ; refs H'F9C8 in on_chip_ram; cycles=8
-BEC5: 1D F9 C6 07 01 F4 MOV:G.W #H'01F4, @H'F9C6 ; refs H'F9C6 in on_chip_ram; cycles=9
-BECB: 15 FA A3 F7 BTST.B #7, @H'FAA3 ; refs H'FAA3 in on_chip_ram; cycles=6
+BEC1: 15 F9 C8 0C ADD:Q.B #-1, @H'F9C8 ; refs ram_F9C8 in on_chip_ram; cycles=8
+BEC5: 1D F9 C6 07 01 F4 MOV:G.W #H'01F4, @H'F9C6 ; refs ram_F9C6 in on_chip_ram; cycles=9
+BECB: 15 FA A3 F7 BTST.B #7, @H'FAA3 ; refs ram_FAA3 in on_chip_ram; cycles=6
BECF: 27 17 BEQ loc_BEE8 ; cycles=3/8 nt/t
-BED1: 15 F9 C3 13 CLR.B @H'F9C3 ; refs H'F9C3 in on_chip_ram; cycles=8
+BED1: 15 F9 C3 13 CLR.B @H'F9C3 ; refs ram_F9C3 in on_chip_ram; cycles=8
BED5: 1E FB 4E BSR loc_BA26 ; cycles=14
BED8: 20 0E BRA loc_BEE8 ; cycles=7
loc_BEE4:
-BEE4: 15 F9 C5 13 CLR.B @H'F9C5 ; refs H'F9C5 in on_chip_ram; cycles=9
+BEE4: 15 F9 C5 13 CLR.B @H'F9C5 ; refs ram_F9C5 in on_chip_ram; cycles=9
loc_BEE8:
BEE8: 19 RTS ; cycles=12
vec_frt1_ocia_BEEA:
BEEA: 15 FE 91 D5 BCLR.B #5, @FRT1_TCSR ; clear OCFA (bit 5) of FRT1_TCSR; cycles=9
-BEEE: 15 F9 C0 16 TST.B @H'F9C0 ; refs H'F9C0 in on_chip_ram; cycles=7
+BEEE: 15 F9 C0 16 TST.B @H'F9C0 ; refs ram_F9C0 in on_chip_ram; cycles=7
BEF2: 27 04 BEQ loc_BEF8 ; cycles=3/7 nt/t
-BEF4: 15 F9 C0 0C ADD:Q.B #-1, @H'F9C0 ; refs H'F9C0 in on_chip_ram; cycles=9
+BEF4: 15 F9 C0 0C ADD:Q.B #-1, @H'F9C0 ; refs ram_F9C0 in on_chip_ram; cycles=9
loc_BEF8:
-BEF8: 15 F9 C1 16 TST.B @H'F9C1 ; refs H'F9C1 in on_chip_ram; cycles=7
+BEF8: 15 F9 C1 16 TST.B @H'F9C1 ; refs ram_F9C1 in on_chip_ram; cycles=7
BEFC: 27 04 BEQ loc_BF02 ; cycles=3/7 nt/t
-BEFE: 15 F9 C1 0C ADD:Q.B #-1, @H'F9C1 ; refs H'F9C1 in on_chip_ram; cycles=9
+BEFE: 15 F9 C1 0C ADD:Q.B #-1, @H'F9C1 ; refs ram_F9C1 in on_chip_ram; cycles=9
loc_BF02:
-BF02: 1D F9 C6 16 TST.W @H'F9C6 ; refs H'F9C6 in on_chip_ram; cycles=7
+BF02: 1D F9 C6 16 TST.W @H'F9C6 ; refs ram_F9C6 in on_chip_ram; cycles=7
BF06: 27 04 BEQ loc_BF0C ; cycles=3/7 nt/t
-BF08: 1D F9 C6 0C ADD:Q.W #-1, @H'F9C6 ; refs H'F9C6 in on_chip_ram; cycles=9
+BF08: 1D F9 C6 0C ADD:Q.W #-1, @H'F9C6 ; refs ram_F9C6 in on_chip_ram; cycles=9
loc_BF0C:
-BF0C: 15 F6 F6 F7 BTST.B #7, @H'F6F6 ; refs H'F6F6 in on_chip_ram; cycles=7
+BF0C: 15 F6 F6 F7 BTST.B #7, @H'F6F6 ; refs ram_F6F6 in on_chip_ram; cycles=7
BF10: 27 10 BEQ loc_BF22 ; cycles=3/7 nt/t
-BF12: 1D F6 F4 16 TST.W @H'F6F4 ; refs H'F6F4 in on_chip_ram; cycles=7
+BF12: 1D F6 F4 16 TST.W @H'F6F4 ; refs ram_F6F4 in on_chip_ram; cycles=7
BF16: 26 06 BNE loc_BF1E ; cycles=3/7 nt/t
-BF18: 15 F6 F6 C5 BSET.B #5, @H'F6F6 ; refs H'F6F6 in on_chip_ram; cycles=9
+BF18: 15 F6 F6 C5 BSET.B #5, @H'F6F6 ; refs ram_F6F6 in on_chip_ram; cycles=9
BF1C: 20 04 BRA loc_BF22 ; cycles=7
loc_BF1E:
-BF1E: 1D F6 F4 0C ADD:Q.W #-1, @H'F6F4 ; refs H'F6F4 in on_chip_ram; cycles=9
+BF1E: 1D F6 F4 0C ADD:Q.W #-1, @H'F6F4 ; refs ram_F6F4 in on_chip_ram; cycles=9
loc_BF22:
BF22: 0A RTE ; cycles=13
vec_frt2_ocia_BF23:
BF23: 15 FE A1 D5 BCLR.B #5, @FRT2_TCSR ; clear OCFA (bit 5) of FRT2_TCSR; cycles=8
-BF27: 15 F9 C4 16 TST.B @H'F9C4 ; refs H'F9C4 in on_chip_ram; cycles=6
+BF27: 15 F9 C4 16 TST.B @H'F9C4 ; refs ram_F9C4 in on_chip_ram; cycles=6
BF2B: 27 04 BEQ loc_BF31 ; cycles=3/8 nt/t
-BF2D: 15 F9 C4 0C ADD:Q.B #-1, @H'F9C4 ; refs H'F9C4 in on_chip_ram; cycles=8
+BF2D: 15 F9 C4 0C ADD:Q.B #-1, @H'F9C4 ; refs ram_F9C4 in on_chip_ram; cycles=8
loc_BF31:
-BF31: 15 F9 C5 16 TST.B @H'F9C5 ; refs H'F9C5 in on_chip_ram; cycles=6
+BF31: 15 F9 C5 16 TST.B @H'F9C5 ; refs ram_F9C5 in on_chip_ram; cycles=6
BF35: 27 04 BEQ loc_BF3B ; cycles=3/8 nt/t
-BF37: 15 F9 C5 0C ADD:Q.B #-1, @H'F9C5 ; refs H'F9C5 in on_chip_ram; cycles=8
+BF37: 15 F9 C5 0C ADD:Q.B #-1, @H'F9C5 ; refs ram_F9C5 in on_chip_ram; cycles=8
loc_BF3B:
-BF3B: 15 F7 24 16 TST.B @H'F724 ; refs H'F724 in on_chip_ram; cycles=6
+BF3B: 15 F7 24 16 TST.B @H'F724 ; refs ram_F724 in on_chip_ram; cycles=6
BF3F: 27 06 BEQ loc_BF47 ; cycles=3/8 nt/t
-BF41: 15 F7 24 0C ADD:Q.B #-1, @H'F724 ; refs H'F724 in on_chip_ram; cycles=8
+BF41: 15 F7 24 0C ADD:Q.B #-1, @H'F724 ; refs ram_F724 in on_chip_ram; cycles=8
BF45: 20 09 BRA loc_BF50 ; cycles=8
loc_BF47:
-BF47: 15 F7 24 06 03 MOV:G.B #H'03, @H'F724 ; refs H'F724 in on_chip_ram; cycles=9
-BF4C: 15 F7 23 15 NOT.B @H'F723 ; refs H'F723 in on_chip_ram; cycles=9
+BF47: 15 F7 24 06 03 MOV:G.B #H'03, @H'F724 ; refs ram_F724 in on_chip_ram; cycles=9
+BF4C: 15 F7 23 15 NOT.B @H'F723 ; refs ram_F723 in on_chip_ram; cycles=9
loc_BF50:
-BF50: 15 FB 03 F7 BTST.B #7, @H'FB03 ; refs H'FB03 in on_chip_ram; cycles=7
+BF50: 15 FB 03 F7 BTST.B #7, @H'FB03 ; refs ram_FB03 in on_chip_ram; cycles=7
BF54: 27 17 BEQ loc_BF6D ; cycles=3/7 nt/t
-BF56: 15 FB 02 16 TST.B @H'FB02 ; refs H'FB02 in on_chip_ram; cycles=7
+BF56: 15 FB 02 16 TST.B @H'FB02 ; refs ram_FB02 in on_chip_ram; cycles=7
BF5A: 27 06 BEQ loc_BF62 ; cycles=3/7 nt/t
-BF5C: 15 FB 02 0C ADD:Q.B #-1, @H'FB02 ; refs H'FB02 in on_chip_ram; cycles=9
+BF5C: 15 FB 02 0C ADD:Q.B #-1, @H'FB02 ; refs ram_FB02 in on_chip_ram; cycles=9
BF60: 20 0B BRA loc_BF6D ; cycles=7
loc_BF62:
-BF62: 15 FB 03 D7 BCLR.B #7, @H'FB03 ; refs H'FB03 in on_chip_ram; cycles=9
+BF62: 15 FB 03 D7 BCLR.B #7, @H'FB03 ; refs ram_FB03 in on_chip_ram; cycles=9
BF66: 12 3F STM.W {R0,R1,R2,R3,R4,R5}, @-SP ; cycles=24
BF68: 1E 89 84 BSR loc_48EF ; cycles=13
BF6B: 02 3F LDM.W @SP+, {R0,R1,R2,R3,R4,R5} ; cycles=30
loc_BF6D:
-BF6D: 15 F7 6C 16 TST.B @H'F76C ; refs H'F76C in on_chip_ram; cycles=6
+BF6D: 15 F7 6C 16 TST.B @H'F76C ; refs ram_F76C in on_chip_ram; cycles=6
BF71: 27 04 BEQ loc_BF77 ; cycles=3/8 nt/t
-BF73: 15 F7 6C 0C ADD:Q.B #-1, @H'F76C ; refs H'F76C in on_chip_ram; cycles=8
+BF73: 15 F7 6C 0C ADD:Q.B #-1, @H'F76C ; refs ram_F76C in on_chip_ram; cycles=8
loc_BF77:
-BF77: 15 F8 40 16 TST.B @H'F840 ; refs H'F840 in on_chip_ram; cycles=6
+BF77: 15 F8 40 16 TST.B @H'F840 ; refs ram_F840 in on_chip_ram; cycles=6
BF7B: 27 04 BEQ loc_BF81 ; cycles=3/8 nt/t
-BF7D: 15 F8 40 0C ADD:Q.B #-1, @H'F840 ; refs H'F840 in on_chip_ram; cycles=8
+BF7D: 15 F8 40 0C ADD:Q.B #-1, @H'F840 ; refs ram_F840 in on_chip_ram; cycles=8
loc_BF81:
-BF81: 15 F7 26 16 TST.B @H'F726 ; refs H'F726 in on_chip_ram; cycles=6
+BF81: 15 F7 26 16 TST.B @H'F726 ; refs ram_F726 in on_chip_ram; cycles=6
BF85: 27 1C BEQ loc_BFA3 ; cycles=3/8 nt/t
-BF87: 15 F7 26 0C ADD:Q.B #-1, @H'F726 ; refs H'F726 in on_chip_ram; cycles=8
+BF87: 15 F7 26 0C ADD:Q.B #-1, @H'F726 ; refs ram_F726 in on_chip_ram; cycles=8
BF8B: 26 16 BNE loc_BFA3 ; cycles=3/8 nt/t
-BF8D: 15 F7 13 D6 BCLR.B #6, @H'F713 ; refs H'F713 in on_chip_ram; cycles=8
+BF8D: 15 F7 13 D6 BCLR.B #6, @H'F713 ; refs ram_F713 in on_chip_ram; cycles=8
BF91: 26 10 BNE loc_BFA3 ; cycles=3/8 nt/t
-BF93: 15 F7 11 D7 BCLR.B #7, @H'F711 ; refs H'F711 in on_chip_ram; cycles=8
-BF97: 15 F7 11 D6 BCLR.B #6, @H'F711 ; refs H'F711 in on_chip_ram; cycles=8
-BF9B: 15 F7 11 D5 BCLR.B #5, @H'F711 ; refs H'F711 in on_chip_ram; cycles=8
-BF9F: 15 F7 11 D4 BCLR.B #4, @H'F711 ; refs H'F711 in on_chip_ram; cycles=8
+BF93: 15 F7 11 D7 BCLR.B #7, @H'F711 ; refs ram_F711 in on_chip_ram; cycles=8
+BF97: 15 F7 11 D6 BCLR.B #6, @H'F711 ; refs ram_F711 in on_chip_ram; cycles=8
+BF9B: 15 F7 11 D5 BCLR.B #5, @H'F711 ; refs ram_F711 in on_chip_ram; cycles=8
+BF9F: 15 F7 11 D4 BCLR.B #4, @H'F711 ; refs ram_F711 in on_chip_ram; cycles=8
loc_BFA3:
-BFA3: 15 F7 97 16 TST.B @H'F797 ; refs H'F797 in on_chip_ram; cycles=6
+BFA3: 15 F7 97 16 TST.B @H'F797 ; refs ram_F797 in on_chip_ram; cycles=6
BFA7: 27 0A BEQ loc_BFB3 ; cycles=3/8 nt/t
-BFA9: 15 F7 97 0C ADD:Q.B #-1, @H'F797 ; refs H'F797 in on_chip_ram; cycles=8
+BFA9: 15 F7 97 0C ADD:Q.B #-1, @H'F797 ; refs ram_F797 in on_chip_ram; cycles=8
BFAD: 26 04 BNE loc_BFB3 ; cycles=3/8 nt/t
-BFAF: 15 F7 31 D7 BCLR.B #7, @H'F731 ; refs H'F731 in on_chip_ram; cycles=8
+BFAF: 15 F7 31 D7 BCLR.B #7, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=8
loc_BFB3:
-BFB3: 15 F7 98 16 TST.B @H'F798 ; refs H'F798 in on_chip_ram; cycles=6
+BFB3: 15 F7 98 16 TST.B @H'F798 ; refs ram_F798 in on_chip_ram; cycles=6
BFB7: 27 0A BEQ loc_BFC3 ; cycles=3/8 nt/t
-BFB9: 15 F7 98 0C ADD:Q.B #-1, @H'F798 ; refs H'F798 in on_chip_ram; cycles=8
+BFB9: 15 F7 98 0C ADD:Q.B #-1, @H'F798 ; refs ram_F798 in on_chip_ram; cycles=8
BFBD: 26 04 BNE loc_BFC3 ; cycles=3/8 nt/t
-BFBF: 15 F7 31 D7 BCLR.B #7, @H'F731 ; refs H'F731 in on_chip_ram; cycles=8
+BFBF: 15 F7 31 D7 BCLR.B #7, @H'F731 ; refs ram_F731 in on_chip_ram; cycles=8
loc_BFC3:
BFC3: 0A RTE ; cycles=14
@@ -3430,8 +3513,8 @@ BFC3: 0A RTE ; cycles=14
vec_interval_timer_BFC4:
BFC4: 15 FE EC F7 BTST.B #7, @WDT_TCSR_R ; refs WDT_TCSR_R in register_field; cycles=7
BFC8: 1D FE EC 07 A5 3F MOV:G.W #H'A53F, @WDT_TCSR_R ; WDT_TCSR_R = H'A53F (OVF=0 WT/IT=0 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, interval IRQ0, clock phi/4096); cycles=11
-BFCE: 15 F7 94 08 ADD:Q.B #1, @H'F794 ; refs H'F794 in on_chip_ram; cycles=9
-BFD2: 15 F7 94 04 0A CMP:G.B #H'0A, @H'F794 ; refs H'F794 in on_chip_ram; cycles=7
+BFCE: 15 F7 94 08 ADD:Q.B #1, @H'F794 ; refs ram_F794 in on_chip_ram; cycles=9
+BFD2: 15 F7 94 04 0A CMP:G.B #H'0A, @H'F794 ; refs ram_F794 in on_chip_ram; cycles=7
BFD7: 26 06 BNE loc_BFDF ; cycles=3/8 nt/t
BFD9: 1D FE EC 07 A5 7F MOV:G.W #H'A57F, @WDT_TCSR_R ; WDT_TCSR_R = H'A57F (OVF=0 WT/IT=1 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, watchdog NMI, clock phi/4096); cycles=9
@@ -3439,7 +3522,7 @@ loc_BFDF:
BFDF: 0A RTE ; cycles=14
loc_BFE0:
-BFE0: 15 F8 40 06 0A MOV:G.B #H'0A, @H'F840 ; refs H'F840 in on_chip_ram; cycles=9
+BFE0: 15 F8 40 06 0A MOV:G.B #H'0A, @H'F840 ; refs ram_F840 in on_chip_ram; cycles=9
loc_BFE5:
BFE5: AD 82 MOV:G.W R5, R2 ; cycles=3
@@ -3447,23 +3530,23 @@ BFE7: 0E 27 BSR loc_C010 ; cycles=14
BFE9: 0E 4E BSR loc_C039 ; cycles=14
BFEB: AA 75 CMP:G.W R2, R5 ; cycles=3
BFED: 27 0E BEQ loc_BFFD ; cycles=3/8 nt/t
-BFEF: 15 F8 40 16 TST.B @H'F840 ; refs H'F840 in on_chip_ram; cycles=6
+BFEF: 15 F8 40 16 TST.B @H'F840 ; refs ram_F840 in on_chip_ram; cycles=6
BFF3: 27 04 BEQ loc_BFF9 ; cycles=3/8 nt/t
BFF5: AA 85 MOV:G.W R2, R5 ; cycles=3
BFF7: 20 EC BRA loc_BFE5 ; cycles=8
loc_BFF9:
-BFF9: 15 F8 41 C7 BSET.B #7, @H'F841 ; refs H'F841 in on_chip_ram; cycles=8
+BFF9: 15 F8 41 C7 BSET.B #7, @H'F841 ; refs ram_F841 in on_chip_ram; cycles=8
loc_BFFD:
BFFD: 19 RTS ; cycles=13
loc_BFFE:
-BFFE: 15 F8 40 06 0A MOV:G.B #H'0A, @H'F840 ; refs H'F840 in on_chip_ram; cycles=9
+BFFE: 15 F8 40 06 0A MOV:G.B #H'0A, @H'F840 ; refs ram_F840 in on_chip_ram; cycles=9
C003: 0E 34 BSR loc_C039 ; cycles=14
-C005: 15 F8 40 16 TST.B @H'F840 ; refs H'F840 in on_chip_ram; cycles=6
+C005: 15 F8 40 16 TST.B @H'F840 ; refs ram_F840 in on_chip_ram; cycles=6
C009: 26 04 BNE loc_C00F ; cycles=3/8 nt/t
-C00B: 15 F8 41 C6 BSET.B #6, @H'F841 ; refs H'F841 in on_chip_ram; cycles=8
+C00B: 15 F8 41 C6 BSET.B #6, @H'F841 ; refs ram_F841 in on_chip_ram; cycles=8
loc_C00F:
C00F: 19 RTS ; cycles=13
@@ -3472,7 +3555,7 @@ loc_C010:
C010: 0E 58 BSR loc_C06A ; cycles=13
loc_C012:
-C012: 15 F8 40 16 TST.B @H'F840 ; refs H'F840 in on_chip_ram; cycles=7
+C012: 15 F8 40 16 TST.B @H'F840 ; refs ram_F840 in on_chip_ram; cycles=7
C016: 27 20 BEQ loc_C038 ; cycles=3/7 nt/t
C018: 1E 01 06 BSR loc_C121 ; cycles=13
C01B: A3 80 MOV:G.B R3, R0 ; cycles=2
@@ -3497,7 +3580,7 @@ loc_C039:
C039: 0E 2F BSR loc_C06A ; cycles=14
loc_C03B:
-C03B: 15 F8 40 16 TST.B @H'F840 ; refs H'F840 in on_chip_ram; cycles=6
+C03B: 15 F8 40 16 TST.B @H'F840 ; refs ram_F840 in on_chip_ram; cycles=6
C03F: 27 28 BEQ loc_C069 ; cycles=3/8 nt/t
C041: 1E 00 DD BSR loc_C121 ; cycles=14
C044: A3 80 MOV:G.B R3, R0 ; cycles=2
@@ -3541,7 +3624,7 @@ loc_C08A:
C08A: 19 RTS ; cycles=12
loc_C08B:
-C08B: 59 00 07 MOV:I.W #H'0007, R1 ; cycles=3
+C08B: 59 00 07 MOV:I.W #H'0007, R1 ; dataflow R1=H'0007; cycles=3
loc_C08E:
C08E: A0 1A SHLL.B R0 ; cycles=2
@@ -3565,20 +3648,20 @@ C0BC: 15 FE FF F7 BTST.B #7, @P9DR ; refs P9DR in register_field; cycles=7
C0C0: 27 0D BEQ loc_C0CF ; cycles=3/7 nt/t
C0C2: 15 FE FF D1 BCLR.B #1, @P9DR ; clear bit 1 of P9DR; cycles=9
C0C6: 15 FE FE 06 93 MOV:G.B #H'93, @P9DDR ; P9DDR = H'93; cycles=9
-C0CB: 50 00 MOV:E.B #H'00, R0 ; cycles=2
+C0CB: 50 00 MOV:E.B #H'00, R0 ; dataflow R0=H'00; cycles=2
C0CD: 20 0B BRA loc_C0DA ; cycles=8
loc_C0CF:
C0CF: 15 FE FF D1 BCLR.B #1, @P9DR ; clear bit 1 of P9DR; cycles=8
C0D3: 15 FE FE 06 93 MOV:G.B #H'93, @P9DDR ; P9DDR = H'93; cycles=9
-C0D8: 50 01 MOV:E.B #H'01, R0 ; cycles=2
+C0D8: 50 01 MOV:E.B #H'01, R0 ; dataflow R0=H'01; cycles=2
loc_C0DA:
C0DA: 19 RTS ; cycles=12
loc_C0DB:
C0DB: 15 FE FE 06 13 MOV:G.B #H'13, @P9DDR ; P9DDR = H'13; cycles=9
-C0E0: 59 00 07 MOV:I.W #H'0007, R1 ; cycles=3
+C0E0: 59 00 07 MOV:I.W #H'0007, R1 ; dataflow R1=H'0007; cycles=3
loc_C0E3:
C0E3: 15 FE FF C1 BSET.B #1, @P9DR ; set bit 1 of P9DR; cycles=8
diff --git a/build/rom_decompiled.json b/build/rom_decompiled.json
index f6a9245..1b5da1f 100644
--- a/build/rom_decompiled.json
+++ b/build/rom_decompiled.json
@@ -15662,6 +15662,25874 @@
],
"warnings": []
},
+ "indirect_flow": {
+ "sites": [
+ {
+ "address": 7192,
+ "instruction": "JSR @R0",
+ "kind": "call",
+ "target_register": "R0",
+ "confidence": "unknown",
+ "summary": "JSR @R0 uses R0; target not resolved"
+ },
+ {
+ "address": 10403,
+ "instruction": "JMP @R1",
+ "kind": "jump",
+ "target_register": "R1",
+ "confidence": "table_load",
+ "table": {
+ "base": 10406,
+ "index_register": "R4",
+ "target_register": "R1",
+ "load_address": 10399,
+ "load_instruction": "MOV:G.W @(H'28A6,R4), R1",
+ "entry_size": 2,
+ "entry_count": 128,
+ "decoded_target_count": 103,
+ "entries": [
+ {
+ "index": 0,
+ "entry_address": 10406,
+ "target": 11449,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 1,
+ "entry_address": 10408,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 2,
+ "entry_address": 10410,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 3,
+ "entry_address": 10412,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 4,
+ "entry_address": 10414,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 5,
+ "entry_address": 10416,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 6,
+ "entry_address": 10418,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 7,
+ "entry_address": 10420,
+ "target": 11715,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 8,
+ "entry_address": 10422,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 9,
+ "entry_address": 10424,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 10,
+ "entry_address": 10426,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 11,
+ "entry_address": 10428,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 12,
+ "entry_address": 10430,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 13,
+ "entry_address": 10432,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 14,
+ "entry_address": 10434,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 15,
+ "entry_address": 10436,
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+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 125,
+ "entry_address": 10656,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 126,
+ "entry_address": 10658,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
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+ {
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+ "entry_address": 10660,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ }
+ ]
+ },
+ "summary": "JMP @R1 uses R1 loaded from pointer table H'28A6 via R4 (103/128 decoded targets)"
+ },
+ {
+ "address": 18747,
+ "instruction": "JSR @R0",
+ "kind": "call",
+ "target_register": "R0",
+ "confidence": "table_load",
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+ "base": 18750,
+ "index_register": "R0",
+ "target_register": "R0",
+ "load_address": 18743,
+ "load_instruction": "MOV:G.W @(H'493E,R0), R0",
+ "entry_size": 2,
+ "entry_count": 52,
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+ {
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+ },
+ {
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+ {
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+ {
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+ "target_label": null,
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+ "decoded_code": false
+ },
+ {
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+ "entry_address": 18770,
+ "target": 33062,
+ "target_label": null,
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+ "decoded_code": false
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+ {
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+ {
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+ "decoded_code": false
+ },
+ {
+ "index": 13,
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+ "decoded_code": false
+ },
+ {
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+ "entry_address": 18784,
+ "target": 37844,
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+ "decoded_code": false
+ },
+ {
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+ },
+ {
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+ "entry_address": 18798,
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+ "decoded_code": false
+ },
+ {
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+ "entry_address": 18800,
+ "target": 37642,
+ "target_label": null,
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+ "decoded_code": false
+ },
+ {
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+ },
+ {
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+ },
+ {
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+ "decoded_code": false
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+ {
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+ {
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+ "target_label": null,
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+ "decoded_code": false
+ },
+ {
+ "index": 32,
+ "entry_address": 18814,
+ "target": 7671,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 33,
+ "entry_address": 18816,
+ "target": 12928,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 34,
+ "entry_address": 18818,
+ "target": 7671,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 35,
+ "entry_address": 18820,
+ "target": 13456,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 36,
+ "entry_address": 18822,
+ "target": 7671,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 37,
+ "entry_address": 18824,
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+ "decoded_code": false
+ },
+ {
+ "index": 38,
+ "entry_address": 18826,
+ "target": 6912,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 39,
+ "entry_address": 18828,
+ "target": 7935,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 40,
+ "entry_address": 18830,
+ "target": 27417,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 41,
+ "entry_address": 18832,
+ "target": 5627,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 42,
+ "entry_address": 18834,
+ "target": 983,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 43,
+ "entry_address": 18836,
+ "target": 9736,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 44,
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+ "decoded_code": false
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+ "target_label": null,
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+ "decoded_code": false
+ },
+ {
+ "index": 47,
+ "entry_address": 18844,
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+ "decoded_code": false
+ },
+ {
+ "index": 48,
+ "entry_address": 18846,
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+ "target_label": null,
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+ "decoded_code": false
+ },
+ {
+ "index": 49,
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+ "target": 12804,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
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+ {
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+ "decoded_code": false
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+ "target": 1565,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ }
+ ]
+ },
+ "summary": "JSR @R0 uses R0 loaded from pointer table H'493E via R0 (0/52 decoded targets)"
+ }
+ ]
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+ "address": 57638,
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+ "width": "word",
+ "operand": "@H'F00C",
+ "operand_index": 0
+ },
+ {
+ "address": 61452,
+ "instruction_address": 15578,
+ "instruction": "MOV:G.W @H'F00C, R0",
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+ "width": "word",
+ "operand": "@H'F00C",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 61453,
+ "name": "mem_F00D",
+ "region": "program_or_external",
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+ "first_access": 15013,
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+ "address": 61453,
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+ "operand": "@H'F00D",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 61454,
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+ "operand_index": 1
+ }
+ ]
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+ "address": 61455,
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+ "first_access": 15037,
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+ "operand_index": 0
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+ "address": 61696,
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+ "address": 61696,
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+ }
+ ]
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+ }
+ ]
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+ }
+ ]
+ },
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+ }
+ ]
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+ }
+ ]
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+ }
+ ]
+ },
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+ "operand": "@H'F108",
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+ "instruction": "MOV:G.B @H'F108, R0",
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+ "operand": "@H'F108",
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+ }
+ ]
+ },
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+ "address": 61705,
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+ }
+ ]
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+ "address": 61706,
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+ "operand": "@H'F10A",
+ "operand_index": 1
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+ "operand": "@H'F10A",
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+ "instruction": "MOV:G.W @H'F10A, R0",
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+ "operand": "@H'F10A",
+ "operand_index": 0
+ }
+ ]
+ },
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+ "address": 61707,
+ "name": "mem_F10B",
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+ "width_hints": [
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+ "operand": "@H'F10B",
+ "operand_index": 1
+ }
+ ]
+ },
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+ "address": 61708,
+ "name": "mem_F10C",
+ "region": "program_or_external",
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+ "unknown_count": 0,
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+ "operand": "@H'F10C",
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+ "instruction": "MOV:G.W @H'F10C, R0",
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+ "operand": "@H'F10C",
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+ "instruction": "MOV:G.W @H'F10C, R0",
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+ "operand": "@H'F10C",
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+ }
+ ]
+ },
+ {
+ "address": 61709,
+ "name": "mem_F10D",
+ "region": "program_or_external",
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+ "width_hints": [
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+ "instruction": "MOV:G.B R0, @H'F10D",
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+ "operand": "@H'F10D",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 61710,
+ "name": "mem_F10E",
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+ "width_hints": [
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+ "instruction": "MOV:G.B R0, @H'F10E",
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+ "operand": "@H'F10E",
+ "operand_index": 1
+ }
+ ]
+ },
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+ "address": 61711,
+ "name": "mem_F10F",
+ "region": "program_or_external",
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+ "width_hints": [
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+ },
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+ "instruction": "MOV:G.B @H'F10F, R0",
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+ "operand": "@H'F10F",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 61952,
+ "name": "mem_F200",
+ "region": "program_or_external",
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+ "instruction": "MOVFPE.B @H'F200, R0",
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+ "operand": "@H'F200",
+ "operand_index": 0
+ },
+ {
+ "address": 61952,
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+ "instruction": "MOVTPE.B R4, @H'F200",
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+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F200",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 61953,
+ "name": "mem_F201",
+ "region": "program_or_external",
+ "kind": "memory",
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+ "width_hints": [
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+ "width": "byte",
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+ "instruction": "MOVTPE.B R4, @H'F201",
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+ "operand": "@H'F201",
+ "operand_index": 1
+ },
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+ "instruction": "MOVFPE.B @H'F201, R4",
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+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F201",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 62466,
+ "name": "mem_F402",
+ "region": "program_or_external",
+ "kind": "memory",
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+ "width_hints": [
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+ "width": "word",
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+ "instruction": "CMP:G.W #H'6B6F, @H'F402",
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+ "operand": "@H'F402",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 62468,
+ "name": "mem_F404",
+ "region": "program_or_external",
+ "kind": "memory",
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+ }
+ ]
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+ "address": 62805,
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+ "operand": "@H'F694",
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+ "operand": "@H'F696",
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+ }
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+ }
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+ },
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+ }
+ ]
+ },
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+ "instruction": "CMP:G.W @H'F69C, R0",
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+ "operand": "@H'F69C",
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+ "instruction": "MOV:G.W @H'F69C, R4",
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+ "operand": "@H'F69C",
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+ "operand": "@H'F69C",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63134,
+ "name": "ram_F69E",
+ "region": "on_chip_ram",
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+ "width_hints": [
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+ "instruction": "CMP:G.W @H'F69E, R0",
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+ "operand": "@H'F69E",
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+ "instruction": "MOV:G.W R0, @H'F69E",
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+ "operand": "@H'F69E",
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+ "address": 63172,
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+ "address": 63174,
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+ "target": 63185
+ }
+ ]
+ },
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+ }
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+ },
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+ }
+ ]
+ },
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+ }
+ ]
+ },
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+ "region": "on_chip_ram",
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+ "operand_index": 1
+ }
+ ]
+ },
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+ "address": 63190,
+ "name": "ram_F6D6",
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+ "operand_index": 1
+ }
+ ]
+ },
+ {
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+ "region": "on_chip_ram",
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+ "width_hints": [
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+ }
+ ]
+ },
+ {
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+ "name": "ram_F6D8",
+ "region": "on_chip_ram",
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+ "width_hints": [
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+ "instruction": "MOV:G.B R0, @H'F6D8",
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+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63193,
+ "name": "ram_F6D9",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "width_hints": [
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+ },
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+ "operand": "@H'F6D9",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63194,
+ "name": "ram_F6DA",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 15654,
+ "last_access": 15664,
+ "accesses": [
+ {
+ "address": 63194,
+ "instruction_address": 15654,
+ "instruction": "CMP:G.B @H'F6DA, R0",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6DA",
+ "operand_index": 0
+ },
+ {
+ "address": 63194,
+ "instruction_address": 15664,
+ "instruction": "MOV:G.B R0, @H'F6DA",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6DA",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63195,
+ "name": "ram_F6DB",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 4,
+ "read_count": 3,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 7160,
+ "last_access": 15682,
+ "accesses": [
+ {
+ "address": 63195,
+ "instruction_address": 7160,
+ "instruction": "MOV:G.B @H'F6DB, R4",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6DB",
+ "operand_index": 0
+ },
+ {
+ "address": 63195,
+ "instruction_address": 7173,
+ "instruction": "MOV:G.B @H'F6DB, R4",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6DB",
+ "operand_index": 0
+ },
+ {
+ "address": 63195,
+ "instruction_address": 15672,
+ "instruction": "CMP:G.B @H'F6DB, R0",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6DB",
+ "operand_index": 0
+ },
+ {
+ "address": 63195,
+ "instruction_address": 15682,
+ "instruction": "MOV:G.B R0, @H'F6DB",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6DB",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63196,
+ "name": "ram_F6DC",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 4,
+ "read_count": 3,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 7138,
+ "last_access": 15700,
+ "accesses": [
+ {
+ "address": 63196,
+ "instruction_address": 7138,
+ "instruction": "MOV:G.B @H'F6DC, R4",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6DC",
+ "operand_index": 0
+ },
+ {
+ "address": 63196,
+ "instruction_address": 7151,
+ "instruction": "MOV:G.B @H'F6DC, R4",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6DC",
+ "operand_index": 0
+ },
+ {
+ "address": 63196,
+ "instruction_address": 15690,
+ "instruction": "CMP:G.B @H'F6DC, R0",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6DC",
+ "operand_index": 0
+ },
+ {
+ "address": 63196,
+ "instruction_address": 15700,
+ "instruction": "MOV:G.B R0, @H'F6DC",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6DC",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63197,
+ "name": "ram_F6DD",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 15708,
+ "last_access": 15718,
+ "accesses": [
+ {
+ "address": 63197,
+ "instruction_address": 15708,
+ "instruction": "CMP:G.B @H'F6DD, R0",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6DD",
+ "operand_index": 0
+ },
+ {
+ "address": 63197,
+ "instruction_address": 15718,
+ "instruction": "MOV:G.B R0, @H'F6DD",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6DD",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63198,
+ "name": "ram_F6DE",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 15726,
+ "last_access": 15736,
+ "accesses": [
+ {
+ "address": 63198,
+ "instruction_address": 15726,
+ "instruction": "CMP:G.B @H'F6DE, R0",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6DE",
+ "operand_index": 0
+ },
+ {
+ "address": 63198,
+ "instruction_address": 15736,
+ "instruction": "MOV:G.B R0, @H'F6DE",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6DE",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63199,
+ "name": "ram_F6DF",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 15744,
+ "last_access": 15754,
+ "accesses": [
+ {
+ "address": 63199,
+ "instruction_address": 15744,
+ "instruction": "CMP:G.B @H'F6DF, R0",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6DF",
+ "operand_index": 0
+ },
+ {
+ "address": 63199,
+ "instruction_address": 15754,
+ "instruction": "MOV:G.B R0, @H'F6DF",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6DF",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63200,
+ "name": "ram_F6E0",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 7053,
+ "last_access": 7067,
+ "accesses": [
+ {
+ "address": 63200,
+ "instruction_address": 7053,
+ "instruction": "XOR.B @H'F6E0, R4",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6E0",
+ "operand_index": 0
+ },
+ {
+ "address": 63200,
+ "instruction_address": 7067,
+ "instruction": "MOV:G.B R4, @H'F6E0",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6E0",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63201,
+ "name": "ram_F6E1",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 7030,
+ "last_access": 7044,
+ "accesses": [
+ {
+ "address": 63201,
+ "instruction_address": 7030,
+ "instruction": "XOR.B @H'F6E1, R4",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6E1",
+ "operand_index": 0
+ },
+ {
+ "address": 63201,
+ "instruction_address": 7044,
+ "instruction": "MOV:G.B R4, @H'F6E1",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6E1",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63202,
+ "name": "ram_F6E2",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 7120,
+ "last_access": 7133,
+ "accesses": [
+ {
+ "address": 63202,
+ "instruction_address": 7120,
+ "instruction": "XOR.B @H'F6E2, R4",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6E2",
+ "operand_index": 0
+ },
+ {
+ "address": 63202,
+ "instruction_address": 7133,
+ "instruction": "MOV:G.B R4, @H'F6E2",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6E2",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63203,
+ "name": "ram_F6E3",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 7098,
+ "last_access": 7111,
+ "accesses": [
+ {
+ "address": 63203,
+ "instruction_address": 7098,
+ "instruction": "XOR.B @H'F6E3, R4",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6E3",
+ "operand_index": 0
+ },
+ {
+ "address": 63203,
+ "instruction_address": 7111,
+ "instruction": "MOV:G.B R4, @H'F6E3",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6E3",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63204,
+ "name": "ram_F6E4",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 7076,
+ "last_access": 7089,
+ "accesses": [
+ {
+ "address": 63204,
+ "instruction_address": 7076,
+ "instruction": "XOR.B @H'F6E4, R4",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6E4",
+ "operand_index": 0
+ },
+ {
+ "address": 63204,
+ "instruction_address": 7089,
+ "instruction": "MOV:G.B R4, @H'F6E4",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6E4",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63205,
+ "name": "ram_F6E5",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 7007,
+ "last_access": 7021,
+ "accesses": [
+ {
+ "address": 63205,
+ "instruction_address": 7007,
+ "instruction": "XOR.B @H'F6E5, R4",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6E5",
+ "operand_index": 0
+ },
+ {
+ "address": 63205,
+ "instruction_address": 7021,
+ "instruction": "MOV:G.B R4, @H'F6E5",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6E5",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63206,
+ "name": "ram_F6E6",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 6984,
+ "last_access": 6998,
+ "accesses": [
+ {
+ "address": 63206,
+ "instruction_address": 6984,
+ "instruction": "XOR.B @H'F6E6, R4",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6E6",
+ "operand_index": 0
+ },
+ {
+ "address": 63206,
+ "instruction_address": 6998,
+ "instruction": "MOV:G.B R4, @H'F6E6",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6E6",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63207,
+ "name": "ram_F6E7",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 6961,
+ "last_access": 6975,
+ "accesses": [
+ {
+ "address": 63207,
+ "instruction_address": 6961,
+ "instruction": "XOR.B @H'F6E7, R4",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6E7",
+ "operand_index": 0
+ },
+ {
+ "address": 63207,
+ "instruction_address": 6975,
+ "instruction": "MOV:G.B R4, @H'F6E7",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6E7",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63211,
+ "name": "ram_F6EB",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 7164,
+ "last_access": 7177,
+ "accesses": [
+ {
+ "address": 63211,
+ "instruction_address": 7164,
+ "instruction": "XOR.B @H'F6EB, R4",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6EB",
+ "operand_index": 0
+ },
+ {
+ "address": 63211,
+ "instruction_address": 7177,
+ "instruction": "MOV:G.B R4, @H'F6EB",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6EB",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63212,
+ "name": "ram_F6EC",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 7142,
+ "last_access": 7155,
+ "accesses": [
+ {
+ "address": 63212,
+ "instruction_address": 7142,
+ "instruction": "XOR.B @H'F6EC, R4",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6EC",
+ "operand_index": 0
+ },
+ {
+ "address": 63212,
+ "instruction_address": 7155,
+ "instruction": "MOV:G.B R4, @H'F6EC",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6EC",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63216,
+ "name": "ram_F6F0",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 21,
+ "read_count": 19,
+ "write_count": 18,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 5625,
+ "last_access": 15245,
+ "accesses": [
+ {
+ "address": 63216,
+ "instruction_address": 5625,
+ "instruction": "TST.B @H'F6F0",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 0
+ },
+ {
+ "address": 63216,
+ "instruction_address": 5631,
+ "instruction": "BCLR.B #7, @H'F6F0",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 5640,
+ "instruction": "BCLR.B #6, @H'F6F0",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 5649,
+ "instruction": "BCLR.B #5, @H'F6F0",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 5658,
+ "instruction": "BCLR.B #4, @H'F6F0",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 5662,
+ "instruction": "BCLR.B #3, @H'F6F0",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 5671,
+ "instruction": "BCLR.B #2, @H'F6F0",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 5680,
+ "instruction": "BCLR.B #1, @H'F6F0",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 5689,
+ "instruction": "BCLR.B #0, @H'F6F0",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 15072,
+ "instruction": "MOV:G.B @H'F6F0, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 0
+ },
+ {
+ "address": 63216,
+ "instruction_address": 15079,
+ "instruction": "MOV:G.B R0, @H'F6F0",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 15093,
+ "instruction": "BSET.B #5, @H'F6F0",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 15111,
+ "instruction": "BSET.B #4, @H'F6F0",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 15129,
+ "instruction": "BSET.B #3, @H'F6F0",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 15147,
+ "instruction": "BSET.B #2, @H'F6F0",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 15165,
+ "instruction": "BSET.B #1, @H'F6F0",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 15183,
+ "instruction": "BSET.B #0, @H'F6F0",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 15202,
+ "instruction": "MOV:G.B @H'F6F0, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 0
+ },
+ {
+ "address": 63216,
+ "instruction_address": 15209,
+ "instruction": "MOV:G.B R0, @H'F6F0",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 15227,
+ "instruction": "BSET.B #7, @H'F6F0",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ },
+ {
+ "address": 63216,
+ "instruction_address": 15245,
+ "instruction": "BSET.B #6, @H'F6F0",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F0",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63217,
+ "name": "ram_F6F1",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 21,
+ "read_count": 19,
+ "write_count": 18,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 5693,
+ "last_access": 15606,
+ "accesses": [
+ {
+ "address": 63217,
+ "instruction_address": 5693,
+ "instruction": "TST.B @H'F6F1",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 0
+ },
+ {
+ "address": 63217,
+ "instruction_address": 5699,
+ "instruction": "BCLR.B #7, @H'F6F1",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 5708,
+ "instruction": "BCLR.B #6, @H'F6F1",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 5717,
+ "instruction": "BCLR.B #5, @H'F6F1",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 5726,
+ "instruction": "BCLR.B #4, @H'F6F1",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 5735,
+ "instruction": "BCLR.B #3, @H'F6F1",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 5744,
+ "instruction": "BCLR.B #2, @H'F6F1",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 5753,
+ "instruction": "BCLR.B #1, @H'F6F1",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 5762,
+ "instruction": "BCLR.B #0, @H'F6F1",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 15433,
+ "instruction": "MOV:G.B @H'F6F1, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 0
+ },
+ {
+ "address": 63217,
+ "instruction_address": 15440,
+ "instruction": "MOV:G.B R0, @H'F6F1",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 15454,
+ "instruction": "BSET.B #5, @H'F6F1",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 15472,
+ "instruction": "BSET.B #4, @H'F6F1",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 15490,
+ "instruction": "BSET.B #3, @H'F6F1",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 15508,
+ "instruction": "BSET.B #2, @H'F6F1",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 15526,
+ "instruction": "BSET.B #1, @H'F6F1",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 15544,
+ "instruction": "BSET.B #0, @H'F6F1",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 15563,
+ "instruction": "MOV:G.B @H'F6F1, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 0
+ },
+ {
+ "address": 63217,
+ "instruction_address": 15570,
+ "instruction": "MOV:G.B R0, @H'F6F1",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 15588,
+ "instruction": "BSET.B #7, @H'F6F1",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ },
+ {
+ "address": 63217,
+ "instruction_address": 15606,
+ "instruction": "BSET.B #6, @H'F6F1",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F1",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63218,
+ "name": "ram_F6F2",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 18,
+ "read_count": 17,
+ "write_count": 17,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 5766,
+ "last_access": 15389,
+ "accesses": [
+ {
+ "address": 63218,
+ "instruction_address": 5766,
+ "instruction": "TST.B @H'F6F2",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 0
+ },
+ {
+ "address": 63218,
+ "instruction_address": 5772,
+ "instruction": "BCLR.B #7, @H'F6F2",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 5781,
+ "instruction": "BCLR.B #6, @H'F6F2",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 5790,
+ "instruction": "BCLR.B #5, @H'F6F2",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 5799,
+ "instruction": "BCLR.B #4, @H'F6F2",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 5808,
+ "instruction": "BCLR.B #3, @H'F6F2",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 5817,
+ "instruction": "BCLR.B #2, @H'F6F2",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 5826,
+ "instruction": "BCLR.B #1, @H'F6F2",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 5835,
+ "instruction": "BCLR.B #0, @H'F6F2",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 15213,
+ "instruction": "CLR.B @H'F6F2",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 0
+ },
+ {
+ "address": 63218,
+ "instruction_address": 15263,
+ "instruction": "BSET.B #0, @H'F6F2",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 15281,
+ "instruction": "BSET.B #1, @H'F6F2",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 15299,
+ "instruction": "BSET.B #2, @H'F6F2",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 15317,
+ "instruction": "BSET.B #3, @H'F6F2",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 15335,
+ "instruction": "BSET.B #4, @H'F6F2",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 15353,
+ "instruction": "BSET.B #5, @H'F6F2",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 15371,
+ "instruction": "BSET.B #6, @H'F6F2",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ },
+ {
+ "address": 63218,
+ "instruction_address": 15389,
+ "instruction": "BSET.B #7, @H'F6F2",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F2",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63219,
+ "name": "ram_F6F3",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 18,
+ "read_count": 17,
+ "write_count": 17,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 5844,
+ "last_access": 15750,
+ "accesses": [
+ {
+ "address": 63219,
+ "instruction_address": 5844,
+ "instruction": "TST.B @H'F6F3",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 0
+ },
+ {
+ "address": 63219,
+ "instruction_address": 5850,
+ "instruction": "BCLR.B #7, @H'F6F3",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 5854,
+ "instruction": "BCLR.B #6, @H'F6F3",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 5858,
+ "instruction": "BCLR.B #5, @H'F6F3",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 5862,
+ "instruction": "BCLR.B #4, @H'F6F3",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 5871,
+ "instruction": "BCLR.B #3, @H'F6F3",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 5880,
+ "instruction": "BCLR.B #2, @H'F6F3",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 5884,
+ "instruction": "BCLR.B #1, @H'F6F3",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 5888,
+ "instruction": "BCLR.B #0, @H'F6F3",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 15574,
+ "instruction": "CLR.B @H'F6F3",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 0
+ },
+ {
+ "address": 63219,
+ "instruction_address": 15624,
+ "instruction": "BSET.B #0, @H'F6F3",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 15642,
+ "instruction": "BSET.B #1, @H'F6F3",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 15660,
+ "instruction": "BSET.B #2, @H'F6F3",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 15678,
+ "instruction": "BSET.B #3, @H'F6F3",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 15696,
+ "instruction": "BSET.B #4, @H'F6F3",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 15714,
+ "instruction": "BSET.B #5, @H'F6F3",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 15732,
+ "instruction": "BSET.B #6, @H'F6F3",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ },
+ {
+ "address": 63219,
+ "instruction_address": 15750,
+ "instruction": "BSET.B #7, @H'F6F3",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F3",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63220,
+ "name": "ram_F6F4",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 4,
+ "read_count": 2,
+ "write_count": 3,
+ "unknown_count": 0,
+ "width_hints": [
+ "word"
+ ],
+ "width": "word",
+ "first_access": 9905,
+ "last_access": 48926,
+ "accesses": [
+ {
+ "address": 63220,
+ "instruction_address": 9905,
+ "instruction": "MOV:G.W #H'07D0, @H'F6F4",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'F6F4",
+ "operand_index": 1
+ },
+ {
+ "address": 63220,
+ "instruction_address": 9913,
+ "instruction": "MOV:G.W #H'00C8, @H'F6F4",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'F6F4",
+ "operand_index": 1
+ },
+ {
+ "address": 63220,
+ "instruction_address": 48914,
+ "instruction": "TST.W @H'F6F4",
+ "mnemonic": "TST.W",
+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F6F4",
+ "operand_index": 0
+ },
+ {
+ "address": 63220,
+ "instruction_address": 48926,
+ "instruction": "ADD:Q.W #-1, @H'F6F4",
+ "mnemonic": "ADD:Q.W",
+ "direction": "read_write",
+ "width": "word",
+ "operand": "@H'F6F4",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63222,
+ "name": "ram_F6F6",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 5,
+ "read_count": 5,
+ "write_count": 3,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 9808,
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+ "accesses": [
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+ "address": 63222,
+ "instruction_address": 9808,
+ "instruction": "BCLR.B #5, @H'F6F6",
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+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F6F6",
+ "operand_index": 1
+ },
+ {
+ "address": 63222,
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+ "instruction": "BTST.B #6, @H'F6F6",
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+ "operand": "@H'F6F6",
+ "operand_index": 1
+ },
+ {
+ "address": 63222,
+ "instruction_address": 9899,
+ "instruction": "BSET.B #0, @H'F6F6",
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+ "operand": "@H'F6F6",
+ "operand_index": 1
+ },
+ {
+ "address": 63222,
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+ "instruction": "BTST.B #7, @H'F6F6",
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+ "operand": "@H'F6F6",
+ "operand_index": 1
+ },
+ {
+ "address": 63222,
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+ "instruction": "BSET.B #5, @H'F6F6",
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+ "width": "byte",
+ "operand": "@H'F6F6",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63223,
+ "name": "ram_F6F7",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "write_count": 4,
+ "unknown_count": 0,
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+ "first_access": 16613,
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+ "address": 63223,
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+ "operand": "@H'F6F7",
+ "operand_index": 1
+ },
+ {
+ "address": 63223,
+ "instruction_address": 17455,
+ "instruction": "ADD:G.B @H'F6F7, R4",
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+ "width": "byte",
+ "operand": "@H'F6F7",
+ "operand_index": 0
+ },
+ {
+ "address": 63223,
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+ "instruction": "MOV:G.B R4, @H'F6F7",
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+ "width": "byte",
+ "operand": "@H'F6F7",
+ "operand_index": 1
+ },
+ {
+ "address": 63223,
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+ "mnemonic": "MOV:G.B",
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+ "operand": "@H'F6F7",
+ "operand_index": 1
+ },
+ {
+ "address": 63223,
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+ "mnemonic": "MOV:G.B",
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+ "width": "byte",
+ "operand": "@H'F6F7",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63224,
+ "name": "ram_F6F8",
+ "region": "on_chip_ram",
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+ },
+ {
+ "address": 63224,
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+ "operand": "@H'F6F8",
+ "operand_index": 0
+ },
+ {
+ "address": 63224,
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+ "instruction": "MOV:G.B R4, @H'F6F8",
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+ "operand": "@H'F6F8",
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+ },
+ {
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+ },
+ {
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+ "operand_index": 1
+ }
+ ],
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+ {
+ "source": "pointer_table",
+ "address": 6686,
+ "target": 63224
+ },
+ {
+ "source": "pointer_table",
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+ "target": 63224
+ }
+ ]
+ },
+ {
+ "address": 63225,
+ "name": "ram_F6F9",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "unknown_count": 0,
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+ "operand": "@H'F6F9",
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+ },
+ {
+ "address": 63225,
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+ "instruction": "ADD:G.B @H'F6F9, R4",
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+ "operand_index": 0
+ },
+ {
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+ "operand_index": 1
+ },
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+ "operand_index": 1
+ },
+ {
+ "address": 63225,
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+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F6F9",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63232,
+ "name": "ram_F700",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "width": "byte",
+ "operand": "@H'F700",
+ "operand_index": 0
+ },
+ {
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+ "width": "word",
+ "operand": "@H'F700",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63233,
+ "name": "ram_F701",
+ "region": "on_chip_ram",
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+ "operand": "@H'F701",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
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+ "name": "ram_F702",
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+ },
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+ "operand": "@H'F702",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63235,
+ "name": "ram_F703",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
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+ "operand": "@H'F703",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63236,
+ "name": "ram_F704",
+ "region": "on_chip_ram",
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+ "instruction": "MOV:G.B @H'F704, R0",
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+ "width": "byte",
+ "operand": "@H'F704",
+ "operand_index": 0
+ },
+ {
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+ "width": "word",
+ "operand": "@H'F704",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63237,
+ "name": "ram_F705",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 1,
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+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
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+ "width": "byte",
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+ "instruction": "MOV:G.B @H'F705, R0",
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+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F705",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63238,
+ "name": "ram_F706",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "operand": "@H'F706",
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+ },
+ {
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+ "instruction": "MOV:G.W #H'2424, @H'F706",
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+ "operand": "@H'F706",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63239,
+ "name": "ram_F707",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 1,
+ "read_count": 1,
+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
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+ "instruction": "MOV:G.B @H'F707, R0",
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+ "width": "byte",
+ "operand": "@H'F707",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63240,
+ "name": "ram_F708",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "unknown_count": 0,
+ "width_hints": [
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+ "width": "byte",
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+ "instruction": "MOV:G.B @H'F708, R0",
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+ "operand": "@H'F708",
+ "operand_index": 0
+ },
+ {
+ "address": 63240,
+ "instruction_address": 16955,
+ "instruction": "MOV:G.B #H'7F, @H'F708",
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+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F708",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63241,
+ "name": "ram_F709",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
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+ "instruction": "MOV:G.B @H'F709, R0",
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+ "operand": "@H'F709",
+ "operand_index": 0
+ },
+ {
+ "address": 63241,
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+ "instruction": "MOV:G.B #H'24, @H'F709",
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+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F709",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63242,
+ "name": "ram_F70A",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
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+ "word"
+ ],
+ "width": "mixed",
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+ "instruction": "MOV:G.B @H'F70A, R0",
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+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F70A",
+ "operand_index": 0
+ },
+ {
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+ "instruction": "MOV:G.W #H'2424, @H'F70A",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'F70A",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63243,
+ "name": "ram_F70B",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
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+ "instruction": "MOV:G.B @H'F70B, R0",
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+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F70B",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63248,
+ "name": "ram_F710",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14816,
+ "last_access": 16971,
+ "accesses": [
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+ "address": 63248,
+ "instruction_address": 14816,
+ "instruction": "AND.B @H'F710, R0",
+ "mnemonic": "AND.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F710",
+ "operand_index": 0
+ },
+ {
+ "address": 63248,
+ "instruction_address": 16971,
+ "instruction": "CLR.B @H'F710",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F710",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63249,
+ "name": "ram_F711",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 6,
+ "read_count": 5,
+ "write_count": 5,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14800,
+ "last_access": 49055,
+ "accesses": [
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+ "address": 63249,
+ "instruction_address": 14800,
+ "instruction": "AND.B @H'F711, R0",
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+ "width": "byte",
+ "operand": "@H'F711",
+ "operand_index": 0
+ },
+ {
+ "address": 63249,
+ "instruction_address": 16975,
+ "instruction": "CLR.B @H'F711",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F711",
+ "operand_index": 0
+ },
+ {
+ "address": 63249,
+ "instruction_address": 49043,
+ "instruction": "BCLR.B #7, @H'F711",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F711",
+ "operand_index": 1
+ },
+ {
+ "address": 63249,
+ "instruction_address": 49047,
+ "instruction": "BCLR.B #6, @H'F711",
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+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F711",
+ "operand_index": 1
+ },
+ {
+ "address": 63249,
+ "instruction_address": 49051,
+ "instruction": "BCLR.B #5, @H'F711",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F711",
+ "operand_index": 1
+ },
+ {
+ "address": 63249,
+ "instruction_address": 49055,
+ "instruction": "BCLR.B #4, @H'F711",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F711",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63250,
+ "name": "ram_F712",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
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+ ],
+ "width": "byte",
+ "first_access": 14784,
+ "last_access": 16979,
+ "accesses": [
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+ "address": 63250,
+ "instruction_address": 14784,
+ "instruction": "AND.B @H'F712, R0",
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+ "width": "byte",
+ "operand": "@H'F712",
+ "operand_index": 0
+ },
+ {
+ "address": 63250,
+ "instruction_address": 16979,
+ "instruction": "CLR.B @H'F712",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F712",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63251,
+ "name": "ram_F713",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 3,
+ "read_count": 2,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14768,
+ "last_access": 49037,
+ "accesses": [
+ {
+ "address": 63251,
+ "instruction_address": 14768,
+ "instruction": "AND.B @H'F713, R0",
+ "mnemonic": "AND.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F713",
+ "operand_index": 0
+ },
+ {
+ "address": 63251,
+ "instruction_address": 16983,
+ "instruction": "CLR.B @H'F713",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F713",
+ "operand_index": 0
+ },
+ {
+ "address": 63251,
+ "instruction_address": 49037,
+ "instruction": "BCLR.B #6, @H'F713",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F713",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63252,
+ "name": "ram_F714",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14969,
+ "last_access": 16987,
+ "accesses": [
+ {
+ "address": 63252,
+ "instruction_address": 14969,
+ "instruction": "AND.B @H'F714, R0",
+ "mnemonic": "AND.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F714",
+ "operand_index": 0
+ },
+ {
+ "address": 63252,
+ "instruction_address": 16987,
+ "instruction": "CLR.B @H'F714",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F714",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63253,
+ "name": "ram_F715",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14953,
+ "last_access": 16991,
+ "accesses": [
+ {
+ "address": 63253,
+ "instruction_address": 14953,
+ "instruction": "AND.B @H'F715, R0",
+ "mnemonic": "AND.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F715",
+ "operand_index": 0
+ },
+ {
+ "address": 63253,
+ "instruction_address": 16991,
+ "instruction": "CLR.B @H'F715",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F715",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63254,
+ "name": "ram_F716",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14937,
+ "last_access": 16995,
+ "accesses": [
+ {
+ "address": 63254,
+ "instruction_address": 14937,
+ "instruction": "AND.B @H'F716, R0",
+ "mnemonic": "AND.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F716",
+ "operand_index": 0
+ },
+ {
+ "address": 63254,
+ "instruction_address": 16995,
+ "instruction": "CLR.B @H'F716",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F716",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63255,
+ "name": "ram_F717",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 5,
+ "read_count": 4,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 6189,
+ "last_access": 16999,
+ "accesses": [
+ {
+ "address": 63255,
+ "instruction_address": 6189,
+ "instruction": "BTST.B #2, @H'F717",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F717",
+ "operand_index": 1
+ },
+ {
+ "address": 63255,
+ "instruction_address": 6289,
+ "instruction": "BTST.B #2, @H'F717",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F717",
+ "operand_index": 1
+ },
+ {
+ "address": 63255,
+ "instruction_address": 6375,
+ "instruction": "BTST.B #2, @H'F717",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F717",
+ "operand_index": 1
+ },
+ {
+ "address": 63255,
+ "instruction_address": 14921,
+ "instruction": "AND.B @H'F717, R0",
+ "mnemonic": "AND.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F717",
+ "operand_index": 0
+ },
+ {
+ "address": 63255,
+ "instruction_address": 16999,
+ "instruction": "CLR.B @H'F717",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F717",
+ "operand_index": 0
+ }
+ ],
+ "xref_count": 1,
+ "xrefs": [
+ {
+ "source": "pointer_table",
+ "address": 13788,
+ "target": 63255
+ }
+ ]
+ },
+ {
+ "address": 63256,
+ "name": "ram_F718",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14808,
+ "last_access": 17003,
+ "accesses": [
+ {
+ "address": 63256,
+ "instruction_address": 14808,
+ "instruction": "MOV:G.B @H'F718, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F718",
+ "operand_index": 0
+ },
+ {
+ "address": 63256,
+ "instruction_address": 17003,
+ "instruction": "MOV:G.B #H'FF, @H'F718",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F718",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63257,
+ "name": "ram_F719",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14792,
+ "last_access": 17008,
+ "accesses": [
+ {
+ "address": 63257,
+ "instruction_address": 14792,
+ "instruction": "MOV:G.B @H'F719, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F719",
+ "operand_index": 0
+ },
+ {
+ "address": 63257,
+ "instruction_address": 17008,
+ "instruction": "MOV:G.B #H'FF, @H'F719",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F719",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63258,
+ "name": "ram_F71A",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14776,
+ "last_access": 17013,
+ "accesses": [
+ {
+ "address": 63258,
+ "instruction_address": 14776,
+ "instruction": "MOV:G.B @H'F71A, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F71A",
+ "operand_index": 0
+ },
+ {
+ "address": 63258,
+ "instruction_address": 17013,
+ "instruction": "MOV:G.B #H'FF, @H'F71A",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F71A",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63259,
+ "name": "ram_F71B",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14760,
+ "last_access": 17018,
+ "accesses": [
+ {
+ "address": 63259,
+ "instruction_address": 14760,
+ "instruction": "MOV:G.B @H'F71B, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F71B",
+ "operand_index": 0
+ },
+ {
+ "address": 63259,
+ "instruction_address": 17018,
+ "instruction": "MOV:G.B #H'FF, @H'F71B",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F71B",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63260,
+ "name": "ram_F71C",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14961,
+ "last_access": 17023,
+ "accesses": [
+ {
+ "address": 63260,
+ "instruction_address": 14961,
+ "instruction": "MOV:G.B @H'F71C, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F71C",
+ "operand_index": 0
+ },
+ {
+ "address": 63260,
+ "instruction_address": 17023,
+ "instruction": "MOV:G.B #H'FF, @H'F71C",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F71C",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63261,
+ "name": "ram_F71D",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14945,
+ "last_access": 17028,
+ "accesses": [
+ {
+ "address": 63261,
+ "instruction_address": 14945,
+ "instruction": "MOV:G.B @H'F71D, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F71D",
+ "operand_index": 0
+ },
+ {
+ "address": 63261,
+ "instruction_address": 17028,
+ "instruction": "MOV:G.B #H'FF, @H'F71D",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F71D",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63262,
+ "name": "ram_F71E",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14929,
+ "last_access": 17033,
+ "accesses": [
+ {
+ "address": 63262,
+ "instruction_address": 14929,
+ "instruction": "MOV:G.B @H'F71E, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F71E",
+ "operand_index": 0
+ },
+ {
+ "address": 63262,
+ "instruction_address": 17033,
+ "instruction": "MOV:G.B #H'FF, @H'F71E",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F71E",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63263,
+ "name": "ram_F71F",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 1,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14913,
+ "last_access": 17038,
+ "accesses": [
+ {
+ "address": 63263,
+ "instruction_address": 14913,
+ "instruction": "MOV:G.B @H'F71F, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F71F",
+ "operand_index": 0
+ },
+ {
+ "address": 63263,
+ "instruction_address": 17038,
+ "instruction": "MOV:G.B #H'FF, @H'F71F",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F71F",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63264,
+ "name": "ram_F720",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 4,
+ "read_count": 3,
+ "write_count": 3,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14741,
+ "last_access": 15401,
+ "accesses": [
+ {
+ "address": 63264,
+ "instruction_address": 14741,
+ "instruction": "TST.B @H'F720",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F720",
+ "operand_index": 0
+ },
+ {
+ "address": 63264,
+ "instruction_address": 14888,
+ "instruction": "MOV:G.B #H'03, @H'F720",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F720",
+ "operand_index": 1
+ },
+ {
+ "address": 63264,
+ "instruction_address": 15195,
+ "instruction": "BCLR.B #0, @H'F720",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F720",
+ "operand_index": 1
+ },
+ {
+ "address": 63264,
+ "instruction_address": 15401,
+ "instruction": "BCLR.B #1, @H'F720",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F720",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63265,
+ "name": "ram_F721",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 4,
+ "read_count": 3,
+ "write_count": 3,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14894,
+ "last_access": 15762,
+ "accesses": [
+ {
+ "address": 63265,
+ "instruction_address": 14894,
+ "instruction": "TST.B @H'F721",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F721",
+ "operand_index": 0
+ },
+ {
+ "address": 63265,
+ "instruction_address": 15041,
+ "instruction": "MOV:G.B #H'03, @H'F721",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F721",
+ "operand_index": 1
+ },
+ {
+ "address": 63265,
+ "instruction_address": 15556,
+ "instruction": "BCLR.B #0, @H'F721",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F721",
+ "operand_index": 1
+ },
+ {
+ "address": 63265,
+ "instruction_address": 15762,
+ "instruction": "BCLR.B #1, @H'F721",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F721",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63266,
+ "name": "ram_F722",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 5,
+ "read_count": 4,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14690,
+ "last_access": 14725,
+ "accesses": [
+ {
+ "address": 63266,
+ "instruction_address": 14690,
+ "instruction": "ADD:Q.B #1, @H'F722",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F722",
+ "operand_index": 1
+ },
+ {
+ "address": 63266,
+ "instruction_address": 14694,
+ "instruction": "CMP:G.B #H'3C, @H'F722",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F722",
+ "operand_index": 1
+ },
+ {
+ "address": 63266,
+ "instruction_address": 14701,
+ "instruction": "CMP:G.B #H'78, @H'F722",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F722",
+ "operand_index": 1
+ },
+ {
+ "address": 63266,
+ "instruction_address": 14708,
+ "instruction": "CMP:G.B #H'B4, @H'F722",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F722",
+ "operand_index": 1
+ },
+ {
+ "address": 63266,
+ "instruction_address": 14725,
+ "instruction": "CLR.B @H'F722",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F722",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63267,
+ "name": "ram_F723",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 9,
+ "read_count": 9,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 14764,
+ "last_access": 48972,
+ "accesses": [
+ {
+ "address": 63267,
+ "instruction_address": 14764,
+ "instruction": "OR.B @H'F723, R0",
+ "mnemonic": "OR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F723",
+ "operand_index": 0
+ },
+ {
+ "address": 63267,
+ "instruction_address": 14780,
+ "instruction": "OR.B @H'F723, R0",
+ "mnemonic": "OR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F723",
+ "operand_index": 0
+ },
+ {
+ "address": 63267,
+ "instruction_address": 14796,
+ "instruction": "OR.B @H'F723, R0",
+ "mnemonic": "OR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F723",
+ "operand_index": 0
+ },
+ {
+ "address": 63267,
+ "instruction_address": 14812,
+ "instruction": "OR.B @H'F723, R0",
+ "mnemonic": "OR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F723",
+ "operand_index": 0
+ },
+ {
+ "address": 63267,
+ "instruction_address": 14917,
+ "instruction": "OR.B @H'F723, R0",
+ "mnemonic": "OR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F723",
+ "operand_index": 0
+ },
+ {
+ "address": 63267,
+ "instruction_address": 14933,
+ "instruction": "OR.B @H'F723, R0",
+ "mnemonic": "OR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F723",
+ "operand_index": 0
+ },
+ {
+ "address": 63267,
+ "instruction_address": 14949,
+ "instruction": "OR.B @H'F723, R0",
+ "mnemonic": "OR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F723",
+ "operand_index": 0
+ },
+ {
+ "address": 63267,
+ "instruction_address": 14965,
+ "instruction": "OR.B @H'F723, R0",
+ "mnemonic": "OR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F723",
+ "operand_index": 0
+ },
+ {
+ "address": 63267,
+ "instruction_address": 48972,
+ "instruction": "NOT.B @H'F723",
+ "mnemonic": "NOT.B",
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+ "width": "byte",
+ "operand": "@H'F723",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63268,
+ "name": "ram_F724",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 3,
+ "read_count": 2,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
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+ "width": "byte",
+ "first_access": 48955,
+ "last_access": 48967,
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+ "instruction_address": 48955,
+ "instruction": "TST.B @H'F724",
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+ "operand": "@H'F724",
+ "operand_index": 0
+ },
+ {
+ "address": 63268,
+ "instruction_address": 48961,
+ "instruction": "ADD:Q.B #-1, @H'F724",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F724",
+ "operand_index": 1
+ },
+ {
+ "address": 63268,
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+ "operand": "@H'F724",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63270,
+ "name": "ram_F726",
+ "region": "on_chip_ram",
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+ "first_access": 49025,
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+ "address": 63270,
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+ "instruction": "TST.B @H'F726",
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+ "width": "byte",
+ "operand": "@H'F726",
+ "operand_index": 0
+ },
+ {
+ "address": 63270,
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+ "operand": "@H'F726",
+ "operand_index": 1
+ }
+ ],
+ "xref_count": 2,
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+ {
+ "source": "pointer_table",
+ "address": 13216,
+ "target": 63270
+ },
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+ "source": "pointer_table",
+ "address": 18602,
+ "target": 63270
+ }
+ ]
+ },
+ {
+ "address": 63271,
+ "name": "ram_F727",
+ "region": "on_chip_ram",
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+ "source": "pointer_table",
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+ "address": 13432,
+ "target": 63271
+ }
+ ]
+ },
+ {
+ "address": 63280,
+ "name": "ram_F730",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "first_access": 5906,
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+ "instruction": "BTST.B #6, @H'F730",
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+ "operand": "@H'F730",
+ "operand_index": 1
+ },
+ {
+ "address": 63280,
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+ "instruction": "BTST.B #7, @H'F730",
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+ "operand": "@H'F730",
+ "operand_index": 1
+ },
+ {
+ "address": 63280,
+ "instruction_address": 16396,
+ "instruction": "CLR.B @H'F730",
+ "mnemonic": "CLR.B",
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+ "width": "byte",
+ "operand": "@H'F730",
+ "operand_index": 0
+ }
+ ],
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+ "source": "pointer_table",
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+ }
+ ]
+ },
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+ "address": 63281,
+ "name": "ram_F731",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "first_access": 5893,
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+ "operand": "@H'F731",
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+ },
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+ "operand": "@H'F731",
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+ "operand": "@H'F731",
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+ "operand": "@H'F731",
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+ "operand": "@H'F731",
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+ "operand": "@H'F731",
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+ },
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+ "instruction_address": 6521,
+ "instruction": "CMP:G.B #H'03, @H'F731",
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+ "width": "byte",
+ "operand": "@H'F731",
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+ },
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+ "width": "byte",
+ "operand": "@H'F731",
+ "operand_index": 1
+ },
+ {
+ "address": 63281,
+ "instruction_address": 16923,
+ "instruction": "BSET.B #7, @H'F731",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F731",
+ "operand_index": 1
+ },
+ {
+ "address": 63281,
+ "instruction_address": 17300,
+ "instruction": "CMP:G.B #H'01, @H'F731",
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+ "width": "byte",
+ "operand": "@H'F731",
+ "operand_index": 1
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+ "instruction_address": 17495,
+ "instruction": "CMP:G.B #H'01, @H'F731",
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+ "width": "byte",
+ "operand": "@H'F731",
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+ "address": 63281,
+ "instruction_address": 17690,
+ "instruction": "CMP:G.B #H'01, @H'F731",
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+ "operand": "@H'F731",
+ "operand_index": 1
+ },
+ {
+ "address": 63281,
+ "instruction_address": 48532,
+ "instruction": "BTST.B #7, @H'F731",
+ "mnemonic": "BTST.B",
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+ "width": "byte",
+ "operand": "@H'F731",
+ "operand_index": 1
+ },
+ {
+ "address": 63281,
+ "instruction_address": 48565,
+ "instruction": "BCLR.B #7, @H'F731",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F731",
+ "operand_index": 1
+ },
+ {
+ "address": 63281,
+ "instruction_address": 49071,
+ "instruction": "BCLR.B #7, @H'F731",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F731",
+ "operand_index": 1
+ },
+ {
+ "address": 63281,
+ "instruction_address": 49087,
+ "instruction": "BCLR.B #7, @H'F731",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F731",
+ "operand_index": 1
+ }
+ ],
+ "xref_count": 1,
+ "xrefs": [
+ {
+ "source": "pointer_table",
+ "address": 7856,
+ "target": 63281
+ }
+ ]
+ },
+ {
+ "address": 63282,
+ "name": "ram_F732",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 11,
+ "read_count": 6,
+ "write_count": 5,
+ "unknown_count": 0,
+ "width_hints": [
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+ "word"
+ ],
+ "width": "mixed",
+ "first_access": 5918,
+ "last_access": 18735,
+ "accesses": [
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+ "instruction": "MOV:G.W @H'F732, R1",
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+ "width": "word",
+ "operand": "@H'F732",
+ "operand_index": 0
+ },
+ {
+ "address": 63282,
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+ "instruction": "MOV:G.W #H'1C07, @H'F732",
+ "mnemonic": "MOV:G.W",
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+ "width": "word",
+ "operand": "@H'F732",
+ "operand_index": 1
+ },
+ {
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+ "instruction": "MOV:G.W @H'F732, R1",
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+ "operand": "@H'F732",
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+ },
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+ "instruction": "MOV:G.W #H'1C06, @H'F732",
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+ "operand": "@H'F732",
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+ "instruction": "MOV:G.W @H'F732, R1",
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+ "width": "word",
+ "operand": "@H'F732",
+ "operand_index": 0
+ },
+ {
+ "address": 63282,
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+ "instruction": "MOV:G.W #H'1C03, @H'F732",
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+ "direction": "write",
+ "width": "word",
+ "operand": "@H'F732",
+ "operand_index": 1
+ },
+ {
+ "address": 63282,
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+ "instruction": "CLR.W @H'F732",
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+ "width": "word",
+ "operand": "@H'F732",
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+ },
+ {
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+ "instruction": "MOV:G.W R0, @H'F732",
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+ "operand": "@H'F732",
+ "operand_index": 1
+ },
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+ "address": 63282,
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+ "instruction": "CMP:G.B #H'1A, @H'F732",
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+ "operand": "@H'F732",
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+ "operand": "@H'F732",
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+ "instruction": "MOV:G.B @H'F732, R0",
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+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F732",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63283,
+ "name": "ram_F733",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 4,
+ "read_count": 3,
+ "write_count": 3,
+ "unknown_count": 0,
+ "width_hints": [
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+ ],
+ "width": "byte",
+ "first_access": 6818,
+ "last_access": 6876,
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+ "instruction": "MOV:G.B @H'F733, R0",
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+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F733",
+ "operand_index": 0
+ },
+ {
+ "address": 63283,
+ "instruction_address": 6860,
+ "instruction": "MOV:G.B R0, @H'F733",
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+ "direction": "write",
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+ "operand": "@H'F733",
+ "operand_index": 1
+ },
+ {
+ "address": 63283,
+ "instruction_address": 6870,
+ "instruction": "ADD:Q.B #1, @H'F733",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F733",
+ "operand_index": 1
+ },
+ {
+ "address": 63283,
+ "instruction_address": 6876,
+ "instruction": "ADD:Q.B #-1, @H'F733",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F733",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63284,
+ "name": "ram_F734",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 4,
+ "read_count": 1,
+ "write_count": 3,
+ "unknown_count": 0,
+ "width_hints": [
+ "word"
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+ "width": "word",
+ "first_access": 5922,
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+ "instruction": "MOV:G.W R1, @H'F734",
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+ "operand": "@H'F734",
+ "operand_index": 1
+ },
+ {
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+ "instruction": "MOV:G.W R1, @H'F734",
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+ "operand": "@H'F734",
+ "operand_index": 1
+ },
+ {
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+ "instruction": "MOV:G.W R1, @H'F734",
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+ "operand": "@H'F734",
+ "operand_index": 1
+ },
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+ "width": "word",
+ "operand": "@H'F734",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63286,
+ "name": "ram_F736",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 2,
+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
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+ "operand": "@H'F736",
+ "operand_index": 0
+ },
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+ "instruction": "MOV:G.W @H'F736, R3",
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+ "width": "word",
+ "operand": "@H'F736",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63288,
+ "name": "ram_F738",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
+ "word"
+ ],
+ "width": "word",
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+ "instruction": "MOV:G.W @H'F738, R1",
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+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F738",
+ "operand_index": 0
+ },
+ {
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+ "instruction": "MOV:G.W @H'F738, R3",
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+ "width": "word",
+ "operand": "@H'F738",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63290,
+ "name": "ram_F73A",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 2,
+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
+ "word"
+ ],
+ "width": "word",
+ "first_access": 10321,
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+ "instruction": "MOV:G.W @H'F73A, R1",
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+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F73A",
+ "operand_index": 0
+ },
+ {
+ "address": 63290,
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+ "instruction": "MOV:G.W @H'F73A, R3",
+ "mnemonic": "MOV:G.W",
+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F73A",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63292,
+ "name": "ram_F73C",
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+ "word"
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+ "address": 63292,
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+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63294,
+ "name": "ram_F73E",
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+ "operand_index": 0
+ }
+ ]
+ },
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+ "address": 63296,
+ "name": "ram_F740",
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+ }
+ ]
+ },
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+ "address": 63298,
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+ }
+ ]
+ },
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+ },
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+ ]
+ },
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+ }
+ ]
+ },
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+ ]
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+ }
+ ]
+ },
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+ "operand": "@H'F769",
+ "operand_index": 1
+ },
+ {
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+ "instruction": "BSET.B #7, @H'F769",
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+ "operand": "@H'F769",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
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+ "operand_index": 0
+ }
+ ]
+ },
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+ "name": "ram_F76C",
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+ "operand": "@H'F76C",
+ "operand_index": 0
+ },
+ {
+ "address": 63340,
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+ "instruction": "ADD:Q.B #-1, @H'F76C",
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+ "width": "byte",
+ "operand": "@H'F76C",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63341,
+ "name": "ram_F76D",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "operand": "@H'F76D",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
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+ "region": "on_chip_ram",
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+ "operand": "@H'F76E",
+ "operand_index": 0
+ },
+ {
+ "address": 63342,
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+ "instruction": "BTST.B #6, @H'F76E",
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+ "operand_index": 0
+ }
+ ]
+ },
+ {
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+ "name": "ram_F770",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ },
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+ }
+ ]
+ },
+ {
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+ "name": "ram_F772",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ }
+ ]
+ },
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+ "name": "ram_F790",
+ "region": "on_chip_ram",
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+ }
+ ],
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+ }
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+ "address": 63377,
+ "instruction_address": 6405,
+ "instruction": "BTST.B #7, @H'F791",
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+ "width": "byte",
+ "operand": "@H'F791",
+ "operand_index": 1
+ },
+ {
+ "address": 63377,
+ "instruction_address": 6449,
+ "instruction": "BTST.B #7, @H'F791",
+ "mnemonic": "BTST.B",
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+ "width": "byte",
+ "operand": "@H'F791",
+ "operand_index": 1
+ },
+ {
+ "address": 63377,
+ "instruction_address": 6498,
+ "instruction": "BTST.B #5, @H'F791",
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+ "width": "byte",
+ "operand": "@H'F791",
+ "operand_index": 1
+ },
+ {
+ "address": 63377,
+ "instruction_address": 6543,
+ "instruction": "BTST.B #5, @H'F791",
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+ "width": "byte",
+ "operand": "@H'F791",
+ "operand_index": 1
+ },
+ {
+ "address": 63377,
+ "instruction_address": 9882,
+ "instruction": "BTST.B #7, @H'F791",
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+ "width": "byte",
+ "operand": "@H'F791",
+ "operand_index": 1
+ },
+ {
+ "address": 63377,
+ "instruction_address": 16436,
+ "instruction": "CLR.B @H'F791",
+ "mnemonic": "CLR.B",
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+ "width": "byte",
+ "operand": "@H'F791",
+ "operand_index": 0
+ },
+ {
+ "address": 63377,
+ "instruction_address": 47828,
+ "instruction": "BTST.B #7, @H'F791",
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+ "width": "byte",
+ "operand": "@H'F791",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63380,
+ "name": "ram_F794",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "read_count": 2,
+ "write_count": 2,
+ "unknown_count": 0,
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+ "byte"
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+ "first_access": 16311,
+ "last_access": 49106,
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+ "address": 63380,
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+ "instruction": "CLR.B @H'F794",
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+ "width": "byte",
+ "operand": "@H'F794",
+ "operand_index": 0
+ },
+ {
+ "address": 63380,
+ "instruction_address": 49102,
+ "instruction": "ADD:Q.B #1, @H'F794",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F794",
+ "operand_index": 1
+ },
+ {
+ "address": 63380,
+ "instruction_address": 49106,
+ "instruction": "CMP:G.B #H'0A, @H'F794",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F794",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63381,
+ "name": "ram_F795",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "operand": "@H'F795",
+ "operand_index": 0
+ },
+ {
+ "address": 63381,
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+ "instruction": "BTST.B #6, @H'F795",
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+ "width": "byte",
+ "operand": "@H'F795",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63383,
+ "name": "ram_F797",
+ "region": "on_chip_ram",
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+ "operand": "@H'F797",
+ "operand_index": 0
+ },
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+ "address": 63383,
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+ "instruction": "ADD:Q.B #-1, @H'F797",
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+ "width": "byte",
+ "operand": "@H'F797",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63384,
+ "name": "ram_F798",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "write_count": 2,
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+ "instruction": "CLR.B @H'F798",
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+ "operand": "@H'F798",
+ "operand_index": 0
+ },
+ {
+ "address": 63384,
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+ "instruction": "TST.B @H'F798",
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+ "operand": "@H'F798",
+ "operand_index": 0
+ },
+ {
+ "address": 63384,
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+ "instruction": "ADD:Q.B #-1, @H'F798",
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+ "width": "byte",
+ "operand": "@H'F798",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63552,
+ "name": "ram_F840",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 8,
+ "read_count": 6,
+ "write_count": 3,
+ "unknown_count": 0,
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+ "first_access": 49015,
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+ "instruction": "TST.B @H'F840",
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+ "operand": "@H'F840",
+ "operand_index": 0
+ },
+ {
+ "address": 63552,
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+ "instruction": "ADD:Q.B #-1, @H'F840",
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+ "width": "byte",
+ "operand": "@H'F840",
+ "operand_index": 1
+ },
+ {
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+ "instruction": "MOV:G.B #H'0A, @H'F840",
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+ "operand": "@H'F840",
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+ "address": 63552,
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+ "operand": "@H'F840",
+ "operand_index": 1
+ },
+ {
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+ "operand": "@H'F840",
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+ },
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+ "operand": "@H'F840",
+ "operand_index": 0
+ },
+ {
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+ "width": "byte",
+ "operand": "@H'F840",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63553,
+ "name": "ram_F841",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "unknown_count": 0,
+ "width_hints": [
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+ "first_access": 49145,
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+ "instruction": "BSET.B #7, @H'F841",
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+ "width": "byte",
+ "operand": "@H'F841",
+ "operand_index": 1
+ },
+ {
+ "address": 63553,
+ "instruction_address": 49163,
+ "instruction": "BSET.B #6, @H'F841",
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+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F841",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63568,
+ "name": "ram_F850",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 6,
+ "read_count": 1,
+ "write_count": 5,
+ "unknown_count": 0,
+ "width_hints": [
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+ "word"
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+ "operand": "@H'F850",
+ "operand_index": 0
+ },
+ {
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+ "instruction": "MOV:G.B R1, @H'F850",
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+ "operand": "@H'F850",
+ "operand_index": 1
+ },
+ {
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+ "instruction": "MOV:G.B #H'04, @H'F850",
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+ "operand": "@H'F850",
+ "operand_index": 1
+ },
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+ "instruction": "MOV:G.B #H'04, @H'F850",
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+ "width": "byte",
+ "operand": "@H'F850",
+ "operand_index": 1
+ },
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+ "instruction": "MOV:G.W R0, @H'F850",
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+ "operand": "@H'F850",
+ "operand_index": 1
+ },
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+ "instruction": "MOV:G.B #H'07, @H'F850",
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+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F850",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63569,
+ "name": "ram_F851",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 5,
+ "read_count": 0,
+ "write_count": 5,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 47915,
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+ "instruction": "MOV:G.B R5, @H'F851",
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+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F851",
+ "operand_index": 1
+ },
+ {
+ "address": 63569,
+ "instruction_address": 48313,
+ "instruction": "MOV:G.B R0, @H'F851",
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+ "width": "byte",
+ "operand": "@H'F851",
+ "operand_index": 1
+ },
+ {
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+ "instruction_address": 48352,
+ "instruction": "MOV:G.B R0, @H'F851",
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+ "operand": "@H'F851",
+ "operand_index": 1
+ },
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+ "instruction": "MOV:G.B R0, @H'F851",
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+ "operand": "@H'F851",
+ "operand_index": 1
+ },
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+ "instruction": "MOV:G.B R0, @H'F851",
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+ "width": "byte",
+ "operand": "@H'F851",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63570,
+ "name": "ram_F852",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 5,
+ "read_count": 1,
+ "write_count": 4,
+ "unknown_count": 0,
+ "width_hints": [
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+ "word"
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+ "width": "mixed",
+ "first_access": 47678,
+ "last_access": 48734,
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+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F852",
+ "operand_index": 0
+ },
+ {
+ "address": 63570,
+ "instruction_address": 47904,
+ "instruction": "MOV:G.B R5, @H'F852",
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+ "operand": "@H'F852",
+ "operand_index": 1
+ },
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+ "instruction_address": 48321,
+ "instruction": "MOV:G.W R0, @H'F852",
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+ "operand": "@H'F852",
+ "operand_index": 1
+ },
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+ "instruction": "MOV:G.W R0, @H'F852",
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+ "width": "word",
+ "operand": "@H'F852",
+ "operand_index": 1
+ },
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+ "instruction_address": 48734,
+ "instruction": "MOV:G.W R0, @H'F852",
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+ "direction": "write",
+ "width": "word",
+ "operand": "@H'F852",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63571,
+ "name": "ram_F853",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 0,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
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+ ],
+ "width": "byte",
+ "first_access": 47935,
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+ "instruction": "MOV:G.B R4, @H'F853",
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+ "width": "byte",
+ "operand": "@H'F853",
+ "operand_index": 1
+ },
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+ "instruction": "MOV:G.B R0, @H'F853",
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+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F853",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63572,
+ "name": "ram_F854",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 6,
+ "read_count": 1,
+ "write_count": 5,
+ "unknown_count": 0,
+ "width_hints": [
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+ "word"
+ ],
+ "width": "mixed",
+ "first_access": 47686,
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+ "instruction": "MOV:G.B @H'F854, R0",
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+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F854",
+ "operand_index": 0
+ },
+ {
+ "address": 63572,
+ "instruction_address": 47929,
+ "instruction": "MOV:G.B R4, @H'F854",
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+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F854",
+ "operand_index": 1
+ },
+ {
+ "address": 63572,
+ "instruction_address": 48329,
+ "instruction": "MOV:G.B R0, @H'F854",
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+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F854",
+ "operand_index": 1
+ },
+ {
+ "address": 63572,
+ "instruction_address": 48368,
+ "instruction": "MOV:G.B R0, @H'F854",
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+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F854",
+ "operand_index": 1
+ },
+ {
+ "address": 63572,
+ "instruction_address": 48665,
+ "instruction": "MOV:G.W R0, @H'F854",
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+ "direction": "write",
+ "width": "word",
+ "operand": "@H'F854",
+ "operand_index": 1
+ },
+ {
+ "address": 63572,
+ "instruction_address": 48742,
+ "instruction": "MOV:G.B R0, @H'F854",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F854",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63576,
+ "name": "ram_F858",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 4,
+ "read_count": 3,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte",
+ "word"
+ ],
+ "width": "mixed",
+ "first_access": 47674,
+ "last_access": 48645,
+ "accesses": [
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+ "address": 63576,
+ "instruction_address": 47674,
+ "instruction": "MOV:G.W R0, @H'F858",
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+ "direction": "write",
+ "width": "word",
+ "operand": "@H'F858",
+ "operand_index": 1
+ },
+ {
+ "address": 63576,
+ "instruction_address": 47696,
+ "instruction": "XOR.B @H'F858, R0",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F858",
+ "operand_index": 0
+ },
+ {
+ "address": 63576,
+ "instruction_address": 47726,
+ "instruction": "MOV:G.B @H'F858, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F858",
+ "operand_index": 0
+ },
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+ "address": 63576,
+ "instruction_address": 48645,
+ "instruction": "MOV:G.W @H'F858, R0",
+ "mnemonic": "MOV:G.W",
+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F858",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63577,
+ "name": "ram_F859",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 1,
+ "read_count": 1,
+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 47700,
+ "last_access": 47700,
+ "accesses": [
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+ "address": 63577,
+ "instruction_address": 47700,
+ "instruction": "XOR.B @H'F859, R0",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F859",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63578,
+ "name": "ram_F85A",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 3,
+ "read_count": 2,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte",
+ "word"
+ ],
+ "width": "mixed",
+ "first_access": 47682,
+ "last_access": 48653,
+ "accesses": [
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+ "instruction_address": 47682,
+ "instruction": "MOV:G.W R0, @H'F85A",
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+ "direction": "write",
+ "width": "word",
+ "operand": "@H'F85A",
+ "operand_index": 1
+ },
+ {
+ "address": 63578,
+ "instruction_address": 47704,
+ "instruction": "XOR.B @H'F85A, R0",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F85A",
+ "operand_index": 0
+ },
+ {
+ "address": 63578,
+ "instruction_address": 48653,
+ "instruction": "MOV:G.W @H'F85A, R0",
+ "mnemonic": "MOV:G.W",
+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F85A",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63579,
+ "name": "ram_F85B",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 1,
+ "read_count": 1,
+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 47708,
+ "last_access": 47708,
+ "accesses": [
+ {
+ "address": 63579,
+ "instruction_address": 47708,
+ "instruction": "XOR.B @H'F85B, R0",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F85B",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63580,
+ "name": "ram_F85C",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 3,
+ "read_count": 2,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte",
+ "word"
+ ],
+ "width": "mixed",
+ "first_access": 47690,
+ "last_access": 48661,
+ "accesses": [
+ {
+ "address": 63580,
+ "instruction_address": 47690,
+ "instruction": "MOV:G.B R0, @H'F85C",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F85C",
+ "operand_index": 1
+ },
+ {
+ "address": 63580,
+ "instruction_address": 47712,
+ "instruction": "XOR.B @H'F85C, R0",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F85C",
+ "operand_index": 0
+ },
+ {
+ "address": 63580,
+ "instruction_address": 48661,
+ "instruction": "MOV:G.W @H'F85C, R0",
+ "mnemonic": "MOV:G.W",
+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F85C",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63581,
+ "name": "ram_F85D",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 1,
+ "read_count": 0,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 47716,
+ "last_access": 47716,
+ "accesses": [
+ {
+ "address": 63581,
+ "instruction_address": 47716,
+ "instruction": "MOV:G.B R0, @H'F85D",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F85D",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63584,
+ "name": "ram_F860",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 3,
+ "read_count": 2,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte",
+ "word"
+ ],
+ "width": "mixed",
+ "first_access": 48055,
+ "last_access": 48136,
+ "accesses": [
+ {
+ "address": 63584,
+ "instruction_address": 48055,
+ "instruction": "MOV:G.W R0, @H'F860",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'F860",
+ "operand_index": 1
+ },
+ {
+ "address": 63584,
+ "instruction_address": 48088,
+ "instruction": "XOR.B @H'F860, R0",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F860",
+ "operand_index": 0
+ },
+ {
+ "address": 63584,
+ "instruction_address": 48136,
+ "instruction": "MOV:G.B @H'F860, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F860",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63585,
+ "name": "ram_F861",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 7,
+ "read_count": 7,
+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 48092,
+ "last_access": 48722,
+ "accesses": [
+ {
+ "address": 63585,
+ "instruction_address": 48092,
+ "instruction": "XOR.B @H'F861, R0",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F861",
+ "operand_index": 0
+ },
+ {
+ "address": 63585,
+ "instruction_address": 48119,
+ "instruction": "MOV:G.B @H'F861, R5",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F861",
+ "operand_index": 0
+ },
+ {
+ "address": 63585,
+ "instruction_address": 48153,
+ "instruction": "BTST.B #7, @H'F861",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F861",
+ "operand_index": 1
+ },
+ {
+ "address": 63585,
+ "instruction_address": 48190,
+ "instruction": "BTST.B #7, @H'F861",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F861",
+ "operand_index": 1
+ },
+ {
+ "address": 63585,
+ "instruction_address": 48309,
+ "instruction": "MOV:G.B @H'F861, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F861",
+ "operand_index": 0
+ },
+ {
+ "address": 63585,
+ "instruction_address": 48348,
+ "instruction": "MOV:G.B @H'F861, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F861",
+ "operand_index": 0
+ },
+ {
+ "address": 63585,
+ "instruction_address": 48722,
+ "instruction": "MOV:G.B @H'F861, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F861",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63586,
+ "name": "ram_F862",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 6,
+ "read_count": 5,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte",
+ "word"
+ ],
+ "width": "mixed",
+ "first_access": 48063,
+ "last_access": 48730,
+ "accesses": [
+ {
+ "address": 63586,
+ "instruction_address": 48063,
+ "instruction": "MOV:G.W R0, @H'F862",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'F862",
+ "operand_index": 1
+ },
+ {
+ "address": 63586,
+ "instruction_address": 48096,
+ "instruction": "XOR.B @H'F862, R0",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F862",
+ "operand_index": 0
+ },
+ {
+ "address": 63586,
+ "instruction_address": 48125,
+ "instruction": "MOV:G.B @H'F862, R5",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F862",
+ "operand_index": 0
+ },
+ {
+ "address": 63586,
+ "instruction_address": 48317,
+ "instruction": "MOV:G.W @H'F862, R0",
+ "mnemonic": "MOV:G.W",
+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F862",
+ "operand_index": 0
+ },
+ {
+ "address": 63586,
+ "instruction_address": 48356,
+ "instruction": "MOV:G.B @H'F862, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F862",
+ "operand_index": 0
+ },
+ {
+ "address": 63586,
+ "instruction_address": 48730,
+ "instruction": "MOV:G.W @H'F862, R0",
+ "mnemonic": "MOV:G.W",
+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F862",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63587,
+ "name": "ram_F863",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 6,
+ "read_count": 6,
+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 48100,
+ "last_access": 48603,
+ "accesses": [
+ {
+ "address": 63587,
+ "instruction_address": 48100,
+ "instruction": "XOR.B @H'F863, R0",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F863",
+ "operand_index": 0
+ },
+ {
+ "address": 63587,
+ "instruction_address": 48237,
+ "instruction": "MOV:G.B @H'F863, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F863",
+ "operand_index": 0
+ },
+ {
+ "address": 63587,
+ "instruction_address": 48267,
+ "instruction": "MOV:G.B @H'F863, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F863",
+ "operand_index": 0
+ },
+ {
+ "address": 63587,
+ "instruction_address": 48402,
+ "instruction": "MOV:G.B @H'F863, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F863",
+ "operand_index": 0
+ },
+ {
+ "address": 63587,
+ "instruction_address": 48427,
+ "instruction": "MOV:G.B @H'F863, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F863",
+ "operand_index": 0
+ },
+ {
+ "address": 63587,
+ "instruction_address": 48603,
+ "instruction": "MOV:G.B @H'F863, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F863",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63588,
+ "name": "ram_F864",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 8,
+ "read_count": 6,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte",
+ "word"
+ ],
+ "width": "mixed",
+ "first_access": 48071,
+ "last_access": 48738,
+ "accesses": [
+ {
+ "address": 63588,
+ "instruction_address": 48071,
+ "instruction": "MOV:G.W R0, @H'F864",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'F864",
+ "operand_index": 1
+ },
+ {
+ "address": 63588,
+ "instruction_address": 48104,
+ "instruction": "XOR.B @H'F864, R0",
+ "mnemonic": "XOR.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F864",
+ "operand_index": 0
+ },
+ {
+ "address": 63588,
+ "instruction_address": 48253,
+ "instruction": "MOV:G.B #H'80, @H'F864",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F864",
+ "operand_index": 1
+ },
+ {
+ "address": 63588,
+ "instruction_address": 48273,
+ "instruction": "MOV:G.B @H'F864, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F864",
+ "operand_index": 0
+ },
+ {
+ "address": 63588,
+ "instruction_address": 48325,
+ "instruction": "MOV:G.B @H'F864, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F864",
+ "operand_index": 0
+ },
+ {
+ "address": 63588,
+ "instruction_address": 48433,
+ "instruction": "MOV:G.B @H'F864, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F864",
+ "operand_index": 0
+ },
+ {
+ "address": 63588,
+ "instruction_address": 48609,
+ "instruction": "MOV:G.B @H'F864, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F864",
+ "operand_index": 0
+ },
+ {
+ "address": 63588,
+ "instruction_address": 48738,
+ "instruction": "MOV:G.B @H'F864, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F864",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63589,
+ "name": "ram_F865",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 1,
+ "read_count": 1,
+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 48108,
+ "last_access": 48108,
+ "accesses": [
+ {
+ "address": 63589,
+ "instruction_address": 48108,
+ "instruction": "CMP:G.B @H'F865, R0",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F865",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63592,
+ "name": "ram_F868",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 1,
+ "read_count": 1,
+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
+ "word"
+ ],
+ "width": "word",
+ "first_access": 48051,
+ "last_access": 48051,
+ "accesses": [
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+ "address": 63592,
+ "instruction_address": 48051,
+ "instruction": "MOV:G.W @H'F868, R0",
+ "mnemonic": "MOV:G.W",
+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F868",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63594,
+ "name": "ram_F86A",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 1,
+ "read_count": 1,
+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
+ "word"
+ ],
+ "width": "word",
+ "first_access": 48059,
+ "last_access": 48059,
+ "accesses": [
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+ "address": 63594,
+ "instruction_address": 48059,
+ "instruction": "MOV:G.W @H'F86A, R0",
+ "mnemonic": "MOV:G.W",
+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F86A",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63596,
+ "name": "ram_F86C",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 1,
+ "read_count": 1,
+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [
+ "word"
+ ],
+ "width": "word",
+ "first_access": 48067,
+ "last_access": 48067,
+ "accesses": [
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+ "address": 63596,
+ "instruction_address": 48067,
+ "instruction": "MOV:G.W @H'F86C, R0",
+ "mnemonic": "MOV:G.W",
+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F86C",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63920,
+ "name": "ram_F9B0",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 9,
+ "read_count": 8,
+ "write_count": 5,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 15968,
+ "last_access": 47864,
+ "accesses": [
+ {
+ "address": 63920,
+ "instruction_address": 15968,
+ "instruction": "MOV:G.B @H'F9B0, R1",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9B0",
+ "operand_index": 0
+ },
+ {
+ "address": 63920,
+ "instruction_address": 15994,
+ "instruction": "ADD:Q.B #1, @H'F9B0",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9B0",
+ "operand_index": 1
+ },
+ {
+ "address": 63920,
+ "instruction_address": 15998,
+ "instruction": "BCLR.B #7, @H'F9B0",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9B0",
+ "operand_index": 1
+ },
+ {
+ "address": 63920,
+ "instruction_address": 16002,
+ "instruction": "MOV:G.B @H'F9B0, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9B0",
+ "operand_index": 0
+ },
+ {
+ "address": 63920,
+ "instruction_address": 16377,
+ "instruction": "CLR.B @H'F9B0",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9B0",
+ "operand_index": 0
+ },
+ {
+ "address": 63920,
+ "instruction_address": 16473,
+ "instruction": "MOV:G.B @H'F9B0, R2",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9B0",
+ "operand_index": 0
+ },
+ {
+ "address": 63920,
+ "instruction_address": 16492,
+ "instruction": "ADD:Q.B #1, @H'F9B0",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9B0",
+ "operand_index": 1
+ },
+ {
+ "address": 63920,
+ "instruction_address": 16496,
+ "instruction": "BCLR.B #7, @H'F9B0",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9B0",
+ "operand_index": 1
+ },
+ {
+ "address": 63920,
+ "instruction_address": 47864,
+ "instruction": "CMP:G.B @H'F9B0, R1",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9B0",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63924,
+ "name": "ram_F9B4",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 7,
+ "read_count": 7,
+ "write_count": 4,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 10252,
+ "last_access": 48793,
+ "accesses": [
+ {
+ "address": 63924,
+ "instruction_address": 10252,
+ "instruction": "CMP:G.B @H'F9B4, R1",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9B4",
+ "operand_index": 0
+ },
+ {
+ "address": 63924,
+ "instruction_address": 16038,
+ "instruction": "MOV:G.B @H'F9B4, R1",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9B4",
+ "operand_index": 0
+ },
+ {
+ "address": 63924,
+ "instruction_address": 16067,
+ "instruction": "ADD:Q.B #1, @H'F9B4",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9B4",
+ "operand_index": 1
+ },
+ {
+ "address": 63924,
+ "instruction_address": 16071,
+ "instruction": "BCLR.B #5, @H'F9B4",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9B4",
+ "operand_index": 1
+ },
+ {
+ "address": 63924,
+ "instruction_address": 48760,
+ "instruction": "MOV:G.B @H'F9B4, R1",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9B4",
+ "operand_index": 0
+ },
+ {
+ "address": 63924,
+ "instruction_address": 48789,
+ "instruction": "ADD:Q.B #1, @H'F9B4",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9B4",
+ "operand_index": 1
+ },
+ {
+ "address": 63924,
+ "instruction_address": 48793,
+ "instruction": "BCLR.B #5, @H'F9B4",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9B4",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63925,
+ "name": "ram_F9B5",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 11,
+ "read_count": 10,
+ "write_count": 7,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 15960,
+ "last_access": 48631,
+ "accesses": [
+ {
+ "address": 63925,
+ "instruction_address": 15960,
+ "instruction": "MOV:G.B @H'F9B5, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9B5",
+ "operand_index": 0
+ },
+ {
+ "address": 63925,
+ "instruction_address": 16011,
+ "instruction": "CMP:G.B @H'F9B5, R0",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9B5",
+ "operand_index": 0
+ },
+ {
+ "address": 63925,
+ "instruction_address": 16373,
+ "instruction": "CLR.B @H'F9B5",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9B5",
+ "operand_index": 0
+ },
+ {
+ "address": 63925,
+ "instruction_address": 16479,
+ "instruction": "CMP:G.B @H'F9B5, R2",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9B5",
+ "operand_index": 0
+ },
+ {
+ "address": 63925,
+ "instruction_address": 47858,
+ "instruction": "MOV:G.B @H'F9B5, R1",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9B5",
+ "operand_index": 0
+ },
+ {
+ "address": 63925,
+ "instruction_address": 48493,
+ "instruction": "ADD:Q.B #1, @H'F9B5",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9B5",
+ "operand_index": 1
+ },
+ {
+ "address": 63925,
+ "instruction_address": 48497,
+ "instruction": "BCLR.B #7, @H'F9B5",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9B5",
+ "operand_index": 1
+ },
+ {
+ "address": 63925,
+ "instruction_address": 48584,
+ "instruction": "ADD:Q.B #1, @H'F9B5",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9B5",
+ "operand_index": 1
+ },
+ {
+ "address": 63925,
+ "instruction_address": 48588,
+ "instruction": "BCLR.B #7, @H'F9B5",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9B5",
+ "operand_index": 1
+ },
+ {
+ "address": 63925,
+ "instruction_address": 48627,
+ "instruction": "ADD:Q.B #1, @H'F9B5",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9B5",
+ "operand_index": 1
+ },
+ {
+ "address": 63925,
+ "instruction_address": 48631,
+ "instruction": "BCLR.B #7, @H'F9B5",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9B5",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63929,
+ "name": "ram_F9B9",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 4,
+ "read_count": 3,
+ "write_count": 1,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 10246,
+ "last_access": 48752,
+ "accesses": [
+ {
+ "address": 63929,
+ "instruction_address": 10246,
+ "instruction": "MOV:G.B @H'F9B9, R1",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9B9",
+ "operand_index": 0
+ },
+ {
+ "address": 63929,
+ "instruction_address": 10274,
+ "instruction": "MOV:G.B R1, @H'F9B9",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9B9",
+ "operand_index": 1
+ },
+ {
+ "address": 63929,
+ "instruction_address": 16030,
+ "instruction": "MOV:G.B @H'F9B9, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9B9",
+ "operand_index": 0
+ },
+ {
+ "address": 63929,
+ "instruction_address": 48752,
+ "instruction": "MOV:G.B @H'F9B9, R3",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9B9",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63936,
+ "name": "ram_F9C0",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 11,
+ "read_count": 4,
+ "write_count": 8,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 16357,
+ "last_access": 48884,
+ "accesses": [
+ {
+ "address": 63936,
+ "instruction_address": 16357,
+ "instruction": "TST.B @H'F9C0",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C0",
+ "operand_index": 0
+ },
+ {
+ "address": 63936,
+ "instruction_address": 47654,
+ "instruction": "TST.B @H'F9C0",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C0",
+ "operand_index": 0
+ },
+ {
+ "address": 63936,
+ "instruction_address": 47660,
+ "instruction": "MOV:G.B #H'64, @H'F9C0",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C0",
+ "operand_index": 1
+ },
+ {
+ "address": 63936,
+ "instruction_address": 47778,
+ "instruction": "MOV:G.B #H'1F, @H'F9C0",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C0",
+ "operand_index": 1
+ },
+ {
+ "address": 63936,
+ "instruction_address": 47834,
+ "instruction": "MOV:G.B #H'09, @H'F9C0",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C0",
+ "operand_index": 1
+ },
+ {
+ "address": 63936,
+ "instruction_address": 47841,
+ "instruction": "MOV:G.B #H'09, @H'F9C0",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C0",
+ "operand_index": 1
+ },
+ {
+ "address": 63936,
+ "instruction_address": 47848,
+ "instruction": "MOV:G.B #H'F0, @H'F9C0",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C0",
+ "operand_index": 1
+ },
+ {
+ "address": 63936,
+ "instruction_address": 48669,
+ "instruction": "MOV:G.B #H'1F, @H'F9C0",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C0",
+ "operand_index": 1
+ },
+ {
+ "address": 63936,
+ "instruction_address": 48702,
+ "instruction": "MOV:G.B #H'1F, @H'F9C0",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C0",
+ "operand_index": 1
+ },
+ {
+ "address": 63936,
+ "instruction_address": 48878,
+ "instruction": "TST.B @H'F9C0",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C0",
+ "operand_index": 0
+ },
+ {
+ "address": 63936,
+ "instruction_address": 48884,
+ "instruction": "ADD:Q.B #-1, @H'F9C0",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9C0",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63937,
+ "name": "ram_F9C1",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 5,
+ "read_count": 3,
+ "write_count": 3,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 47853,
+ "last_access": 48894,
+ "accesses": [
+ {
+ "address": 63937,
+ "instruction_address": 47853,
+ "instruction": "CLR.B @H'F9C1",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C1",
+ "operand_index": 0
+ },
+ {
+ "address": 63937,
+ "instruction_address": 47985,
+ "instruction": "TST.B @H'F9C1",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C1",
+ "operand_index": 0
+ },
+ {
+ "address": 63937,
+ "instruction_address": 48035,
+ "instruction": "MOV:G.B #H'05, @H'F9C1",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C1",
+ "operand_index": 1
+ },
+ {
+ "address": 63937,
+ "instruction_address": 48888,
+ "instruction": "TST.B @H'F9C1",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C1",
+ "operand_index": 0
+ },
+ {
+ "address": 63937,
+ "instruction_address": 48894,
+ "instruction": "ADD:Q.B #-1, @H'F9C1",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9C1",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63938,
+ "name": "ram_F9C2",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 4,
+ "read_count": 3,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 47734,
+ "last_access": 47811,
+ "accesses": [
+ {
+ "address": 63938,
+ "instruction_address": 47734,
+ "instruction": "MOV:G.B #H'01, @H'F9C2",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C2",
+ "operand_index": 1
+ },
+ {
+ "address": 63938,
+ "instruction_address": 47787,
+ "instruction": "MOV:G.B @H'F9C2, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C2",
+ "operand_index": 0
+ },
+ {
+ "address": 63938,
+ "instruction_address": 47807,
+ "instruction": "ADD:Q.B #1, @H'F9C2",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9C2",
+ "operand_index": 1
+ },
+ {
+ "address": 63938,
+ "instruction_address": 47811,
+ "instruction": "CMP:G.B #H'06, @H'F9C2",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C2",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63939,
+ "name": "ram_F9C3",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 10,
+ "read_count": 6,
+ "write_count": 4,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 16351,
+ "last_access": 48849,
+ "accesses": [
+ {
+ "address": 63939,
+ "instruction_address": 16351,
+ "instruction": "TST.B @H'F9C3",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C3",
+ "operand_index": 0
+ },
+ {
+ "address": 63939,
+ "instruction_address": 16466,
+ "instruction": "TST.B @H'F9C3",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C3",
+ "operand_index": 0
+ },
+ {
+ "address": 63939,
+ "instruction_address": 47760,
+ "instruction": "TST.B @H'F9C3",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C3",
+ "operand_index": 0
+ },
+ {
+ "address": 63939,
+ "instruction_address": 47991,
+ "instruction": "CLR.B @H'F9C3",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C3",
+ "operand_index": 0
+ },
+ {
+ "address": 63939,
+ "instruction_address": 47997,
+ "instruction": "CMP:G.B #H'05, @H'F9C3",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C3",
+ "operand_index": 1
+ },
+ {
+ "address": 63939,
+ "instruction_address": 48010,
+ "instruction": "MOV:G.B @H'F9C3, R1",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C3",
+ "operand_index": 0
+ },
+ {
+ "address": 63939,
+ "instruction_address": 48022,
+ "instruction": "MOV:G.B R1, @H'F9C3",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C3",
+ "operand_index": 1
+ },
+ {
+ "address": 63939,
+ "instruction_address": 48043,
+ "instruction": "CMP:G.B #H'06, @H'F9C3",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C3",
+ "operand_index": 1
+ },
+ {
+ "address": 63939,
+ "instruction_address": 48075,
+ "instruction": "CLR.B @H'F9C3",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C3",
+ "operand_index": 0
+ },
+ {
+ "address": 63939,
+ "instruction_address": 48849,
+ "instruction": "CLR.B @H'F9C3",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C3",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 63940,
+ "name": "ram_F9C4",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 5,
+ "read_count": 3,
+ "write_count": 3,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 16454,
+ "last_access": 48941,
+ "accesses": [
+ {
+ "address": 63940,
+ "instruction_address": 16454,
+ "instruction": "TST.B @H'F9C4",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C4",
+ "operand_index": 0
+ },
+ {
+ "address": 63940,
+ "instruction_address": 16608,
+ "instruction": "MOV:G.B #H'14, @H'F9C4",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C4",
+ "operand_index": 1
+ },
+ {
+ "address": 63940,
+ "instruction_address": 47665,
+ "instruction": "MOV:G.B #H'07, @H'F9C4",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C4",
+ "operand_index": 1
+ },
+ {
+ "address": 63940,
+ "instruction_address": 48935,
+ "instruction": "TST.B @H'F9C4",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C4",
+ "operand_index": 0
+ },
+ {
+ "address": 63940,
+ "instruction_address": 48941,
+ "instruction": "ADD:Q.B #-1, @H'F9C4",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9C4",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63941,
+ "name": "ram_F9C5",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 5,
+ "read_count": 3,
+ "write_count": 3,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 16367,
+ "last_access": 48951,
+ "accesses": [
+ {
+ "address": 63941,
+ "instruction_address": 16367,
+ "instruction": "TST.B @H'F9C5",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C5",
+ "operand_index": 0
+ },
+ {
+ "address": 63941,
+ "instruction_address": 48030,
+ "instruction": "MOV:G.B #H'14, @H'F9C5",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C5",
+ "operand_index": 1
+ },
+ {
+ "address": 63941,
+ "instruction_address": 48868,
+ "instruction": "CLR.B @H'F9C5",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C5",
+ "operand_index": 0
+ },
+ {
+ "address": 63941,
+ "instruction_address": 48945,
+ "instruction": "TST.B @H'F9C5",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C5",
+ "operand_index": 0
+ },
+ {
+ "address": 63941,
+ "instruction_address": 48951,
+ "instruction": "ADD:Q.B #-1, @H'F9C5",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9C5",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63942,
+ "name": "ram_F9C6",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 5,
+ "read_count": 3,
+ "write_count": 3,
+ "unknown_count": 0,
+ "width_hints": [
+ "word"
+ ],
+ "width": "word",
+ "first_access": 47942,
+ "last_access": 48904,
+ "accesses": [
+ {
+ "address": 63942,
+ "instruction_address": 47942,
+ "instruction": "MOV:G.W #H'01F4, @H'F9C6",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'F9C6",
+ "operand_index": 1
+ },
+ {
+ "address": 63942,
+ "instruction_address": 48821,
+ "instruction": "TST.W @H'F9C6",
+ "mnemonic": "TST.W",
+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F9C6",
+ "operand_index": 0
+ },
+ {
+ "address": 63942,
+ "instruction_address": 48837,
+ "instruction": "MOV:G.W #H'01F4, @H'F9C6",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'F9C6",
+ "operand_index": 1
+ },
+ {
+ "address": 63942,
+ "instruction_address": 48898,
+ "instruction": "TST.W @H'F9C6",
+ "mnemonic": "TST.W",
+ "direction": "read",
+ "width": "word",
+ "operand": "@H'F9C6",
+ "operand_index": 0
+ },
+ {
+ "address": 63942,
+ "instruction_address": 48904,
+ "instruction": "ADD:Q.W #-1, @H'F9C6",
+ "mnemonic": "ADD:Q.W",
+ "direction": "read_write",
+ "width": "word",
+ "operand": "@H'F9C6",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63944,
+ "name": "ram_F9C8",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 3,
+ "read_count": 2,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 47948,
+ "last_access": 48833,
+ "accesses": [
+ {
+ "address": 63944,
+ "instruction_address": 47948,
+ "instruction": "MOV:G.B #H'14, @H'F9C8",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'F9C8",
+ "operand_index": 1
+ },
+ {
+ "address": 63944,
+ "instruction_address": 48827,
+ "instruction": "TST.B @H'F9C8",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'F9C8",
+ "operand_index": 0
+ },
+ {
+ "address": 63944,
+ "instruction_address": 48833,
+ "instruction": "ADD:Q.B #-1, @H'F9C8",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'F9C8",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 63995,
+ "name": "ram_F9FB",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 0,
+ "read_count": 0,
+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [],
+ "width": null,
+ "first_access": null,
+ "last_access": null,
+ "accesses": [],
+ "xref_count": 1,
+ "xrefs": [
+ {
+ "source": "pointer_table",
+ "address": 53384,
+ "target": 63995
+ }
+ ]
+ },
+ {
+ "address": 64132,
+ "name": "ram_FA84",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 0,
+ "read_count": 0,
+ "write_count": 0,
+ "unknown_count": 0,
+ "width_hints": [],
+ "width": null,
+ "first_access": null,
+ "last_access": null,
+ "accesses": [],
+ "xref_count": 1,
+ "xrefs": [
+ {
+ "source": "pointer_table",
+ "address": 25326,
+ "target": 64132
+ }
+ ]
+ },
+ {
+ "address": 64162,
+ "name": "ram_FAA2",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 19,
+ "read_count": 13,
+ "write_count": 13,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 16339,
+ "last_access": 48815,
+ "accesses": [
+ {
+ "address": 64162,
+ "instruction_address": 16339,
+ "instruction": "TST.B @H'FAA2",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 0
+ },
+ {
+ "address": 64162,
+ "instruction_address": 47748,
+ "instruction": "BTST.B #3, @H'FAA2",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 1
+ },
+ {
+ "address": 64162,
+ "instruction_address": 47766,
+ "instruction": "BCLR.B #3, @H'FAA2",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 1
+ },
+ {
+ "address": 64162,
+ "instruction_address": 47872,
+ "instruction": "BSET.B #3, @H'FAA2",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 1
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48143,
+ "instruction": "TST.B @H'FAA2",
+ "mnemonic": "TST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 0
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48149,
+ "instruction": "BSET.B #7, @H'FAA2",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 1
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48179,
+ "instruction": "CLR.B @H'FAA2",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 0
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48220,
+ "instruction": "BCLR.B #3, @H'FAA2",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 1
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48336,
+ "instruction": "BCLR.B #7, @H'FAA2",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 1
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48381,
+ "instruction": "BCLR.B #7, @H'FAA2",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 1
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48388,
+ "instruction": "BCLR.B #7, @H'FAA2",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 1
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48487,
+ "instruction": "BTST.B #3, @H'FAA2",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 1
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48505,
+ "instruction": "CLR.B @H'FAA2",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 0
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48578,
+ "instruction": "BTST.B #3, @H'FAA2",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 1
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48596,
+ "instruction": "CLR.B @H'FAA2",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 0
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48621,
+ "instruction": "BTST.B #3, @H'FAA2",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 1
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48639,
+ "instruction": "CLR.B @H'FAA2",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 0
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48711,
+ "instruction": "CLR.B @H'FAA2",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 0
+ },
+ {
+ "address": 64162,
+ "instruction_address": 48815,
+ "instruction": "CLR.B @H'FAA2",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA2",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 64163,
+ "name": "ram_FAA3",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 10,
+ "read_count": 2,
+ "write_count": 8,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 47770,
+ "last_access": 48843,
+ "accesses": [
+ {
+ "address": 64163,
+ "instruction_address": 47770,
+ "instruction": "CLR.B @H'FAA3",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA3",
+ "operand_index": 0
+ },
+ {
+ "address": 64163,
+ "instruction_address": 47953,
+ "instruction": "MOV:G.B #H'80, @H'FAA3",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA3",
+ "operand_index": 1
+ },
+ {
+ "address": 64163,
+ "instruction_address": 48227,
+ "instruction": "CLR.B @H'FAA3",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA3",
+ "operand_index": 0
+ },
+ {
+ "address": 64163,
+ "instruction_address": 48501,
+ "instruction": "CLR.B @H'FAA3",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA3",
+ "operand_index": 0
+ },
+ {
+ "address": 64163,
+ "instruction_address": 48592,
+ "instruction": "CLR.B @H'FAA3",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA3",
+ "operand_index": 0
+ },
+ {
+ "address": 64163,
+ "instruction_address": 48635,
+ "instruction": "CLR.B @H'FAA3",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA3",
+ "operand_index": 0
+ },
+ {
+ "address": 64163,
+ "instruction_address": 48707,
+ "instruction": "CLR.B @H'FAA3",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA3",
+ "operand_index": 0
+ },
+ {
+ "address": 64163,
+ "instruction_address": 48805,
+ "instruction": "AND.B @H'FAA3, R0",
+ "mnemonic": "AND.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA3",
+ "operand_index": 0
+ },
+ {
+ "address": 64163,
+ "instruction_address": 48809,
+ "instruction": "MOV:G.B R0, @H'FAA3",
+ "mnemonic": "MOV:G.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA3",
+ "operand_index": 1
+ },
+ {
+ "address": 64163,
+ "instruction_address": 48843,
+ "instruction": "BTST.B #7, @H'FAA3",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA3",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 64164,
+ "name": "ram_FAA4",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 4,
+ "read_count": 3,
+ "write_count": 3,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 47959,
+ "last_access": 48681,
+ "accesses": [
+ {
+ "address": 64164,
+ "instruction_address": 47959,
+ "instruction": "BSET.B #7, @H'FAA4",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'FAA4",
+ "operand_index": 1
+ },
+ {
+ "address": 64164,
+ "instruction_address": 48004,
+ "instruction": "CLR.B @H'FAA4",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA4",
+ "operand_index": 0
+ },
+ {
+ "address": 64164,
+ "instruction_address": 48079,
+ "instruction": "BTST.B #7, @H'FAA4",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA4",
+ "operand_index": 1
+ },
+ {
+ "address": 64164,
+ "instruction_address": 48681,
+ "instruction": "BCLR.B #7, @H'FAA4",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'FAA4",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 64165,
+ "name": "ram_FAA5",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 7,
+ "read_count": 7,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 16345,
+ "last_access": 48798,
+ "accesses": [
+ {
+ "address": 64165,
+ "instruction_address": 16345,
+ "instruction": "BTST.B #7, @H'FAA5",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA5",
+ "operand_index": 1
+ },
+ {
+ "address": 64165,
+ "instruction_address": 16381,
+ "instruction": "BCLR.B #7, @H'FAA5",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'FAA5",
+ "operand_index": 1
+ },
+ {
+ "address": 64165,
+ "instruction_address": 16391,
+ "instruction": "BSET.B #7, @H'FAA5",
+ "mnemonic": "BSET.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'FAA5",
+ "operand_index": 1
+ },
+ {
+ "address": 64165,
+ "instruction_address": 16460,
+ "instruction": "BTST.B #7, @H'FAA5",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA5",
+ "operand_index": 1
+ },
+ {
+ "address": 64165,
+ "instruction_address": 47754,
+ "instruction": "BTST.B #7, @H'FAA5",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA5",
+ "operand_index": 1
+ },
+ {
+ "address": 64165,
+ "instruction_address": 48685,
+ "instruction": "BTST.B #7, @H'FAA5",
+ "mnemonic": "BTST.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA5",
+ "operand_index": 1
+ },
+ {
+ "address": 64165,
+ "instruction_address": 48798,
+ "instruction": "MOV:G.B @H'FAA5, R0",
+ "mnemonic": "MOV:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA5",
+ "operand_index": 0
+ }
+ ]
+ },
+ {
+ "address": 64166,
+ "name": "ram_FAA6",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 3,
+ "read_count": 2,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
+ "byte"
+ ],
+ "width": "byte",
+ "first_access": 48115,
+ "last_access": 48695,
+ "accesses": [
+ {
+ "address": 64166,
+ "instruction_address": 48115,
+ "instruction": "CLR.B @H'FAA6",
+ "mnemonic": "CLR.B",
+ "direction": "write",
+ "width": "byte",
+ "operand": "@H'FAA6",
+ "operand_index": 0
+ },
+ {
+ "address": 64166,
+ "instruction_address": 48691,
+ "instruction": "ADD:Q.B #1, @H'FAA6",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'FAA6",
+ "operand_index": 1
+ },
+ {
+ "address": 64166,
+ "instruction_address": 48695,
+ "instruction": "CMP:G.B #H'02, @H'FAA6",
+ "mnemonic": "CMP:G.B",
+ "direction": "read",
+ "width": "byte",
+ "operand": "@H'FAA6",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 64240,
+ "name": "ram_FAF0",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 0,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
+ "word"
+ ],
+ "width": "word",
+ "first_access": 17043,
+ "last_access": 17097,
+ "accesses": [
+ {
+ "address": 64240,
+ "instruction_address": 17043,
+ "instruction": "MOV:G.W #H'2043, @H'FAF0",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'FAF0",
+ "operand_index": 1
+ },
+ {
+ "address": 64240,
+ "instruction_address": 17097,
+ "instruction": "MOV:G.W #H'2020, @H'FAF0",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'FAF0",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 64242,
+ "name": "ram_FAF2",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 0,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
+ "word"
+ ],
+ "width": "word",
+ "first_access": 17049,
+ "last_access": 17103,
+ "accesses": [
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+ "address": 64242,
+ "instruction_address": 17049,
+ "instruction": "MOV:G.W #H'4F4E, @H'FAF2",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'FAF2",
+ "operand_index": 1
+ },
+ {
+ "address": 64242,
+ "instruction_address": 17103,
+ "instruction": "MOV:G.W #H'2020, @H'FAF2",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'FAF2",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 64244,
+ "name": "ram_FAF4",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 0,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
+ "word"
+ ],
+ "width": "word",
+ "first_access": 17055,
+ "last_access": 17109,
+ "accesses": [
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+ "address": 64244,
+ "instruction_address": 17055,
+ "instruction": "MOV:G.W #H'4E45, @H'FAF4",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'FAF4",
+ "operand_index": 1
+ },
+ {
+ "address": 64244,
+ "instruction_address": 17109,
+ "instruction": "MOV:G.W #H'2020, @H'FAF4",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'FAF4",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 64246,
+ "name": "ram_FAF6",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 0,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
+ "word"
+ ],
+ "width": "word",
+ "first_access": 17061,
+ "last_access": 17115,
+ "accesses": [
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+ "address": 64246,
+ "instruction_address": 17061,
+ "instruction": "MOV:G.W #H'4354, @H'FAF6",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'FAF6",
+ "operand_index": 1
+ },
+ {
+ "address": 64246,
+ "instruction_address": 17115,
+ "instruction": "MOV:G.W #H'2020, @H'FAF6",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'FAF6",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 64248,
+ "name": "ram_FAF8",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 0,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
+ "word"
+ ],
+ "width": "word",
+ "first_access": 17067,
+ "last_access": 17121,
+ "accesses": [
+ {
+ "address": 64248,
+ "instruction_address": 17067,
+ "instruction": "MOV:G.W #H'3A4E, @H'FAF8",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'FAF8",
+ "operand_index": 1
+ },
+ {
+ "address": 64248,
+ "instruction_address": 17121,
+ "instruction": "MOV:G.W #H'2020, @H'FAF8",
+ "mnemonic": "MOV:G.W",
+ "direction": "write",
+ "width": "word",
+ "operand": "@H'FAF8",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 64250,
+ "name": "ram_FAFA",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 2,
+ "read_count": 0,
+ "write_count": 2,
+ "unknown_count": 0,
+ "width_hints": [
+ "word"
+ ],
+ "width": "word",
+ "first_access": 17073,
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+ "address": 64250,
+ "instruction_address": 17073,
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+ "width": "word",
+ "operand": "@H'FAFA",
+ "operand_index": 1
+ },
+ {
+ "address": 64250,
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+ "instruction": "MOV:G.W #H'2020, @H'FAFA",
+ "mnemonic": "MOV:G.W",
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+ "width": "word",
+ "operand": "@H'FAFA",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 64252,
+ "name": "ram_FAFC",
+ "region": "on_chip_ram",
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+ "instruction": "MOV:G.W #H'2041, @H'FAFC",
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+ "operand": "@H'FAFC",
+ "operand_index": 1
+ },
+ {
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+ "instruction": "MOV:G.W #H'2020, @H'FAFC",
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+ "operand": "@H'FAFC",
+ "operand_index": 1
+ }
+ ],
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+ {
+ "source": "pointer_table",
+ "address": 6686,
+ "target": 64252
+ }
+ ]
+ },
+ {
+ "address": 64254,
+ "name": "ram_FAFE",
+ "region": "on_chip_ram",
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+ "instruction": "MOV:G.W #H'4354, @H'FAFE",
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+ "operand": "@H'FAFE",
+ "operand_index": 1
+ },
+ {
+ "address": 64254,
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+ "instruction": "MOV:G.W #H'2020, @H'FAFE",
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+ "width": "word",
+ "operand": "@H'FAFE",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 64256,
+ "name": "ram_FB00",
+ "region": "on_chip_ram",
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+ "operand": "@H'FB00",
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+ {
+ "address": 64256,
+ "instruction_address": 16172,
+ "instruction": "CMP:G.W @H'FB00, R4",
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+ "operand": "@H'FB00",
+ "operand_index": 0
+ },
+ {
+ "address": 64256,
+ "instruction_address": 16178,
+ "instruction": "MOV:G.W R4, @H'FB00",
+ "mnemonic": "MOV:G.W",
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+ "operand": "@H'FB00",
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+ },
+ {
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+ "instruction": "ADD:Q.W #1, @H'FB00",
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+ "operand": "@H'FB00",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 64258,
+ "name": "ram_FB02",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ ],
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+ "instruction": "MOV:G.B #H'14, @H'FB02",
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+ "operand": "@H'FB02",
+ "operand_index": 1
+ },
+ {
+ "address": 64258,
+ "instruction_address": 6004,
+ "instruction": "MOV:G.B #H'14, @H'FB02",
+ "mnemonic": "MOV:G.B",
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+ "width": "byte",
+ "operand": "@H'FB02",
+ "operand_index": 1
+ },
+ {
+ "address": 64258,
+ "instruction_address": 8507,
+ "instruction": "MOV:G.B #H'14, @H'FB02",
+ "mnemonic": "MOV:G.B",
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+ "operand": "@H'FB02",
+ "operand_index": 1
+ },
+ {
+ "address": 64258,
+ "instruction_address": 17450,
+ "instruction": "CLR.B @H'FB02",
+ "mnemonic": "CLR.B",
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+ "operand": "@H'FB02",
+ "operand_index": 0
+ },
+ {
+ "address": 64258,
+ "instruction_address": 17645,
+ "instruction": "CLR.B @H'FB02",
+ "mnemonic": "CLR.B",
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+ "operand": "@H'FB02",
+ "operand_index": 0
+ },
+ {
+ "address": 64258,
+ "instruction_address": 17840,
+ "instruction": "CLR.B @H'FB02",
+ "mnemonic": "CLR.B",
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+ "operand": "@H'FB02",
+ "operand_index": 0
+ },
+ {
+ "address": 64258,
+ "instruction_address": 48982,
+ "instruction": "TST.B @H'FB02",
+ "mnemonic": "TST.B",
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+ "width": "byte",
+ "operand": "@H'FB02",
+ "operand_index": 0
+ },
+ {
+ "address": 64258,
+ "instruction_address": 48988,
+ "instruction": "ADD:Q.B #-1, @H'FB02",
+ "mnemonic": "ADD:Q.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'FB02",
+ "operand_index": 1
+ }
+ ]
+ },
+ {
+ "address": 64259,
+ "name": "ram_FB03",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "write_count": 5,
+ "unknown_count": 0,
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+ "byte"
+ ],
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+ "first_access": 5912,
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+ "instruction_address": 5912,
+ "instruction": "BSET.B #7, @H'FB03",
+ "mnemonic": "BSET.B",
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+ },
+ {
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+ "instruction_address": 5984,
+ "instruction": "BSET.B #7, @H'FB03",
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+ "operand": "@H'FB03",
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+ },
+ {
+ "address": 64259,
+ "instruction_address": 8487,
+ "instruction": "BSET.B #7, @H'FB03",
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+ "operand": "@H'FB03",
+ "operand_index": 1
+ },
+ {
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+ "instruction_address": 16424,
+ "instruction": "CLR.B @H'FB03",
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+ "operand_index": 0
+ },
+ {
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+ "operand": "@H'FB03",
+ "operand_index": 1
+ },
+ {
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+ "instruction": "BTST.B #7, @H'FB03",
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+ "operand": "@H'FB03",
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+ {
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+ "operand_index": 1
+ },
+ {
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+ "instruction": "BTST.B #7, @H'FB03",
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+ },
+ {
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+ "instruction_address": 48976,
+ "instruction": "BTST.B #7, @H'FB03",
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+ "operand": "@H'FB03",
+ "operand_index": 1
+ },
+ {
+ "address": 64259,
+ "instruction_address": 48994,
+ "instruction": "BCLR.B #7, @H'FB03",
+ "mnemonic": "BCLR.B",
+ "direction": "read_write",
+ "width": "byte",
+ "operand": "@H'FB03",
+ "operand_index": 1
+ }
+ ],
+ "xref_count": 1,
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+ {
+ "source": "pointer_table",
+ "address": 18602,
+ "target": 64259
+ }
+ ]
+ },
+ {
+ "address": 64610,
+ "name": "ram_FC62",
+ "region": "on_chip_ram",
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+ "source": "pointer_table",
+ "address": 25326,
+ "target": 64610
+ }
+ ]
+ },
+ {
+ "address": 64640,
+ "name": "ram_FC80",
+ "region": "on_chip_ram",
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+ "source": "pointer_table",
+ "address": 33010,
+ "target": 64640
+ }
+ ]
+ },
+ {
+ "address": 64644,
+ "name": "ram_FC84",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 0,
+ "read_count": 0,
+ "write_count": 0,
+ "unknown_count": 0,
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+ "source": "pointer_table",
+ "address": 33010,
+ "target": 64644
+ }
+ ]
+ },
+ {
+ "address": 64738,
+ "name": "ram_FCE2",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "read_count": 0,
+ "write_count": 0,
+ "unknown_count": 0,
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+ "address": 25326,
+ "target": 64738
+ }
+ ]
+ },
+ {
+ "address": 64766,
+ "name": "ram_FCFE",
+ "region": "on_chip_ram",
+ "kind": "ram",
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+ "read_count": 0,
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+ "address": 53384,
+ "target": 64766
+ }
+ ]
+ },
+ {
+ "address": 65022,
+ "name": "ram_FDFE",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 0,
+ "read_count": 0,
+ "write_count": 0,
+ "unknown_count": 0,
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+ "source": "pointer_table",
+ "address": 6686,
+ "target": 65022
+ }
+ ]
+ },
+ {
+ "address": 65063,
+ "name": "ram_FE27",
+ "region": "on_chip_ram",
+ "kind": "ram",
+ "access_count": 0,
+ "read_count": 0,
+ "write_count": 0,
+ "unknown_count": 0,
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+ "source": "pointer_table",
+ "address": 13788,
+ "target": 65063
+ }
+ ]
+ }
+ ],
+ "by_address": {
+ "4113": "mem_1011",
+ "4347": "mem_10FB",
+ "4449": "mem_1161",
+ "4464": "mem_1170",
+ "4473": "mem_1179",
+ "4488": "mem_1188",
+ "4503": "mem_1197",
+ "4512": "mem_11A0",
+ "4521": "mem_11A9",
+ "4572": "mem_11DC",
+ "4614": "mem_1206",
+ "4629": "mem_1215",
+ "4776": "mem_12A8",
+ "4884": "mem_1314",
+ "5655": "mem_1617",
+ "5671": "mem_1627",
+ "5680": "mem_1630",
+ "5703": "mem_1647",
+ "5732": "mem_1664",
+ "5762": "mem_1682",
+ "5888": "mem_1700",
+ "6169": "mem_1819",
+ "6656": "mem_1A00",
+ "6904": "mem_1AF8",
+ "10261": "mem_2815",
+ "11430": "mem_2CA6",
+ "17437": "mem_441D",
+ "17564": "mem_449C",
+ "17566": "mem_449E",
+ "17568": "mem_44A0",
+ "57344": "mem_E000",
+ "57348": "mem_E004",
+ "57350": "mem_E006",
+ "57414": "mem_E046",
+ "57472": "mem_E080",
+ "57602": "mem_E102",
+ "57636": "mem_E124",
+ "57638": "mem_E126",
+ "57678": "mem_E14E",
+ "57710": "mem_E16E",
+ "57714": "mem_E172",
+ "57836": "mem_E1EC",
+ "57888": "mem_E220",
+ "59392": "mem_E800",
+ "59398": "mem_E806",
+ "59520": "mem_E880",
+ "59650": "mem_E902",
+ "59684": "mem_E924",
+ "59884": "mem_E9EC",
+ "61440": "mem_F000",
+ "61441": "mem_F001",
+ "61442": "mem_F002",
+ "61443": "mem_F003",
+ "61444": "mem_F004",
+ "61445": "mem_F005",
+ "61446": "mem_F006",
+ "61447": "mem_F007",
+ "61448": "mem_F008",
+ "61449": "mem_F009",
+ "61450": "mem_F00A",
+ "61451": "mem_F00B",
+ "61452": "mem_F00C",
+ "61453": "mem_F00D",
+ "61454": "mem_F00E",
+ "61455": "mem_F00F",
+ "61696": "mem_F100",
+ "61697": "mem_F101",
+ "61698": "mem_F102",
+ "61699": "mem_F103",
+ "61700": "mem_F104",
+ "61701": "mem_F105",
+ "61702": "mem_F106",
+ "61703": "mem_F107",
+ "61704": "mem_F108",
+ "61705": "mem_F109",
+ "61706": "mem_F10A",
+ "61707": "mem_F10B",
+ "61708": "mem_F10C",
+ "61709": "mem_F10D",
+ "61710": "mem_F10E",
+ "61711": "mem_F10F",
+ "61952": "mem_F200",
+ "61953": "mem_F201",
+ "62466": "mem_F402",
+ "62468": "mem_F404",
+ "62634": "mem_F4AA",
+ "62805": "mem_F555",
+ "63112": "ram_F688",
+ "63113": "ram_F689",
+ "63114": "ram_F68A",
+ "63115": "ram_F68B",
+ "63116": "ram_F68C",
+ "63118": "ram_F68E",
+ "63120": "ram_F690",
+ "63122": "ram_F692",
+ "63124": "ram_F694",
+ "63126": "ram_F696",
+ "63128": "ram_F698",
+ "63130": "ram_F69A",
+ "63132": "ram_F69C",
+ "63134": "ram_F69E",
+ "63136": "ram_F6A0",
+ "63138": "ram_F6A2",
+ "63140": "ram_F6A4",
+ "63142": "ram_F6A6",
+ "63144": "ram_F6A8",
+ "63146": "ram_F6AA",
+ "63148": "ram_F6AC",
+ "63150": "ram_F6AE",
+ "63154": "ram_F6B2",
+ "63156": "ram_F6B4",
+ "63158": "ram_F6B6",
+ "63162": "ram_F6BA",
+ "63164": "ram_F6BC",
+ "63166": "ram_F6BE",
+ "63170": "ram_F6C2",
+ "63172": "ram_F6C4",
+ "63174": "ram_F6C6",
+ "63176": "ram_F6C8",
+ "63178": "ram_F6CA",
+ "63180": "ram_F6CC",
+ "63182": "ram_F6CE",
+ "63184": "ram_F6D0",
+ "63185": "ram_F6D1",
+ "63186": "ram_F6D2",
+ "63187": "ram_F6D3",
+ "63188": "ram_F6D4",
+ "63189": "ram_F6D5",
+ "63190": "ram_F6D6",
+ "63191": "ram_F6D7",
+ "63192": "ram_F6D8",
+ "63193": "ram_F6D9",
+ "63194": "ram_F6DA",
+ "63195": "ram_F6DB",
+ "63196": "ram_F6DC",
+ "63197": "ram_F6DD",
+ "63198": "ram_F6DE",
+ "63199": "ram_F6DF",
+ "63200": "ram_F6E0",
+ "63201": "ram_F6E1",
+ "63202": "ram_F6E2",
+ "63203": "ram_F6E3",
+ "63204": "ram_F6E4",
+ "63205": "ram_F6E5",
+ "63206": "ram_F6E6",
+ "63207": "ram_F6E7",
+ "63211": "ram_F6EB",
+ "63212": "ram_F6EC",
+ "63216": "ram_F6F0",
+ "63217": "ram_F6F1",
+ "63218": "ram_F6F2",
+ "63219": "ram_F6F3",
+ "63220": "ram_F6F4",
+ "63222": "ram_F6F6",
+ "63223": "ram_F6F7",
+ "63224": "ram_F6F8",
+ "63225": "ram_F6F9",
+ "63232": "ram_F700",
+ "63233": "ram_F701",
+ "63234": "ram_F702",
+ "63235": "ram_F703",
+ "63236": "ram_F704",
+ "63237": "ram_F705",
+ "63238": "ram_F706",
+ "63239": "ram_F707",
+ "63240": "ram_F708",
+ "63241": "ram_F709",
+ "63242": "ram_F70A",
+ "63243": "ram_F70B",
+ "63248": "ram_F710",
+ "63249": "ram_F711",
+ "63250": "ram_F712",
+ "63251": "ram_F713",
+ "63252": "ram_F714",
+ "63253": "ram_F715",
+ "63254": "ram_F716",
+ "63255": "ram_F717",
+ "63256": "ram_F718",
+ "63257": "ram_F719",
+ "63258": "ram_F71A",
+ "63259": "ram_F71B",
+ "63260": "ram_F71C",
+ "63261": "ram_F71D",
+ "63262": "ram_F71E",
+ "63263": "ram_F71F",
+ "63264": "ram_F720",
+ "63265": "ram_F721",
+ "63266": "ram_F722",
+ "63267": "ram_F723",
+ "63268": "ram_F724",
+ "63270": "ram_F726",
+ "63271": "ram_F727",
+ "63280": "ram_F730",
+ "63281": "ram_F731",
+ "63282": "ram_F732",
+ "63283": "ram_F733",
+ "63284": "ram_F734",
+ "63286": "ram_F736",
+ "63288": "ram_F738",
+ "63290": "ram_F73A",
+ "63292": "ram_F73C",
+ "63294": "ram_F73E",
+ "63296": "ram_F740",
+ "63298": "ram_F742",
+ "63308": "ram_F74C",
+ "63312": "ram_F750",
+ "63314": "ram_F752",
+ "63316": "ram_F754",
+ "63318": "ram_F756",
+ "63319": "ram_F757",
+ "63320": "ram_F758",
+ "63321": "ram_F759",
+ "63323": "ram_F75B",
+ "63324": "ram_F75C",
+ "63337": "ram_F769",
+ "63338": "ram_F76A",
+ "63340": "ram_F76C",
+ "63341": "ram_F76D",
+ "63342": "ram_F76E",
+ "63344": "ram_F770",
+ "63346": "ram_F772",
+ "63376": "ram_F790",
+ "63377": "ram_F791",
+ "63380": "ram_F794",
+ "63381": "ram_F795",
+ "63383": "ram_F797",
+ "63384": "ram_F798",
+ "63552": "ram_F840",
+ "63553": "ram_F841",
+ "63568": "ram_F850",
+ "63569": "ram_F851",
+ "63570": "ram_F852",
+ "63571": "ram_F853",
+ "63572": "ram_F854",
+ "63576": "ram_F858",
+ "63577": "ram_F859",
+ "63578": "ram_F85A",
+ "63579": "ram_F85B",
+ "63580": "ram_F85C",
+ "63581": "ram_F85D",
+ "63584": "ram_F860",
+ "63585": "ram_F861",
+ "63586": "ram_F862",
+ "63587": "ram_F863",
+ "63588": "ram_F864",
+ "63589": "ram_F865",
+ "63592": "ram_F868",
+ "63594": "ram_F86A",
+ "63596": "ram_F86C",
+ "63920": "ram_F9B0",
+ "63924": "ram_F9B4",
+ "63925": "ram_F9B5",
+ "63929": "ram_F9B9",
+ "63936": "ram_F9C0",
+ "63937": "ram_F9C1",
+ "63938": "ram_F9C2",
+ "63939": "ram_F9C3",
+ "63940": "ram_F9C4",
+ "63941": "ram_F9C5",
+ "63942": "ram_F9C6",
+ "63944": "ram_F9C8",
+ "63995": "ram_F9FB",
+ "64132": "ram_FA84",
+ "64162": "ram_FAA2",
+ "64163": "ram_FAA3",
+ "64164": "ram_FAA4",
+ "64165": "ram_FAA5",
+ "64166": "ram_FAA6",
+ "64240": "ram_FAF0",
+ "64242": "ram_FAF2",
+ "64244": "ram_FAF4",
+ "64246": "ram_FAF6",
+ "64248": "ram_FAF8",
+ "64250": "ram_FAFA",
+ "64252": "ram_FAFC",
+ "64254": "ram_FAFE",
+ "64256": "ram_FB00",
+ "64258": "ram_FB02",
+ "64259": "ram_FB03",
+ "64610": "ram_FC62",
+ "64640": "ram_FC80",
+ "64644": "ram_FC84",
+ "64738": "ram_FCE2",
+ "64766": "ram_FCFE",
+ "65022": "ram_FDFE",
+ "65063": "ram_FE27"
+ }
+ },
"instructions": [
{
"address": 4096,
@@ -15679,7 +41547,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R7 = 0xFE80"
+ ],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ }
+ }
+ }
},
{
"address": 4099,
@@ -15698,7 +41612,50 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ ],
+ "notes": [
+ "SR = 0x0700"
+ ],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4103,
@@ -15720,12 +41677,38 @@
{
"address": 65152,
"name": "P1DDR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "P1DDR = H'FF",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4108,
@@ -15747,12 +41730,38 @@
{
"address": 65154,
"name": "P1DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "P1DR = H'00",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4113,
@@ -15774,12 +41783,38 @@
{
"address": 65161,
"name": "P6DDR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "P6DDR = H'F9",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4118,
@@ -15801,12 +41836,38 @@
{
"address": 65163,
"name": "P6DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "P6DR = H'F1",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4123,
@@ -15828,12 +41889,38 @@
{
"address": 65164,
"name": "P7DDR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "P7DDR = H'00",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4128,
@@ -15855,12 +41942,38 @@
{
"address": 65166,
"name": "P7DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "P7DR = H'00",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4133,
@@ -15882,12 +41995,38 @@
{
"address": 65278,
"name": "P9DDR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "P9DDR = H'93",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4138,
@@ -15909,12 +42048,38 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "P9DR = H'00",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4143,
@@ -15936,12 +42101,38 @@
{
"address": 65276,
"name": "SYSCR1",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "SYSCR1 = H'87 (IRQ1E=0 IRQ0E=0 NMIEG=0 BRLE=0; P12/P13 are I/O, IRQ0 disabled, IRQ1 disabled)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4148,
@@ -15963,12 +42154,38 @@
{
"address": 65277,
"name": "SYSCR2",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "SYSCR2 = H'84 (IRQ5E=0 IRQ4E=0 IRQ3E=0 IRQ2E=0 P6PWME=1 P9PWME=0 P9SCI2E=0; enabled P6 PWM)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4153,
@@ -15990,12 +42207,38 @@
{
"address": 65168,
"name": "FRT1_TCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "FRT1_TCR = H'02 (ICIE=0 OCIEB=0 OCIEA=0 OVIE=0 OEB=0 OEA=0 CKS1=1 CKS0=0)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4158,
@@ -16017,12 +42260,38 @@
{
"address": 65169,
"name": "FRT1_TCSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "FRT1_TCSR = H'01 (ICF=0 OCFB=0 OCFA=0 OVF=0 OLVLB=0 OLVLA=0 IEDG=0 CCLRA=1)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4163,
@@ -16043,6 +42312,7 @@
{
"address": 65170,
"name": "FRT1_FRC_H",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -16062,7 +42332,32 @@
"size": "W",
"direction": "write"
}
- ]
+ ],
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4168,
@@ -16084,6 +42379,7 @@
{
"address": 65172,
"name": "FRT1_OCRA_H",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -16103,7 +42399,32 @@
"size": "W",
"direction": "write"
}
- ]
+ ],
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4174,
@@ -16125,12 +42446,38 @@
{
"address": 65184,
"name": "FRT2_TCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "FRT2_TCR = H'02 (ICIE=0 OCIEB=0 OCIEA=0 OVIE=0 OEB=0 OEA=0 CKS1=1 CKS0=0)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4179,
@@ -16152,12 +42499,38 @@
{
"address": 65185,
"name": "FRT2_TCSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "FRT2_TCSR = H'01 (ICF=0 OCFB=0 OCFA=0 OVF=0 OLVLB=0 OLVLA=0 IEDG=0 CCLRA=1)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4184,
@@ -16179,6 +42552,7 @@
{
"address": 65186,
"name": "FRT2_FRC_H",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -16198,7 +42572,32 @@
"size": "W",
"direction": "write"
}
- ]
+ ],
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4189,
@@ -16219,6 +42618,7 @@
{
"address": 65188,
"name": "FRT2_OCRA_H",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -16238,7 +42638,32 @@
"size": "W",
"direction": "write"
}
- ]
+ ],
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4195,
@@ -16260,12 +42685,38 @@
{
"address": 65200,
"name": "FRT3_TCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "FRT3_TCR = H'00 (ICIE=0 OCIEB=0 OCIEA=0 OVIE=0 OEB=0 OEA=0 CKS1=0 CKS0=0)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4200,
@@ -16287,12 +42738,38 @@
{
"address": 65201,
"name": "FRT3_TCSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "FRT3_TCSR = H'00 (ICF=0 OCFB=0 OCFA=0 OVF=0 OLVLB=0 OLVLA=0 IEDG=0 CCLRA=0)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4205,
@@ -16314,12 +42791,38 @@
{
"address": 65232,
"name": "TMR_TCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "TMR_TCR = H'00 (CMIEB=0 CMIEA=0 OVIE=0 CCLR1=0 CCLR0=0 CKS2=0 CKS1=0 CKS0=0)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4210,
@@ -16341,12 +42844,38 @@
{
"address": 65233,
"name": "TMR_TCSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "TMR_TCSR = H'10 (CMFB=0 CMFA=0 OVF=0 OS3=0 OS2=0 OS1=0 OS0=0)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4215,
@@ -16368,12 +42897,38 @@
{
"address": 65216,
"name": "PWM1_TCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "PWM1_TCR = H'38 (OE=0 OS=0 CKS2=0 CKS1=0 CKS0=0)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4220,
@@ -16395,12 +42950,38 @@
{
"address": 65217,
"name": "PWM1_DTR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "PWM1_DTR = H'FF",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4225,
@@ -16422,12 +43003,38 @@
{
"address": 65220,
"name": "PWM2_TCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "PWM2_TCR = H'38 (OE=0 OS=0 CKS2=0 CKS1=0 CKS0=0)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4230,
@@ -16449,12 +43056,38 @@
{
"address": 65221,
"name": "PWM2_DTR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "PWM2_DTR = H'FF",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4235,
@@ -16476,12 +43109,38 @@
{
"address": 65224,
"name": "PWM3_TCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "PWM3_TCR = H'3B (OE=0 OS=0 CKS2=0 CKS1=1 CKS0=1)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4240,
@@ -16503,12 +43162,38 @@
{
"address": 65225,
"name": "PWM3_DTR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "PWM3_DTR = H'7D",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4245,
@@ -16530,6 +43215,7 @@
{
"address": 65240,
"name": "SCI1_SMR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -16549,6 +43235,31 @@
"value_hex": "H'24"
}
]
+ },
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
}
},
{
@@ -16571,6 +43282,7 @@
{
"address": 65242,
"name": "SCI1_SCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -16590,6 +43302,31 @@
"value_hex": "H'3C"
}
]
+ },
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
}
},
{
@@ -16612,6 +43349,7 @@
{
"address": 65241,
"name": "SCI1_BRR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -16655,6 +43393,31 @@
"instruction": "MOV:G.B #H'07, @SCI1_BRR"
}
]
+ },
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
}
},
{
@@ -16677,6 +43440,7 @@
{
"address": 65264,
"name": "SCI2_SMR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -16696,6 +43460,31 @@
"value_hex": "H'24"
}
]
+ },
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
}
},
{
@@ -16718,6 +43507,7 @@
{
"address": 65266,
"name": "SCI2_SCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -16737,6 +43527,31 @@
"value_hex": "H'0C"
}
]
+ },
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
}
},
{
@@ -16759,6 +43574,7 @@
{
"address": 65265,
"name": "SCI2_BRR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -16802,6 +43618,31 @@
"instruction": "MOV:G.B #H'07, @SCI2_BRR"
}
]
+ },
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
}
},
{
@@ -16824,12 +43665,38 @@
{
"address": 65256,
"name": "ADCSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "ADCSR = H'19 (ADF=0 ADIE=0 ADST=0 SCAN=1 CKS=1 CH2=0 CH1=0 CH0=1; A/D halt, scan AN0-AN1, 138-state max, ADI disabled)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4280,
@@ -16851,12 +43718,38 @@
{
"address": 65257,
"name": null,
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4285,
@@ -16878,12 +43771,38 @@
{
"address": 65296,
"name": "WCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "WCR = H'F0 (WMS1=0 WMS0=0 WC1=0 WC0=0; programmable wait, 0 waits)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4290,
@@ -16905,12 +43824,38 @@
{
"address": 65297,
"name": "RAMCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "RAMCR = H'FF (RAME=1; on-chip RAM enabled)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4295,
@@ -16931,12 +43876,38 @@
{
"address": 65154,
"name": "P1DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 7 of P1DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4299,
@@ -16960,7 +43931,32 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4096,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R7": {
+ "known": true,
+ "value": 65152,
+ "hex": "0xFE80",
+ "width": 16,
+ "source": "MOV:I.W #H'FE80, R7"
+ }
+ },
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 1792,
+ "hex": "0x0700",
+ "width": 16,
+ "source": "LDC.W #H'0700, SR"
+ }
+ }
+ }
+ }
},
{
"address": 4302,
@@ -16978,7 +43974,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 64,
+ "hex": "0x0040",
+ "width": 16,
+ "source": "MOV:I.W #H'0040, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0040"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 64,
+ "hex": "0x0040",
+ "width": 16,
+ "source": "MOV:I.W #H'0040, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4305,
@@ -16996,7 +44038,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 64,
+ "hex": "0x0040",
+ "width": 16,
+ "source": "MOV:I.W #H'0040, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4308,
@@ -17019,7 +44102,189 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 64,
+ "hex": "0x0040",
+ "width": 16,
+ "source": "MOV:I.W #H'0040, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4311,
@@ -17037,7 +44302,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4314,
@@ -17055,7 +44366,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4317,
@@ -17079,7 +44431,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4320,
@@ -17097,7 +44499,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4323,
@@ -17115,7 +44563,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4326,
@@ -17138,7 +44627,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4329,
@@ -17156,7 +44695,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4332,
@@ -17174,7 +44759,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4335,
@@ -17198,7 +44824,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4338,
@@ -17216,7 +44892,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 519,
+ "hex": "0x0207",
+ "width": 16,
+ "source": "MOV:I.W #H'0207, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0207"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 519,
+ "hex": "0x0207",
+ "width": 16,
+ "source": "MOV:I.W #H'0207, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4341,
@@ -17234,7 +44956,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 519,
+ "hex": "0x0207",
+ "width": 16,
+ "source": "MOV:I.W #H'0207, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4344,
@@ -17257,7 +45020,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 519,
+ "hex": "0x0207",
+ "width": 16,
+ "source": "MOV:I.W #H'0207, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4347,
@@ -17275,7 +45088,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4350,
@@ -17293,7 +45152,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4353,
@@ -17317,7 +45217,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4356,
@@ -17335,7 +45285,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4359,
@@ -17353,7 +45349,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4362,
@@ -17376,7 +45413,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4365,
@@ -17394,7 +45481,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4368,
@@ -17412,7 +45545,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4371,
@@ -17436,7 +45610,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4374,
@@ -17454,7 +45678,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4377,
@@ -17472,7 +45742,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4380,
@@ -17495,7 +45806,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4383,
@@ -17513,7 +45874,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 72,
+ "hex": "0x0048",
+ "width": 16,
+ "source": "MOV:I.W #H'0048, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0048"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 72,
+ "hex": "0x0048",
+ "width": 16,
+ "source": "MOV:I.W #H'0048, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4386,
@@ -17531,7 +45938,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 72,
+ "hex": "0x0048",
+ "width": 16,
+ "source": "MOV:I.W #H'0048, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4389,
@@ -17555,7 +46003,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 72,
+ "hex": "0x0048",
+ "width": 16,
+ "source": "MOV:I.W #H'0048, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4392,
@@ -17573,7 +46071,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4395,
@@ -17591,7 +46135,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4398,
@@ -17614,7 +46199,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4401,
@@ -17632,7 +46267,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4404,
@@ -17650,7 +46331,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4407,
@@ -17674,7 +46396,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4410,
@@ -17692,7 +46464,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4413,
@@ -17710,7 +46528,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4416,
@@ -17733,7 +46592,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4419,
@@ -17751,7 +46660,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 539,
+ "hex": "0x021B",
+ "width": 16,
+ "source": "MOV:I.W #H'021B, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x021B"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 539,
+ "hex": "0x021B",
+ "width": 16,
+ "source": "MOV:I.W #H'021B, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4422,
@@ -17769,7 +46724,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 539,
+ "hex": "0x021B",
+ "width": 16,
+ "source": "MOV:I.W #H'021B, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4425,
@@ -17793,7 +46789,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 539,
+ "hex": "0x021B",
+ "width": 16,
+ "source": "MOV:I.W #H'021B, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4428,
@@ -17811,7 +46857,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4431,
@@ -17829,7 +46921,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4434,
@@ -17852,7 +46985,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4437,
@@ -17870,7 +47053,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4440,
@@ -17888,7 +47117,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4443,
@@ -17912,7 +47182,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4446,
@@ -17930,7 +47250,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4449,
@@ -17948,7 +47314,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4452,
@@ -17971,7 +47378,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4455,
@@ -17989,7 +47446,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4458,
@@ -18007,7 +47510,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4461,
@@ -18031,7 +47575,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4464,
@@ -18049,7 +47643,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 80,
+ "hex": "0x0050",
+ "width": 16,
+ "source": "MOV:I.W #H'0050, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0050"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 80,
+ "hex": "0x0050",
+ "width": 16,
+ "source": "MOV:I.W #H'0050, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4467,
@@ -18067,7 +47707,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 80,
+ "hex": "0x0050",
+ "width": 16,
+ "source": "MOV:I.W #H'0050, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4470,
@@ -18090,7 +47771,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 80,
+ "hex": "0x0050",
+ "width": 16,
+ "source": "MOV:I.W #H'0050, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4473,
@@ -18108,7 +47839,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4476,
@@ -18126,7 +47903,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4479,
@@ -18150,7 +47968,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4482,
@@ -18168,7 +48036,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4485,
@@ -18186,7 +48100,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4488,
@@ -18209,7 +48164,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4491,
@@ -18227,7 +48232,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4494,
@@ -18245,7 +48296,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4497,
@@ -18269,7 +48361,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4500,
@@ -18287,7 +48429,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 540,
+ "hex": "0x021C",
+ "width": 16,
+ "source": "MOV:I.W #H'021C, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x021C"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 540,
+ "hex": "0x021C",
+ "width": 16,
+ "source": "MOV:I.W #H'021C, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4503,
@@ -18305,7 +48493,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 540,
+ "hex": "0x021C",
+ "width": 16,
+ "source": "MOV:I.W #H'021C, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4506,
@@ -18328,7 +48557,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 540,
+ "hex": "0x021C",
+ "width": 16,
+ "source": "MOV:I.W #H'021C, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4509,
@@ -18346,7 +48625,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4512,
@@ -18364,7 +48689,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4515,
@@ -18388,7 +48754,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4518,
@@ -18406,7 +48822,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4521,
@@ -18424,7 +48886,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4524,
@@ -18447,7 +48950,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4527,
@@ -18465,7 +49018,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4530,
@@ -18483,7 +49082,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4533,
@@ -18507,7 +49147,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4536,
@@ -18525,7 +49215,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4539,
@@ -18543,7 +49279,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4542,
@@ -18566,7 +49343,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4545,
@@ -18584,7 +49411,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 88,
+ "hex": "0x0058",
+ "width": 16,
+ "source": "MOV:I.W #H'0058, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0058"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 88,
+ "hex": "0x0058",
+ "width": 16,
+ "source": "MOV:I.W #H'0058, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4548,
@@ -18602,7 +49475,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 88,
+ "hex": "0x0058",
+ "width": 16,
+ "source": "MOV:I.W #H'0058, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4551,
@@ -18626,7 +49540,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 88,
+ "hex": "0x0058",
+ "width": 16,
+ "source": "MOV:I.W #H'0058, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4554,
@@ -18644,7 +49608,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4557,
@@ -18662,7 +49672,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4560,
@@ -18685,7 +49736,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4563,
@@ -18703,7 +49804,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4566,
@@ -18721,7 +49868,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4569,
@@ -18745,7 +49933,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4572,
@@ -18763,7 +50001,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4575,
@@ -18781,7 +50065,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4578,
@@ -18804,7 +50129,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4581,
@@ -18822,7 +50197,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 519,
+ "hex": "0x0207",
+ "width": 16,
+ "source": "MOV:I.W #H'0207, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0207"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 519,
+ "hex": "0x0207",
+ "width": 16,
+ "source": "MOV:I.W #H'0207, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4584,
@@ -18840,7 +50261,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 519,
+ "hex": "0x0207",
+ "width": 16,
+ "source": "MOV:I.W #H'0207, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4587,
@@ -18864,7 +50326,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 519,
+ "hex": "0x0207",
+ "width": 16,
+ "source": "MOV:I.W #H'0207, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4590,
@@ -18882,7 +50394,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4593,
@@ -18900,7 +50458,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4596,
@@ -18923,7 +50522,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4599,
@@ -18941,7 +50590,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4602,
@@ -18959,7 +50654,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4605,
@@ -18983,7 +50719,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4608,
@@ -19001,7 +50787,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4611,
@@ -19019,7 +50851,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4614,
@@ -19042,7 +50915,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4617,
@@ -19060,7 +50983,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4620,
@@ -19078,7 +51047,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4623,
@@ -19102,7 +51112,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4626,
@@ -19120,7 +51180,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 96,
+ "hex": "0x0060",
+ "width": 16,
+ "source": "MOV:I.W #H'0060, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0060"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 96,
+ "hex": "0x0060",
+ "width": 16,
+ "source": "MOV:I.W #H'0060, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4629,
@@ -19138,7 +51244,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 96,
+ "hex": "0x0060",
+ "width": 16,
+ "source": "MOV:I.W #H'0060, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4632,
@@ -19161,7 +51308,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 96,
+ "hex": "0x0060",
+ "width": 16,
+ "source": "MOV:I.W #H'0060, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4635,
@@ -19179,7 +51376,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4638,
@@ -19197,7 +51440,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4641,
@@ -19221,7 +51505,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4644,
@@ -19239,7 +51573,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4647,
@@ -19257,7 +51637,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4650,
@@ -19280,7 +51701,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4653,
@@ -19298,7 +51769,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4656,
@@ -19316,7 +51833,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4659,
@@ -19340,7 +51898,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4662,
@@ -19358,7 +51966,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 539,
+ "hex": "0x021B",
+ "width": 16,
+ "source": "MOV:I.W #H'021B, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x021B"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 539,
+ "hex": "0x021B",
+ "width": 16,
+ "source": "MOV:I.W #H'021B, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4665,
@@ -19376,7 +52030,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 539,
+ "hex": "0x021B",
+ "width": 16,
+ "source": "MOV:I.W #H'021B, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4668,
@@ -19399,7 +52094,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 539,
+ "hex": "0x021B",
+ "width": 16,
+ "source": "MOV:I.W #H'021B, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4671,
@@ -19417,7 +52162,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4674,
@@ -19435,7 +52226,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4677,
@@ -19459,7 +52291,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4680,
@@ -19477,7 +52359,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4683,
@@ -19495,7 +52423,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4686,
@@ -19518,7 +52487,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4689,
@@ -19536,7 +52555,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4692,
@@ -19554,7 +52619,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4695,
@@ -19578,7 +52684,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4698,
@@ -19596,7 +52752,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4701,
@@ -19614,7 +52816,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4704,
@@ -19637,7 +52880,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4707,
@@ -19655,7 +52948,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 104,
+ "hex": "0x0068",
+ "width": 16,
+ "source": "MOV:I.W #H'0068, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0068"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 104,
+ "hex": "0x0068",
+ "width": 16,
+ "source": "MOV:I.W #H'0068, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4710,
@@ -19673,7 +53012,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 104,
+ "hex": "0x0068",
+ "width": 16,
+ "source": "MOV:I.W #H'0068, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4713,
@@ -19697,7 +53077,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 104,
+ "hex": "0x0068",
+ "width": 16,
+ "source": "MOV:I.W #H'0068, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4716,
@@ -19715,7 +53145,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4719,
@@ -19733,7 +53209,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4722,
@@ -19756,7 +53273,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4725,
@@ -19774,7 +53341,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4728,
@@ -19792,7 +53405,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4731,
@@ -19816,7 +53470,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4734,
@@ -19834,7 +53538,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4737,
@@ -19852,7 +53602,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4740,
@@ -19875,7 +53666,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4743,
@@ -19893,7 +53734,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 540,
+ "hex": "0x021C",
+ "width": 16,
+ "source": "MOV:I.W #H'021C, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x021C"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 540,
+ "hex": "0x021C",
+ "width": 16,
+ "source": "MOV:I.W #H'021C, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4746,
@@ -19911,7 +53798,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 540,
+ "hex": "0x021C",
+ "width": 16,
+ "source": "MOV:I.W #H'021C, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4749,
@@ -19935,7 +53863,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 540,
+ "hex": "0x021C",
+ "width": 16,
+ "source": "MOV:I.W #H'021C, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4752,
@@ -19953,7 +53931,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4755,
@@ -19971,7 +53995,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4758,
@@ -19994,7 +54059,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4761,
@@ -20012,7 +54127,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4764,
@@ -20030,7 +54191,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4767,
@@ -20054,7 +54256,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4770,
@@ -20072,7 +54324,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4773,
@@ -20090,7 +54388,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4776,
@@ -20113,7 +54452,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4779,
@@ -20131,7 +54520,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4782,
@@ -20149,7 +54584,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4785,
@@ -20173,7 +54649,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4788,
@@ -20191,7 +54717,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 112,
+ "hex": "0x0070",
+ "width": 16,
+ "source": "MOV:I.W #H'0070, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0070"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 112,
+ "hex": "0x0070",
+ "width": 16,
+ "source": "MOV:I.W #H'0070, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4791,
@@ -20209,7 +54781,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 112,
+ "hex": "0x0070",
+ "width": 16,
+ "source": "MOV:I.W #H'0070, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4794,
@@ -20232,7 +54845,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 112,
+ "hex": "0x0070",
+ "width": 16,
+ "source": "MOV:I.W #H'0070, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4797,
@@ -20250,7 +54913,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4800,
@@ -20268,7 +54977,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4803,
@@ -20292,7 +55042,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4806,
@@ -20310,7 +55110,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4809,
@@ -20328,7 +55174,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4812,
@@ -20351,7 +55238,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4815,
@@ -20369,7 +55306,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4818,
@@ -20387,7 +55370,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4821,
@@ -20411,7 +55435,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4824,
@@ -20429,7 +55503,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4827,
@@ -20447,7 +55567,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4830,
@@ -20470,7 +55631,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4833,
@@ -20488,7 +55699,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4836,
@@ -20506,7 +55763,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4839,
@@ -20530,7 +55828,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4842,
@@ -20548,7 +55896,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4845,
@@ -20566,7 +55960,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4848,
@@ -20589,7 +56024,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4851,
@@ -20607,7 +56092,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4854,
@@ -20625,7 +56156,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4857,
@@ -20649,7 +56221,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4860,
@@ -20667,7 +56289,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4863,
@@ -20685,7 +56353,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4866,
@@ -20708,7 +56417,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4869,
@@ -20726,7 +56485,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 120,
+ "hex": "0x0078",
+ "width": 16,
+ "source": "MOV:I.W #H'0078, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0078"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 120,
+ "hex": "0x0078",
+ "width": 16,
+ "source": "MOV:I.W #H'0078, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4872,
@@ -20744,7 +56549,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 120,
+ "hex": "0x0078",
+ "width": 16,
+ "source": "MOV:I.W #H'0078, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4875,
@@ -20768,7 +56614,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 120,
+ "hex": "0x0078",
+ "width": 16,
+ "source": "MOV:I.W #H'0078, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4878,
@@ -20786,7 +56682,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4881,
@@ -20804,7 +56746,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4884,
@@ -20827,7 +56810,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4887,
@@ -20845,7 +56878,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4890,
@@ -20863,7 +56942,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4893,
@@ -20887,7 +57007,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4896,
@@ -20905,7 +57075,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4899,
@@ -20923,7 +57139,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4902,
@@ -20946,7 +57203,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4905,
@@ -20964,7 +57271,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4908,
@@ -20982,7 +57335,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4911,
@@ -21006,7 +57400,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4914,
@@ -21024,7 +57468,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4917,
@@ -21042,7 +57532,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4920,
@@ -21065,7 +57596,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4923,
@@ -21083,7 +57664,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4926,
@@ -21101,7 +57728,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4929,
@@ -21125,7 +57793,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4932,
@@ -21143,7 +57861,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4935,
@@ -21161,7 +57925,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4938,
@@ -21184,7 +57989,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4941,
@@ -21202,7 +58057,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0204"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ }
+ }
+ }
+ }
},
{
"address": 4944,
@@ -21220,7 +58121,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 4947,
@@ -21244,7 +58186,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 516,
+ "hex": "0x0204",
+ "width": 16,
+ "source": "MOV:I.W #H'0204, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 4950,
@@ -21265,7 +58257,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 4302,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5600,
@@ -21288,7 +58285,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5600,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5603,
@@ -21309,12 +58482,31 @@
{
"address": 63113,
"name": null,
+ "symbol": "ram_F689",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5600,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5607,
@@ -21337,7 +58529,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5600,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5609,
@@ -21358,12 +58555,45 @@
{
"address": 63118,
"name": null,
+ "symbol": "ram_F68E",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5609,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 5613,
@@ -21384,12 +58614,18 @@
{
"address": 59650,
"name": null,
+ "symbol": "mem_E902",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5609,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5617,
@@ -21407,7 +58643,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5609,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ }
+ }
+ ],
+ "notes": [
+ "R2 = 0x80"
+ ],
+ "known_after": {
+ "registers": {
+ "R2": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ }
+ }
+ }
+ }
},
{
"address": 5619,
@@ -21425,7 +58695,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5609,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 129,
+ "hex": "0x0081",
+ "width": 16,
+ "source": "MOV:I.W #H'0081, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x0081"
+ ],
+ "known_after": {
+ "registers": {
+ "R2": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ },
+ "R3": {
+ "known": true,
+ "value": 129,
+ "hex": "0x0081",
+ "width": 16,
+ "source": "MOV:I.W #H'0081, R3"
+ }
+ }
+ }
+ }
},
{
"address": 5622,
@@ -21448,7 +58759,189 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5609,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": true,
+ "value": 129,
+ "hex": "0x0081",
+ "width": 16,
+ "source": "MOV:I.W #H'0081, R3"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5625,
@@ -21469,12 +58962,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5625,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5629,
@@ -21497,7 +59009,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5625,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5631,
@@ -21518,12 +59035,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5631,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5635,
@@ -21546,7 +59082,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5631,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5637,
@@ -21570,7 +59111,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5637,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5640,
@@ -21592,12 +59309,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5640,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5644,
@@ -21619,7 +59355,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5640,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5646,
@@ -21642,7 +59383,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5649,
@@ -21663,12 +59580,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5649,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5653,
@@ -21691,7 +59627,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5649,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5655,
@@ -21715,7 +59656,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5655,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5658,
@@ -21737,12 +59854,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5658,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5662,
@@ -21764,12 +59900,18 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5658,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5666,
@@ -21791,7 +59933,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5658,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5668,
@@ -21814,7 +59961,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5668,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5671,
@@ -21835,12 +60158,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5671,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5675,
@@ -21863,7 +60205,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5671,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5677,
@@ -21887,7 +60234,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5677,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5680,
@@ -21909,12 +60432,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5680,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5684,
@@ -21936,7 +60478,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5680,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5686,
@@ -21959,7 +60506,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5686,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5689,
@@ -21980,12 +60703,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5689,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5693,
@@ -22006,12 +60748,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5693,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5697,
@@ -22034,7 +60795,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5693,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5699,
@@ -22055,12 +60821,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5699,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5703,
@@ -22083,7 +60868,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5699,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5705,
@@ -22107,7 +60897,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5705,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5708,
@@ -22129,12 +61095,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5708,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5712,
@@ -22156,7 +61141,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5708,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5714,
@@ -22179,7 +61169,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5714,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5717,
@@ -22200,12 +61366,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5717,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5721,
@@ -22228,7 +61413,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5717,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5723,
@@ -22252,7 +61442,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5723,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5726,
@@ -22274,12 +61640,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5726,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5730,
@@ -22301,7 +61686,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5726,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5732,
@@ -22324,7 +61714,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5732,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5735,
@@ -22345,12 +61911,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5735,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5739,
@@ -22373,7 +61958,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5735,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5741,
@@ -22397,7 +61987,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5741,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5744,
@@ -22419,12 +62185,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5744,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5748,
@@ -22446,7 +62231,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5744,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5750,
@@ -22469,7 +62259,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5750,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5753,
@@ -22490,12 +62456,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5753,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5757,
@@ -22518,7 +62503,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5753,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5759,
@@ -22542,7 +62532,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5759,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5762,
@@ -22564,12 +62730,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5762,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5766,
@@ -22591,12 +62776,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5766,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5770,
@@ -22618,7 +62822,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5766,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5772,
@@ -22640,12 +62849,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5772,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5776,
@@ -22667,7 +62895,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5772,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5778,
@@ -22690,7 +62923,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5778,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5781,
@@ -22711,12 +63120,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5781,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5785,
@@ -22739,7 +63167,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5781,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5787,
@@ -22763,7 +63196,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5787,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5790,
@@ -22785,12 +63394,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5790,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5794,
@@ -22812,7 +63440,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5790,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5796,
@@ -22835,7 +63468,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5796,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5799,
@@ -22856,12 +63665,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5799,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5803,
@@ -22884,7 +63712,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5799,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5805,
@@ -22908,7 +63741,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5805,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5808,
@@ -22930,12 +63939,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5808,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5812,
@@ -22957,7 +63985,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5808,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5814,
@@ -22980,7 +64013,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5814,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5817,
@@ -23001,12 +64210,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5817,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5821,
@@ -23029,7 +64257,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5817,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5823,
@@ -23053,7 +64286,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5823,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5826,
@@ -23075,12 +64484,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5826,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5830,
@@ -23102,7 +64530,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5826,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5832,
@@ -23125,7 +64558,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5832,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5835,
@@ -23146,12 +64755,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5835,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5839,
@@ -23174,7 +64802,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5835,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5841,
@@ -23198,7 +64831,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5841,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5844,
@@ -23220,12 +65029,31 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5844,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5848,
@@ -23247,7 +65075,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5844,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5850,
@@ -23269,12 +65102,31 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5850,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5854,
@@ -23296,12 +65148,18 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5850,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5858,
@@ -23323,12 +65181,18 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5850,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5862,
@@ -23350,12 +65214,18 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5850,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5866,
@@ -23377,7 +65247,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5850,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5868,
@@ -23400,7 +65275,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5868,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5871,
@@ -23421,12 +65472,31 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5871,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5875,
@@ -23449,7 +65519,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5871,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5877,
@@ -23473,7 +65548,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5877,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5880,
@@ -23495,12 +65746,31 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5880,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5884,
@@ -23522,12 +65792,18 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5880,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5888,
@@ -23549,12 +65825,18 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5880,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5892,
@@ -23575,7 +65857,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5892,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5893,
@@ -23596,12 +65883,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5893,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5898,
@@ -23623,7 +65929,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5893,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5900,
@@ -23645,12 +65956,31 @@
{
"address": 57678,
"name": null,
+ "symbol": "mem_E14E",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5900,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5904,
@@ -23672,7 +66002,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5900,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5906,
@@ -23694,12 +66029,31 @@
{
"address": 63280,
"name": null,
+ "symbol": "ram_F730",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5906,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5910,
@@ -23721,7 +66075,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5906,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5912,
@@ -23743,12 +66102,31 @@
{
"address": 64259,
"name": null,
+ "symbol": "ram_FB03",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5912,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5916,
@@ -23770,7 +66148,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5912,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5918,
@@ -23792,12 +66175,45 @@
{
"address": 63282,
"name": null,
+ "symbol": "ram_F732",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5918,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 5922,
@@ -23819,12 +66235,18 @@
{
"address": 63284,
"name": null,
+ "symbol": "ram_F734",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5918,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5926,
@@ -23846,12 +66268,31 @@
{
"address": 63282,
"name": null,
+ "symbol": "ram_F732",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5926,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5932,
@@ -23873,12 +66314,18 @@
{
"address": 64258,
"name": null,
+ "symbol": "ram_FB02",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5926,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5937,
@@ -23902,7 +66349,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5926,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5940,
@@ -23925,7 +66548,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5926,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5942,
@@ -23947,12 +66575,45 @@
{
"address": 63126,
"name": null,
+ "symbol": "ram_F696",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5942,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 5946,
@@ -23974,12 +66635,20 @@
{
"address": 63158,
"name": null,
+ "symbol": "ram_F6B6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5942,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 5950,
@@ -23997,7 +66666,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5942,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 169,
+ "hex": "0x00A9",
+ "width": 16,
+ "source": "MOV:I.W #H'00A9, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x00A9"
+ ],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 169,
+ "hex": "0x00A9",
+ "width": 16,
+ "source": "MOV:I.W #H'00A9, R3"
+ }
+ }
+ }
+ }
},
{
"address": 5953,
@@ -24021,7 +66724,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5942,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": true,
+ "value": 169,
+ "hex": "0x00A9",
+ "width": 16,
+ "source": "MOV:I.W #H'00A9, R3"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 5956,
@@ -24043,12 +66925,45 @@
{
"address": 63126,
"name": null,
+ "symbol": "ram_F696",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5956,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 5960,
@@ -24070,12 +66985,18 @@
{
"address": 63158,
"name": null,
+ "symbol": "ram_F6B6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5956,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5964,
@@ -24096,7 +67017,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5956,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5965,
@@ -24117,12 +67043,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5965,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5970,
@@ -24144,7 +67089,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5965,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5972,
@@ -24166,12 +67116,31 @@
{
"address": 63280,
"name": null,
+ "symbol": "ram_F730",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5972,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5976,
@@ -24193,7 +67162,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5972,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5978,
@@ -24215,12 +67189,31 @@
{
"address": 57710,
"name": null,
+ "symbol": "mem_E16E",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5978,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5982,
@@ -24242,7 +67235,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5978,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5984,
@@ -24264,12 +67262,31 @@
{
"address": 64259,
"name": null,
+ "symbol": "ram_FB03",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5984,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 5988,
@@ -24291,7 +67308,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5984,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5990,
@@ -24313,12 +67335,45 @@
{
"address": 63282,
"name": null,
+ "symbol": "ram_F732",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5990,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 5994,
@@ -24340,12 +67395,18 @@
{
"address": 63284,
"name": null,
+ "symbol": "ram_F734",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5990,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 5998,
@@ -24367,12 +67428,31 @@
{
"address": 63282,
"name": null,
+ "symbol": "ram_F732",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5998,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6004,
@@ -24394,12 +67474,18 @@
{
"address": 64258,
"name": null,
+ "symbol": "ram_FB02",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5998,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6009,
@@ -24423,7 +67509,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5998,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6012,
@@ -24446,7 +67708,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 5998,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6014,
@@ -24468,12 +67735,45 @@
{
"address": 63124,
"name": null,
+ "symbol": "ram_F694",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6014,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6018,
@@ -24495,12 +67795,20 @@
{
"address": 63156,
"name": null,
+ "symbol": "ram_F6B4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6014,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 6022,
@@ -24518,7 +67826,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6014,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 197,
+ "hex": "0x00C5",
+ "width": 16,
+ "source": "MOV:I.W #H'00C5, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x00C5"
+ ],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 197,
+ "hex": "0x00C5",
+ "width": 16,
+ "source": "MOV:I.W #H'00C5, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6025,
@@ -24542,7 +67884,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6014,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": true,
+ "value": 197,
+ "hex": "0x00C5",
+ "width": 16,
+ "source": "MOV:I.W #H'00C5, R3"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6028,
@@ -24564,12 +68085,45 @@
{
"address": 63124,
"name": null,
+ "symbol": "ram_F694",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6028,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6032,
@@ -24591,12 +68145,18 @@
{
"address": 63156,
"name": null,
+ "symbol": "ram_F6B4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6028,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6036,
@@ -24617,7 +68177,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6028,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6037,
@@ -24638,12 +68203,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6037,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6042,
@@ -24665,7 +68249,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6037,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6044,
@@ -24687,12 +68276,31 @@
{
"address": 57714,
"name": null,
+ "symbol": "mem_E172",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6044,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6048,
@@ -24714,7 +68322,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6044,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6050,
@@ -24737,7 +68350,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6050,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6053,
@@ -24761,7 +68550,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6050,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6055,
@@ -24782,12 +68576,31 @@
{
"address": 57888,
"name": null,
+ "symbol": "mem_E220",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6055,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6059,
@@ -24810,7 +68623,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6055,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6061,
@@ -24834,7 +68652,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6061,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6064,
@@ -24857,7 +68851,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6061,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6066,
@@ -24879,12 +68878,45 @@
{
"address": 63122,
"name": null,
+ "symbol": "ram_F692",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6066,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6070,
@@ -24906,12 +68938,20 @@
{
"address": 63154,
"name": null,
+ "symbol": "ram_F6B2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6066,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 6074,
@@ -24929,7 +68969,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6066,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 188,
+ "hex": "0x00BC",
+ "width": 16,
+ "source": "MOV:I.W #H'00BC, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x00BC"
+ ],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 188,
+ "hex": "0x00BC",
+ "width": 16,
+ "source": "MOV:I.W #H'00BC, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6077,
@@ -24953,7 +69027,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6066,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": true,
+ "value": 188,
+ "hex": "0x00BC",
+ "width": 16,
+ "source": "MOV:I.W #H'00BC, R3"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6080,
@@ -24975,12 +69228,45 @@
{
"address": 63122,
"name": null,
+ "symbol": "ram_F692",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6080,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6084,
@@ -25002,12 +69288,18 @@
{
"address": 63154,
"name": null,
+ "symbol": "ram_F6B2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6080,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6088,
@@ -25028,7 +69320,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6080,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6089,
@@ -25049,12 +69346,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6089,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6094,
@@ -25076,7 +69392,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6089,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6096,
@@ -25098,12 +69419,31 @@
{
"address": 57638,
"name": null,
+ "symbol": "mem_E126",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6096,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6100,
@@ -25125,7 +69465,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6096,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6102,
@@ -25147,12 +69492,45 @@
{
"address": 63150,
"name": null,
+ "symbol": "ram_F6AE",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6102,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6106,
@@ -25174,12 +69552,20 @@
{
"address": 63182,
"name": null,
+ "symbol": "ram_F6CE",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6102,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 6110,
@@ -25197,7 +69583,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6102,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 163,
+ "hex": "0x00A3",
+ "width": 16,
+ "source": "MOV:I.W #H'00A3, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x00A3"
+ ],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 163,
+ "hex": "0x00A3",
+ "width": 16,
+ "source": "MOV:I.W #H'00A3, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6113,
@@ -25218,12 +69638,29 @@
{
"address": 63377,
"name": null,
+ "symbol": "ram_F791",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6102,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 163,
+ "hex": "0x00A3",
+ "width": 16,
+ "source": "MOV:I.W #H'00A3, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6117,
@@ -25246,7 +69683,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6102,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 163,
+ "hex": "0x00A3",
+ "width": 16,
+ "source": "MOV:I.W #H'00A3, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6119,
@@ -25267,12 +69720,31 @@
{
"address": 62468,
"name": null,
+ "symbol": "mem_F404",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6119,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6123,
@@ -25295,7 +69767,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6119,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6125,
@@ -25314,7 +69791,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6125,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6127,
@@ -25338,7 +69847,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6127,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6130,
@@ -25360,12 +70045,45 @@
{
"address": 63150,
"name": null,
+ "symbol": "ram_F6AE",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6130,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6134,
@@ -25387,12 +70105,18 @@
{
"address": 63182,
"name": null,
+ "symbol": "ram_F6CE",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6130,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6138,
@@ -25413,7 +70137,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6130,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6139,
@@ -25434,12 +70163,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6139,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6144,
@@ -25461,7 +70209,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6139,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6146,
@@ -25483,12 +70236,31 @@
{
"address": 57638,
"name": null,
+ "symbol": "mem_E126",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6146,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6150,
@@ -25510,7 +70282,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6146,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6152,
@@ -25532,12 +70309,45 @@
{
"address": 63148,
"name": null,
+ "symbol": "ram_F6AC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6152,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6156,
@@ -25559,12 +70369,20 @@
{
"address": 63180,
"name": null,
+ "symbol": "ram_F6CC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6152,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 6160,
@@ -25582,7 +70400,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6152,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 164,
+ "hex": "0x00A4",
+ "width": 16,
+ "source": "MOV:I.W #H'00A4, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x00A4"
+ ],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 164,
+ "hex": "0x00A4",
+ "width": 16,
+ "source": "MOV:I.W #H'00A4, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6163,
@@ -25603,12 +70455,29 @@
{
"address": 63377,
"name": null,
+ "symbol": "ram_F791",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6152,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 164,
+ "hex": "0x00A4",
+ "width": 16,
+ "source": "MOV:I.W #H'00A4, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6167,
@@ -25631,7 +70500,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6152,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 164,
+ "hex": "0x00A4",
+ "width": 16,
+ "source": "MOV:I.W #H'00A4, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6169,
@@ -25652,12 +70537,31 @@
{
"address": 62468,
"name": null,
+ "symbol": "mem_F404",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6169,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6173,
@@ -25680,7 +70584,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6169,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6175,
@@ -25699,7 +70608,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6175,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6177,
@@ -25723,7 +70664,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6177,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6180,
@@ -25745,12 +70862,45 @@
{
"address": 63148,
"name": null,
+ "symbol": "ram_F6AC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6180,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6184,
@@ -25772,12 +70922,18 @@
{
"address": 63180,
"name": null,
+ "symbol": "ram_F6CC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6180,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6188,
@@ -25798,7 +70954,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6180,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6189,
@@ -25819,12 +70980,31 @@
{
"address": 63255,
"name": null,
+ "symbol": "ram_F717",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6189,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6193,
@@ -25847,7 +71027,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6189,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6195,
@@ -25868,12 +71053,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6195,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6200,
@@ -25895,7 +71099,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6195,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6202,
@@ -25917,12 +71126,31 @@
{
"address": 57638,
"name": null,
+ "symbol": "mem_E126",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6202,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6206,
@@ -25944,7 +71172,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6202,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6208,
@@ -25966,12 +71199,45 @@
{
"address": 63146,
"name": null,
+ "symbol": "ram_F6AA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6208,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6212,
@@ -25993,12 +71259,20 @@
{
"address": 63178,
"name": null,
+ "symbol": "ram_F6CA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6208,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 6216,
@@ -26016,7 +71290,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6208,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 165,
+ "hex": "0x00A5",
+ "width": 16,
+ "source": "MOV:I.W #H'00A5, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x00A5"
+ ],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 165,
+ "hex": "0x00A5",
+ "width": 16,
+ "source": "MOV:I.W #H'00A5, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6219,
@@ -26037,12 +71345,29 @@
{
"address": 63377,
"name": null,
+ "symbol": "ram_F791",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6208,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 165,
+ "hex": "0x00A5",
+ "width": 16,
+ "source": "MOV:I.W #H'00A5, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6223,
@@ -26065,7 +71390,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6208,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 165,
+ "hex": "0x00A5",
+ "width": 16,
+ "source": "MOV:I.W #H'00A5, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6225,
@@ -26086,12 +71427,31 @@
{
"address": 62468,
"name": null,
+ "symbol": "mem_F404",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6225,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6229,
@@ -26114,7 +71474,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6225,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6231,
@@ -26133,7 +71498,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6231,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6233,
@@ -26157,7 +71554,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6233,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6236,
@@ -26179,12 +71752,45 @@
{
"address": 63146,
"name": null,
+ "symbol": "ram_F6AA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6236,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6240,
@@ -26206,12 +71812,18 @@
{
"address": 63178,
"name": null,
+ "symbol": "ram_F6CA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6236,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6244,
@@ -26232,7 +71844,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6236,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6245,
@@ -26253,12 +71870,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6245,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6250,
@@ -26280,7 +71916,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6245,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6252,
@@ -26302,12 +71943,45 @@
{
"address": 63146,
"name": null,
+ "symbol": "ram_F6AA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6252,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6256,
@@ -26329,12 +72003,20 @@
{
"address": 63178,
"name": null,
+ "symbol": "ram_F6CA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6252,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 6260,
@@ -26352,7 +72034,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6252,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 216,
+ "hex": "0x00D8",
+ "width": 16,
+ "source": "MOV:I.W #H'00D8, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x00D8"
+ ],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 216,
+ "hex": "0x00D8",
+ "width": 16,
+ "source": "MOV:I.W #H'00D8, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6263,
@@ -26373,12 +72089,29 @@
{
"address": 63377,
"name": null,
+ "symbol": "ram_F791",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6252,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 216,
+ "hex": "0x00D8",
+ "width": 16,
+ "source": "MOV:I.W #H'00D8, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6267,
@@ -26401,7 +72134,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6252,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 216,
+ "hex": "0x00D8",
+ "width": 16,
+ "source": "MOV:I.W #H'00D8, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6269,
@@ -26422,12 +72171,31 @@
{
"address": 62468,
"name": null,
+ "symbol": "mem_F404",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6269,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6273,
@@ -26450,7 +72218,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6269,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6275,
@@ -26469,7 +72242,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6275,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6277,
@@ -26493,7 +72298,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6277,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6280,
@@ -26515,12 +72496,45 @@
{
"address": 63146,
"name": null,
+ "symbol": "ram_F6AA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6280,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6284,
@@ -26542,12 +72556,18 @@
{
"address": 63178,
"name": null,
+ "symbol": "ram_F6CA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6280,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6288,
@@ -26568,7 +72588,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6280,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6289,
@@ -26589,12 +72614,31 @@
{
"address": 63255,
"name": null,
+ "symbol": "ram_F717",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6289,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6293,
@@ -26617,7 +72661,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6289,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6295,
@@ -26638,12 +72687,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6295,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6300,
@@ -26665,7 +72733,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6295,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6302,
@@ -26687,12 +72760,31 @@
{
"address": 57638,
"name": null,
+ "symbol": "mem_E126",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6302,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6306,
@@ -26714,7 +72806,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6302,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6308,
@@ -26736,12 +72833,45 @@
{
"address": 63144,
"name": null,
+ "symbol": "ram_F6A8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6308,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6312,
@@ -26763,12 +72893,20 @@
{
"address": 63176,
"name": null,
+ "symbol": "ram_F6C8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6308,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 6316,
@@ -26786,7 +72924,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6308,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 128,
+ "hex": "0x0080",
+ "width": 16,
+ "source": "MOV:I.W #H'0080, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x0080"
+ ],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 128,
+ "hex": "0x0080",
+ "width": 16,
+ "source": "MOV:I.W #H'0080, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6319,
@@ -26810,7 +72982,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6308,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": true,
+ "value": 128,
+ "hex": "0x0080",
+ "width": 16,
+ "source": "MOV:I.W #H'0080, R3"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6322,
@@ -26832,12 +73183,45 @@
{
"address": 63144,
"name": null,
+ "symbol": "ram_F6A8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6322,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6326,
@@ -26859,12 +73243,18 @@
{
"address": 63176,
"name": null,
+ "symbol": "ram_F6C8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6322,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6330,
@@ -26885,7 +73275,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6322,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6331,
@@ -26906,12 +73301,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6331,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6336,
@@ -26933,7 +73347,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6331,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6338,
@@ -26955,12 +73374,45 @@
{
"address": 63144,
"name": null,
+ "symbol": "ram_F6A8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6338,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6342,
@@ -26982,12 +73434,20 @@
{
"address": 63176,
"name": null,
+ "symbol": "ram_F6C8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6338,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 6346,
@@ -27005,7 +73465,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6338,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 217,
+ "hex": "0x00D9",
+ "width": 16,
+ "source": "MOV:I.W #H'00D9, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x00D9"
+ ],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 217,
+ "hex": "0x00D9",
+ "width": 16,
+ "source": "MOV:I.W #H'00D9, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6349,
@@ -27026,12 +73520,29 @@
{
"address": 63377,
"name": null,
+ "symbol": "ram_F791",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6338,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 217,
+ "hex": "0x00D9",
+ "width": 16,
+ "source": "MOV:I.W #H'00D9, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6353,
@@ -27054,7 +73565,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6338,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 217,
+ "hex": "0x00D9",
+ "width": 16,
+ "source": "MOV:I.W #H'00D9, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6355,
@@ -27075,12 +73602,31 @@
{
"address": 62468,
"name": null,
+ "symbol": "mem_F404",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6355,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6359,
@@ -27103,7 +73649,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6355,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6361,
@@ -27122,7 +73673,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6361,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6363,
@@ -27146,7 +73729,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6363,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6366,
@@ -27168,12 +73927,45 @@
{
"address": 63144,
"name": null,
+ "symbol": "ram_F6A8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6366,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6370,
@@ -27195,12 +73987,18 @@
{
"address": 63176,
"name": null,
+ "symbol": "ram_F6C8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6366,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6374,
@@ -27221,7 +74019,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6366,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6375,
@@ -27242,12 +74045,31 @@
{
"address": 63255,
"name": null,
+ "symbol": "ram_F717",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6375,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6379,
@@ -27270,7 +74092,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6375,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6381,
@@ -27291,12 +74118,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6381,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6386,
@@ -27318,7 +74164,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6381,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6388,
@@ -27340,12 +74191,31 @@
{
"address": 57638,
"name": null,
+ "symbol": "mem_E126",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6388,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6392,
@@ -27367,7 +74237,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6388,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6394,
@@ -27389,12 +74264,45 @@
{
"address": 63142,
"name": null,
+ "symbol": "ram_F6A6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6394,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6398,
@@ -27416,12 +74324,20 @@
{
"address": 63174,
"name": null,
+ "symbol": "ram_F6C6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6394,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 6402,
@@ -27439,7 +74355,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6394,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 166,
+ "hex": "0x00A6",
+ "width": 16,
+ "source": "MOV:I.W #H'00A6, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x00A6"
+ ],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 166,
+ "hex": "0x00A6",
+ "width": 16,
+ "source": "MOV:I.W #H'00A6, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6405,
@@ -27460,12 +74410,29 @@
{
"address": 63377,
"name": null,
+ "symbol": "ram_F791",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6394,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 166,
+ "hex": "0x00A6",
+ "width": 16,
+ "source": "MOV:I.W #H'00A6, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6409,
@@ -27488,7 +74455,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6394,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 166,
+ "hex": "0x00A6",
+ "width": 16,
+ "source": "MOV:I.W #H'00A6, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6411,
@@ -27509,12 +74492,31 @@
{
"address": 62468,
"name": null,
+ "symbol": "mem_F404",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6411,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6415,
@@ -27537,7 +74539,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6411,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6417,
@@ -27556,7 +74563,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6417,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6419,
@@ -27580,7 +74619,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6419,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6422,
@@ -27602,12 +74817,45 @@
{
"address": 63142,
"name": null,
+ "symbol": "ram_F6A6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6422,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6426,
@@ -27629,12 +74877,18 @@
{
"address": 63174,
"name": null,
+ "symbol": "ram_F6C6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6422,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6430,
@@ -27655,7 +74909,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6422,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6431,
@@ -27676,12 +74935,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6431,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6436,
@@ -27703,7 +74981,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6431,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6438,
@@ -27725,12 +75008,45 @@
{
"address": 63142,
"name": null,
+ "symbol": "ram_F6A6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6438,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6442,
@@ -27752,12 +75068,20 @@
{
"address": 63174,
"name": null,
+ "symbol": "ram_F6C6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6438,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 6446,
@@ -27775,7 +75099,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6438,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 218,
+ "hex": "0x00DA",
+ "width": 16,
+ "source": "MOV:I.W #H'00DA, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x00DA"
+ ],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 218,
+ "hex": "0x00DA",
+ "width": 16,
+ "source": "MOV:I.W #H'00DA, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6449,
@@ -27796,12 +75154,29 @@
{
"address": 63377,
"name": null,
+ "symbol": "ram_F791",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6438,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 218,
+ "hex": "0x00DA",
+ "width": 16,
+ "source": "MOV:I.W #H'00DA, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6453,
@@ -27824,7 +75199,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6438,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 218,
+ "hex": "0x00DA",
+ "width": 16,
+ "source": "MOV:I.W #H'00DA, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6455,
@@ -27845,12 +75236,31 @@
{
"address": 62468,
"name": null,
+ "symbol": "mem_F404",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6455,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6459,
@@ -27873,7 +75283,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6455,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6461,
@@ -27892,7 +75307,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6461,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6463,
@@ -27916,7 +75363,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6463,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6465,
@@ -27937,12 +75560,45 @@
{
"address": 63142,
"name": null,
+ "symbol": "ram_F6A6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6465,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6469,
@@ -27963,12 +75619,18 @@
{
"address": 63174,
"name": null,
+ "symbol": "ram_F6C6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6465,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6473,
@@ -27990,7 +75652,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6465,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6474,
@@ -28012,12 +75679,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6474,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6479,
@@ -28040,7 +75726,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6474,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6481,
@@ -28061,12 +75752,45 @@
{
"address": 63140,
"name": null,
+ "symbol": "ram_F6A4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6481,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6485,
@@ -28087,12 +75811,20 @@
{
"address": 63172,
"name": null,
+ "symbol": "ram_F6C4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6481,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 6489,
@@ -28113,12 +75845,18 @@
{
"address": 65166,
"name": "P7DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6481,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6493,
@@ -28141,7 +75879,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6481,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6495,
@@ -28159,7 +75902,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6495,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 128,
+ "hex": "0x0080",
+ "width": 16,
+ "source": "MOV:I.W #H'0080, R3"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x0080"
+ ],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 128,
+ "hex": "0x0080",
+ "width": 16,
+ "source": "MOV:I.W #H'0080, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6498,
@@ -28181,12 +75970,29 @@
{
"address": 63377,
"name": null,
+ "symbol": "ram_F791",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6495,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 128,
+ "hex": "0x0080",
+ "width": 16,
+ "source": "MOV:I.W #H'0080, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6502,
@@ -28208,7 +76014,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6495,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 128,
+ "hex": "0x0080",
+ "width": 16,
+ "source": "MOV:I.W #H'0080, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6504,
@@ -28227,7 +76049,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6504,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6506,
@@ -28250,7 +76104,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6506,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6508,
@@ -28272,12 +76302,31 @@
{
"address": 63341,
"name": null,
+ "symbol": "ram_F76D",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6506,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6512,
@@ -28299,12 +76348,45 @@
{
"address": 63140,
"name": null,
+ "symbol": "ram_F6A4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6512,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6516,
@@ -28326,12 +76408,18 @@
{
"address": 63172,
"name": null,
+ "symbol": "ram_F6C4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6512,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6520,
@@ -28352,7 +76440,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6512,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6521,
@@ -28373,12 +76466,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6521,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6526,
@@ -28400,7 +76512,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6521,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6528,
@@ -28422,12 +76539,45 @@
{
"address": 63138,
"name": null,
+ "symbol": "ram_F6A2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6528,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 6532,
@@ -28449,12 +76599,20 @@
{
"address": 63170,
"name": null,
+ "symbol": "ram_F6C2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6528,
+ "changes": [],
+ "notes": [
+ "R0 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 6536,
@@ -28476,12 +76634,33 @@
{
"address": 63116,
"name": null,
+ "symbol": "ram_F68C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6528,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:MULXU.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6540,
@@ -28499,7 +76678,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6528,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 129,
+ "hex": "0x0081",
+ "width": 16,
+ "source": "MOV:I.W #H'0081, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x0081"
+ ],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 129,
+ "hex": "0x0081",
+ "width": 16,
+ "source": "MOV:I.W #H'0081, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6543,
@@ -28520,12 +76733,29 @@
{
"address": 63377,
"name": null,
+ "symbol": "ram_F791",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6528,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 129,
+ "hex": "0x0081",
+ "width": 16,
+ "source": "MOV:I.W #H'0081, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6547,
@@ -28548,7 +76778,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6528,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R3": {
+ "known": true,
+ "value": 129,
+ "hex": "0x0081",
+ "width": 16,
+ "source": "MOV:I.W #H'0081, R3"
+ }
+ }
+ }
+ }
},
{
"address": 6549,
@@ -28567,7 +76813,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6549,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6551,
@@ -28591,7 +76869,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6551,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6553,
@@ -28612,12 +77066,45 @@
{
"address": 63138,
"name": null,
+ "symbol": "ram_F6A2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6553,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6557,
@@ -28638,12 +77125,18 @@
{
"address": 63170,
"name": null,
+ "symbol": "ram_F6C2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6553,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6561,
@@ -28665,7 +77158,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6553,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6562,
@@ -28684,7 +77182,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6562,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R5 unknown after MOV source"
+ ]
+ }
},
{
"address": 6564,
@@ -28703,7 +77233,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6562,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6568,
@@ -28722,7 +77272,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6562,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6570,
@@ -28742,7 +77312,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6562,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 6574,
@@ -28760,7 +77350,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6562,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6577,
@@ -28783,7 +77378,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6562,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6579,
@@ -28801,7 +77401,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6579,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 65024,
+ "hex": "0xFE00",
+ "width": 16,
+ "source": "MOV:I.W #H'FE00, R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0xFE00"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 65024,
+ "hex": "0xFE00",
+ "width": 16,
+ "source": "MOV:I.W #H'FE00, R0"
+ }
+ }
+ }
+ }
},
{
"address": 6582,
@@ -28820,7 +77466,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6582,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:NOT.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6584,
@@ -28839,7 +77517,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6582,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:NOT.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 6586,
@@ -28857,7 +77555,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6582,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6589,
@@ -28880,7 +77583,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6582,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6591,
@@ -28898,7 +77606,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6591,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6594,
@@ -28920,7 +77646,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6591,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6596,
@@ -28938,7 +77669,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6596,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6599,
@@ -28961,7 +77710,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6596,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6601,
@@ -28979,7 +77733,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6601,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 26,
+ "hex": "0x001A",
+ "width": 16,
+ "source": "MOV:I.W #H'001A, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x001A"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 26,
+ "hex": "0x001A",
+ "width": 16,
+ "source": "MOV:I.W #H'001A, R4"
+ }
+ }
+ }
+ }
},
{
"address": 6604,
@@ -29002,7 +77802,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6601,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 26,
+ "hex": "0x001A",
+ "width": 16,
+ "source": "MOV:I.W #H'001A, R4"
+ }
+ }
+ }
+ }
},
{
"address": 6606,
@@ -29020,7 +77836,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6606,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 65308,
+ "hex": "0xFF1C",
+ "width": 16,
+ "source": "MOV:I.W #H'FF1C, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0xFF1C"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 65308,
+ "hex": "0xFF1C",
+ "width": 16,
+ "source": "MOV:I.W #H'FF1C, R4"
+ }
+ }
+ }
+ }
},
{
"address": 6609,
@@ -29044,7 +77906,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6606,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 65308,
+ "hex": "0xFF1C",
+ "width": 16,
+ "source": "MOV:I.W #H'FF1C, R4"
+ }
+ }
+ }
+ }
},
{
"address": 6611,
@@ -29063,7 +77941,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6611,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6615,
@@ -29082,7 +77992,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6615,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:MULXU.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6617,
@@ -29106,7 +78048,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6615,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6619,
@@ -29125,7 +78072,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6619,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R5 unknown after MOV source"
+ ]
+ }
},
{
"address": 6621,
@@ -29144,7 +78123,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6619,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6625,
@@ -29163,7 +78162,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6619,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6627,
@@ -29182,7 +78201,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6627,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 6631,
@@ -29201,7 +78252,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6627,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after arithmetic"
+ ]
+ }
},
{
"address": 6633,
@@ -29220,7 +78291,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6627,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R2 unknown after MOV source"
+ ]
+ }
},
{
"address": 6635,
@@ -29243,7 +78334,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6627,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6637,
@@ -29262,7 +78358,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6637,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R2 unknown after arithmetic"
+ ]
+ }
},
{
"address": 6639,
@@ -29280,7 +78408,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6637,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6642,
@@ -29302,7 +78435,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6637,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6644,
@@ -29320,7 +78458,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6644,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R1"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 = 0x0000"
+ ],
+ "known_after": {
+ "registers": {
+ "R1": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R1"
+ }
+ }
+ }
+ }
},
{
"address": 6647,
@@ -29344,7 +78528,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6644,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R1": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R1"
+ }
+ }
+ }
+ }
},
{
"address": 6649,
@@ -29363,7 +78563,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6649,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 6651,
@@ -29381,7 +78613,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6649,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6654,
@@ -29403,7 +78640,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6649,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6656,
@@ -29421,7 +78663,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6656,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 65535,
+ "hex": "0xFFFF",
+ "width": 16,
+ "source": "MOV:I.W #H'FFFF, R1"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 = 0xFFFF"
+ ],
+ "known_after": {
+ "registers": {
+ "R1": {
+ "known": true,
+ "value": 65535,
+ "hex": "0xFFFF",
+ "width": 16,
+ "source": "MOV:I.W #H'FFFF, R1"
+ }
+ }
+ }
+ }
},
{
"address": 6659,
@@ -29440,7 +78728,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6659,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6663,
@@ -29463,7 +78769,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6659,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6665,
@@ -29482,7 +78793,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6665,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6669,
@@ -29500,7 +78829,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6665,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ }
+ }
+ ],
+ "notes": [
+ "R2 = 0x80"
+ ],
+ "known_after": {
+ "registers": {
+ "R2": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ }
+ }
+ }
+ }
},
{
"address": 6671,
@@ -29519,7 +78882,38 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6665,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R3 unknown after MOV source"
+ ],
+ "known_after": {
+ "registers": {
+ "R2": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ }
+ }
+ }
+ }
},
{
"address": 6673,
@@ -29543,7 +78937,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6665,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6676,
@@ -29564,7 +79137,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6676,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6709,
@@ -29583,7 +79161,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6709,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R5 unknown after MOV source"
+ ]
+ }
},
{
"address": 6711,
@@ -29602,7 +79212,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6709,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6715,
@@ -29621,7 +79251,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6709,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6717,
@@ -29640,7 +79290,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6709,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 6721,
@@ -29663,7 +79333,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6709,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6723,
@@ -29687,7 +79362,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6723,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6725,
@@ -29706,7 +79557,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6725,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6727,
@@ -29729,7 +79598,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6725,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6729,
@@ -29748,7 +79622,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6729,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R2 unknown after MOV source"
+ ]
+ }
},
{
"address": 6731,
@@ -29767,7 +79673,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6731,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 6735,
@@ -29786,7 +79724,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6731,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLR.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6737,
@@ -29809,7 +79767,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6731,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6739,
@@ -29828,7 +79791,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6739,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 6741,
@@ -29851,7 +79846,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6739,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6743,
@@ -29875,7 +79875,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6743,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6745,
@@ -29894,7 +79899,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6745,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R2 unknown after MOV source"
+ ]
+ }
},
{
"address": 6747,
@@ -29913,7 +79950,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6747,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 6751,
@@ -29932,7 +80001,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6747,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6753,
@@ -29955,7 +80044,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6747,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6755,
@@ -29974,7 +80068,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6755,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 6757,
@@ -29997,7 +80123,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6755,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6759,
@@ -30021,7 +80152,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6759,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6761,
@@ -30040,7 +80176,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6761,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after MOV source"
+ ]
+ }
},
{
"address": 6763,
@@ -30059,7 +80227,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6763,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6767,
@@ -30082,7 +80268,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6763,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6769,
@@ -30101,7 +80292,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6769,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6773,
@@ -30119,7 +80328,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6769,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ }
+ }
+ ],
+ "notes": [
+ "R2 = 0x80"
+ ],
+ "known_after": {
+ "registers": {
+ "R2": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ }
+ }
+ }
+ }
},
{
"address": 6775,
@@ -30138,7 +80381,38 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6769,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R3 unknown after MOV source"
+ ],
+ "known_after": {
+ "registers": {
+ "R2": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ }
+ }
+ }
+ }
},
{
"address": 6777,
@@ -30162,7 +80436,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6769,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6780,
@@ -30183,7 +80636,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6780,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6781,
@@ -30202,7 +80660,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6781,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6783,
@@ -30221,7 +80711,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6783,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after MOV source"
+ ]
+ }
},
{
"address": 6785,
@@ -30240,7 +80762,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6783,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 6789,
@@ -30263,7 +80805,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6783,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6791,
@@ -30282,7 +80829,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6791,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6793,
@@ -30306,7 +80885,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6791,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6795,
@@ -30330,7 +80914,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6795,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6797,
@@ -30348,7 +80937,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6797,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 15,
+ "hex": "0x000F",
+ "width": 16,
+ "source": "MOV:I.W #H'000F, R1"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 = 0x000F"
+ ],
+ "known_after": {
+ "registers": {
+ "R1": {
+ "known": true,
+ "value": 15,
+ "hex": "0x000F",
+ "width": 16,
+ "source": "MOV:I.W #H'000F, R1"
+ }
+ }
+ }
+ }
},
{
"address": 6800,
@@ -30367,7 +81002,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6800,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6802,
@@ -30389,7 +81042,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6800,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6804,
@@ -30412,7 +81070,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6804,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6807,
@@ -30431,7 +81094,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6807,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 cleared"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R0"
+ }
+ }
+ }
+ }
},
{
"address": 6809,
@@ -30450,7 +81159,30 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6807,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R0"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6811,
@@ -30472,7 +81204,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6807,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6812,
@@ -30491,7 +81228,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6812,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6814,
@@ -30513,7 +81268,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6812,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6816,
@@ -30532,7 +81292,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6816,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 6818,
@@ -30554,12 +81346,33 @@
{
"address": 63283,
"name": null,
+ "symbol": "ram_F733",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6816,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 6822,
@@ -30578,7 +81391,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6816,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:NOT.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6824,
@@ -30597,7 +81430,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6816,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:NOT.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6827,
@@ -30616,7 +81469,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6816,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6829,
@@ -30639,7 +81497,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6816,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6831,
@@ -30658,7 +81521,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6831,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 6833,
@@ -30677,7 +81572,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6831,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6836,
@@ -30697,7 +81612,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6831,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6840,
@@ -30719,7 +81639,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6831,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6842,
@@ -30742,7 +81667,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6842,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6844,
@@ -30761,7 +81691,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6844,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 6846,
@@ -30780,7 +81742,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6844,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6849,
@@ -30799,7 +81781,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6844,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6853,
@@ -30822,7 +81809,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6844,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6855,
@@ -30841,7 +81833,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6855,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:NOT.B"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6857,
@@ -30860,7 +81884,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6855,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:NOT.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6860,
@@ -30882,12 +81926,18 @@
{
"address": 63283,
"name": null,
+ "symbol": "ram_F733",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6855,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6864,
@@ -30910,7 +81960,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6855,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6866,
@@ -30929,7 +81984,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6866,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6868,
@@ -30951,7 +82024,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6866,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6870,
@@ -30973,12 +82051,31 @@
{
"address": 63283,
"name": null,
+ "symbol": "ram_F733",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6870,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6874,
@@ -31001,7 +82098,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6870,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6876,
@@ -31023,12 +82125,31 @@
{
"address": 63283,
"name": null,
+ "symbol": "ram_F733",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6876,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6880,
@@ -31051,7 +82172,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6880,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6883,
@@ -31073,7 +82370,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6880,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6884,
@@ -31095,12 +82397,45 @@
{
"address": 63323,
"name": null,
+ "symbol": "ram_F75B",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6884,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 6888,
@@ -31119,7 +82454,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6884,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 6890,
@@ -31139,7 +82494,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6884,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 6894,
@@ -31158,7 +82533,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6884,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6896,
@@ -31180,7 +82560,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6884,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6898,
@@ -31199,7 +82584,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6898,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after arithmetic"
+ ]
+ }
},
{
"address": 6900,
@@ -31217,7 +82634,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6898,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6902,
@@ -31239,7 +82661,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6898,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6904,
@@ -31257,7 +82684,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6904,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x00",
+ "width": 8,
+ "source": "MOV:E.B #H'00, R1"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 = 0x00"
+ ],
+ "known_after": {
+ "registers": {
+ "R1": {
+ "known": true,
+ "value": 0,
+ "hex": "0x00",
+ "width": 8,
+ "source": "MOV:E.B #H'00, R1"
+ }
+ }
+ }
+ }
},
{
"address": 6906,
@@ -31280,7 +82753,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6904,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R1": {
+ "known": true,
+ "value": 0,
+ "hex": "0x00",
+ "width": 8,
+ "source": "MOV:E.B #H'00, R1"
+ }
+ }
+ }
+ }
},
{
"address": 6908,
@@ -31299,7 +82788,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6908,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after arithmetic"
+ ]
+ }
},
{
"address": 6911,
@@ -31322,7 +82843,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6908,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6913,
@@ -31340,7 +82866,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 46,
+ "hex": "0x2E",
+ "width": 8,
+ "source": "MOV:E.B #H'2E, R1"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 = 0x2E"
+ ],
+ "known_after": {
+ "registers": {
+ "R1": {
+ "known": true,
+ "value": 46,
+ "hex": "0x2E",
+ "width": 8,
+ "source": "MOV:E.B #H'2E, R1"
+ }
+ }
+ }
+ }
},
{
"address": 6915,
@@ -31359,7 +82931,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6915,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6919,
@@ -31383,7 +82973,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6915,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6922,
@@ -31404,7 +83170,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6915,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6923,
@@ -31425,12 +83196,45 @@
{
"address": 63323,
"name": null,
+ "symbol": "ram_F75B",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6923,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 6927,
@@ -31449,7 +83253,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6923,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6929,
@@ -31472,7 +83281,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6923,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6931,
@@ -31491,7 +83305,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6931,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 6933,
@@ -31509,7 +83355,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6931,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6935,
@@ -31532,7 +83383,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6931,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6937,
@@ -31550,7 +83406,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6937,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 8,
+ "hex": "0x08",
+ "width": 8,
+ "source": "MOV:E.B #H'08, R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x08"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 8,
+ "hex": "0x08",
+ "width": 8,
+ "source": "MOV:E.B #H'08, R0"
+ }
+ }
+ }
+ }
},
{
"address": 6939,
@@ -31574,7 +83476,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6937,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 8,
+ "hex": "0x08",
+ "width": 8,
+ "source": "MOV:E.B #H'08, R0"
+ }
+ }
+ }
+ }
},
{
"address": 6941,
@@ -31593,7 +83511,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6941,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 6943,
@@ -31611,7 +83561,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6941,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6945,
@@ -31634,7 +83589,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6941,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6947,
@@ -31652,7 +83612,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6947,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 1,
+ "hex": "0x01",
+ "width": 8,
+ "source": "MOV:E.B #H'01, R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x01"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 1,
+ "hex": "0x01",
+ "width": 8,
+ "source": "MOV:E.B #H'01, R0"
+ }
+ }
+ }
+ }
},
{
"address": 6949,
@@ -31673,12 +83679,31 @@
{
"address": 63323,
"name": null,
+ "symbol": "ram_F75B",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6949,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 6953,
@@ -31702,7 +83727,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6949,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6956,
@@ -31723,7 +83924,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6949,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6957,
@@ -31744,12 +83950,45 @@
{
"address": 63191,
"name": null,
+ "symbol": "ram_F6D7",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6957,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6961,
@@ -31770,12 +84009,33 @@
{
"address": 63207,
"name": null,
+ "symbol": "ram_F6E7",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6957,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 6965,
@@ -31793,7 +84053,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6957,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 126,
+ "hex": "0x007E",
+ "width": 16,
+ "source": "MOV:I.W #H'007E, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x007E"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 126,
+ "hex": "0x007E",
+ "width": 16,
+ "source": "MOV:I.W #H'007E, R5"
+ }
+ }
+ }
+ }
},
{
"address": 6968,
@@ -31816,7 +84110,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6957,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 126,
+ "hex": "0x007E",
+ "width": 16,
+ "source": "MOV:I.W #H'007E, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6971,
@@ -31837,12 +84310,45 @@
{
"address": 63191,
"name": null,
+ "symbol": "ram_F6D7",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6957,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6975,
@@ -31863,12 +84369,18 @@
{
"address": 63207,
"name": null,
+ "symbol": "ram_F6E7",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6957,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6979,
@@ -31890,7 +84402,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6957,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 6980,
@@ -31912,12 +84429,45 @@
{
"address": 63190,
"name": null,
+ "symbol": "ram_F6D6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6980,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6984,
@@ -31939,12 +84489,33 @@
{
"address": 63206,
"name": null,
+ "symbol": "ram_F6E6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6980,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 6988,
@@ -31962,7 +84533,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6980,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 110,
+ "hex": "0x006E",
+ "width": 16,
+ "source": "MOV:I.W #H'006E, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x006E"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 110,
+ "hex": "0x006E",
+ "width": 16,
+ "source": "MOV:I.W #H'006E, R5"
+ }
+ }
+ }
+ }
},
{
"address": 6991,
@@ -31986,7 +84591,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6980,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 110,
+ "hex": "0x006E",
+ "width": 16,
+ "source": "MOV:I.W #H'006E, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 6994,
@@ -32008,12 +84792,45 @@
{
"address": 63190,
"name": null,
+ "symbol": "ram_F6D6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6980,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 6998,
@@ -32035,12 +84852,18 @@
{
"address": 63206,
"name": null,
+ "symbol": "ram_F6E6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6980,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7002,
@@ -32061,7 +84884,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 6980,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7003,
@@ -32082,12 +84910,45 @@
{
"address": 63189,
"name": null,
+ "symbol": "ram_F6D5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7003,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7007,
@@ -32108,12 +84969,33 @@
{
"address": 63205,
"name": null,
+ "symbol": "ram_F6E5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7003,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 7011,
@@ -32131,7 +85013,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7003,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 94,
+ "hex": "0x005E",
+ "width": 16,
+ "source": "MOV:I.W #H'005E, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x005E"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 94,
+ "hex": "0x005E",
+ "width": 16,
+ "source": "MOV:I.W #H'005E, R5"
+ }
+ }
+ }
+ }
},
{
"address": 7014,
@@ -32154,7 +85070,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7003,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 94,
+ "hex": "0x005E",
+ "width": 16,
+ "source": "MOV:I.W #H'005E, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 7017,
@@ -32175,12 +85270,45 @@
{
"address": 63189,
"name": null,
+ "symbol": "ram_F6D5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7003,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7021,
@@ -32201,12 +85329,18 @@
{
"address": 63205,
"name": null,
+ "symbol": "ram_F6E5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7003,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7025,
@@ -32228,7 +85362,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7003,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7026,
@@ -32250,12 +85389,45 @@
{
"address": 63185,
"name": null,
+ "symbol": "ram_F6D1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7026,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7030,
@@ -32277,12 +85449,33 @@
{
"address": 63201,
"name": null,
+ "symbol": "ram_F6E1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7026,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 7034,
@@ -32300,7 +85493,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7026,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 30,
+ "hex": "0x001E",
+ "width": 16,
+ "source": "MOV:I.W #H'001E, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x001E"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 30,
+ "hex": "0x001E",
+ "width": 16,
+ "source": "MOV:I.W #H'001E, R5"
+ }
+ }
+ }
+ }
},
{
"address": 7037,
@@ -32324,7 +85551,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7026,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 30,
+ "hex": "0x001E",
+ "width": 16,
+ "source": "MOV:I.W #H'001E, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 7040,
@@ -32346,12 +85752,45 @@
{
"address": 63185,
"name": null,
+ "symbol": "ram_F6D1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7026,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7044,
@@ -32373,12 +85812,18 @@
{
"address": 63201,
"name": null,
+ "symbol": "ram_F6E1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7026,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7048,
@@ -32399,7 +85844,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7026,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7049,
@@ -32420,12 +85870,45 @@
{
"address": 63184,
"name": null,
+ "symbol": "ram_F6D0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7049,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7053,
@@ -32446,12 +85929,33 @@
{
"address": 63200,
"name": null,
+ "symbol": "ram_F6E0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7049,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 7057,
@@ -32469,7 +85973,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7049,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 14,
+ "hex": "0x000E",
+ "width": 16,
+ "source": "MOV:I.W #H'000E, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x000E"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 14,
+ "hex": "0x000E",
+ "width": 16,
+ "source": "MOV:I.W #H'000E, R5"
+ }
+ }
+ }
+ }
},
{
"address": 7060,
@@ -32492,7 +86030,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7049,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 14,
+ "hex": "0x000E",
+ "width": 16,
+ "source": "MOV:I.W #H'000E, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 7063,
@@ -32513,12 +86230,45 @@
{
"address": 63184,
"name": null,
+ "symbol": "ram_F6D0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7049,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7067,
@@ -32539,12 +86289,18 @@
{
"address": 63200,
"name": null,
+ "symbol": "ram_F6E0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7049,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7071,
@@ -32566,7 +86322,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7049,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7072,
@@ -32588,12 +86349,45 @@
{
"address": 63188,
"name": null,
+ "symbol": "ram_F6D4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7072,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7076,
@@ -32615,12 +86409,33 @@
{
"address": 63204,
"name": null,
+ "symbol": "ram_F6E4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7072,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 7080,
@@ -32638,7 +86453,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7072,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 78,
+ "hex": "0x004E",
+ "width": 16,
+ "source": "MOV:I.W #H'004E, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x004E"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 78,
+ "hex": "0x004E",
+ "width": 16,
+ "source": "MOV:I.W #H'004E, R5"
+ }
+ }
+ }
+ }
},
{
"address": 7083,
@@ -32662,7 +86511,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7072,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 78,
+ "hex": "0x004E",
+ "width": 16,
+ "source": "MOV:I.W #H'004E, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 7085,
@@ -32683,12 +86711,45 @@
{
"address": 63188,
"name": null,
+ "symbol": "ram_F6D4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7072,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7089,
@@ -32709,12 +86770,18 @@
{
"address": 63204,
"name": null,
+ "symbol": "ram_F6E4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7072,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7093,
@@ -32736,7 +86803,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7072,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7094,
@@ -32758,12 +86830,45 @@
{
"address": 63187,
"name": null,
+ "symbol": "ram_F6D3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7094,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7098,
@@ -32785,12 +86890,33 @@
{
"address": 63203,
"name": null,
+ "symbol": "ram_F6E3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7094,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 7102,
@@ -32808,7 +86934,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7094,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 62,
+ "hex": "0x003E",
+ "width": 16,
+ "source": "MOV:I.W #H'003E, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x003E"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 62,
+ "hex": "0x003E",
+ "width": 16,
+ "source": "MOV:I.W #H'003E, R5"
+ }
+ }
+ }
+ }
},
{
"address": 7105,
@@ -32832,7 +86992,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7094,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 62,
+ "hex": "0x003E",
+ "width": 16,
+ "source": "MOV:I.W #H'003E, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 7107,
@@ -32853,12 +87192,45 @@
{
"address": 63187,
"name": null,
+ "symbol": "ram_F6D3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7094,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7111,
@@ -32879,12 +87251,18 @@
{
"address": 63203,
"name": null,
+ "symbol": "ram_F6E3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7094,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7115,
@@ -32906,7 +87284,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7094,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7116,
@@ -32928,12 +87311,45 @@
{
"address": 63186,
"name": null,
+ "symbol": "ram_F6D2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7116,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7120,
@@ -32955,12 +87371,33 @@
{
"address": 63202,
"name": null,
+ "symbol": "ram_F6E2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7116,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 7124,
@@ -32978,7 +87415,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7116,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 46,
+ "hex": "0x002E",
+ "width": 16,
+ "source": "MOV:I.W #H'002E, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x002E"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 46,
+ "hex": "0x002E",
+ "width": 16,
+ "source": "MOV:I.W #H'002E, R5"
+ }
+ }
+ }
+ }
},
{
"address": 7127,
@@ -33002,7 +87473,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7116,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 46,
+ "hex": "0x002E",
+ "width": 16,
+ "source": "MOV:I.W #H'002E, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 7129,
@@ -33023,12 +87673,45 @@
{
"address": 63186,
"name": null,
+ "symbol": "ram_F6D2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7116,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7133,
@@ -33049,12 +87732,18 @@
{
"address": 63202,
"name": null,
+ "symbol": "ram_F6E2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7116,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7137,
@@ -33076,7 +87765,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7116,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7138,
@@ -33098,12 +87792,45 @@
{
"address": 63196,
"name": null,
+ "symbol": "ram_F6DC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7138,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7142,
@@ -33125,12 +87852,33 @@
{
"address": 63212,
"name": null,
+ "symbol": "ram_F6EC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7138,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 7146,
@@ -33148,7 +87896,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7138,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 206,
+ "hex": "0x00CE",
+ "width": 16,
+ "source": "MOV:I.W #H'00CE, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x00CE"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 206,
+ "hex": "0x00CE",
+ "width": 16,
+ "source": "MOV:I.W #H'00CE, R5"
+ }
+ }
+ }
+ }
},
{
"address": 7149,
@@ -33172,7 +87954,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7138,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 206,
+ "hex": "0x00CE",
+ "width": 16,
+ "source": "MOV:I.W #H'00CE, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 7151,
@@ -33193,12 +88154,45 @@
{
"address": 63196,
"name": null,
+ "symbol": "ram_F6DC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7138,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7155,
@@ -33219,12 +88213,18 @@
{
"address": 63212,
"name": null,
+ "symbol": "ram_F6EC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7138,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7159,
@@ -33246,7 +88246,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7138,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7160,
@@ -33268,12 +88273,45 @@
{
"address": 63195,
"name": null,
+ "symbol": "ram_F6DB",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7160,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7164,
@@ -33295,12 +88333,33 @@
{
"address": 63211,
"name": null,
+ "symbol": "ram_F6EB",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7160,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 7168,
@@ -33318,7 +88377,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7160,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 190,
+ "hex": "0x00BE",
+ "width": 16,
+ "source": "MOV:I.W #H'00BE, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x00BE"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 190,
+ "hex": "0x00BE",
+ "width": 16,
+ "source": "MOV:I.W #H'00BE, R5"
+ }
+ }
+ }
+ }
},
{
"address": 7171,
@@ -33342,7 +88435,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7160,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 190,
+ "hex": "0x00BE",
+ "width": 16,
+ "source": "MOV:I.W #H'00BE, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 7173,
@@ -33363,12 +88635,45 @@
{
"address": 63195,
"name": null,
+ "symbol": "ram_F6DB",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7160,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 7177,
@@ -33389,12 +88694,18 @@
{
"address": 63211,
"name": null,
+ "symbol": "ram_F6EB",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7160,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7181,
@@ -33416,7 +88727,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7160,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7182,
@@ -33435,7 +88751,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7182,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.B"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 7184,
@@ -33457,7 +88805,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7182,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7186,
@@ -33477,7 +88830,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7186,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 7190,
@@ -33496,7 +88881,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7186,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7192,
@@ -33517,7 +88907,191 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "indirect_flow": {
+ "address": 7192,
+ "instruction": "JSR @R0",
+ "kind": "call",
+ "target_register": "R0",
+ "confidence": "unknown",
+ "summary": "JSR @R0 uses R0; target not resolved"
+ },
+ "dataflow": {
+ "block": 7186,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 7194,
@@ -33536,7 +89110,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7186,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4, R5"
+ ]
+ }
},
{
"address": 7196,
@@ -33555,7 +89161,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7196,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 7198,
@@ -33577,7 +89201,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7196,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7200,
@@ -33596,7 +89225,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7200,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R5 unknown after arithmetic"
+ ]
+ }
},
{
"address": 7202,
@@ -33619,7 +89280,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7200,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 7204,
@@ -33640,7 +89306,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 7204,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 8487,
@@ -33661,12 +89332,31 @@
{
"address": 64259,
"name": null,
+ "symbol": "ram_FB03",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 8487,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 8491,
@@ -33689,7 +89379,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 8487,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 8493,
@@ -33710,12 +89405,45 @@
{
"address": 63282,
"name": null,
+ "symbol": "ram_F732",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 8493,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 8497,
@@ -33736,12 +89464,18 @@
{
"address": 63284,
"name": null,
+ "symbol": "ram_F734",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 8493,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 8501,
@@ -33762,12 +89496,31 @@
{
"address": 63282,
"name": null,
+ "symbol": "ram_F732",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 8501,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 8507,
@@ -33789,12 +89542,18 @@
{
"address": 64258,
"name": null,
+ "symbol": "ram_FB02",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 8501,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 8512,
@@ -33817,7 +89576,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 8501,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 8515,
@@ -33839,7 +89774,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 8501,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 9808,
@@ -33861,12 +89801,31 @@
{
"address": 63222,
"name": null,
+ "symbol": "ram_F6F6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9808,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 9812,
@@ -33888,7 +89847,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9808,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 9815,
@@ -33909,12 +89873,45 @@
{
"address": 57636,
"name": null,
+ "symbol": "mem_E124",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9815,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 9819,
@@ -33933,7 +89930,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9815,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 9821,
@@ -33952,7 +89969,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9815,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 9823,
@@ -33973,12 +90010,18 @@
{
"address": 63222,
"name": null,
+ "symbol": "ram_F6F6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9815,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 9827,
@@ -34001,7 +90044,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9815,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 9829,
@@ -34020,7 +90068,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9829,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 9831,
@@ -34043,7 +90123,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9829,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 9833,
@@ -34061,7 +90146,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9833,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 255,
+ "hex": "0xFF",
+ "width": 8,
+ "source": "MOV:E.B #H'FF, R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0xFF"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 255,
+ "hex": "0xFF",
+ "width": 8,
+ "source": "MOV:E.B #H'FF, R0"
+ }
+ }
+ }
+ }
},
{
"address": 9835,
@@ -34085,7 +90216,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9833,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 255,
+ "hex": "0xFF",
+ "width": 8,
+ "source": "MOV:E.B #H'FF, R0"
+ }
+ }
+ }
+ }
},
{
"address": 9837,
@@ -34104,7 +90251,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9837,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 9839,
@@ -34125,12 +90304,18 @@
{
"address": 57348,
"name": null,
+ "symbol": "mem_E004",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9837,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 9843,
@@ -34153,7 +90338,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9837,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 9845,
@@ -34171,7 +90361,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9845,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 9847,
@@ -34194,7 +90402,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9845,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 9849,
@@ -34212,7 +90425,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9849,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 73,
+ "hex": "0x49",
+ "width": 8,
+ "source": "MOV:E.B #H'49, R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x49"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 73,
+ "hex": "0x49",
+ "width": 8,
+ "source": "MOV:E.B #H'49, R0"
+ }
+ }
+ }
+ }
},
{
"address": 9851,
@@ -34236,7 +90495,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9849,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 73,
+ "hex": "0x49",
+ "width": 8,
+ "source": "MOV:E.B #H'49, R0"
+ }
+ }
+ }
+ }
},
{
"address": 9853,
@@ -34254,7 +90529,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9853,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 9855,
@@ -34277,7 +90570,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9853,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 9857,
@@ -34295,7 +90593,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9857,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 22,
+ "hex": "0x16",
+ "width": 8,
+ "source": "MOV:E.B #H'16, R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x16"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 22,
+ "hex": "0x16",
+ "width": 8,
+ "source": "MOV:E.B #H'16, R0"
+ }
+ }
+ }
+ }
},
{
"address": 9859,
@@ -34314,7 +90658,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9859,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 9861,
@@ -34333,7 +90709,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9859,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 9863,
@@ -34352,7 +90748,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9859,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLR.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 9865,
@@ -34371,7 +90787,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9859,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SHLR.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 9867,
@@ -34392,12 +90828,18 @@
{
"address": 57636,
"name": null,
+ "symbol": "mem_E124",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9859,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 9871,
@@ -34420,7 +90862,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9859,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 9873,
@@ -34441,12 +90888,31 @@
{
"address": 59684,
"name": null,
+ "symbol": "mem_E924",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9873,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 9877,
@@ -34464,7 +90930,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9873,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ }
+ }
+ ],
+ "notes": [
+ "R2 = 0x80"
+ ],
+ "known_after": {
+ "registers": {
+ "R2": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ }
+ }
+ }
+ }
},
{
"address": 9879,
@@ -34482,7 +90982,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9873,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 146,
+ "hex": "0x0092",
+ "width": 16,
+ "source": "MOV:I.W #H'0092, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x0092"
+ ],
+ "known_after": {
+ "registers": {
+ "R2": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ },
+ "R3": {
+ "known": true,
+ "value": 146,
+ "hex": "0x0092",
+ "width": 16,
+ "source": "MOV:I.W #H'0092, R3"
+ }
+ }
+ }
+ }
},
{
"address": 9882,
@@ -34504,12 +91045,36 @@
{
"address": 63377,
"name": null,
+ "symbol": "ram_F791",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9873,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R2": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ },
+ "R3": {
+ "known": true,
+ "value": 146,
+ "hex": "0x0092",
+ "width": 16,
+ "source": "MOV:I.W #H'0092, R3"
+ }
+ }
+ }
+ }
},
{
"address": 9886,
@@ -34531,7 +91096,30 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9873,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R2": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ },
+ "R3": {
+ "known": true,
+ "value": 146,
+ "hex": "0x0092",
+ "width": 16,
+ "source": "MOV:I.W #H'0092, R3"
+ }
+ }
+ }
+ }
},
{
"address": 9888,
@@ -34553,12 +91141,31 @@
{
"address": 62468,
"name": null,
+ "symbol": "mem_F404",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9888,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 9892,
@@ -34580,7 +91187,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9888,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 9894,
@@ -34599,7 +91211,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9894,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 9896,
@@ -34622,7 +91266,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9896,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 9899,
@@ -34643,12 +91463,31 @@
{
"address": 63222,
"name": null,
+ "symbol": "ram_F6F6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9896,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 9903,
@@ -34671,7 +91510,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9896,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 9905,
@@ -34692,12 +91536,31 @@
{
"address": 63220,
"name": null,
+ "symbol": "ram_F6F4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9905,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 9911,
@@ -34721,7 +91584,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9905,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 9913,
@@ -34742,12 +91610,31 @@
{
"address": 63220,
"name": null,
+ "symbol": "ram_F6F4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9913,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 9919,
@@ -34769,7 +91656,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 9919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10246,
@@ -34791,12 +91683,45 @@
{
"address": 63929,
"name": null,
+ "symbol": "ram_F9B9",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10246,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 10250,
@@ -34815,7 +91740,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10246,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 10252,
@@ -34837,12 +91782,18 @@
{
"address": 63924,
"name": null,
+ "symbol": "ram_F9B4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10246,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10256,
@@ -34864,7 +91815,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10246,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10258,
@@ -34887,7 +91843,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10258,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10261,
@@ -34906,7 +91867,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10261,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after MOV source"
+ ]
+ }
},
{
"address": 10263,
@@ -34925,7 +91918,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10261,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 10265,
@@ -34944,7 +91957,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10261,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 10269,
@@ -34963,7 +91996,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10261,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after arithmetic"
+ ]
+ }
},
{
"address": 10271,
@@ -34982,7 +92035,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10261,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 10274,
@@ -35004,12 +92077,18 @@
{
"address": 63929,
"name": null,
+ "symbol": "ram_F9B9",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10261,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10278,
@@ -35028,7 +92107,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10261,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 10282,
@@ -35047,7 +92146,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10261,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R5 unknown after MOV source"
+ ]
+ }
},
{
"address": 10284,
@@ -35070,7 +92189,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10261,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 10287,
@@ -35089,7 +92384,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10261,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after MOV source"
+ ]
+ }
},
{
"address": 10289,
@@ -35108,7 +92435,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10261,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 10291,
@@ -35127,7 +92474,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10261,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10293,
@@ -35150,7 +92502,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10261,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10295,
@@ -35171,12 +92528,45 @@
{
"address": 63286,
"name": null,
+ "symbol": "ram_F736",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10295,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 10299,
@@ -35195,7 +92585,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10295,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 10303,
@@ -35214,7 +92624,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10295,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10305,
@@ -35237,7 +92652,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10295,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10308,
@@ -35259,12 +92679,45 @@
{
"address": 63288,
"name": null,
+ "symbol": "ram_F738",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10308,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 10312,
@@ -35283,7 +92736,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10308,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 10316,
@@ -35302,7 +92775,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10308,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10318,
@@ -35324,7 +92802,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10308,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10321,
@@ -35345,12 +92828,45 @@
{
"address": 63290,
"name": null,
+ "symbol": "ram_F73A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10321,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 10325,
@@ -35369,7 +92885,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10321,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 10329,
@@ -35388,7 +92924,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10321,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10331,
@@ -35411,7 +92952,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10321,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10334,
@@ -35433,12 +92979,45 @@
{
"address": 63292,
"name": null,
+ "symbol": "ram_F73C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10334,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 10338,
@@ -35457,7 +93036,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10334,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 10342,
@@ -35476,7 +93075,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10334,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10344,
@@ -35498,7 +93102,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10334,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10347,
@@ -35519,12 +93128,45 @@
{
"address": 63294,
"name": null,
+ "symbol": "ram_F73E",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10347,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 10351,
@@ -35543,7 +93185,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10347,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 10355,
@@ -35562,7 +93224,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10347,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10357,
@@ -35585,7 +93252,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10347,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10360,
@@ -35607,12 +93279,45 @@
{
"address": 63296,
"name": null,
+ "symbol": "ram_F740",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10360,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 10364,
@@ -35631,7 +93336,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10360,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 10368,
@@ -35650,7 +93375,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10360,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10370,
@@ -35672,7 +93402,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10360,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10373,
@@ -35693,12 +93428,45 @@
{
"address": 63298,
"name": null,
+ "symbol": "ram_F742",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10373,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 10377,
@@ -35717,7 +93485,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10373,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 10381,
@@ -35736,7 +93524,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10373,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10383,
@@ -35759,7 +93552,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10373,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10386,
@@ -35781,12 +93579,45 @@
{
"address": 63316,
"name": null,
+ "symbol": "ram_F754",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10386,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 10390,
@@ -35805,7 +93636,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10386,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 10394,
@@ -35824,7 +93675,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10386,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10396,
@@ -35846,7 +93702,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10386,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 10399,
@@ -35865,7 +93726,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 10399,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 10403,
@@ -35885,7 +93778,1227 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "indirect_flow": {
+ "address": 10403,
+ "instruction": "JMP @R1",
+ "kind": "jump",
+ "target_register": "R1",
+ "confidence": "table_load",
+ "table": {
+ "base": 10406,
+ "index_register": "R4",
+ "target_register": "R1",
+ "load_address": 10399,
+ "load_instruction": "MOV:G.W @(H'28A6,R4), R1",
+ "entry_size": 2,
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+ "decoded_target_count": 103,
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+ "index": 0,
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+ },
+ {
+ "index": 108,
+ "entry_address": 10622,
+ "target": 12207,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 109,
+ "entry_address": 10624,
+ "target": 12309,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 110,
+ "entry_address": 10626,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 111,
+ "entry_address": 10628,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 112,
+ "entry_address": 10630,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 113,
+ "entry_address": 10632,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 114,
+ "entry_address": 10634,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 115,
+ "entry_address": 10636,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 116,
+ "entry_address": 10638,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 117,
+ "entry_address": 10640,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 118,
+ "entry_address": 10642,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 119,
+ "entry_address": 10644,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 120,
+ "entry_address": 10646,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 121,
+ "entry_address": 10648,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 122,
+ "entry_address": 10650,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 123,
+ "entry_address": 10652,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 124,
+ "entry_address": 10654,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 125,
+ "entry_address": 10656,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 126,
+ "entry_address": 10658,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ },
+ {
+ "index": 127,
+ "entry_address": 10660,
+ "target": 11430,
+ "target_label": "loc_2CA6",
+ "target_region": "program_or_external",
+ "decoded_code": true
+ }
+ ]
+ },
+ "summary": "JMP @R1 uses R1 loaded from pointer table H'28A6 via R4 (103/128 decoded targets)"
+ },
+ "dataflow": {
+ "block": 10399,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "indirect_jump"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "indirect_jump"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "indirect_jump"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "indirect_jump"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "indirect_jump"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "indirect_jump"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "indirect_jump"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "indirect_jump"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "indirect_jump"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "indirect_jump"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "indirect_jump"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "indirect_jump"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "indirect_jump"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "indirect_jump"
+ }
+ }
+ ],
+ "notes": [
+ "indirect jump ends known register state"
+ ]
+ }
},
{
"address": 11430,
@@ -35907,12 +95020,31 @@
{
"address": 63337,
"name": null,
+ "symbol": "ram_F769",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 11430,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 11434,
@@ -35933,7 +95065,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 11430,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 11435,
@@ -35952,7 +95089,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 11435,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 11437,
@@ -35976,7 +95118,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 11435,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 11440,
@@ -35995,7 +95313,51 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 11435,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0, R4, R5"
+ ]
+ }
},
{
"address": 11442,
@@ -36017,12 +95379,31 @@
{
"address": 63337,
"name": null,
+ "symbol": "ram_F769",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 11435,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 11446,
@@ -36045,7 +95426,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 11435,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14640,
@@ -36063,7 +95449,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14640,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 7,
+ "hex": "0x0007",
+ "width": 16,
+ "source": "MOV:I.W #H'0007, R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x0007"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 7,
+ "hex": "0x0007",
+ "width": 16,
+ "source": "MOV:I.W #H'0007, R0"
+ }
+ }
+ }
+ }
},
{
"address": 14643,
@@ -36084,12 +95516,31 @@
{
"address": 65166,
"name": "P7DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14643,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14647,
@@ -36112,7 +95563,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14643,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14649,
@@ -36131,7 +95587,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14649,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14653,
@@ -36150,7 +95624,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14649,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14657,
@@ -36174,7 +95653,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14649,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14659,
@@ -36193,7 +95677,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14659,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14663,
@@ -36212,7 +95714,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14663,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14668,
@@ -36234,7 +95754,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14663,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14670,
@@ -36256,12 +95781,31 @@
{
"address": 63112,
"name": null,
+ "symbol": "ram_F688",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14670,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14674,
@@ -36284,7 +95828,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14670,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14676,
@@ -36304,7 +95853,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14676,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14681,
@@ -36327,7 +95894,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14676,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14683,
@@ -36348,12 +95920,31 @@
{
"address": 63112,
"name": null,
+ "symbol": "ram_F688",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14683,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14687,
@@ -36376,7 +95967,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14687,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14690,
@@ -36398,12 +95994,31 @@
{
"address": 63266,
"name": null,
+ "symbol": "ram_F722",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14690,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14694,
@@ -36425,12 +96040,18 @@
{
"address": 63266,
"name": null,
+ "symbol": "ram_F722",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14690,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14699,
@@ -36453,7 +96074,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14690,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14701,
@@ -36474,12 +96100,31 @@
{
"address": 63266,
"name": null,
+ "symbol": "ram_F722",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14701,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14706,
@@ -36501,7 +96146,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14701,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14708,
@@ -36523,12 +96173,31 @@
{
"address": 63266,
"name": null,
+ "symbol": "ram_F722",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14708,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14713,
@@ -36551,7 +96220,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14708,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14715,
@@ -36573,7 +96247,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14715,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14716,
@@ -36596,7 +96275,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14716,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 14718,
@@ -36617,7 +96472,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14716,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14719,
@@ -36641,7 +96501,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14719,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 14722,
@@ -36662,7 +96698,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14719,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14723,
@@ -36686,7 +96727,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14723,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 14725,
@@ -36707,12 +96924,31 @@
{
"address": 63266,
"name": null,
+ "symbol": "ram_F722",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14723,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14729,
@@ -36734,7 +96970,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14723,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14730,
@@ -36756,12 +96997,31 @@
{
"address": 65256,
"name": "ADCSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14730,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14734,
@@ -36783,7 +97043,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14730,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14736,
@@ -36805,12 +97070,31 @@
{
"address": 65256,
"name": "ADCSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set ADST (bit 5) of ADCSR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14736,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14740,
@@ -36831,7 +97115,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14740,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14741,
@@ -36852,12 +97141,31 @@
{
"address": 63264,
"name": null,
+ "symbol": "ram_F720",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14741,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14745,
@@ -36880,7 +97188,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14741,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14748,
@@ -36902,12 +97215,31 @@
{
"address": 61697,
"name": null,
+ "symbol": "mem_F101",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14748,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14753,
@@ -36928,12 +97260,18 @@
{
"address": 61696,
"name": null,
+ "symbol": "mem_F100",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14748,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14757,
@@ -36956,7 +97294,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14748,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14760,
@@ -36978,12 +97321,45 @@
{
"address": 63259,
"name": null,
+ "symbol": "ram_F71B",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14764,
@@ -37005,12 +97381,33 @@
{
"address": 63267,
"name": null,
+ "symbol": "ram_F723",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14768,
@@ -37032,12 +97429,33 @@
{
"address": 63251,
"name": null,
+ "symbol": "ram_F713",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14772,
@@ -37059,12 +97477,18 @@
{
"address": 61698,
"name": null,
+ "symbol": "mem_F102",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14776,
@@ -37086,12 +97510,33 @@
{
"address": 63258,
"name": null,
+ "symbol": "ram_F71A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14780,
@@ -37113,12 +97558,33 @@
{
"address": 63267,
"name": null,
+ "symbol": "ram_F723",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14784,
@@ -37140,12 +97606,33 @@
{
"address": 63250,
"name": null,
+ "symbol": "ram_F712",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14788,
@@ -37167,12 +97654,18 @@
{
"address": 61699,
"name": null,
+ "symbol": "mem_F103",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14792,
@@ -37194,12 +97687,33 @@
{
"address": 63257,
"name": null,
+ "symbol": "ram_F719",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14796,
@@ -37221,12 +97735,33 @@
{
"address": 63267,
"name": null,
+ "symbol": "ram_F723",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14800,
@@ -37248,12 +97783,33 @@
{
"address": 63249,
"name": null,
+ "symbol": "ram_F711",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14804,
@@ -37275,12 +97831,18 @@
{
"address": 61700,
"name": null,
+ "symbol": "mem_F104",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14808,
@@ -37302,12 +97864,33 @@
{
"address": 63256,
"name": null,
+ "symbol": "ram_F718",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14812,
@@ -37329,12 +97912,33 @@
{
"address": 63267,
"name": null,
+ "symbol": "ram_F723",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14816,
@@ -37356,12 +97960,33 @@
{
"address": 63248,
"name": null,
+ "symbol": "ram_F710",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14820,
@@ -37383,12 +98008,18 @@
{
"address": 61701,
"name": null,
+ "symbol": "mem_F105",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14824,
@@ -37410,12 +98041,33 @@
{
"address": 63234,
"name": null,
+ "symbol": "ram_F702",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14828,
@@ -37437,12 +98089,18 @@
{
"address": 61705,
"name": null,
+ "symbol": "mem_F109",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14832,
@@ -37464,12 +98122,20 @@
{
"address": 63235,
"name": null,
+ "symbol": "ram_F703",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14836,
@@ -37491,12 +98157,18 @@
{
"address": 61706,
"name": null,
+ "symbol": "mem_F10A",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14840,
@@ -37518,12 +98190,20 @@
{
"address": 63236,
"name": null,
+ "symbol": "ram_F704",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14844,
@@ -37545,12 +98225,18 @@
{
"address": 61707,
"name": null,
+ "symbol": "mem_F10B",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14848,
@@ -37572,12 +98258,20 @@
{
"address": 63237,
"name": null,
+ "symbol": "ram_F705",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14852,
@@ -37599,12 +98293,18 @@
{
"address": 61708,
"name": null,
+ "symbol": "mem_F10C",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14856,
@@ -37626,12 +98326,20 @@
{
"address": 63232,
"name": null,
+ "symbol": "ram_F700",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14860,
@@ -37653,12 +98361,18 @@
{
"address": 61709,
"name": null,
+ "symbol": "mem_F10D",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14864,
@@ -37680,12 +98394,20 @@
{
"address": 63233,
"name": null,
+ "symbol": "ram_F701",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14868,
@@ -37707,12 +98429,18 @@
{
"address": 61710,
"name": null,
+ "symbol": "mem_F10E",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14872,
@@ -37734,12 +98462,20 @@
{
"address": 65166,
"name": "P7DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14876,
@@ -37758,7 +98494,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:NOT.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14878,
@@ -37777,7 +98533,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:NOT.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14881,
@@ -37796,7 +98572,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14884,
@@ -37818,12 +98614,18 @@
{
"address": 61711,
"name": null,
+ "symbol": "mem_F10F",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14888,
@@ -37845,12 +98647,18 @@
{
"address": 63264,
"name": null,
+ "symbol": "ram_F720",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14760,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14893,
@@ -37872,7 +98680,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14893,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14894,
@@ -37894,12 +98707,31 @@
{
"address": 63265,
"name": null,
+ "symbol": "ram_F721",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14894,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14898,
@@ -37921,7 +98753,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14894,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14901,
@@ -37943,12 +98780,31 @@
{
"address": 61441,
"name": null,
+ "symbol": "mem_F001",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14901,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 14906,
@@ -37970,12 +98826,18 @@
{
"address": 61440,
"name": null,
+ "symbol": "mem_F000",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14901,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14910,
@@ -37997,7 +98859,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14901,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14913,
@@ -38018,12 +98885,45 @@
{
"address": 63263,
"name": null,
+ "symbol": "ram_F71F",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14917,
@@ -38044,12 +98944,33 @@
{
"address": 63267,
"name": null,
+ "symbol": "ram_F723",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14921,
@@ -38070,12 +98991,33 @@
{
"address": 63255,
"name": null,
+ "symbol": "ram_F717",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14925,
@@ -38096,12 +99038,18 @@
{
"address": 61442,
"name": null,
+ "symbol": "mem_F002",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14929,
@@ -38122,12 +99070,33 @@
{
"address": 63262,
"name": null,
+ "symbol": "ram_F71E",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14933,
@@ -38148,12 +99117,33 @@
{
"address": 63267,
"name": null,
+ "symbol": "ram_F723",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14937,
@@ -38174,12 +99164,33 @@
{
"address": 63254,
"name": null,
+ "symbol": "ram_F716",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14941,
@@ -38200,12 +99211,18 @@
{
"address": 61443,
"name": null,
+ "symbol": "mem_F003",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14945,
@@ -38226,12 +99243,33 @@
{
"address": 63261,
"name": null,
+ "symbol": "ram_F71D",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14949,
@@ -38252,12 +99290,33 @@
{
"address": 63267,
"name": null,
+ "symbol": "ram_F723",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14953,
@@ -38278,12 +99337,33 @@
{
"address": 63253,
"name": null,
+ "symbol": "ram_F715",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14957,
@@ -38304,12 +99384,18 @@
{
"address": 61444,
"name": null,
+ "symbol": "mem_F004",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14961,
@@ -38330,12 +99416,33 @@
{
"address": 63260,
"name": null,
+ "symbol": "ram_F71C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14965,
@@ -38356,12 +99463,33 @@
{
"address": 63267,
"name": null,
+ "symbol": "ram_F723",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14969,
@@ -38382,12 +99510,33 @@
{
"address": 63252,
"name": null,
+ "symbol": "ram_F714",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 14973,
@@ -38408,12 +99557,18 @@
{
"address": 61445,
"name": null,
+ "symbol": "mem_F005",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14977,
@@ -38434,12 +99589,33 @@
{
"address": 63240,
"name": null,
+ "symbol": "ram_F708",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14981,
@@ -38460,12 +99636,18 @@
{
"address": 61449,
"name": null,
+ "symbol": "mem_F009",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14985,
@@ -38486,12 +99668,20 @@
{
"address": 63241,
"name": null,
+ "symbol": "ram_F709",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14989,
@@ -38512,12 +99702,18 @@
{
"address": 61450,
"name": null,
+ "symbol": "mem_F00A",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 14993,
@@ -38538,12 +99734,20 @@
{
"address": 63242,
"name": null,
+ "symbol": "ram_F70A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 14997,
@@ -38564,12 +99768,18 @@
{
"address": 61451,
"name": null,
+ "symbol": "mem_F00B",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15001,
@@ -38590,12 +99800,20 @@
{
"address": 63243,
"name": null,
+ "symbol": "ram_F70B",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15005,
@@ -38616,12 +99834,18 @@
{
"address": 61452,
"name": null,
+ "symbol": "mem_F00C",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15009,
@@ -38642,12 +99866,20 @@
{
"address": 63238,
"name": null,
+ "symbol": "ram_F706",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15013,
@@ -38668,12 +99900,18 @@
{
"address": 61453,
"name": null,
+ "symbol": "mem_F00D",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15017,
@@ -38694,12 +99932,20 @@
{
"address": 63239,
"name": null,
+ "symbol": "ram_F707",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15021,
@@ -38720,12 +99966,18 @@
{
"address": 61454,
"name": null,
+ "symbol": "mem_F00E",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15025,
@@ -38746,12 +99998,20 @@
{
"address": 65166,
"name": "P7DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15029,
@@ -38770,7 +100030,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:NOT.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15031,
@@ -38789,7 +100069,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:NOT.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15034,
@@ -38808,7 +100108,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15037,
@@ -38829,12 +100149,18 @@
{
"address": 61455,
"name": null,
+ "symbol": "mem_F00F",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15041,
@@ -38856,12 +100182,18 @@
{
"address": 63265,
"name": null,
+ "symbol": "ram_F721",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 14913,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15046,
@@ -38882,7 +100214,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15046,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15047,
@@ -38901,7 +100238,37 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15047,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "addressing_side_effect"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15049,
@@ -38922,12 +100289,18 @@
{
"address": 61696,
"name": null,
+ "symbol": "mem_F100",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15047,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15053,
@@ -38950,7 +100323,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15047,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15056,
@@ -38972,12 +100350,45 @@
{
"address": 61711,
"name": null,
+ "symbol": "mem_F10F",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15056,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15060,
@@ -38995,7 +100406,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15056,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15062,
@@ -39017,7 +100433,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15056,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15064,
@@ -39035,7 +100456,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15064,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15066,
@@ -39057,7 +100496,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15064,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15069,
@@ -39081,7 +100525,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15069,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15072,
@@ -39103,12 +100552,45 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15072,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15076,
@@ -39127,7 +100609,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15072,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15079,
@@ -39148,12 +100650,18 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15072,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15083,
@@ -39174,12 +100682,33 @@
{
"address": 61708,
"name": null,
+ "symbol": "mem_F10C",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15072,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15087,
@@ -39200,12 +100729,18 @@
{
"address": 63130,
"name": null,
+ "symbol": "ram_F69A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15072,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15091,
@@ -39228,7 +100763,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15072,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15093,
@@ -39249,12 +100789,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15093,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15097,
@@ -39275,12 +100834,18 @@
{
"address": 63130,
"name": null,
+ "symbol": "ram_F69A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15093,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15101,
@@ -39301,12 +100866,45 @@
{
"address": 61706,
"name": null,
+ "symbol": "mem_F10A",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15101,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15105,
@@ -39327,12 +100925,18 @@
{
"address": 63128,
"name": null,
+ "symbol": "ram_F698",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15101,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15109,
@@ -39355,7 +100959,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15101,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15111,
@@ -39376,12 +100985,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15111,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15115,
@@ -39402,12 +101030,18 @@
{
"address": 63128,
"name": null,
+ "symbol": "ram_F698",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15111,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15119,
@@ -39428,12 +101062,45 @@
{
"address": 61704,
"name": null,
+ "symbol": "mem_F108",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15119,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15123,
@@ -39454,12 +101121,18 @@
{
"address": 63126,
"name": null,
+ "symbol": "ram_F696",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15119,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15127,
@@ -39482,7 +101155,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15119,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15129,
@@ -39503,12 +101181,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15129,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15133,
@@ -39529,12 +101226,18 @@
{
"address": 63126,
"name": null,
+ "symbol": "ram_F696",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15129,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15137,
@@ -39555,12 +101258,45 @@
{
"address": 61702,
"name": null,
+ "symbol": "mem_F106",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15137,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15141,
@@ -39581,12 +101317,18 @@
{
"address": 63124,
"name": null,
+ "symbol": "ram_F694",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15137,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15145,
@@ -39609,7 +101351,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15137,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15147,
@@ -39630,12 +101377,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15147,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15151,
@@ -39656,12 +101422,18 @@
{
"address": 63124,
"name": null,
+ "symbol": "ram_F694",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15147,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15155,
@@ -39682,12 +101454,45 @@
{
"address": 61700,
"name": null,
+ "symbol": "mem_F104",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15155,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15159,
@@ -39708,12 +101513,18 @@
{
"address": 63122,
"name": null,
+ "symbol": "ram_F692",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15155,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15163,
@@ -39736,7 +101547,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15155,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15165,
@@ -39757,12 +101573,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15165,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15169,
@@ -39783,12 +101618,18 @@
{
"address": 63122,
"name": null,
+ "symbol": "ram_F692",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15165,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15173,
@@ -39809,12 +101650,45 @@
{
"address": 61698,
"name": null,
+ "symbol": "mem_F102",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15173,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15177,
@@ -39835,12 +101709,18 @@
{
"address": 63120,
"name": null,
+ "symbol": "ram_F690",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15173,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15181,
@@ -39863,7 +101743,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15173,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15183,
@@ -39884,12 +101769,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15183,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15187,
@@ -39910,12 +101814,18 @@
{
"address": 63120,
"name": null,
+ "symbol": "ram_F690",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15183,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15191,
@@ -39936,12 +101846,45 @@
{
"address": 61697,
"name": null,
+ "symbol": "mem_F101",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15191,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15195,
@@ -39962,12 +101905,18 @@
{
"address": 63264,
"name": null,
+ "symbol": "ram_F720",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15191,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15199,
@@ -39991,7 +101940,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15191,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15202,
@@ -40013,12 +101967,45 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15202,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15206,
@@ -40037,7 +102024,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15202,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15209,
@@ -40058,12 +102065,18 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15202,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15213,
@@ -40084,12 +102097,18 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15202,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15217,
@@ -40110,12 +102129,33 @@
{
"address": 61708,
"name": null,
+ "symbol": "mem_F10C",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15202,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15221,
@@ -40136,12 +102176,18 @@
{
"address": 63134,
"name": null,
+ "symbol": "ram_F69E",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15202,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15225,
@@ -40164,7 +102210,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15202,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15227,
@@ -40185,12 +102236,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15227,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15231,
@@ -40211,12 +102281,18 @@
{
"address": 63134,
"name": null,
+ "symbol": "ram_F69E",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15227,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15235,
@@ -40237,12 +102313,45 @@
{
"address": 61706,
"name": null,
+ "symbol": "mem_F10A",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15235,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15239,
@@ -40263,12 +102372,18 @@
{
"address": 63132,
"name": null,
+ "symbol": "ram_F69C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15235,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15243,
@@ -40291,7 +102406,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15235,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15245,
@@ -40312,12 +102432,31 @@
{
"address": 63216,
"name": null,
+ "symbol": "ram_F6F0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15245,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15249,
@@ -40338,12 +102477,18 @@
{
"address": 63132,
"name": null,
+ "symbol": "ram_F69C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15245,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15253,
@@ -40364,12 +102509,45 @@
{
"address": 61705,
"name": null,
+ "symbol": "mem_F109",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15253,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15257,
@@ -40390,12 +102568,18 @@
{
"address": 63184,
"name": null,
+ "symbol": "ram_F6D0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15253,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15261,
@@ -40418,7 +102602,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15253,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15263,
@@ -40439,12 +102628,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15263,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15267,
@@ -40465,12 +102673,18 @@
{
"address": 63184,
"name": null,
+ "symbol": "ram_F6D0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15263,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15271,
@@ -40491,12 +102705,45 @@
{
"address": 61704,
"name": null,
+ "symbol": "mem_F108",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15271,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15275,
@@ -40517,12 +102764,18 @@
{
"address": 63185,
"name": null,
+ "symbol": "ram_F6D1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15271,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15279,
@@ -40545,7 +102798,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15271,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15281,
@@ -40566,12 +102824,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15281,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15285,
@@ -40592,12 +102869,18 @@
{
"address": 63185,
"name": null,
+ "symbol": "ram_F6D1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15281,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15289,
@@ -40618,12 +102901,45 @@
{
"address": 61703,
"name": null,
+ "symbol": "mem_F107",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15289,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15293,
@@ -40644,12 +102960,18 @@
{
"address": 63186,
"name": null,
+ "symbol": "ram_F6D2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15289,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15297,
@@ -40672,7 +102994,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15289,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15299,
@@ -40693,12 +103020,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15299,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15303,
@@ -40719,12 +103065,18 @@
{
"address": 63186,
"name": null,
+ "symbol": "ram_F6D2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15299,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15307,
@@ -40745,12 +103097,45 @@
{
"address": 61702,
"name": null,
+ "symbol": "mem_F106",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15307,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15311,
@@ -40771,12 +103156,18 @@
{
"address": 63187,
"name": null,
+ "symbol": "ram_F6D3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15307,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15315,
@@ -40799,7 +103190,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15307,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15317,
@@ -40820,12 +103216,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15317,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15321,
@@ -40846,12 +103261,18 @@
{
"address": 63187,
"name": null,
+ "symbol": "ram_F6D3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15317,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15325,
@@ -40872,12 +103293,45 @@
{
"address": 61701,
"name": null,
+ "symbol": "mem_F105",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15325,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15329,
@@ -40898,12 +103352,18 @@
{
"address": 63188,
"name": null,
+ "symbol": "ram_F6D4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15325,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15333,
@@ -40926,7 +103386,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15325,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15335,
@@ -40947,12 +103412,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15335,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15339,
@@ -40973,12 +103457,18 @@
{
"address": 63188,
"name": null,
+ "symbol": "ram_F6D4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15335,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15343,
@@ -40999,12 +103489,45 @@
{
"address": 61700,
"name": null,
+ "symbol": "mem_F104",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15343,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15347,
@@ -41025,12 +103548,18 @@
{
"address": 63189,
"name": null,
+ "symbol": "ram_F6D5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15343,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15351,
@@ -41053,7 +103582,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15343,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15353,
@@ -41074,12 +103608,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15353,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15357,
@@ -41100,12 +103653,18 @@
{
"address": 63189,
"name": null,
+ "symbol": "ram_F6D5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15353,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15361,
@@ -41126,12 +103685,45 @@
{
"address": 61699,
"name": null,
+ "symbol": "mem_F103",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15361,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15365,
@@ -41152,12 +103744,18 @@
{
"address": 63190,
"name": null,
+ "symbol": "ram_F6D6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15361,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15369,
@@ -41180,7 +103778,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15361,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15371,
@@ -41201,12 +103804,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15371,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15375,
@@ -41227,12 +103849,18 @@
{
"address": 63190,
"name": null,
+ "symbol": "ram_F6D6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15371,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15379,
@@ -41253,12 +103881,45 @@
{
"address": 61698,
"name": null,
+ "symbol": "mem_F102",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15379,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15383,
@@ -41279,12 +103940,18 @@
{
"address": 63191,
"name": null,
+ "symbol": "ram_F6D7",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15379,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15387,
@@ -41307,7 +103974,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15379,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15389,
@@ -41328,12 +104000,31 @@
{
"address": 63218,
"name": null,
+ "symbol": "ram_F6F2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15389,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15393,
@@ -41354,12 +104045,18 @@
{
"address": 63191,
"name": null,
+ "symbol": "ram_F6D7",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15389,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15397,
@@ -41380,12 +104077,45 @@
{
"address": 61697,
"name": null,
+ "symbol": "mem_F101",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15397,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15401,
@@ -41406,12 +104136,18 @@
{
"address": 63264,
"name": null,
+ "symbol": "ram_F720",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15397,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15405,
@@ -41431,7 +104167,51 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15405,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "addressing_side_effect"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15407,
@@ -41451,7 +104231,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15405,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15408,
@@ -41471,7 +104256,37 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15408,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "addressing_side_effect"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15410,
@@ -41493,12 +104308,18 @@
{
"address": 61440,
"name": null,
+ "symbol": "mem_F000",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15408,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15414,
@@ -41520,7 +104341,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15408,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15417,
@@ -41541,12 +104367,45 @@
{
"address": 61455,
"name": null,
+ "symbol": "mem_F00F",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15417,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15421,
@@ -41564,7 +104423,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15417,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15423,
@@ -41587,7 +104451,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15417,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15425,
@@ -41605,7 +104474,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15425,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15427,
@@ -41628,7 +104515,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15425,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15430,
@@ -41651,7 +104543,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15430,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15433,
@@ -41672,12 +104569,45 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15433,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15437,
@@ -41696,7 +104626,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15433,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15440,
@@ -41718,12 +104668,18 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15433,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15444,
@@ -41745,12 +104701,33 @@
{
"address": 61452,
"name": null,
+ "symbol": "mem_F00C",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15433,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15448,
@@ -41772,12 +104749,18 @@
{
"address": 63146,
"name": null,
+ "symbol": "ram_F6AA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15433,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15452,
@@ -41799,7 +104782,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15433,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15454,
@@ -41821,12 +104809,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15454,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15458,
@@ -41848,12 +104855,18 @@
{
"address": 63146,
"name": null,
+ "symbol": "ram_F6AA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15454,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15462,
@@ -41875,12 +104888,45 @@
{
"address": 61450,
"name": null,
+ "symbol": "mem_F00A",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15462,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15466,
@@ -41902,12 +104948,18 @@
{
"address": 63144,
"name": null,
+ "symbol": "ram_F6A8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15462,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15470,
@@ -41929,7 +104981,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15462,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15472,
@@ -41951,12 +105008,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15472,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15476,
@@ -41978,12 +105054,18 @@
{
"address": 63144,
"name": null,
+ "symbol": "ram_F6A8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15472,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15480,
@@ -42005,12 +105087,45 @@
{
"address": 61448,
"name": null,
+ "symbol": "mem_F008",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15480,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15484,
@@ -42032,12 +105147,18 @@
{
"address": 63142,
"name": null,
+ "symbol": "ram_F6A6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15480,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15488,
@@ -42059,7 +105180,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15480,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15490,
@@ -42081,12 +105207,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15490,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15494,
@@ -42108,12 +105253,18 @@
{
"address": 63142,
"name": null,
+ "symbol": "ram_F6A6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15490,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15498,
@@ -42135,12 +105286,45 @@
{
"address": 61446,
"name": null,
+ "symbol": "mem_F006",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15498,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15502,
@@ -42162,12 +105346,18 @@
{
"address": 63140,
"name": null,
+ "symbol": "ram_F6A4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15498,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15506,
@@ -42189,7 +105379,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15498,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15508,
@@ -42211,12 +105406,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15508,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15512,
@@ -42238,12 +105452,18 @@
{
"address": 63140,
"name": null,
+ "symbol": "ram_F6A4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15508,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15516,
@@ -42265,12 +105485,45 @@
{
"address": 61444,
"name": null,
+ "symbol": "mem_F004",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15516,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15520,
@@ -42292,12 +105545,18 @@
{
"address": 63138,
"name": null,
+ "symbol": "ram_F6A2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15516,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15524,
@@ -42319,7 +105578,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15516,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15526,
@@ -42341,12 +105605,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15526,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15530,
@@ -42368,12 +105651,18 @@
{
"address": 63138,
"name": null,
+ "symbol": "ram_F6A2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15526,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15534,
@@ -42395,12 +105684,45 @@
{
"address": 61442,
"name": null,
+ "symbol": "mem_F002",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15534,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15538,
@@ -42422,12 +105744,18 @@
{
"address": 63136,
"name": null,
+ "symbol": "ram_F6A0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15534,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15542,
@@ -42449,7 +105777,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15534,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15544,
@@ -42471,12 +105804,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15544,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15548,
@@ -42498,12 +105850,18 @@
{
"address": 63136,
"name": null,
+ "symbol": "ram_F6A0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15544,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15552,
@@ -42525,12 +105883,45 @@
{
"address": 61441,
"name": null,
+ "symbol": "mem_F001",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15552,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15556,
@@ -42552,12 +105943,18 @@
{
"address": 63265,
"name": null,
+ "symbol": "ram_F721",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15552,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15560,
@@ -42580,7 +105977,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15552,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15563,
@@ -42601,12 +106003,45 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15563,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15567,
@@ -42625,7 +106060,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15563,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15570,
@@ -42647,12 +106102,18 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15563,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15574,
@@ -42674,12 +106135,18 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15563,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15578,
@@ -42701,12 +106168,33 @@
{
"address": 61452,
"name": null,
+ "symbol": "mem_F00C",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15563,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15582,
@@ -42728,12 +106216,18 @@
{
"address": 63150,
"name": null,
+ "symbol": "ram_F6AE",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15563,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15586,
@@ -42755,7 +106249,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15563,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15588,
@@ -42777,12 +106276,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15588,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15592,
@@ -42804,12 +106322,18 @@
{
"address": 63150,
"name": null,
+ "symbol": "ram_F6AE",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15588,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15596,
@@ -42831,12 +106355,45 @@
{
"address": 61450,
"name": null,
+ "symbol": "mem_F00A",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15596,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15600,
@@ -42858,12 +106415,18 @@
{
"address": 63148,
"name": null,
+ "symbol": "ram_F6AC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15596,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15604,
@@ -42885,7 +106448,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15596,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15606,
@@ -42907,12 +106475,31 @@
{
"address": 63217,
"name": null,
+ "symbol": "ram_F6F1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15606,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15610,
@@ -42934,12 +106521,18 @@
{
"address": 63148,
"name": null,
+ "symbol": "ram_F6AC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15606,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15614,
@@ -42961,12 +106554,45 @@
{
"address": 61449,
"name": null,
+ "symbol": "mem_F009",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15614,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15618,
@@ -42988,12 +106614,18 @@
{
"address": 63192,
"name": null,
+ "symbol": "ram_F6D8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15614,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15622,
@@ -43015,7 +106647,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15614,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15624,
@@ -43037,12 +106674,31 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15624,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15628,
@@ -43064,12 +106720,18 @@
{
"address": 63192,
"name": null,
+ "symbol": "ram_F6D8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15624,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15632,
@@ -43091,12 +106753,45 @@
{
"address": 61448,
"name": null,
+ "symbol": "mem_F008",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15632,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15636,
@@ -43118,12 +106813,18 @@
{
"address": 63193,
"name": null,
+ "symbol": "ram_F6D9",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15632,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15640,
@@ -43145,7 +106846,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15632,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15642,
@@ -43167,12 +106873,31 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15642,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15646,
@@ -43194,12 +106919,18 @@
{
"address": 63193,
"name": null,
+ "symbol": "ram_F6D9",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15642,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15650,
@@ -43221,12 +106952,45 @@
{
"address": 61447,
"name": null,
+ "symbol": "mem_F007",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15650,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15654,
@@ -43248,12 +107012,18 @@
{
"address": 63194,
"name": null,
+ "symbol": "ram_F6DA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15650,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15658,
@@ -43275,7 +107045,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15650,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15660,
@@ -43297,12 +107072,31 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15660,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15664,
@@ -43324,12 +107118,18 @@
{
"address": 63194,
"name": null,
+ "symbol": "ram_F6DA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15660,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15668,
@@ -43351,12 +107151,45 @@
{
"address": 61446,
"name": null,
+ "symbol": "mem_F006",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15668,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15672,
@@ -43378,12 +107211,18 @@
{
"address": 63195,
"name": null,
+ "symbol": "ram_F6DB",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15668,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15676,
@@ -43405,7 +107244,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15668,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15678,
@@ -43427,12 +107271,31 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15678,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15682,
@@ -43454,12 +107317,18 @@
{
"address": 63195,
"name": null,
+ "symbol": "ram_F6DB",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15678,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15686,
@@ -43481,12 +107350,45 @@
{
"address": 61445,
"name": null,
+ "symbol": "mem_F005",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15686,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15690,
@@ -43508,12 +107410,18 @@
{
"address": 63196,
"name": null,
+ "symbol": "ram_F6DC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15686,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15694,
@@ -43535,7 +107443,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15686,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15696,
@@ -43557,12 +107470,31 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15696,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15700,
@@ -43584,12 +107516,18 @@
{
"address": 63196,
"name": null,
+ "symbol": "ram_F6DC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15696,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15704,
@@ -43611,12 +107549,45 @@
{
"address": 61444,
"name": null,
+ "symbol": "mem_F004",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15704,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15708,
@@ -43638,12 +107609,18 @@
{
"address": 63197,
"name": null,
+ "symbol": "ram_F6DD",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15704,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15712,
@@ -43665,7 +107642,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15704,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15714,
@@ -43687,12 +107669,31 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15714,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15718,
@@ -43714,12 +107715,18 @@
{
"address": 63197,
"name": null,
+ "symbol": "ram_F6DD",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15714,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15722,
@@ -43741,12 +107748,45 @@
{
"address": 61443,
"name": null,
+ "symbol": "mem_F003",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15722,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15726,
@@ -43768,12 +107808,18 @@
{
"address": 63198,
"name": null,
+ "symbol": "ram_F6DE",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15722,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15730,
@@ -43795,7 +107841,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15722,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15732,
@@ -43817,12 +107868,31 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15732,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15736,
@@ -43844,12 +107914,18 @@
{
"address": 63198,
"name": null,
+ "symbol": "ram_F6DE",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15732,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15740,
@@ -43871,12 +107947,45 @@
{
"address": 61442,
"name": null,
+ "symbol": "mem_F002",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15740,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15744,
@@ -43898,12 +108007,18 @@
{
"address": 63199,
"name": null,
+ "symbol": "ram_F6DF",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15740,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15748,
@@ -43925,7 +108040,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15740,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15750,
@@ -43947,12 +108067,31 @@
{
"address": 63219,
"name": null,
+ "symbol": "ram_F6F3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15750,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15754,
@@ -43974,12 +108113,18 @@
{
"address": 63199,
"name": null,
+ "symbol": "ram_F6DF",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15750,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15758,
@@ -44001,12 +108146,45 @@
{
"address": 61441,
"name": null,
+ "symbol": "mem_F001",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15758,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15762,
@@ -44028,12 +108206,18 @@
{
"address": 63265,
"name": null,
+ "symbol": "ram_F721",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15758,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15766,
@@ -44052,7 +108236,51 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15766,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "addressing_side_effect"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15768,
@@ -44071,7 +108299,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15766,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15769,
@@ -44092,12 +108325,31 @@
{
"address": 65256,
"name": "ADCSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear ADST (bit 5) of ADCSR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15769,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15773,
@@ -44116,7 +108368,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15769,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15775,
@@ -44137,12 +108394,33 @@
{
"address": 63114,
"name": null,
+ "symbol": "ram_F68A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15769,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15779,
@@ -44161,7 +108439,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15769,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:MULXU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15782,
@@ -44183,6 +108481,7 @@
{
"address": 65248,
"name": "ADDRA_H",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -44202,7 +108501,27 @@
"size": "W",
"direction": "read"
}
- ]
+ ],
+ "dataflow": {
+ "block": 15769,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 15786,
@@ -44221,7 +108540,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15769,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 15788,
@@ -44240,7 +108579,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15769,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 15790,
@@ -44260,7 +108619,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15769,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 15794,
@@ -44279,7 +108658,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15769,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:MULXU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 15796,
@@ -44298,7 +108697,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15769,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:DIVXU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15799,
@@ -44319,12 +108738,18 @@
{
"address": 63114,
"name": null,
+ "symbol": "ram_F68A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15769,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15803,
@@ -44347,7 +108772,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15769,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15805,
@@ -44368,12 +108798,45 @@
{
"address": 63114,
"name": null,
+ "symbol": "ram_F68A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15805,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R2 unknown after memory load"
+ ]
+ }
},
{
"address": 15809,
@@ -44394,12 +108857,18 @@
{
"address": 63114,
"name": null,
+ "symbol": "ram_F68A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15805,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15813,
@@ -44420,12 +108889,18 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15805,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15818,
@@ -44447,7 +108922,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15805,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15820,
@@ -44466,7 +108946,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15820,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15822,
@@ -44485,7 +108997,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15820,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R2"
+ ]
+ }
},
{
"address": 15824,
@@ -44504,7 +109036,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15820,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:MULXU.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15828,
@@ -44523,7 +109075,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15820,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:MULXU.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R2"
+ ]
+ }
},
{
"address": 15832,
@@ -44542,7 +109114,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15820,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after arithmetic"
+ ]
+ }
},
{
"address": 15834,
@@ -44564,12 +109156,33 @@
{
"address": 57602,
"name": null,
+ "symbol": "mem_E102",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15820,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:MULXU.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15838,
@@ -44588,7 +109201,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15820,
+ "changes": [],
+ "notes": [
+ "R1 unknown after arithmetic"
+ ]
+ }
},
{
"address": 15840,
@@ -44607,7 +109227,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15820,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "unsupported:MULXU.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R2 unknown after MOV source"
+ ]
+ }
},
{
"address": 15842,
@@ -44629,7 +109269,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15820,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15844,
@@ -44648,7 +109293,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15844,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R2 unknown after arithmetic"
+ ]
+ }
},
{
"address": 15846,
@@ -44666,7 +109343,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15844,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15849,
@@ -44689,7 +109371,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15844,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15851,
@@ -44707,7 +109394,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15851,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R1"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 = 0x0000"
+ ],
+ "known_after": {
+ "registers": {
+ "R1": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R1"
+ }
+ }
+ }
+ }
},
{
"address": 15854,
@@ -44730,7 +109463,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15851,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R1": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R1"
+ }
+ }
+ }
+ }
},
{
"address": 15856,
@@ -44749,7 +109498,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15856,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 15858,
@@ -44767,7 +109548,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15856,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15861,
@@ -44790,7 +109576,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15856,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15863,
@@ -44808,7 +109599,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15863,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 65535,
+ "hex": "0xFFFF",
+ "width": 16,
+ "source": "MOV:I.W #H'FFFF, R1"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 = 0xFFFF"
+ ],
+ "known_after": {
+ "registers": {
+ "R1": {
+ "known": true,
+ "value": 65535,
+ "hex": "0xFFFF",
+ "width": 16,
+ "source": "MOV:I.W #H'FFFF, R1"
+ }
+ }
+ }
+ }
},
{
"address": 15866,
@@ -44830,12 +109667,31 @@
{
"address": 57602,
"name": null,
+ "symbol": "mem_E102",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15866,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15870,
@@ -44857,7 +109713,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15866,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15872,
@@ -44879,12 +109740,31 @@
{
"address": 63118,
"name": null,
+ "symbol": "ram_F68E",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15872,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15876,
@@ -44906,12 +109786,18 @@
{
"address": 63113,
"name": null,
+ "symbol": "ram_F689",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15872,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15880,
@@ -44933,12 +109819,45 @@
{
"address": 63115,
"name": null,
+ "symbol": "ram_F68B",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15880,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15884,
@@ -44957,7 +109876,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15880,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:MULXU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15887,
@@ -44978,6 +109917,7 @@
{
"address": 65250,
"name": "ADDRB_H",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -44997,7 +109937,27 @@
"size": "W",
"direction": "read"
}
- ]
+ ],
+ "dataflow": {
+ "block": 15880,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 15891,
@@ -45016,7 +109976,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15880,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 15893,
@@ -45035,7 +110015,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15880,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 15895,
@@ -45054,7 +110054,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15880,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:MULXU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 15897,
@@ -45073,7 +110093,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15880,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:DIVXU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15900,
@@ -45095,12 +110135,18 @@
{
"address": 63116,
"name": null,
+ "symbol": "ram_F68C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15880,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15904,
@@ -45122,7 +110168,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15880,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15906,
@@ -45144,12 +110195,31 @@
{
"address": 63115,
"name": null,
+ "symbol": "ram_F68B",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15906,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15910,
@@ -45171,7 +110241,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15906,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15912,
@@ -45193,12 +110268,31 @@
{
"address": 63115,
"name": null,
+ "symbol": "ram_F68B",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15912,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15916,
@@ -45217,7 +110311,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15912,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15918,
@@ -45236,7 +110350,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15912,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R3 unknown after MOV source"
+ ]
+ }
},
{
"address": 15920,
@@ -45255,7 +110389,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15912,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:MULXU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 15922,
@@ -45274,7 +110428,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15912,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R2"
+ }
+ }
+ ],
+ "notes": [
+ "R2 cleared"
+ ],
+ "known_after": {
+ "registers": {
+ "R2": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R2"
+ }
+ }
+ }
+ }
},
{
"address": 15924,
@@ -45293,7 +110481,30 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15912,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R2"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:DIVXU.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R2"
+ ]
+ }
},
{
"address": 15928,
@@ -45312,7 +110523,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15912,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:MULXU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15931,
@@ -45331,7 +110562,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15912,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:MULXU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 15935,
@@ -45350,7 +110601,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15912,
+ "changes": [],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 15937,
@@ -45371,12 +110629,18 @@
{
"address": 65166,
"name": "P7DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15912,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15941,
@@ -45399,7 +110663,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15912,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15943,
@@ -45418,7 +110687,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15943,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15945,
@@ -45439,12 +110740,31 @@
{
"address": 63116,
"name": null,
+ "symbol": "ram_F68C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15945,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15949,
@@ -45463,7 +110783,87 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15949,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0, R1, R2, R3, R4, R5"
+ ]
+ }
},
{
"address": 15951,
@@ -45484,12 +110884,31 @@
{
"address": 65256,
"name": "ADCSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear ADF (bit 7) of ADCSR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15949,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15955,
@@ -45509,7 +110928,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15949,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15956,
@@ -45528,7 +110952,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15956,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15958,
@@ -45550,7 +110992,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15956,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15960,
@@ -45572,12 +111019,45 @@
{
"address": 63925,
"name": null,
+ "symbol": "ram_F9B5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15960,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 15964,
@@ -45596,7 +111076,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15960,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15966,
@@ -45615,7 +111115,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15960,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 15968,
@@ -45637,12 +111157,33 @@
{
"address": 63920,
"name": null,
+ "symbol": "ram_F9B0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15960,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 15972,
@@ -45661,7 +111202,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15960,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 15974,
@@ -45680,7 +111241,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15960,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 15976,
@@ -45699,7 +111280,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15976,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15978,
@@ -45721,7 +111320,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15976,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15980,
@@ -45741,7 +111345,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15980,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15984,
@@ -45763,7 +111385,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15980,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15986,
@@ -45782,7 +111409,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15986,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 15988,
@@ -45805,7 +111464,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15986,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15990,
@@ -45825,7 +111489,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15990,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 15994,
@@ -45847,12 +111529,18 @@
{
"address": 63920,
"name": null,
+ "symbol": "ram_F9B0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15990,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 15998,
@@ -45874,12 +111562,18 @@
{
"address": 63920,
"name": null,
+ "symbol": "ram_F9B0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 15990,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16002,
@@ -45901,12 +111595,45 @@
{
"address": 63920,
"name": null,
+ "symbol": "ram_F9B0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16002,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 16006,
@@ -45925,7 +111652,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16002,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16008,
@@ -45944,7 +111691,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16002,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 16011,
@@ -45965,12 +111732,18 @@
{
"address": 63925,
"name": null,
+ "symbol": "ram_F9B5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16002,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16015,
@@ -45993,7 +111766,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16002,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16017,
@@ -46012,7 +111790,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16017,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16019,
@@ -46036,7 +111819,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16017,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16022,
@@ -46055,7 +112014,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16017,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R2, R3"
+ ]
+ }
},
{
"address": 16024,
@@ -46078,7 +112069,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16017,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16026,
@@ -46097,7 +112093,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16026,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16028,
@@ -46119,7 +112133,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16026,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16030,
@@ -46141,12 +112160,45 @@
{
"address": 63929,
"name": null,
+ "symbol": "ram_F9B9",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16030,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 16034,
@@ -46165,7 +112217,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16030,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 16036,
@@ -46184,7 +112256,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16030,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 16038,
@@ -46206,12 +112298,33 @@
{
"address": 63924,
"name": null,
+ "symbol": "ram_F9B4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16030,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 16042,
@@ -46230,7 +112343,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16030,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 16044,
@@ -46249,7 +112382,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16030,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 16046,
@@ -46268,7 +112421,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16046,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16048,
@@ -46290,7 +112461,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16046,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16050,
@@ -46310,7 +112486,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16050,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16054,
@@ -46332,7 +112526,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16050,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16056,
@@ -46351,7 +112550,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16056,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16058,
@@ -46370,7 +112601,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16056,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 16061,
@@ -46394,7 +112645,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16056,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16063,
@@ -46413,7 +112669,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16063,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16067,
@@ -46434,12 +112708,18 @@
{
"address": 63924,
"name": null,
+ "symbol": "ram_F9B4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16063,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16071,
@@ -46460,12 +112740,18 @@
{
"address": 63924,
"name": null,
+ "symbol": "ram_F9B4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16063,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16075,
@@ -46487,7 +112773,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16075,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16076,
@@ -46506,7 +112797,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16076,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16078,
@@ -46525,7 +112821,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16076,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R5"
+ ]
+ }
},
{
"address": 16080,
@@ -46543,7 +112871,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16076,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16082,
@@ -46565,7 +112898,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16076,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16084,
@@ -46588,7 +112926,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16084,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16087,
@@ -46612,7 +113126,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16084,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16089,
@@ -46631,7 +113150,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16089,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R3 unknown after MOV source"
+ ]
+ }
},
{
"address": 16091,
@@ -46649,7 +113200,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16089,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16093,
@@ -46672,7 +113228,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16089,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16095,
@@ -46690,7 +113251,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16095,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16097,
@@ -46713,7 +113292,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16095,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16099,
@@ -46731,7 +113315,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16099,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16101,
@@ -46754,7 +113356,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16099,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16103,
@@ -46778,7 +113385,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16103,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16105,
@@ -46796,7 +113408,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16105,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 128,
+ "hex": "0x0080",
+ "width": 16,
+ "source": "MOV:I.W #H'0080, R5"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0080"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 128,
+ "hex": "0x0080",
+ "width": 16,
+ "source": "MOV:I.W #H'0080, R5"
+ }
+ }
+ }
+ }
},
{
"address": 16108,
@@ -46819,7 +113477,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16105,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 128,
+ "hex": "0x0080",
+ "width": 16,
+ "source": "MOV:I.W #H'0080, R5"
+ }
+ }
+ }
+ }
},
{
"address": 16110,
@@ -46837,7 +113511,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16110,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 192,
+ "hex": "0x00C0",
+ "width": 16,
+ "source": "MOV:I.W #H'00C0, R5"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x00C0"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 192,
+ "hex": "0x00C0",
+ "width": 16,
+ "source": "MOV:I.W #H'00C0, R5"
+ }
+ }
+ }
+ }
},
{
"address": 16113,
@@ -46861,7 +113581,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16110,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 192,
+ "hex": "0x00C0",
+ "width": 16,
+ "source": "MOV:I.W #H'00C0, R5"
+ }
+ }
+ }
+ }
},
{
"address": 16115,
@@ -46879,7 +113615,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16115,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 144,
+ "hex": "0x0090",
+ "width": 16,
+ "source": "MOV:I.W #H'0090, R5"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0090"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 144,
+ "hex": "0x0090",
+ "width": 16,
+ "source": "MOV:I.W #H'0090, R5"
+ }
+ }
+ }
+ }
},
{
"address": 16118,
@@ -46902,7 +113684,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16115,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 144,
+ "hex": "0x0090",
+ "width": 16,
+ "source": "MOV:I.W #H'0090, R5"
+ }
+ }
+ }
+ }
},
{
"address": 16120,
@@ -46920,7 +113718,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16120,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 208,
+ "hex": "0x00D0",
+ "width": 16,
+ "source": "MOV:I.W #H'00D0, R5"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x00D0"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 208,
+ "hex": "0x00D0",
+ "width": 16,
+ "source": "MOV:I.W #H'00D0, R5"
+ }
+ }
+ }
+ }
},
{
"address": 16123,
@@ -46939,7 +113783,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16123,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:MULXU.B"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 16126,
@@ -46958,7 +113834,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16123,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unsupported:MULXU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R3 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16130,
@@ -46977,7 +113873,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16123,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R1"
+ }
+ }
+ ],
+ "notes": [
+ "R1 cleared"
+ ],
+ "known_after": {
+ "registers": {
+ "R1": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R1"
+ }
+ }
+ }
+ }
},
{
"address": 16132,
@@ -46997,7 +113927,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16132,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R2 unknown after memory load"
+ ]
+ }
},
{
"address": 16136,
@@ -47017,7 +113979,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16132,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16138,
@@ -47039,7 +114006,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16132,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16140,
@@ -47059,7 +114031,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16140,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16142,
@@ -47082,7 +114072,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16140,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16144,
@@ -47101,7 +114267,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16144,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16146,
@@ -47120,7 +114318,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16144,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R3 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16148,
@@ -47138,7 +114356,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16144,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16150,
@@ -47160,7 +114383,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16144,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16152,
@@ -47183,7 +114411,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16152,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16154,
@@ -47205,12 +114438,31 @@
{
"address": 64256,
"name": null,
+ "symbol": "ram_FB00",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16154,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16160,
@@ -47228,7 +114480,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16154,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 224,
+ "hex": "0x00E0",
+ "width": 16,
+ "source": "MOV:I.W #H'00E0, R4"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x00E0"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 224,
+ "hex": "0x00E0",
+ "width": 16,
+ "source": "MOV:I.W #H'00E0, R4"
+ }
+ }
+ }
+ }
},
{
"address": 16163,
@@ -47252,7 +114538,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16154,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 224,
+ "hex": "0x00E0",
+ "width": 16,
+ "source": "MOV:I.W #H'00E0, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16165,
@@ -47271,7 +114736,75 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16165,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0, R1, R2, R3, R4"
+ ]
+ }
},
{
"address": 16167,
@@ -47293,7 +114826,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16165,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16168,
@@ -47312,7 +114850,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16168,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after MOV source"
+ ]
+ }
},
{
"address": 16170,
@@ -47331,7 +114901,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16168,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16172,
@@ -47353,12 +114930,18 @@
{
"address": 64256,
"name": null,
+ "symbol": "ram_FB00",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16168,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16176,
@@ -47380,7 +114963,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16168,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16178,
@@ -47402,12 +114990,31 @@
{
"address": 64256,
"name": null,
+ "symbol": "ram_FB00",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16178,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16182,
@@ -47430,7 +115037,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16178,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16184,
@@ -47448,7 +115231,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16184,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0200"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ }
+ }
+ }
+ }
},
{
"address": 16187,
@@ -47467,7 +115296,30 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16184,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 512,
+ "hex": "0x0200",
+ "width": 16,
+ "source": "MOV:I.W #H'0200, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16189,
@@ -47491,7 +115343,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16184,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16191,
@@ -47513,7 +115541,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16184,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16192,
@@ -47533,7 +115566,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16192,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "addressing_side_effect"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16194,
@@ -47552,7 +115603,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16192,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "SR unknown after ANDC"
+ ]
+ }
},
{
"address": 16198,
@@ -47571,7 +115642,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16192,
+ "changes": [],
+ "notes": [
+ "SR unknown after ORC"
+ ]
+ }
},
{
"address": 16202,
@@ -47592,12 +115670,45 @@
{
"address": 61952,
"name": null,
+ "symbol": "mem_F200",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16202,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 16207,
@@ -47616,7 +115727,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16202,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16209,
@@ -47639,7 +115755,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16202,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16211,
@@ -47658,7 +115779,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16211,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16213,
@@ -47681,7 +115820,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16211,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16215,
@@ -47700,7 +115844,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16215,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16217,
@@ -47723,7 +115885,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16215,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16219,
@@ -47744,12 +115911,31 @@
{
"address": 61952,
"name": null,
+ "symbol": "mem_F200",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16219,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16224,
@@ -47772,7 +115958,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16219,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16226,
@@ -47793,12 +115984,31 @@
{
"address": 61953,
"name": null,
+ "symbol": "mem_F201",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16226,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16231,
@@ -47819,12 +116029,18 @@
{
"address": 64256,
"name": null,
+ "symbol": "ram_FB00",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16226,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16235,
@@ -47848,7 +116064,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16226,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16237,
@@ -47869,12 +116090,45 @@
{
"address": 61953,
"name": null,
+ "symbol": "mem_F201",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16237,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 16242,
@@ -47893,7 +116147,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16242,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "SR unknown after memory load"
+ ]
+ }
},
{
"address": 16244,
@@ -47914,7 +116188,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16242,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16246,
@@ -47932,7 +116211,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16246,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 10000,
+ "hex": "0x2710",
+ "width": 16,
+ "source": "MOV:I.W #H'2710, R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x2710"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 10000,
+ "hex": "0x2710",
+ "width": 16,
+ "source": "MOV:I.W #H'2710, R0"
+ }
+ }
+ }
+ }
},
{
"address": 16249,
@@ -47950,7 +116275,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16246,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 50000,
+ "hex": "0xC350",
+ "width": 16,
+ "source": "MOV:I.W #H'C350, R1"
+ }
+ }
+ ],
+ "notes": [
+ "R1 = 0xC350"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 10000,
+ "hex": "0x2710",
+ "width": 16,
+ "source": "MOV:I.W #H'2710, R0"
+ },
+ "R1": {
+ "known": true,
+ "value": 50000,
+ "hex": "0xC350",
+ "width": 16,
+ "source": "MOV:I.W #H'C350, R1"
+ }
+ }
+ }
+ }
},
{
"address": 16252,
@@ -47972,12 +116338,31 @@
{
"address": 65154,
"name": "P1DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 7 of P1DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16252,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16256,
@@ -48000,7 +116385,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16252,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16259,
@@ -48021,12 +116411,31 @@
{
"address": 65154,
"name": "P1DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 7 of P1DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16259,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16263,
@@ -48049,7 +116458,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16259,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16266,
@@ -48068,7 +116482,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16266,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 cleared"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R0"
+ }
+ }
+ }
+ }
},
{
"address": 16268,
@@ -48088,7 +116548,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16268,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16272,
@@ -48108,7 +116586,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16268,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16276,
@@ -48128,7 +116611,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16268,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16280,
@@ -48147,7 +116635,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16268,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16282,
@@ -48165,7 +116673,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16268,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16285,
@@ -48188,7 +116701,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16268,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16287,
@@ -48212,7 +116730,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16287,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16290,
@@ -48235,7 +116929,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16287,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16293,
@@ -48259,7 +116960,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16287,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16296,
@@ -48282,7 +116990,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16287,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16299,
@@ -48306,7 +117021,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16287,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16302,
@@ -48329,7 +117051,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16287,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16305,
@@ -48350,12 +117079,31 @@
{
"address": 65260,
"name": "WDT_TCSR_R",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "WDT_TCSR_R = H'5A00 (OVF=0 WT/IT=0 TME=0 CKS2=0 CKS1=0 CKS0=0; TCNT password H'5A, counter write H'00)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16305,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16311,
@@ -48376,12 +117124,18 @@
{
"address": 63380,
"name": null,
+ "symbol": "ram_F794",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16305,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16315,
@@ -48405,7 +117159,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16305,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16317,
@@ -48429,7 +117359,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16305,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16320,
@@ -48452,7 +117389,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16305,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16322,
@@ -48475,7 +117419,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16305,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16325,
@@ -48499,7 +117450,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16305,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16328,
@@ -48522,7 +117480,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16305,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16331,
@@ -48546,7 +117511,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16305,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16334,
@@ -48569,7 +117541,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16305,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16337,
@@ -48593,7 +117572,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16305,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16339,
@@ -48614,12 +117598,31 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16339,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16343,
@@ -48642,7 +117645,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16339,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16345,
@@ -48663,12 +117671,31 @@
{
"address": 64165,
"name": null,
+ "symbol": "ram_FAA5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16345,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16349,
@@ -48691,7 +117718,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16345,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16351,
@@ -48712,12 +117744,31 @@
{
"address": 63939,
"name": null,
+ "symbol": "ram_F9C3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16351,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16355,
@@ -48740,7 +117791,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16351,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16357,
@@ -48761,12 +117817,31 @@
{
"address": 63936,
"name": null,
+ "symbol": "ram_F9C0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16357,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16361,
@@ -48789,7 +117864,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16357,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16363,
@@ -48813,7 +117893,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16363,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16366,
@@ -48834,7 +118090,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16366,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16367,
@@ -48855,12 +118116,31 @@
{
"address": 63941,
"name": null,
+ "symbol": "ram_F9C5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16367,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16371,
@@ -48883,7 +118163,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16367,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16373,
@@ -48904,12 +118189,31 @@
{
"address": 63925,
"name": null,
+ "symbol": "ram_F9B5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16373,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16377,
@@ -48930,12 +118234,18 @@
{
"address": 63920,
"name": null,
+ "symbol": "ram_F9B0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16373,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16381,
@@ -48956,12 +118266,18 @@
{
"address": 64165,
"name": null,
+ "symbol": "ram_FAA5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16373,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16385,
@@ -48984,7 +118300,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16373,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16387,
@@ -49008,7 +118329,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16387,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16389,
@@ -49032,7 +118529,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16387,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16391,
@@ -49053,12 +118555,31 @@
{
"address": 64165,
"name": null,
+ "symbol": "ram_FAA5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16391,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16395,
@@ -49080,7 +118601,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16395,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16396,
@@ -49102,12 +118628,31 @@
{
"address": 63280,
"name": null,
+ "symbol": "ram_F730",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16400,
@@ -49129,12 +118674,18 @@
{
"address": 63318,
"name": null,
+ "symbol": "ram_F756",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16404,
@@ -49156,12 +118707,18 @@
{
"address": 63319,
"name": null,
+ "symbol": "ram_F757",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16408,
@@ -49183,12 +118740,18 @@
{
"address": 63320,
"name": null,
+ "symbol": "ram_F758",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16412,
@@ -49210,12 +118773,18 @@
{
"address": 63321,
"name": null,
+ "symbol": "ram_F759",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16416,
@@ -49237,12 +118806,18 @@
{
"address": 63282,
"name": null,
+ "symbol": "ram_F732",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16420,
@@ -49264,12 +118839,18 @@
{
"address": 63324,
"name": null,
+ "symbol": "ram_F75C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16424,
@@ -49291,12 +118872,18 @@
{
"address": 64259,
"name": null,
+ "symbol": "ram_FB03",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16428,
@@ -49318,12 +118905,18 @@
{
"address": 57414,
"name": null,
+ "symbol": "mem_E046",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16432,
@@ -49345,12 +118938,18 @@
{
"address": 63338,
"name": null,
+ "symbol": "ram_F76A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16436,
@@ -49372,12 +118971,18 @@
{
"address": 63377,
"name": null,
+ "symbol": "ram_F791",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16440,
@@ -49399,12 +119004,18 @@
{
"address": 63381,
"name": null,
+ "symbol": "ram_F795",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16444,
@@ -49426,12 +119037,18 @@
{
"address": 63342,
"name": null,
+ "symbol": "ram_F76E",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16448,
@@ -49454,7 +119071,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16450,
@@ -49477,7 +119270,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16453,
@@ -49499,7 +119299,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16396,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16454,
@@ -49521,12 +119326,31 @@
{
"address": 63940,
"name": null,
+ "symbol": "ram_F9C4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16454,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16458,
@@ -49548,7 +119372,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16454,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16460,
@@ -49570,12 +119399,31 @@
{
"address": 64165,
"name": null,
+ "symbol": "ram_FAA5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16460,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16464,
@@ -49597,7 +119445,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16460,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16466,
@@ -49619,12 +119472,31 @@
{
"address": 63939,
"name": null,
+ "symbol": "ram_F9C3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16466,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16470,
@@ -49646,7 +119518,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16466,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16472,
@@ -49667,7 +119544,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16472,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16473,
@@ -49688,12 +119570,45 @@
{
"address": 63920,
"name": null,
+ "symbol": "ram_F9B0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16473,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R2 unknown after memory load"
+ ]
+ }
},
{
"address": 16477,
@@ -49712,7 +119627,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16473,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R2"
+ ]
+ }
},
{
"address": 16479,
@@ -49733,12 +119668,18 @@
{
"address": 63925,
"name": null,
+ "symbol": "ram_F9B5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16473,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16483,
@@ -49761,7 +119702,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16473,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16485,
@@ -49780,7 +119726,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16485,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.B"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R2"
+ ]
+ }
},
{
"address": 16487,
@@ -49800,7 +119778,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16485,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16492,
@@ -49822,12 +119805,18 @@
{
"address": 63920,
"name": null,
+ "symbol": "ram_F9B0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16485,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16496,
@@ -49849,12 +119838,18 @@
{
"address": 63920,
"name": null,
+ "symbol": "ram_F9B0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16485,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16500,
@@ -49875,7 +119870,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16500,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16501,
@@ -49894,7 +119894,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16501,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 cleared"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R0"
+ }
+ }
+ }
+ }
},
{
"address": 16503,
@@ -49913,7 +119959,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16503,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16507,
@@ -49932,7 +119996,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16503,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16511,
@@ -49951,7 +120020,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16503,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16515,
@@ -49969,7 +120043,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16503,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16518,
@@ -49991,7 +120070,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16503,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16520,
@@ -50011,7 +120095,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16520,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16524,
@@ -50030,7 +120132,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16524,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16526,
@@ -50048,7 +120182,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16524,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16529,
@@ -50071,7 +120210,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16524,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16531,
@@ -50095,7 +120239,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16531,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16533,
@@ -50117,7 +120437,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16531,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16534,
@@ -50139,12 +120464,31 @@
{
"address": 57344,
"name": null,
+ "symbol": "mem_E000",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16534,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16540,
@@ -50166,12 +120510,18 @@
{
"address": 57350,
"name": null,
+ "symbol": "mem_E006",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16534,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16546,
@@ -50193,12 +120543,18 @@
{
"address": 57472,
"name": null,
+ "symbol": "mem_E080",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16534,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16552,
@@ -50220,12 +120576,18 @@
{
"address": 59392,
"name": null,
+ "symbol": "mem_E800",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16534,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16558,
@@ -50247,12 +120609,18 @@
{
"address": 59398,
"name": null,
+ "symbol": "mem_E806",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16534,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16564,
@@ -50274,12 +120642,18 @@
{
"address": 59520,
"name": null,
+ "symbol": "mem_E880",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16534,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16570,
@@ -50300,7 +120674,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16534,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16571,
@@ -50318,7 +120697,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16571,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 64,
+ "hex": "0x0040",
+ "width": 16,
+ "source": "MOV:I.W #H'0040, R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x0040"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 64,
+ "hex": "0x0040",
+ "width": 16,
+ "source": "MOV:I.W #H'0040, R0"
+ }
+ }
+ }
+ }
},
{
"address": 16574,
@@ -50337,7 +120762,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16574,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16580,
@@ -50356,7 +120799,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16574,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16586,
@@ -50375,7 +120823,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16574,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16592,
@@ -50394,7 +120847,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16574,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16598,
@@ -50413,7 +120871,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16574,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16604,
@@ -50432,7 +120895,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16574,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16606,
@@ -50454,7 +120937,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16574,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16608,
@@ -50476,12 +120964,31 @@
{
"address": 63940,
"name": null,
+ "symbol": "ram_F9C4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16608,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16613,
@@ -50503,12 +121010,18 @@
{
"address": 63223,
"name": null,
+ "symbol": "ram_F6F7",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16608,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16618,
@@ -50530,12 +121043,18 @@
{
"address": 63224,
"name": null,
+ "symbol": "ram_F6F8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16608,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16623,
@@ -50557,12 +121076,18 @@
{
"address": 63225,
"name": null,
+ "symbol": "ram_F6F9",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16608,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16628,
@@ -50584,12 +121109,18 @@
{
"address": 65166,
"name": "P7DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16608,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16632,
@@ -50611,7 +121142,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16608,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16634,
@@ -50633,12 +121169,31 @@
{
"address": 62466,
"name": null,
+ "symbol": "mem_F402",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16634,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16640,
@@ -50660,7 +121215,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16634,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16643,
@@ -50678,7 +121238,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16643,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 256,
+ "hex": "0x0100",
+ "width": 16,
+ "source": "MOV:I.W #H'0100, R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x0100"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 256,
+ "hex": "0x0100",
+ "width": 16,
+ "source": "MOV:I.W #H'0100, R0"
+ }
+ }
+ }
+ }
},
{
"address": 16646,
@@ -50697,7 +121303,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16648,
@@ -50717,7 +121355,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R5 unknown after memory load"
+ ]
+ }
},
{
"address": 16652,
@@ -50737,7 +121395,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16656,
@@ -50757,7 +121420,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "addressing_side_effect"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16658,
@@ -50776,7 +121457,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after MOV source"
+ ]
+ }
},
{
"address": 16660,
@@ -50799,7 +121500,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "addressing_side_effect"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16663,
@@ -50818,7 +121695,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16667,
@@ -50842,7 +121751,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16670,
@@ -50861,7 +121802,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16674,
@@ -50884,7 +121857,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16677,
@@ -50903,7 +121908,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16681,
@@ -50927,7 +121964,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16684,
@@ -50946,7 +122015,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16688,
@@ -50969,7 +122070,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16691,
@@ -50988,7 +122121,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16695,
@@ -51012,7 +122177,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16698,
@@ -51031,7 +122228,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16702,
@@ -51054,7 +122283,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16705,
@@ -51073,7 +122334,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16709,
@@ -51097,7 +122390,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16712,
@@ -51116,7 +122441,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16716,
@@ -51139,7 +122496,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16719,
@@ -51158,7 +122547,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16723,
@@ -51182,7 +122603,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16726,
@@ -51201,7 +122654,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16730,
@@ -51224,7 +122709,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16733,
@@ -51243,7 +122760,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16737,
@@ -51267,7 +122816,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16740,
@@ -51286,7 +122867,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16744,
@@ -51309,7 +122922,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16747,
@@ -51328,7 +122973,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16751,
@@ -51352,7 +123029,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16754,
@@ -51371,7 +123080,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16758,
@@ -51394,7 +123135,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16761,
@@ -51413,7 +123186,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16765,
@@ -51437,7 +123242,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16768,
@@ -51456,7 +123293,51 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "addressing_side_effect"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 16770,
@@ -51478,7 +123359,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16646,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16772,
@@ -51496,7 +123382,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16772,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 15,
+ "hex": "0x000F",
+ "width": 16,
+ "source": "MOV:I.W #H'000F, R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x000F"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 15,
+ "hex": "0x000F",
+ "width": 16,
+ "source": "MOV:I.W #H'000F, R0"
+ }
+ }
+ }
+ }
},
{
"address": 16775,
@@ -51515,7 +123447,37 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "addressing_side_effect"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16777,
@@ -51534,7 +123496,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after MOV source"
+ ]
+ }
},
{
"address": 16779,
@@ -51553,7 +123535,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 16781,
@@ -51571,7 +123573,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 8224,
+ "hex": "0x2020",
+ "width": 16,
+ "source": "MOV:I.W #H'2020, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x2020"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 8224,
+ "hex": "0x2020",
+ "width": 16,
+ "source": "MOV:I.W #H'2020, R5"
+ }
+ }
+ }
+ }
},
{
"address": 16784,
@@ -51594,7 +123630,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 8224,
+ "hex": "0x2020",
+ "width": 16,
+ "source": "MOV:I.W #H'2020, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "addressing_side_effect"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16787,
@@ -51613,7 +123828,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16789,
@@ -51631,7 +123878,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 8224,
+ "hex": "0x2020",
+ "width": 16,
+ "source": "MOV:I.W #H'2020, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x2020"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 8224,
+ "hex": "0x2020",
+ "width": 16,
+ "source": "MOV:I.W #H'2020, R5"
+ }
+ }
+ }
+ }
},
{
"address": 16792,
@@ -51654,7 +123935,54 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 8224,
+ "hex": "0x2020",
+ "width": 16,
+ "source": "MOV:I.W #H'2020, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16795,
@@ -51673,7 +124001,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16797,
@@ -51691,7 +124051,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 8224,
+ "hex": "0x2020",
+ "width": 16,
+ "source": "MOV:I.W #H'2020, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x2020"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 8224,
+ "hex": "0x2020",
+ "width": 16,
+ "source": "MOV:I.W #H'2020, R5"
+ }
+ }
+ }
+ }
},
{
"address": 16800,
@@ -51714,7 +124108,54 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 8224,
+ "hex": "0x2020",
+ "width": 16,
+ "source": "MOV:I.W #H'2020, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16803,
@@ -51733,7 +124174,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16805,
@@ -51751,7 +124224,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 8224,
+ "hex": "0x2020",
+ "width": 16,
+ "source": "MOV:I.W #H'2020, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x2020"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 8224,
+ "hex": "0x2020",
+ "width": 16,
+ "source": "MOV:I.W #H'2020, R5"
+ }
+ }
+ }
+ }
},
{
"address": 16808,
@@ -51774,7 +124281,54 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 8224,
+ "hex": "0x2020",
+ "width": 16,
+ "source": "MOV:I.W #H'2020, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16811,
@@ -51794,7 +124348,51 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "addressing_side_effect"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 16813,
@@ -51817,7 +124415,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16775,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16816,
@@ -51840,7 +124443,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16816,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16850,
@@ -51858,7 +124466,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16850,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 15,
+ "hex": "0x000F",
+ "width": 16,
+ "source": "MOV:I.W #H'000F, R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x000F"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 15,
+ "hex": "0x000F",
+ "width": 16,
+ "source": "MOV:I.W #H'000F, R0"
+ }
+ }
+ }
+ }
},
{
"address": 16853,
@@ -51877,7 +124531,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after MOV source"
+ ]
+ }
},
{
"address": 16855,
@@ -51896,7 +124582,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 16857,
@@ -51915,7 +124621,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 16859,
@@ -51934,7 +124647,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 16861,
@@ -51953,7 +124673,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after MOV source"
+ ]
+ }
},
{
"address": 16863,
@@ -51972,7 +124712,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 16865,
@@ -51991,7 +124751,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16867,
@@ -52015,7 +124780,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SHLL.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16870,
@@ -52034,7 +124975,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0, R1"
+ ]
+ }
},
{
"address": 16872,
@@ -52054,7 +125027,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16876,
@@ -52073,7 +125064,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16878,
@@ -52092,7 +125103,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16880,
@@ -52115,7 +125131,63 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16883,
@@ -52134,7 +125206,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0, R1"
+ ]
+ }
},
{
"address": 16885,
@@ -52153,7 +125257,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16889,
@@ -52172,7 +125294,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16891,
@@ -52191,7 +125333,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16893,
@@ -52215,7 +125362,63 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16896,
@@ -52234,7 +125437,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0, R1"
+ ]
+ }
},
{
"address": 16898,
@@ -52254,7 +125489,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16902,
@@ -52273,7 +125526,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic"
+ ]
+ }
},
{
"address": 16904,
@@ -52292,7 +125565,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16906,
@@ -52315,7 +125593,63 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 16909,
@@ -52334,7 +125668,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0, R1"
+ ]
+ }
},
{
"address": 16911,
@@ -52353,7 +125719,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16915,
@@ -52376,7 +125760,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16853,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16918,
@@ -52397,7 +125786,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16918,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16919,
@@ -52418,12 +125812,31 @@
{
"address": 63384,
"name": null,
+ "symbol": "ram_F798",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 16923,
@@ -52444,12 +125857,18 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16927,
@@ -52470,12 +125889,18 @@
{
"address": 65154,
"name": "P1DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 2 of P1DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16931,
@@ -52496,12 +125921,18 @@
{
"address": 63232,
"name": null,
+ "symbol": "ram_F700",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16937,
@@ -52522,12 +125953,18 @@
{
"address": 63234,
"name": null,
+ "symbol": "ram_F702",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16943,
@@ -52548,12 +125985,18 @@
{
"address": 63236,
"name": null,
+ "symbol": "ram_F704",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16949,
@@ -52574,12 +126017,18 @@
{
"address": 63238,
"name": null,
+ "symbol": "ram_F706",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16955,
@@ -52601,12 +126050,18 @@
{
"address": 63240,
"name": null,
+ "symbol": "ram_F708",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16960,
@@ -52628,12 +126083,18 @@
{
"address": 63241,
"name": null,
+ "symbol": "ram_F709",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16965,
@@ -52654,12 +126115,18 @@
{
"address": 63242,
"name": null,
+ "symbol": "ram_F70A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16971,
@@ -52680,12 +126147,18 @@
{
"address": 63248,
"name": null,
+ "symbol": "ram_F710",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16975,
@@ -52706,12 +126179,18 @@
{
"address": 63249,
"name": null,
+ "symbol": "ram_F711",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16979,
@@ -52732,12 +126211,18 @@
{
"address": 63250,
"name": null,
+ "symbol": "ram_F712",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16983,
@@ -52758,12 +126243,18 @@
{
"address": 63251,
"name": null,
+ "symbol": "ram_F713",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16987,
@@ -52784,12 +126275,18 @@
{
"address": 63252,
"name": null,
+ "symbol": "ram_F714",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16991,
@@ -52810,12 +126307,18 @@
{
"address": 63253,
"name": null,
+ "symbol": "ram_F715",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16995,
@@ -52836,12 +126339,18 @@
{
"address": 63254,
"name": null,
+ "symbol": "ram_F716",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 16999,
@@ -52862,12 +126371,18 @@
{
"address": 63255,
"name": null,
+ "symbol": "ram_F717",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17003,
@@ -52889,12 +126404,18 @@
{
"address": 63256,
"name": null,
+ "symbol": "ram_F718",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17008,
@@ -52916,12 +126437,18 @@
{
"address": 63257,
"name": null,
+ "symbol": "ram_F719",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17013,
@@ -52943,12 +126470,18 @@
{
"address": 63258,
"name": null,
+ "symbol": "ram_F71A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17018,
@@ -52970,12 +126503,18 @@
{
"address": 63259,
"name": null,
+ "symbol": "ram_F71B",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17023,
@@ -52997,12 +126536,18 @@
{
"address": 63260,
"name": null,
+ "symbol": "ram_F71C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17028,
@@ -53024,12 +126569,18 @@
{
"address": 63261,
"name": null,
+ "symbol": "ram_F71D",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17033,
@@ -53051,12 +126602,18 @@
{
"address": 63262,
"name": null,
+ "symbol": "ram_F71E",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17038,
@@ -53078,12 +126635,18 @@
{
"address": 63263,
"name": null,
+ "symbol": "ram_F71F",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17043,
@@ -53104,12 +126667,18 @@
{
"address": 64240,
"name": null,
+ "symbol": "ram_FAF0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17049,
@@ -53130,12 +126699,18 @@
{
"address": 64242,
"name": null,
+ "symbol": "ram_FAF2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17055,
@@ -53156,12 +126731,18 @@
{
"address": 64244,
"name": null,
+ "symbol": "ram_FAF4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17061,
@@ -53182,12 +126763,18 @@
{
"address": 64246,
"name": null,
+ "symbol": "ram_FAF6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17067,
@@ -53208,12 +126795,18 @@
{
"address": 64248,
"name": null,
+ "symbol": "ram_FAF8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17073,
@@ -53234,12 +126827,18 @@
{
"address": 64250,
"name": null,
+ "symbol": "ram_FAFA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17079,
@@ -53260,12 +126859,18 @@
{
"address": 64252,
"name": null,
+ "symbol": "ram_FAFC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17085,
@@ -53286,12 +126891,18 @@
{
"address": 64254,
"name": null,
+ "symbol": "ram_FAFE",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17091,
@@ -53309,7 +126920,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0000"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R5"
+ }
+ }
+ }
+ }
},
{
"address": 17094,
@@ -53332,7 +126977,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17097,
@@ -53353,12 +127177,31 @@
{
"address": 64240,
"name": null,
+ "symbol": "ram_FAF0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17103,
@@ -53379,12 +127222,18 @@
{
"address": 64242,
"name": null,
+ "symbol": "ram_FAF2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17109,
@@ -53405,12 +127254,18 @@
{
"address": 64244,
"name": null,
+ "symbol": "ram_FAF4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17115,
@@ -53431,12 +127286,18 @@
{
"address": 64246,
"name": null,
+ "symbol": "ram_FAF6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17121,
@@ -53457,12 +127318,18 @@
{
"address": 64248,
"name": null,
+ "symbol": "ram_FAF8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17127,
@@ -53483,12 +127350,18 @@
{
"address": 64250,
"name": null,
+ "symbol": "ram_FAFA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17133,
@@ -53509,12 +127382,18 @@
{
"address": 64252,
"name": null,
+ "symbol": "ram_FAFC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17139,
@@ -53535,12 +127414,18 @@
{
"address": 64254,
"name": null,
+ "symbol": "ram_FAFE",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17145,
@@ -53558,7 +127443,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 1,
+ "hex": "0x0001",
+ "width": 16,
+ "source": "MOV:I.W #H'0001, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0001"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 1,
+ "hex": "0x0001",
+ "width": 16,
+ "source": "MOV:I.W #H'0001, R5"
+ }
+ }
+ }
+ }
},
{
"address": 17148,
@@ -53581,7 +127500,42 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 1,
+ "hex": "0x0001",
+ "width": 16,
+ "source": "MOV:I.W #H'0001, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17151,
@@ -53599,7 +127553,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 2,
+ "hex": "0x0002",
+ "width": 16,
+ "source": "MOV:I.W #H'0002, R5"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0002"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 2,
+ "hex": "0x0002",
+ "width": 16,
+ "source": "MOV:I.W #H'0002, R5"
+ }
+ }
+ }
+ }
},
{
"address": 17154,
@@ -53622,7 +127622,42 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 2,
+ "hex": "0x0002",
+ "width": 16,
+ "source": "MOV:I.W #H'0002, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17157,
@@ -53640,7 +127675,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 3,
+ "hex": "0x0003",
+ "width": 16,
+ "source": "MOV:I.W #H'0003, R5"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0003"
+ ],
+ "known_after": {
+ "registers": {
+ "R5": {
+ "known": true,
+ "value": 3,
+ "hex": "0x0003",
+ "width": 16,
+ "source": "MOV:I.W #H'0003, R5"
+ }
+ }
+ }
+ }
},
{
"address": 17160,
@@ -53663,7 +127744,42 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 3,
+ "hex": "0x0003",
+ "width": 16,
+ "source": "MOV:I.W #H'0003, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17163,
@@ -53685,7 +127801,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 16919,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17164,
@@ -53707,12 +127828,31 @@
{
"address": 65163,
"name": "P6DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 0 of P6DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17164,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17168,
@@ -53734,12 +127874,18 @@
{
"address": 62805,
"name": null,
+ "symbol": "mem_F555",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17164,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17173,
@@ -53761,12 +127907,18 @@
{
"address": 62634,
"name": null,
+ "symbol": "mem_F4AA",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17164,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17178,
@@ -53788,12 +127940,18 @@
{
"address": 62805,
"name": null,
+ "symbol": "mem_F555",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17164,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17183,
@@ -53814,12 +127972,18 @@
{
"address": 65163,
"name": "P6DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 0 of P6DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17164,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17187,
@@ -53841,7 +128005,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17164,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17188,
@@ -53859,7 +128028,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17188,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 56,
+ "hex": "0x0038",
+ "width": 16,
+ "source": "MOV:I.W #H'0038, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0038"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 56,
+ "hex": "0x0038",
+ "width": 16,
+ "source": "MOV:I.W #H'0038, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17191,
@@ -53877,7 +128092,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17188,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 56,
+ "hex": "0x0038",
+ "width": 16,
+ "source": "MOV:I.W #H'0038, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 17194,
@@ -53900,7 +128156,189 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17188,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 56,
+ "hex": "0x0038",
+ "width": 16,
+ "source": "MOV:I.W #H'0038, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17197,
@@ -53918,7 +128356,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17188,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 1,
+ "hex": "0x0001",
+ "width": 16,
+ "source": "MOV:I.W #H'0001, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0001"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 1,
+ "hex": "0x0001",
+ "width": 16,
+ "source": "MOV:I.W #H'0001, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17200,
@@ -53936,7 +128420,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17188,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 1,
+ "hex": "0x0001",
+ "width": 16,
+ "source": "MOV:I.W #H'0001, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 17203,
@@ -53960,7 +128485,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17188,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 1,
+ "hex": "0x0001",
+ "width": 16,
+ "source": "MOV:I.W #H'0001, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17206,
@@ -53978,7 +128553,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17188,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 14,
+ "hex": "0x000E",
+ "width": 16,
+ "source": "MOV:I.W #H'000E, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x000E"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 14,
+ "hex": "0x000E",
+ "width": 16,
+ "source": "MOV:I.W #H'000E, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17209,
@@ -53996,7 +128617,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17188,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 14,
+ "hex": "0x000E",
+ "width": 16,
+ "source": "MOV:I.W #H'000E, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 17212,
@@ -54019,7 +128681,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17188,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 14,
+ "hex": "0x000E",
+ "width": 16,
+ "source": "MOV:I.W #H'000E, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17215,
@@ -54037,7 +128749,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17188,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 6,
+ "hex": "0x0006",
+ "width": 16,
+ "source": "MOV:I.W #H'0006, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0006"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 6,
+ "hex": "0x0006",
+ "width": 16,
+ "source": "MOV:I.W #H'0006, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17218,
@@ -54055,7 +128813,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17188,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x0004"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 6,
+ "hex": "0x0006",
+ "width": 16,
+ "source": "MOV:I.W #H'0006, R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ }
+ }
+ }
+ }
},
{
"address": 17221,
@@ -54079,7 +128878,57 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17188,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": true,
+ "value": 6,
+ "hex": "0x0006",
+ "width": 16,
+ "source": "MOV:I.W #H'0006, R4"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": true,
+ "value": 4,
+ "hex": "0x0004",
+ "width": 16,
+ "source": "MOV:I.W #H'0004, R5"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17224,
@@ -54102,7 +128951,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17188,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17227,
@@ -54124,7 +128980,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17188,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17228,
@@ -54146,12 +129007,31 @@
{
"address": 65280,
"name": "IPRA",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "IPRA = H'70 (irq0 priority=7; irq1 priority=0)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17228,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17233,
@@ -54173,12 +129053,18 @@
{
"address": 65281,
"name": "IPRB",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "IPRB = H'44 (irq2/irq3 priority=4; irq4/irq5 priority=4)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17228,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17238,
@@ -54200,12 +129086,18 @@
{
"address": 65282,
"name": "IPRC",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "IPRC = H'66 (FRT1 priority=6; FRT2 priority=6)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17228,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17243,
@@ -54227,12 +129119,18 @@
{
"address": 65283,
"name": "IPRD",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "IPRD = H'00 (FRT3 priority=0; 8-bit timer priority=0)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17228,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17248,
@@ -54254,12 +129152,18 @@
{
"address": 65284,
"name": "IPRE",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "IPRE = H'50 (SCI1 priority=5; SCI2 priority=0)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17228,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17253,
@@ -54281,12 +129185,18 @@
{
"address": 65285,
"name": "IPRF",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "IPRF = H'40 (A/D priority=4)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17228,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17258,
@@ -54308,6 +129218,7 @@
{
"address": 65242,
"name": "SCI1_SCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -54327,6 +129238,11 @@
"value_hex": "H'7C"
}
]
+ },
+ "dataflow": {
+ "block": 17228,
+ "changes": [],
+ "notes": []
}
},
{
@@ -54349,12 +129265,18 @@
{
"address": 65168,
"name": "FRT1_TCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set OCIEA (bit 5) of FRT1_TCR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17228,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17266,
@@ -54376,12 +129298,18 @@
{
"address": 65184,
"name": "FRT2_TCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set OCIEA (bit 5) of FRT2_TCR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17228,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17270,
@@ -54403,12 +129331,18 @@
{
"address": 65256,
"name": "ADCSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set ADIE (bit 6) of ADCSR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17228,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17274,
@@ -54430,12 +129364,18 @@
{
"address": 65277,
"name": "SYSCR2",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set IRQ3E (bit 4) of SYSCR2",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17228,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17278,
@@ -54457,12 +129397,18 @@
{
"address": 65277,
"name": "SYSCR2",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set IRQ4E (bit 5) of SYSCR2",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17228,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17282,
@@ -54484,12 +129430,18 @@
{
"address": 65166,
"name": "P7DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17228,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17286,
@@ -54511,7 +129463,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17228,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17288,
@@ -54533,12 +129490,31 @@
{
"address": 65260,
"name": "WDT_TCSR_R",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "WDT_TCSR_R = H'A53F (OVF=0 WT/IT=0 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, interval IRQ0, clock phi/4096)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17288,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17294,
@@ -54557,7 +129533,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17294,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 768,
+ "hex": "0x0300",
+ "width": 16,
+ "source": "LDC.W #H'0300, SR"
+ }
+ }
+ ],
+ "notes": [
+ "SR = 0x0300"
+ ],
+ "known_after": {
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 768,
+ "hex": "0x0300",
+ "width": 16,
+ "source": "LDC.W #H'0300, SR"
+ }
+ }
+ }
+ }
},
{
"address": 17298,
@@ -54578,7 +129588,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17294,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "control": {
+ "SR": {
+ "known": true,
+ "value": 768,
+ "hex": "0x0300",
+ "width": 16,
+ "source": "LDC.W #H'0300, SR"
+ }
+ }
+ }
+ }
},
{
"address": 17299,
@@ -54598,7 +129624,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17299,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17300,
@@ -54620,12 +129651,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17300,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17305,
@@ -54648,7 +129698,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17300,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17308,
@@ -54670,12 +129725,31 @@
{
"address": 64259,
"name": null,
+ "symbol": "ram_FB03",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17308,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17312,
@@ -54697,7 +129771,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17308,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17315,
@@ -54718,12 +129797,45 @@
{
"address": 63286,
"name": null,
+ "symbol": "ram_F736",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17315,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R3 unknown after memory load"
+ ]
+ }
},
{
"address": 17319,
@@ -54746,7 +129858,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17315,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17322,
@@ -54768,12 +129885,45 @@
{
"address": 63134,
"name": null,
+ "symbol": "ram_F69E",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17322,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 17326,
@@ -54795,12 +129945,20 @@
{
"address": 63166,
"name": null,
+ "symbol": "ram_F6BE",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17322,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 17330,
@@ -54819,7 +129977,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17322,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17332,
@@ -54841,7 +130019,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17322,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17334,
@@ -54860,7 +130043,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17334,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17336,
@@ -54882,7 +130097,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17334,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17338,
@@ -54901,7 +130121,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17338,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17340,
@@ -54923,7 +130175,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17338,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17342,
@@ -54942,7 +130199,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17342,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17344,
@@ -54964,7 +130253,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17342,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17346,
@@ -54983,7 +130277,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17346,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17348,
@@ -55005,7 +130331,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17346,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17350,
@@ -55024,7 +130355,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17350,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17352,
@@ -55046,7 +130409,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17350,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17354,
@@ -55069,7 +130437,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17354,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17357,
@@ -55093,7 +130637,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17354,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17359,
@@ -55117,7 +130666,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17359,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17361,
@@ -55135,7 +130860,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17359,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17364,
@@ -55157,7 +130900,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17359,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17366,
@@ -55180,7 +130928,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17366,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17369,
@@ -55204,7 +131128,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17369,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17371,
@@ -55228,7 +131157,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17371,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17373,
@@ -55246,7 +131351,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17371,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17376,
@@ -55268,7 +131391,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17371,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17378,
@@ -55291,7 +131419,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17378,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17381,
@@ -55315,7 +131619,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17381,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17383,
@@ -55339,7 +131648,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17383,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17385,
@@ -55357,7 +131842,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17383,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17388,
@@ -55379,7 +131882,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17383,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17390,
@@ -55402,7 +131910,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17390,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17393,
@@ -55426,7 +132110,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17393,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17395,
@@ -55450,7 +132139,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17395,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17397,
@@ -55468,7 +132333,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17395,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17400,
@@ -55490,7 +132373,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17395,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17402,
@@ -55513,7 +132401,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17402,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17405,
@@ -55537,7 +132601,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17405,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17407,
@@ -55559,12 +132628,31 @@
{
"address": 63344,
"name": null,
+ "symbol": "ram_F770",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17407,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17412,
@@ -55586,12 +132674,18 @@
{
"address": 63346,
"name": null,
+ "symbol": "ram_F772",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17407,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17416,
@@ -55614,7 +132708,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17407,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17419,
@@ -55638,7 +132908,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17407,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17421,
@@ -55662,7 +132937,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17421,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17423,
@@ -55680,7 +133131,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17421,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17426,
@@ -55702,7 +133171,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17421,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17428,
@@ -55724,12 +133198,31 @@
{
"address": 63344,
"name": null,
+ "symbol": "ram_F770",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17428,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17433,
@@ -55750,12 +133243,18 @@
{
"address": 63346,
"name": null,
+ "symbol": "ram_F772",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17428,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17437,
@@ -55779,7 +133278,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17428,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17440,
@@ -55802,7 +133477,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17440,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17442,
@@ -55824,12 +133504,45 @@
{
"address": 63134,
"name": null,
+ "symbol": "ram_F69E",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17442,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 17446,
@@ -55851,12 +133564,18 @@
{
"address": 63166,
"name": null,
+ "symbol": "ram_F6BE",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17442,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17450,
@@ -55878,12 +133597,18 @@
{
"address": 64258,
"name": null,
+ "symbol": "ram_FB02",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17442,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17454,
@@ -55904,7 +133629,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17442,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17455,
@@ -55925,12 +133655,45 @@
{
"address": 63223,
"name": null,
+ "symbol": "ram_F6F7",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17455,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 17459,
@@ -55948,7 +133711,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17455,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17461,
@@ -55971,7 +133739,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17455,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17463,
@@ -55989,7 +133762,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17463,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17465,
@@ -56012,7 +133803,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17463,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17467,
@@ -56033,12 +133829,31 @@
{
"address": 63223,
"name": null,
+ "symbol": "ram_F6F7",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17467,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17471,
@@ -56056,7 +133871,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17467,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 2,
+ "hex": "0x0002",
+ "width": 16,
+ "source": "MOV:I.W #H'0002, R4"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0002"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 2,
+ "hex": "0x0002",
+ "width": 16,
+ "source": "MOV:I.W #H'0002, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17474,
@@ -56079,7 +133928,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17467,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 2,
+ "hex": "0x0002",
+ "width": 16,
+ "source": "MOV:I.W #H'0002, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17476,
@@ -56101,12 +133966,31 @@
{
"address": 63223,
"name": null,
+ "symbol": "ram_F6F7",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17476,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17481,
@@ -56124,7 +134008,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17476,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R4"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0000"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17484,
@@ -56147,7 +134065,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17476,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17486,
@@ -56169,12 +134103,31 @@
{
"address": 63223,
"name": null,
+ "symbol": "ram_F6F7",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17486,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17491,
@@ -56192,7 +134145,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17486,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 1,
+ "hex": "0x0001",
+ "width": 16,
+ "source": "MOV:I.W #H'0001, R4"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0001"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 1,
+ "hex": "0x0001",
+ "width": 16,
+ "source": "MOV:I.W #H'0001, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17494,
@@ -56213,7 +134200,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17494,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17495,
@@ -56234,12 +134226,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17495,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17500,
@@ -56261,7 +134272,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17495,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17503,
@@ -56282,12 +134298,31 @@
{
"address": 64259,
"name": null,
+ "symbol": "ram_FB03",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17503,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17507,
@@ -56310,7 +134345,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17503,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17510,
@@ -56332,12 +134372,45 @@
{
"address": 63288,
"name": null,
+ "symbol": "ram_F738",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17510,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R3 unknown after memory load"
+ ]
+ }
},
{
"address": 17514,
@@ -56359,7 +134432,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17510,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17517,
@@ -56380,12 +134458,45 @@
{
"address": 63132,
"name": null,
+ "symbol": "ram_F69C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17517,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 17521,
@@ -56406,12 +134517,20 @@
{
"address": 63164,
"name": null,
+ "symbol": "ram_F6BC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17517,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 17525,
@@ -56430,7 +134549,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17517,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17527,
@@ -56453,7 +134592,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17517,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17529,
@@ -56472,7 +134616,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17529,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17531,
@@ -56495,7 +134671,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17529,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17533,
@@ -56514,7 +134695,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17533,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17535,
@@ -56537,7 +134750,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17533,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17537,
@@ -56556,7 +134774,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17537,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17539,
@@ -56579,7 +134829,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17537,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17541,
@@ -56598,7 +134853,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17541,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17543,
@@ -56621,7 +134908,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17541,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17545,
@@ -56640,7 +134932,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17545,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17547,
@@ -56663,7 +134987,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17545,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17549,
@@ -56687,7 +135016,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17549,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17552,
@@ -56710,7 +135215,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17549,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17554,
@@ -56733,7 +135243,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17554,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17556,
@@ -56751,7 +135437,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17554,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17559,
@@ -56774,7 +135478,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17554,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17561,
@@ -56798,7 +135507,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17561,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17564,
@@ -56821,7 +135706,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17564,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17566,
@@ -56844,7 +135734,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17566,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17568,
@@ -56862,7 +135928,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17566,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17571,
@@ -56885,7 +135969,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17566,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17573,
@@ -56909,7 +135998,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17573,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17576,
@@ -56932,7 +136197,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17576,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17578,
@@ -56955,7 +136225,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17578,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17580,
@@ -56973,7 +136419,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17578,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17583,
@@ -56996,7 +136460,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17578,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17585,
@@ -57020,7 +136489,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17585,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17588,
@@ -57043,7 +136688,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17588,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17590,
@@ -57066,7 +136716,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17590,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17592,
@@ -57084,7 +136910,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17590,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17595,
@@ -57107,7 +136951,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17590,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17597,
@@ -57131,7 +136980,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17597,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17600,
@@ -57154,7 +137179,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17600,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17602,
@@ -57176,12 +137206,31 @@
{
"address": 63344,
"name": null,
+ "symbol": "ram_F770",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17602,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17607,
@@ -57202,12 +137251,18 @@
{
"address": 63346,
"name": null,
+ "symbol": "ram_F772",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17602,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17611,
@@ -57231,7 +137286,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17602,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17614,
@@ -57254,7 +137485,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17602,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17616,
@@ -57277,7 +137513,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17616,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17618,
@@ -57295,7 +137707,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17616,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17621,
@@ -57318,7 +137748,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17616,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17623,
@@ -57340,12 +137775,31 @@
{
"address": 63344,
"name": null,
+ "symbol": "ram_F770",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17623,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17628,
@@ -57367,12 +137821,18 @@
{
"address": 63346,
"name": null,
+ "symbol": "ram_F772",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17623,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17632,
@@ -57395,7 +137855,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17623,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17635,
@@ -57419,7 +138055,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17635,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17637,
@@ -57440,12 +138081,45 @@
{
"address": 63132,
"name": null,
+ "symbol": "ram_F69C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17637,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 17641,
@@ -57466,12 +138140,18 @@
{
"address": 63164,
"name": null,
+ "symbol": "ram_F6BC",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17637,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17645,
@@ -57492,12 +138172,18 @@
{
"address": 64258,
"name": null,
+ "symbol": "ram_FB02",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17637,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17649,
@@ -57519,7 +138205,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17637,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17650,
@@ -57541,12 +138232,45 @@
{
"address": 63224,
"name": null,
+ "symbol": "ram_F6F8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17650,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 17654,
@@ -57564,7 +138288,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17650,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17656,
@@ -57586,7 +138315,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17650,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17658,
@@ -57604,7 +138338,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17658,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17660,
@@ -57626,7 +138378,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17658,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17662,
@@ -57648,12 +138405,31 @@
{
"address": 63224,
"name": null,
+ "symbol": "ram_F6F8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17662,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17666,
@@ -57671,7 +138447,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17662,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 2,
+ "hex": "0x0002",
+ "width": 16,
+ "source": "MOV:I.W #H'0002, R4"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0002"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 2,
+ "hex": "0x0002",
+ "width": 16,
+ "source": "MOV:I.W #H'0002, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17669,
@@ -57695,7 +138505,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17662,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 2,
+ "hex": "0x0002",
+ "width": 16,
+ "source": "MOV:I.W #H'0002, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17671,
@@ -57717,12 +138543,31 @@
{
"address": 63224,
"name": null,
+ "symbol": "ram_F6F8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17671,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17676,
@@ -57740,7 +138585,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17671,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R4"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0000"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17679,
@@ -57764,7 +138643,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17671,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17681,
@@ -57786,12 +138681,31 @@
{
"address": 63224,
"name": null,
+ "symbol": "ram_F6F8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17681,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17686,
@@ -57809,7 +138723,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17681,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 1,
+ "hex": "0x0001",
+ "width": 16,
+ "source": "MOV:I.W #H'0001, R4"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0001"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 1,
+ "hex": "0x0001",
+ "width": 16,
+ "source": "MOV:I.W #H'0001, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17689,
@@ -57831,7 +138779,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17689,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17690,
@@ -57853,12 +138806,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17690,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17695,
@@ -57881,7 +138853,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17690,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17698,
@@ -57903,12 +138880,31 @@
{
"address": 64259,
"name": null,
+ "symbol": "ram_FB03",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17698,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17702,
@@ -57930,7 +138926,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17698,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17705,
@@ -57951,12 +138952,45 @@
{
"address": 63290,
"name": null,
+ "symbol": "ram_F73A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17705,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R3 unknown after memory load"
+ ]
+ }
},
{
"address": 17709,
@@ -57979,7 +139013,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17705,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17712,
@@ -58001,12 +139040,45 @@
{
"address": 63130,
"name": null,
+ "symbol": "ram_F69A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17712,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 17716,
@@ -58028,12 +139100,20 @@
{
"address": 63162,
"name": null,
+ "symbol": "ram_F6BA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17712,
+ "changes": [],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 17720,
@@ -58052,7 +139132,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17712,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17722,
@@ -58074,7 +139174,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17712,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17724,
@@ -58093,7 +139198,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17724,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17726,
@@ -58115,7 +139252,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17724,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17728,
@@ -58134,7 +139276,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17728,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17730,
@@ -58156,7 +139330,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17728,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17732,
@@ -58175,7 +139354,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17732,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17734,
@@ -58197,7 +139408,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17732,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17736,
@@ -58216,7 +139432,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17736,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17738,
@@ -58238,7 +139486,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17736,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17740,
@@ -58257,7 +139510,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17740,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 17742,
@@ -58279,7 +139564,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17740,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17744,
@@ -58302,7 +139592,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17744,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17747,
@@ -58326,7 +139792,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17744,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17749,
@@ -58350,7 +139821,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17749,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17751,
@@ -58368,7 +140015,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17749,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17754,
@@ -58390,7 +140055,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17749,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17756,
@@ -58413,7 +140083,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17756,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17759,
@@ -58437,7 +140283,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17759,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17761,
@@ -58461,7 +140312,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17761,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17763,
@@ -58479,7 +140506,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17761,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17766,
@@ -58501,7 +140546,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17761,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17768,
@@ -58524,7 +140574,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17768,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17771,
@@ -58548,7 +140774,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17771,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17773,
@@ -58572,7 +140803,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17773,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17775,
@@ -58590,7 +140997,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17773,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17778,
@@ -58612,7 +141037,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17773,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17780,
@@ -58635,7 +141065,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17780,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17783,
@@ -58659,7 +141265,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17783,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17785,
@@ -58683,7 +141294,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17785,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17787,
@@ -58701,7 +141488,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17785,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17790,
@@ -58723,7 +141528,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17785,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17792,
@@ -58746,7 +141556,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17792,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17795,
@@ -58770,7 +141756,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17795,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17797,
@@ -58792,12 +141783,31 @@
{
"address": 63344,
"name": null,
+ "symbol": "ram_F770",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17797,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17802,
@@ -58819,12 +141829,18 @@
{
"address": 63346,
"name": null,
+ "symbol": "ram_F772",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17797,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17806,
@@ -58847,7 +141863,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17797,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17809,
@@ -58871,7 +142063,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17797,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17811,
@@ -58895,7 +142092,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17811,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17813,
@@ -58913,7 +142286,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17811,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17816,
@@ -58935,7 +142326,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17811,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17818,
@@ -58957,12 +142353,31 @@
{
"address": 63344,
"name": null,
+ "symbol": "ram_F770",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17818,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17823,
@@ -58983,12 +142398,18 @@
{
"address": 63346,
"name": null,
+ "symbol": "ram_F772",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17818,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17827,
@@ -59012,7 +142433,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17818,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 17830,
@@ -59035,7 +142632,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17830,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17832,
@@ -59057,12 +142659,45 @@
{
"address": 63130,
"name": null,
+ "symbol": "ram_F69A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17832,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 17836,
@@ -59084,12 +142719,18 @@
{
"address": 63162,
"name": null,
+ "symbol": "ram_F6BA",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17832,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17840,
@@ -59111,12 +142752,18 @@
{
"address": 64258,
"name": null,
+ "symbol": "ram_FB02",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17832,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17844,
@@ -59137,7 +142784,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17832,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17845,
@@ -59158,12 +142810,45 @@
{
"address": 63225,
"name": null,
+ "symbol": "ram_F6F9",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17845,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after arithmetic memory source"
+ ]
+ }
},
{
"address": 17849,
@@ -59181,7 +142866,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17845,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17851,
@@ -59204,7 +142894,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17845,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17853,
@@ -59222,7 +142917,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17853,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17855,
@@ -59245,7 +142958,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17853,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 17857,
@@ -59266,12 +142984,31 @@
{
"address": 63225,
"name": null,
+ "symbol": "ram_F6F9",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17857,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17861,
@@ -59289,7 +143026,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17857,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 2,
+ "hex": "0x0002",
+ "width": 16,
+ "source": "MOV:I.W #H'0002, R4"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0002"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 2,
+ "hex": "0x0002",
+ "width": 16,
+ "source": "MOV:I.W #H'0002, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17864,
@@ -59312,7 +143083,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17857,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 2,
+ "hex": "0x0002",
+ "width": 16,
+ "source": "MOV:I.W #H'0002, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17866,
@@ -59334,12 +143121,31 @@
{
"address": 63225,
"name": null,
+ "symbol": "ram_F6F9",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17866,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17871,
@@ -59357,7 +143163,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17866,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R4"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0000"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17874,
@@ -59380,7 +143220,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17866,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17876,
@@ -59402,12 +143258,31 @@
{
"address": 63225,
"name": null,
+ "symbol": "ram_F6F9",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17876,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 17881,
@@ -59425,7 +143300,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17876,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 1,
+ "hex": "0x0001",
+ "width": 16,
+ "source": "MOV:I.W #H'0001, R4"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0001"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 1,
+ "hex": "0x0001",
+ "width": 16,
+ "source": "MOV:I.W #H'0001, R4"
+ }
+ }
+ }
+ }
},
{
"address": 17884,
@@ -59446,7 +143355,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 17884,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 18671,
@@ -59467,12 +143381,45 @@
{
"address": 63284,
"name": null,
+ "symbol": "ram_F734",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18671,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 18675,
@@ -59493,12 +143440,18 @@
{
"address": 63282,
"name": null,
+ "symbol": "ram_F732",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18671,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 18679,
@@ -59522,7 +143475,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18671,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 18681,
@@ -59544,7 +143673,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18671,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 18682,
@@ -59566,12 +143700,31 @@
{
"address": 64259,
"name": null,
+ "symbol": "ram_FB03",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18682,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 18686,
@@ -59593,7 +143746,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18682,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 18688,
@@ -59615,12 +143773,31 @@
{
"address": 63282,
"name": null,
+ "symbol": "ram_F732",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18688,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 18693,
@@ -59643,7 +143820,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18688,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 18695,
@@ -59664,12 +143846,31 @@
{
"address": 63282,
"name": null,
+ "symbol": "ram_F732",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18695,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 18701,
@@ -59692,7 +143893,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18695,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 18703,
@@ -59713,12 +143919,31 @@
{
"address": 57836,
"name": null,
+ "symbol": "mem_E1EC",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18703,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 18707,
@@ -59741,7 +143966,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18703,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 18709,
@@ -59762,12 +143992,45 @@
{
"address": 57836,
"name": null,
+ "symbol": "mem_E1EC",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18709,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 18713,
@@ -59786,7 +144049,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18709,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 18717,
@@ -59807,12 +144090,18 @@
{
"address": 59884,
"name": null,
+ "symbol": "mem_E9EC",
"region": "program_or_external",
"kind": "program"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18709,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 18721,
@@ -59830,7 +144119,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18709,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ }
+ }
+ ],
+ "notes": [
+ "R2 = 0x80"
+ ],
+ "known_after": {
+ "registers": {
+ "R2": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ }
+ }
+ }
+ }
},
{
"address": 18723,
@@ -59848,7 +144171,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18709,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 246,
+ "hex": "0x00F6",
+ "width": 16,
+ "source": "MOV:I.W #H'00F6, R3"
+ }
+ }
+ ],
+ "notes": [
+ "R3 = 0x00F6"
+ ],
+ "known_after": {
+ "registers": {
+ "R2": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ },
+ "R3": {
+ "known": true,
+ "value": 246,
+ "hex": "0x00F6",
+ "width": 16,
+ "source": "MOV:I.W #H'00F6, R3"
+ }
+ }
+ }
+ }
},
{
"address": 18726,
@@ -59871,7 +144235,189 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18709,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R2"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": true,
+ "value": 246,
+ "hex": "0x00F6",
+ "width": 16,
+ "source": "MOV:I.W #H'00F6, R3"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 18729,
@@ -59892,12 +144438,31 @@
{
"address": 63342,
"name": null,
+ "symbol": "ram_F76E",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18729,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 18733,
@@ -59920,7 +144485,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18729,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 18735,
@@ -59941,12 +144511,45 @@
{
"address": 63282,
"name": null,
+ "symbol": "ram_F732",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18735,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 18739,
@@ -59965,7 +144568,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18735,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 18741,
@@ -59984,7 +144607,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18735,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 18743,
@@ -60003,7 +144646,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18735,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SHLL.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 18747,
@@ -60025,7 +144688,619 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "indirect_flow": {
+ "address": 18747,
+ "instruction": "JSR @R0",
+ "kind": "call",
+ "target_register": "R0",
+ "confidence": "table_load",
+ "table": {
+ "base": 18750,
+ "index_register": "R0",
+ "target_register": "R0",
+ "load_address": 18743,
+ "load_instruction": "MOV:G.W @(H'493E,R0), R0",
+ "entry_size": 2,
+ "entry_count": 52,
+ "decoded_target_count": 0,
+ "entries": [
+ {
+ "index": 0,
+ "entry_address": 18750,
+ "target": 25193,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 1,
+ "entry_address": 18752,
+ "target": 25372,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 2,
+ "entry_address": 18754,
+ "target": 25318,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 3,
+ "entry_address": 18756,
+ "target": 25292,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 4,
+ "entry_address": 18758,
+ "target": 25268,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 5,
+ "entry_address": 18760,
+ "target": 25248,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 6,
+ "entry_address": 18762,
+ "target": 25224,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 7,
+ "entry_address": 18764,
+ "target": 25205,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 8,
+ "entry_address": 18766,
+ "target": 25192,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 9,
+ "entry_address": 18768,
+ "target": 33086,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 10,
+ "entry_address": 18770,
+ "target": 33062,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 11,
+ "entry_address": 18772,
+ "target": 33042,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 12,
+ "entry_address": 18774,
+ "target": 33022,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 13,
+ "entry_address": 18776,
+ "target": 33002,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 14,
+ "entry_address": 18778,
+ "target": 32974,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 15,
+ "entry_address": 18780,
+ "target": 32938,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 16,
+ "entry_address": 18782,
+ "target": 25192,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 17,
+ "entry_address": 18784,
+ "target": 37844,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 18,
+ "entry_address": 18786,
+ "target": 37822,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 19,
+ "entry_address": 18788,
+ "target": 25192,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 20,
+ "entry_address": 18790,
+ "target": 37802,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 21,
+ "entry_address": 18792,
+ "target": 37778,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 22,
+ "entry_address": 18794,
+ "target": 37756,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 23,
+ "entry_address": 18796,
+ "target": 37722,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 24,
+ "entry_address": 18798,
+ "target": 37670,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 25,
+ "entry_address": 18800,
+ "target": 37642,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 26,
+ "entry_address": 18802,
+ "target": 37618,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 27,
+ "entry_address": 18804,
+ "target": 37614,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 28,
+ "entry_address": 18806,
+ "target": 37580,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 29,
+ "entry_address": 18808,
+ "target": 5627,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 30,
+ "entry_address": 18810,
+ "target": 983,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 31,
+ "entry_address": 18812,
+ "target": 9736,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 32,
+ "entry_address": 18814,
+ "target": 7671,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 33,
+ "entry_address": 18816,
+ "target": 12928,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 34,
+ "entry_address": 18818,
+ "target": 7671,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 35,
+ "entry_address": 18820,
+ "target": 13456,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 36,
+ "entry_address": 18822,
+ "target": 7671,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 37,
+ "entry_address": 18824,
+ "target": 12807,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 38,
+ "entry_address": 18826,
+ "target": 6912,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 39,
+ "entry_address": 18828,
+ "target": 7935,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 40,
+ "entry_address": 18830,
+ "target": 27417,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 41,
+ "entry_address": 18832,
+ "target": 5627,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 42,
+ "entry_address": 18834,
+ "target": 983,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 43,
+ "entry_address": 18836,
+ "target": 9736,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 44,
+ "entry_address": 18838,
+ "target": 7671,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 45,
+ "entry_address": 18840,
+ "target": 12928,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 46,
+ "entry_address": 18842,
+ "target": 7671,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 47,
+ "entry_address": 18844,
+ "target": 13456,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 48,
+ "entry_address": 18846,
+ "target": 5623,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 49,
+ "entry_address": 18848,
+ "target": 12804,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 50,
+ "entry_address": 18850,
+ "target": 6695,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ },
+ {
+ "index": 51,
+ "entry_address": 18852,
+ "target": 1565,
+ "target_label": null,
+ "target_region": "program_or_external",
+ "decoded_code": false
+ }
+ ]
+ },
+ "summary": "JSR @R0 uses R0 loaded from pointer table H'493E via R0 (0/52 decoded targets)"
+ },
+ "dataflow": {
+ "block": 18735,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 18749,
@@ -60047,7 +145322,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 18749,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25094,
@@ -60066,7 +145346,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25094,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R5"
+ ]
+ }
},
{
"address": 25098,
@@ -60084,7 +145396,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25094,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25101,
@@ -60107,7 +145424,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25094,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25103,
@@ -60125,7 +145447,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25103,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 25106,
@@ -60147,7 +145487,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25103,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25108,
@@ -60170,7 +145515,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25108,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25110,
@@ -60193,7 +145543,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25110,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25112,
@@ -60212,7 +145567,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25112,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R5 unknown after arithmetic"
+ ]
+ }
},
{
"address": 25116,
@@ -60231,7 +145618,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25112,
+ "changes": [],
+ "notes": [
+ "R5 unknown after arithmetic"
+ ]
+ }
},
{
"address": 25120,
@@ -60254,7 +145648,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25112,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25122,
@@ -60273,7 +145672,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25122,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R5 unknown after arithmetic"
+ ]
+ }
},
{
"address": 25126,
@@ -60292,7 +145723,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25122,
+ "changes": [],
+ "notes": [
+ "R5 unknown after arithmetic"
+ ]
+ }
},
{
"address": 25130,
@@ -60313,7 +145751,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25130,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25131,
@@ -60332,7 +145775,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25131,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after MOV source"
+ ]
+ }
},
{
"address": 25133,
@@ -60351,7 +145826,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25131,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R5"
+ ]
+ }
},
{
"address": 25135,
@@ -60370,7 +145865,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25131,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 25137,
@@ -60389,7 +145904,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25131,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 25140,
@@ -60407,7 +145942,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25131,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25142,
@@ -60429,7 +145969,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25131,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25144,
@@ -60447,7 +145992,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25144,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 25146,
@@ -60469,7 +146032,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25144,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25148,
@@ -60487,7 +146055,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25148,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 25150,
@@ -60509,7 +146095,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25148,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25152,
@@ -60527,7 +146118,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25152,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 25154,
@@ -60549,7 +146158,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25152,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25156,
@@ -60567,7 +146181,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25156,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 25158,
@@ -60589,7 +146221,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25156,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25160,
@@ -60607,7 +146244,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25160,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0000"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R4"
+ }
+ }
+ }
+ }
},
{
"address": 25163,
@@ -60631,7 +146314,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25160,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "MOV:I.W #H'0000, R4"
+ }
+ }
+ }
+ }
},
{
"address": 25165,
@@ -60649,7 +146348,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25165,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 25167,
@@ -60672,7 +146389,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25165,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25169,
@@ -60690,7 +146412,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25169,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 128,
+ "hex": "0x0080",
+ "width": 16,
+ "source": "MOV:I.W #H'0080, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0080"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 128,
+ "hex": "0x0080",
+ "width": 16,
+ "source": "MOV:I.W #H'0080, R4"
+ }
+ }
+ }
+ }
},
{
"address": 25172,
@@ -60713,7 +146481,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25169,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 128,
+ "hex": "0x0080",
+ "width": 16,
+ "source": "MOV:I.W #H'0080, R4"
+ }
+ }
+ }
+ }
},
{
"address": 25174,
@@ -60731,7 +146515,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25174,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 25176,
@@ -60753,7 +146555,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25174,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 25178,
@@ -60771,7 +146578,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25178,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 384,
+ "hex": "0x0180",
+ "width": 16,
+ "source": "MOV:I.W #H'0180, R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 = 0x0180"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 384,
+ "hex": "0x0180",
+ "width": 16,
+ "source": "MOV:I.W #H'0180, R4"
+ }
+ }
+ }
+ }
},
{
"address": 25181,
@@ -60795,7 +146648,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25178,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 384,
+ "hex": "0x0180",
+ "width": 16,
+ "source": "MOV:I.W #H'0180, R4"
+ }
+ }
+ }
+ }
},
{
"address": 25183,
@@ -60814,7 +146683,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25183,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R4"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 cleared"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R4"
+ }
+ }
+ }
+ }
},
{
"address": 25185,
@@ -60832,7 +146747,48 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25183,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 511,
+ "hex": "0x01FF",
+ "width": 16,
+ "source": "MOV:I.W #H'01FF, R5"
+ }
+ }
+ ],
+ "notes": [
+ "R5 = 0x01FF"
+ ],
+ "known_after": {
+ "registers": {
+ "R4": {
+ "known": true,
+ "value": 0,
+ "hex": "0x0000",
+ "width": 16,
+ "source": "CLR.W R4"
+ },
+ "R5": {
+ "known": true,
+ "value": 511,
+ "hex": "0x01FF",
+ "width": 16,
+ "source": "MOV:I.W #H'01FF, R5"
+ }
+ }
+ }
+ }
},
{
"address": 25188,
@@ -60851,7 +146807,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25188,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R5 unknown after arithmetic"
+ ]
+ }
},
{
"address": 25190,
@@ -60872,7 +146860,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 25188,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47654,
@@ -60894,12 +146887,31 @@
{
"address": 63936,
"name": null,
+ "symbol": "ram_F9C0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47654,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47658,
@@ -60921,7 +146933,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47654,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47660,
@@ -60943,12 +146960,31 @@
{
"address": 63936,
"name": null,
+ "symbol": "ram_F9C0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47665,
@@ -60970,12 +147006,18 @@
{
"address": 63940,
"name": null,
+ "symbol": "ram_F9C4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47670,
@@ -60997,12 +147039,33 @@
{
"address": 63568,
"name": null,
+ "symbol": "ram_F850",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 47674,
@@ -61024,12 +147087,18 @@
{
"address": 63576,
"name": null,
+ "symbol": "ram_F858",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47678,
@@ -61051,12 +147120,20 @@
{
"address": 63570,
"name": null,
+ "symbol": "ram_F852",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 47682,
@@ -61078,12 +147155,18 @@
{
"address": 63578,
"name": null,
+ "symbol": "ram_F85A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47686,
@@ -61105,12 +147188,20 @@
{
"address": 63572,
"name": null,
+ "symbol": "ram_F854",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 47690,
@@ -61132,12 +147223,18 @@
{
"address": 63580,
"name": null,
+ "symbol": "ram_F85C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47694,
@@ -61155,7 +147252,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": true,
+ "value": 90,
+ "hex": "0x5A",
+ "width": 8,
+ "source": "MOV:E.B #H'5A, R0"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x5A"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 90,
+ "hex": "0x5A",
+ "width": 8,
+ "source": "MOV:E.B #H'5A, R0"
+ }
+ }
+ }
+ }
},
{
"address": 47696,
@@ -61177,12 +147308,36 @@
{
"address": 63576,
"name": null,
+ "symbol": "ram_F858",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": true,
+ "value": 90,
+ "hex": "0x5A",
+ "width": 8,
+ "source": "MOV:E.B #H'5A, R0"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 47700,
@@ -61204,12 +147359,20 @@
{
"address": 63577,
"name": null,
+ "symbol": "ram_F859",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 47704,
@@ -61231,12 +147394,20 @@
{
"address": 63578,
"name": null,
+ "symbol": "ram_F85A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 47708,
@@ -61258,12 +147429,20 @@
{
"address": 63579,
"name": null,
+ "symbol": "ram_F85B",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 47712,
@@ -61285,12 +147464,20 @@
{
"address": 63580,
"name": null,
+ "symbol": "ram_F85C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 47716,
@@ -61312,12 +147499,18 @@
{
"address": 63581,
"name": null,
+ "symbol": "ram_F85D",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47660,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47720,
@@ -61339,12 +147532,31 @@
{
"address": 65244,
"name": "SCI1_SSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47720,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47724,
@@ -61366,7 +147578,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47720,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47726,
@@ -61388,12 +147605,45 @@
{
"address": 63576,
"name": null,
+ "symbol": "ram_F858",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47726,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 47730,
@@ -61415,12 +147665,18 @@
{
"address": 65243,
"name": "SCI1_TDR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "SCI1_TDR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47726,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47734,
@@ -61442,12 +147698,18 @@
{
"address": 63938,
"name": null,
+ "symbol": "ram_F9C2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47726,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47739,
@@ -61468,12 +147730,18 @@
{
"address": 65244,
"name": "SCI1_SSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear TDRE (bit 7) of SCI1_SSR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47726,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47743,
@@ -61494,6 +147762,7 @@
{
"address": 65242,
"name": "SCI1_SCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -61513,6 +147782,11 @@
"value_hex": "H'FC"
}
]
+ },
+ "dataflow": {
+ "block": 47726,
+ "changes": [],
+ "notes": []
}
},
{
@@ -61535,7 +147809,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47726,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47748,
@@ -61557,12 +147836,31 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47748,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47752,
@@ -61584,7 +147882,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47748,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47754,
@@ -61606,12 +147909,31 @@
{
"address": 64165,
"name": null,
+ "symbol": "ram_FAA5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47754,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47758,
@@ -61633,7 +147955,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47754,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47760,
@@ -61655,12 +147982,31 @@
{
"address": 63939,
"name": null,
+ "symbol": "ram_F9C3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47760,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47764,
@@ -61682,7 +148028,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47760,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47766,
@@ -61704,12 +148055,31 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47766,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47770,
@@ -61731,12 +148101,18 @@
{
"address": 64163,
"name": null,
+ "symbol": "ram_FAA3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47766,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47774,
@@ -61758,6 +148134,7 @@
{
"address": 65242,
"name": "SCI1_SCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -61777,6 +148154,11 @@
"value_hex": "H'7C"
}
]
+ },
+ "dataflow": {
+ "block": 47766,
+ "changes": [],
+ "notes": []
}
},
{
@@ -61799,12 +148181,18 @@
{
"address": 63936,
"name": null,
+ "symbol": "ram_F9C0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47766,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47783,
@@ -61828,7 +148216,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47766,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47785,
@@ -61847,7 +148240,37 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47785,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "addressing_side_effect"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47787,
@@ -61868,12 +148291,33 @@
{
"address": 63938,
"name": null,
+ "symbol": "ram_F9C2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47785,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 47791,
@@ -61892,7 +148336,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47785,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 47793,
@@ -61911,7 +148375,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47785,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 47797,
@@ -61932,12 +148416,18 @@
{
"address": 65243,
"name": "SCI1_TDR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "SCI1_TDR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47785,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47801,
@@ -61957,7 +148447,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47785,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 47803,
@@ -61978,12 +148475,18 @@
{
"address": 65244,
"name": "SCI1_SSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear TDRE (bit 7) of SCI1_SSR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47785,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47807,
@@ -62004,12 +148507,18 @@
{
"address": 63938,
"name": null,
+ "symbol": "ram_F9C2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47785,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47811,
@@ -62030,12 +148539,18 @@
{
"address": 63938,
"name": null,
+ "symbol": "ram_F9C2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47785,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47816,
@@ -62057,7 +148572,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47785,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47818,
@@ -62079,6 +148599,7 @@
{
"address": 65242,
"name": "SCI1_SCR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
@@ -62098,6 +148619,24 @@
"value_hex": "H'7C"
}
]
+ },
+ "dataflow": {
+ "block": 47818,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
}
},
{
@@ -62120,12 +148659,18 @@
{
"address": 63381,
"name": null,
+ "symbol": "ram_F795",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47818,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47826,
@@ -62147,7 +148692,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47818,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47828,
@@ -62169,12 +148719,31 @@
{
"address": 63377,
"name": null,
+ "symbol": "ram_F791",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47828,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47832,
@@ -62196,7 +148765,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47828,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47834,
@@ -62218,12 +148792,31 @@
{
"address": 63936,
"name": null,
+ "symbol": "ram_F9C0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47834,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47839,
@@ -62247,7 +148840,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47834,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47841,
@@ -62269,12 +148867,31 @@
{
"address": 63936,
"name": null,
+ "symbol": "ram_F9C0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47841,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47846,
@@ -62297,7 +148914,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47841,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47848,
@@ -62319,12 +148941,31 @@
{
"address": 63936,
"name": null,
+ "symbol": "ram_F9C0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47848,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47853,
@@ -62345,12 +148986,31 @@
{
"address": 63937,
"name": null,
+ "symbol": "ram_F9C1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47853,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47857,
@@ -62370,7 +149030,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47857,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47858,
@@ -62392,12 +149057,45 @@
{
"address": 63925,
"name": null,
+ "symbol": "ram_F9B5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47858,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 47862,
@@ -62416,7 +149114,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47858,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 47864,
@@ -62438,12 +149156,18 @@
{
"address": 63920,
"name": null,
+ "symbol": "ram_F9B0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47858,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47868,
@@ -62465,7 +149189,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47858,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47870,
@@ -62488,7 +149217,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47870,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47872,
@@ -62510,12 +149244,31 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47876,
@@ -62534,7 +149287,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after MOV source"
+ ]
+ }
},
{
"address": 47878,
@@ -62553,7 +149326,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 47880,
@@ -62573,7 +149366,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 47884,
@@ -62592,7 +149405,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R5 unknown after MOV source"
+ ]
+ }
},
{
"address": 47886,
@@ -62615,7 +149448,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 47889,
@@ -62634,7 +149643,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after MOV source"
+ ]
+ }
},
{
"address": 47891,
@@ -62653,7 +149694,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 47893,
@@ -62672,7 +149733,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 47895,
@@ -62691,7 +149772,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R2 unknown after MOV source"
+ ]
+ }
},
{
"address": 47897,
@@ -62710,7 +149811,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SHLR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 47900,
@@ -62732,12 +149853,18 @@
{
"address": 63568,
"name": null,
+ "symbol": "ram_F850",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47904,
@@ -62759,12 +149886,18 @@
{
"address": 63570,
"name": null,
+ "symbol": "ram_F852",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47908,
@@ -62783,7 +149916,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R5"
+ ]
+ }
},
{
"address": 47910,
@@ -62802,7 +149955,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R2"
+ ]
+ }
},
{
"address": 47913,
@@ -62821,7 +149994,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R5"
+ ]
+ }
},
{
"address": 47915,
@@ -62842,12 +150035,18 @@
{
"address": 63569,
"name": null,
+ "symbol": "ram_F851",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47919,
@@ -62866,7 +150065,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 47923,
@@ -62885,7 +150104,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 47925,
@@ -62904,7 +150143,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 47929,
@@ -62925,12 +150184,18 @@
{
"address": 63572,
"name": null,
+ "symbol": "ram_F854",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47933,
@@ -62949,7 +150214,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 47935,
@@ -62970,12 +150255,18 @@
{
"address": 63571,
"name": null,
+ "symbol": "ram_F853",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47939,
@@ -62999,7 +150290,87 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 47942,
@@ -63021,12 +150392,31 @@
{
"address": 63942,
"name": null,
+ "symbol": "ram_F9C6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47948,
@@ -63048,12 +150438,18 @@
{
"address": 63944,
"name": null,
+ "symbol": "ram_F9C8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47953,
@@ -63075,12 +150471,18 @@
{
"address": 64163,
"name": null,
+ "symbol": "ram_FAA3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47872,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47958,
@@ -63101,7 +150503,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47958,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47959,
@@ -63122,12 +150529,31 @@
{
"address": 64164,
"name": null,
+ "symbol": "ram_FAA4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47959,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47963,
@@ -63148,12 +150574,18 @@
{
"address": 65244,
"name": "SCI1_SSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear ORER (bit 5) of SCI1_SSR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47959,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47967,
@@ -63174,12 +150606,18 @@
{
"address": 65244,
"name": "SCI1_SSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear FER (bit 4) of SCI1_SSR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47959,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47971,
@@ -63200,12 +150638,18 @@
{
"address": 65244,
"name": "SCI1_SSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear PER (bit 3) of SCI1_SSR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47959,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47975,
@@ -63224,7 +150668,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47975,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47977,
@@ -63245,12 +150694,31 @@
{
"address": 65244,
"name": "SCI1_SSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear RDRF (bit 6) of SCI1_SSR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47975,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47981,
@@ -63271,12 +150739,33 @@
{
"address": 65245,
"name": "SCI1_RDR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47975,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 47985,
@@ -63297,12 +150786,18 @@
{
"address": 63937,
"name": null,
+ "symbol": "ram_F9C1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47975,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47989,
@@ -63325,7 +150820,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47975,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47991,
@@ -63346,12 +150846,31 @@
{
"address": 63939,
"name": null,
+ "symbol": "ram_F9C3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47991,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 47995,
@@ -63375,7 +150894,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47991,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 47997,
@@ -63396,12 +150920,31 @@
{
"address": 63939,
"name": null,
+ "symbol": "ram_F9C3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47997,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48002,
@@ -63423,7 +150966,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 47997,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48004,
@@ -63445,12 +150993,31 @@
{
"address": 64164,
"name": null,
+ "symbol": "ram_FAA4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48004,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48008,
@@ -63473,7 +151040,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48004,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48010,
@@ -63495,12 +151067,45 @@
{
"address": 63939,
"name": null,
+ "symbol": "ram_F9C3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48010,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 48014,
@@ -63519,7 +151124,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48010,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 48016,
@@ -63539,7 +151164,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48010,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48020,
@@ -63558,7 +151188,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48010,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after arithmetic"
+ ]
+ }
},
{
"address": 48022,
@@ -63580,12 +151230,18 @@
{
"address": 63939,
"name": null,
+ "symbol": "ram_F9C3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48010,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48026,
@@ -63603,7 +151259,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48010,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48028,
@@ -63625,7 +151286,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48010,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48030,
@@ -63647,12 +151313,31 @@
{
"address": 63941,
"name": null,
+ "symbol": "ram_F9C5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48030,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48035,
@@ -63674,12 +151359,31 @@
{
"address": 63937,
"name": null,
+ "symbol": "ram_F9C1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48035,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48040,
@@ -63698,7 +151402,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48035,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0, R1"
+ ]
+ }
},
{
"address": 48042,
@@ -63717,7 +151453,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48035,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48043,
@@ -63738,12 +151479,31 @@
{
"address": 63939,
"name": null,
+ "symbol": "ram_F9C3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48043,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48048,
@@ -63765,7 +151525,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48043,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48051,
@@ -63786,12 +151551,45 @@
{
"address": 63592,
"name": null,
+ "symbol": "ram_F868",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48051,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48055,
@@ -63812,12 +151610,18 @@
{
"address": 63584,
"name": null,
+ "symbol": "ram_F860",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48051,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48059,
@@ -63838,12 +151642,20 @@
{
"address": 63594,
"name": null,
+ "symbol": "ram_F86A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48051,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48063,
@@ -63864,12 +151676,18 @@
{
"address": 63586,
"name": null,
+ "symbol": "ram_F862",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48051,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48067,
@@ -63890,12 +151708,20 @@
{
"address": 63596,
"name": null,
+ "symbol": "ram_F86C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48051,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48071,
@@ -63916,12 +151742,18 @@
{
"address": 63588,
"name": null,
+ "symbol": "ram_F864",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48051,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48075,
@@ -63942,12 +151774,18 @@
{
"address": 63939,
"name": null,
+ "symbol": "ram_F9C3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48051,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48079,
@@ -63968,12 +151806,18 @@
{
"address": 64164,
"name": null,
+ "symbol": "ram_FAA4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48051,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48083,
@@ -63996,7 +151840,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48051,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48086,
@@ -64014,7 +151863,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48086,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 90,
+ "hex": "0x5A",
+ "width": 8,
+ "source": "MOV:E.B #H'5A, R0"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x5A"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 90,
+ "hex": "0x5A",
+ "width": 8,
+ "source": "MOV:E.B #H'5A, R0"
+ }
+ }
+ }
+ }
},
{
"address": 48088,
@@ -64036,12 +151931,36 @@
{
"address": 63584,
"name": null,
+ "symbol": "ram_F860",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48086,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": true,
+ "value": 90,
+ "hex": "0x5A",
+ "width": 8,
+ "source": "MOV:E.B #H'5A, R0"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:XOR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 48092,
@@ -64063,12 +151982,20 @@
{
"address": 63585,
"name": null,
+ "symbol": "ram_F861",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48086,
+ "changes": [],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 48096,
@@ -64090,12 +152017,20 @@
{
"address": 63586,
"name": null,
+ "symbol": "ram_F862",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48086,
+ "changes": [],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 48100,
@@ -64117,12 +152052,20 @@
{
"address": 63587,
"name": null,
+ "symbol": "ram_F863",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48086,
+ "changes": [],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 48104,
@@ -64144,12 +152087,20 @@
{
"address": 63588,
"name": null,
+ "symbol": "ram_F864",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48086,
+ "changes": [],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 48108,
@@ -64171,12 +152122,18 @@
{
"address": 63589,
"name": null,
+ "symbol": "ram_F865",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48086,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48112,
@@ -64198,7 +152155,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48086,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48115,
@@ -64219,12 +152181,31 @@
{
"address": 64166,
"name": null,
+ "symbol": "ram_FAA6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48115,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48119,
@@ -64245,12 +152226,33 @@
{
"address": 63585,
"name": null,
+ "symbol": "ram_F861",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48115,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R5 unknown after memory load"
+ ]
+ }
},
{
"address": 48123,
@@ -64269,7 +152271,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48115,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R5"
+ ]
+ }
},
{
"address": 48125,
@@ -64290,12 +152312,33 @@
{
"address": 63586,
"name": null,
+ "symbol": "ram_F862",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48115,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R5 unknown after memory load"
+ ]
+ }
},
{
"address": 48129,
@@ -64319,7 +152362,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48115,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 48132,
@@ -64338,7 +152557,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48115,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after MOV source"
+ ]
+ }
},
{
"address": 48134,
@@ -64357,7 +152608,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48115,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 48136,
@@ -64379,12 +152650,33 @@
{
"address": 63584,
"name": null,
+ "symbol": "ram_F860",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48115,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48140,
@@ -64403,7 +152695,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48115,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 48143,
@@ -64424,12 +152736,18 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48115,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48147,
@@ -64452,7 +152770,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48115,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48149,
@@ -64473,12 +152796,31 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48149,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48153,
@@ -64499,12 +152841,18 @@
{
"address": 63585,
"name": null,
+ "symbol": "ram_F861",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48149,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48157,
@@ -64527,7 +152875,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48149,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48160,
@@ -64545,7 +152898,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48160,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48162,
@@ -64567,7 +152938,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48160,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48164,
@@ -64585,7 +152961,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48164,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48166,
@@ -64607,7 +153001,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48164,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48169,
@@ -64625,7 +153024,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48169,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48171,
@@ -64648,7 +153065,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48169,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48174,
@@ -64666,7 +153088,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48174,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48176,
@@ -64688,7 +153128,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48174,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48179,
@@ -64709,12 +153154,31 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48179,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48183,
@@ -64738,7 +153202,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48179,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48186,
@@ -64757,7 +153226,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48186,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48188,
@@ -64779,7 +153266,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48186,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48190,
@@ -64801,12 +153293,31 @@
{
"address": 63585,
"name": null,
+ "symbol": "ram_F861",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48190,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48194,
@@ -64828,7 +153339,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48190,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48197,
@@ -64846,7 +153362,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48197,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48199,
@@ -64869,7 +153403,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48197,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48202,
@@ -64887,7 +153426,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48202,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48204,
@@ -64909,7 +153466,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48202,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48207,
@@ -64927,7 +153489,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48207,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48209,
@@ -64950,7 +153530,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48207,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48212,
@@ -64968,7 +153553,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48212,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48214,
@@ -64990,7 +153593,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48212,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48217,
@@ -65014,7 +153622,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48217,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48220,
@@ -65036,12 +153649,31 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48220,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48224,
@@ -65063,7 +153695,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48220,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48227,
@@ -65084,12 +153721,31 @@
{
"address": 64163,
"name": null,
+ "symbol": "ram_FAA3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48227,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48231,
@@ -65113,7 +153769,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48227,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48233,
@@ -65132,7 +153793,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48233,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48235,
@@ -65155,7 +153834,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48233,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48237,
@@ -65176,12 +153860,45 @@
{
"address": 63587,
"name": null,
+ "symbol": "ram_F863",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48237,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48241,
@@ -65200,7 +153917,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48237,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 48243,
@@ -65218,7 +153955,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48237,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R0"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x80"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R0"
+ }
+ }
+ }
+ }
},
{
"address": 48245,
@@ -65237,7 +154008,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48237,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R0"
+ }
+ }
+ }
+ }
},
{
"address": 48249,
@@ -65256,7 +154043,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48237,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R0"
+ }
+ }
+ }
+ }
},
{
"address": 48253,
@@ -65278,12 +154081,29 @@
{
"address": 63588,
"name": null,
+ "symbol": "ram_F864",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48237,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R0"
+ }
+ }
+ }
+ }
},
{
"address": 48258,
@@ -65303,7 +154123,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48237,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R0"
+ }
+ }
+ }
+ }
},
{
"address": 48262,
@@ -65326,7 +154162,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48237,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R0"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 48265,
@@ -65350,7 +154365,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48237,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48267,
@@ -65371,12 +154391,45 @@
{
"address": 63587,
"name": null,
+ "symbol": "ram_F863",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48267,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48271,
@@ -65395,7 +154448,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48267,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 48273,
@@ -65416,12 +154489,33 @@
{
"address": 63588,
"name": null,
+ "symbol": "ram_F864",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48267,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48277,
@@ -65440,7 +154534,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48267,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48281,
@@ -65459,7 +154558,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48267,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48285,
@@ -65478,7 +154582,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48267,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48289,
@@ -65497,7 +154606,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48267,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 48293,
@@ -65516,7 +154645,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48267,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 48295,
@@ -65539,7 +154688,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48267,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48297,
@@ -65558,7 +154712,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48297,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48301,
@@ -65582,7 +154754,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48301,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 48304,
@@ -65604,12 +154952,31 @@
{
"address": 63568,
"name": null,
+ "symbol": "ram_F850",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48304,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48309,
@@ -65630,12 +154997,33 @@
{
"address": 63585,
"name": null,
+ "symbol": "ram_F861",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48304,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48313,
@@ -65656,12 +155044,18 @@
{
"address": 63569,
"name": null,
+ "symbol": "ram_F851",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48304,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48317,
@@ -65682,12 +155076,20 @@
{
"address": 63586,
"name": null,
+ "symbol": "ram_F862",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48304,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48321,
@@ -65708,12 +155110,18 @@
{
"address": 63570,
"name": null,
+ "symbol": "ram_F852",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48304,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48325,
@@ -65734,12 +155142,20 @@
{
"address": 63588,
"name": null,
+ "symbol": "ram_F864",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48304,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48329,
@@ -65760,12 +155176,18 @@
{
"address": 63572,
"name": null,
+ "symbol": "ram_F854",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48304,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48333,
@@ -65789,7 +155211,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48304,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 48336,
@@ -65811,12 +155409,31 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48304,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48340,
@@ -65839,7 +155456,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48304,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48343,
@@ -65861,12 +155483,31 @@
{
"address": 63568,
"name": null,
+ "symbol": "ram_F850",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48343,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48348,
@@ -65888,12 +155529,33 @@
{
"address": 63585,
"name": null,
+ "symbol": "ram_F861",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48343,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48352,
@@ -65915,12 +155577,18 @@
{
"address": 63569,
"name": null,
+ "symbol": "ram_F851",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48343,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48356,
@@ -65942,12 +155610,20 @@
{
"address": 63586,
"name": null,
+ "symbol": "ram_F862",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48343,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48360,
@@ -65969,12 +155645,18 @@
{
"address": 63569,
"name": null,
+ "symbol": "ram_F851",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48343,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48364,
@@ -65994,7 +155676,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48343,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48368,
@@ -66016,12 +155705,18 @@
{
"address": 63572,
"name": null,
+ "symbol": "ram_F854",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48343,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48372,
@@ -66040,7 +155735,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48343,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 48374,
@@ -66062,12 +155777,18 @@
{
"address": 63571,
"name": null,
+ "symbol": "ram_F853",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48343,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48378,
@@ -66090,7 +155811,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48343,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 48381,
@@ -66111,12 +156008,31 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48343,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48385,
@@ -66140,7 +156056,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48343,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48388,
@@ -66162,12 +156083,31 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48388,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48392,
@@ -66190,7 +156130,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48388,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48395,
@@ -66214,7 +156159,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48395,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48398,
@@ -66233,7 +156183,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48398,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48400,
@@ -66255,7 +156223,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48398,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48402,
@@ -66277,12 +156250,45 @@
{
"address": 63587,
"name": null,
+ "symbol": "ram_F863",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48402,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48406,
@@ -66301,7 +156307,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48402,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 48408,
@@ -66319,7 +156345,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48402,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R0"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x80"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R0"
+ }
+ }
+ }
+ }
},
{
"address": 48410,
@@ -66339,7 +156399,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48402,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R0"
+ }
+ }
+ }
+ }
},
{
"address": 48414,
@@ -66359,7 +156435,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48402,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R0"
+ }
+ }
+ }
+ }
},
{
"address": 48418,
@@ -66379,7 +156471,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48402,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R0"
+ }
+ }
+ }
+ }
},
{
"address": 48422,
@@ -66402,7 +156510,186 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48402,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": true,
+ "value": 128,
+ "hex": "0x80",
+ "width": 8,
+ "source": "MOV:E.B #H'80, R0"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 48425,
@@ -66426,7 +156713,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48402,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48427,
@@ -66447,12 +156739,45 @@
{
"address": 63587,
"name": null,
+ "symbol": "ram_F863",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48427,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48431,
@@ -66471,7 +156796,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48427,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 48433,
@@ -66492,12 +156837,33 @@
{
"address": 63588,
"name": null,
+ "symbol": "ram_F864",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48427,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48437,
@@ -66516,7 +156882,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48427,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48441,
@@ -66535,7 +156906,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48427,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48445,
@@ -66554,7 +156930,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48427,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 48449,
@@ -66573,7 +156969,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48427,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 48451,
@@ -66596,7 +157012,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48427,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48453,
@@ -66615,7 +157036,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48453,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48457,
@@ -66636,12 +157075,18 @@
{
"address": 63342,
"name": null,
+ "symbol": "ram_F76E",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48453,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48461,
@@ -66664,7 +157109,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48453,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48463,
@@ -66683,7 +157133,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48463,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48465,
@@ -66704,12 +157159,45 @@
{
"address": 63342,
"name": null,
+ "symbol": "ram_F76E",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48463,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after memory load"
+ ]
+ }
},
{
"address": 48469,
@@ -66728,7 +157216,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48463,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 48471,
@@ -66747,7 +157255,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48463,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R4 unknown after MOV source"
+ ]
+ }
},
{
"address": 48473,
@@ -66766,7 +157294,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48463,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 48477,
@@ -66785,7 +157333,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48463,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ }
+ ],
+ "notes": [
+ "R5 unknown after MOV source"
+ ]
+ }
},
{
"address": 48479,
@@ -66809,7 +157377,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48463,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 48482,
@@ -66828,7 +157572,51 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48463,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0, R4, R5"
+ ]
+ }
},
{
"address": 48484,
@@ -66851,7 +157639,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48484,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 48487,
@@ -66872,12 +157836,31 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48487,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48491,
@@ -66900,7 +157883,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48487,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48493,
@@ -66921,12 +157909,31 @@
{
"address": 63925,
"name": null,
+ "symbol": "ram_F9B5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48493,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48497,
@@ -66947,12 +157954,18 @@
{
"address": 63925,
"name": null,
+ "symbol": "ram_F9B5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48493,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48501,
@@ -66973,12 +157986,31 @@
{
"address": 64163,
"name": null,
+ "symbol": "ram_FAA3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48501,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48505,
@@ -66999,12 +158031,18 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48501,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48509,
@@ -67028,7 +158066,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48501,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48512,
@@ -67046,7 +158089,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48512,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48515,
@@ -67069,7 +158130,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48512,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48517,
@@ -67087,7 +158153,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48517,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48520,
@@ -67109,7 +158193,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48517,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48522,
@@ -67127,7 +158216,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48522,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48525,
@@ -67150,7 +158257,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48522,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48527,
@@ -67168,7 +158280,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48527,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48530,
@@ -67190,7 +158320,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48527,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48532,
@@ -67212,12 +158347,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48532,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48536,
@@ -67239,7 +158393,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48532,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48538,
@@ -67257,7 +158416,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48538,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48541,
@@ -67280,7 +158457,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48538,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48543,
@@ -67298,7 +158480,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48543,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48546,
@@ -67320,7 +158520,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48543,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48548,
@@ -67338,7 +158543,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48548,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48551,
@@ -67361,7 +158584,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48548,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48553,
@@ -67379,7 +158607,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48553,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48556,
@@ -67401,7 +158647,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48553,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48558,
@@ -67419,7 +158670,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48558,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48561,
@@ -67442,7 +158711,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48558,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48563,
@@ -67466,7 +158740,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48563,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48565,
@@ -67487,12 +158766,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48565,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48569,
@@ -67513,12 +158811,18 @@
{
"address": 63376,
"name": null,
+ "symbol": "ram_F790",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48565,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48573,
@@ -67542,7 +158846,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48565,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48575,
@@ -67566,7 +158875,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48575,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 48578,
@@ -67588,12 +159073,31 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48578,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48582,
@@ -67615,7 +159119,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48578,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48584,
@@ -67637,12 +159146,31 @@
{
"address": 63925,
"name": null,
+ "symbol": "ram_F9B5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48584,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48588,
@@ -67664,12 +159192,18 @@
{
"address": 63925,
"name": null,
+ "symbol": "ram_F9B5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48584,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48592,
@@ -67691,12 +159225,31 @@
{
"address": 64163,
"name": null,
+ "symbol": "ram_FAA3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48592,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48596,
@@ -67718,12 +159271,18 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48592,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48600,
@@ -67746,7 +159305,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48592,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48603,
@@ -67767,12 +159331,45 @@
{
"address": 63587,
"name": null,
+ "symbol": "ram_F863",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48603,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48607,
@@ -67791,7 +159388,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48603,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 48609,
@@ -67812,12 +159429,33 @@
{
"address": 63588,
"name": null,
+ "symbol": "ram_F864",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48603,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48613,
@@ -67836,7 +159474,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48603,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48617,
@@ -67855,7 +159498,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48603,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48621,
@@ -67876,12 +159524,18 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48603,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48625,
@@ -67904,7 +159558,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48603,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48627,
@@ -67925,12 +159584,31 @@
{
"address": 63925,
"name": null,
+ "symbol": "ram_F9B5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48627,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48631,
@@ -67951,12 +159629,18 @@
{
"address": 63925,
"name": null,
+ "symbol": "ram_F9B5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48627,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48635,
@@ -67977,12 +159661,31 @@
{
"address": 64163,
"name": null,
+ "symbol": "ram_FAA3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48635,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48639,
@@ -68003,12 +159706,18 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48635,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48643,
@@ -68032,7 +159741,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48635,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48645,
@@ -68053,12 +159767,45 @@
{
"address": 63576,
"name": null,
+ "symbol": "ram_F858",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48645,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48649,
@@ -68079,12 +159826,18 @@
{
"address": 63568,
"name": null,
+ "symbol": "ram_F850",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48645,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48653,
@@ -68105,12 +159858,20 @@
{
"address": 63578,
"name": null,
+ "symbol": "ram_F85A",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48645,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48657,
@@ -68131,12 +159892,18 @@
{
"address": 63570,
"name": null,
+ "symbol": "ram_F852",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48645,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48661,
@@ -68157,12 +159924,20 @@
{
"address": 63580,
"name": null,
+ "symbol": "ram_F85C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48645,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48665,
@@ -68183,12 +159958,18 @@
{
"address": 63572,
"name": null,
+ "symbol": "ram_F854",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48645,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48669,
@@ -68210,12 +159991,18 @@
{
"address": 63936,
"name": null,
+ "symbol": "ram_F9C0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48645,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48674,
@@ -68238,7 +160025,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48645,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 48677,
@@ -68262,7 +160225,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48645,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48679,
@@ -68286,7 +160254,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48679,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48681,
@@ -68307,12 +160280,31 @@
{
"address": 64164,
"name": null,
+ "symbol": "ram_FAA4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48681,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48685,
@@ -68333,12 +160325,18 @@
{
"address": 64165,
"name": null,
+ "symbol": "ram_FAA5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48681,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48689,
@@ -68361,7 +160359,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48681,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48691,
@@ -68382,12 +160385,31 @@
{
"address": 64166,
"name": null,
+ "symbol": "ram_FAA6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48691,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48695,
@@ -68408,12 +160430,18 @@
{
"address": 64166,
"name": null,
+ "symbol": "ram_FAA6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48691,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48700,
@@ -68435,7 +160463,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48691,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48702,
@@ -68457,12 +160490,31 @@
{
"address": 63936,
"name": null,
+ "symbol": "ram_F9C0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48702,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48707,
@@ -68483,12 +160535,18 @@
{
"address": 64163,
"name": null,
+ "symbol": "ram_FAA3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48702,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48711,
@@ -68509,12 +160567,18 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48702,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48715,
@@ -68538,7 +160602,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48702,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48717,
@@ -68560,12 +160629,31 @@
{
"address": 63568,
"name": null,
+ "symbol": "ram_F850",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48717,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48722,
@@ -68587,12 +160675,33 @@
{
"address": 63585,
"name": null,
+ "symbol": "ram_F861",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48717,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48726,
@@ -68614,12 +160723,18 @@
{
"address": 63569,
"name": null,
+ "symbol": "ram_F851",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48717,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48730,
@@ -68641,12 +160756,20 @@
{
"address": 63586,
"name": null,
+ "symbol": "ram_F862",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48717,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48734,
@@ -68668,12 +160791,18 @@
{
"address": 63570,
"name": null,
+ "symbol": "ram_F852",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48717,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48738,
@@ -68695,12 +160824,20 @@
{
"address": 63588,
"name": null,
+ "symbol": "ram_F864",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48717,
+ "changes": [],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48742,
@@ -68722,12 +160859,18 @@
{
"address": 63572,
"name": null,
+ "symbol": "ram_F854",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48717,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48746,
@@ -68750,7 +160893,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48717,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 48749,
@@ -68774,7 +161093,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48749,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48751,
@@ -68796,7 +161120,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48751,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48752,
@@ -68818,12 +161147,45 @@
{
"address": 63929,
"name": null,
+ "symbol": "ram_F9B9",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48752,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R3 unknown after memory load"
+ ]
+ }
},
{
"address": 48756,
@@ -68842,7 +161204,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48752,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 48758,
@@ -68861,7 +161243,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48752,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 48760,
@@ -68883,12 +161285,33 @@
{
"address": 63924,
"name": null,
+ "symbol": "ram_F9B4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48752,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ }
+ ],
+ "notes": [
+ "R1 unknown after memory load"
+ ]
+ }
},
{
"address": 48764,
@@ -68907,7 +161330,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48752,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 48766,
@@ -68926,7 +161369,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48752,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "unsupported:EXTU.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R1"
+ ]
+ }
},
{
"address": 48768,
@@ -68945,7 +161408,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48768,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48770,
@@ -68967,7 +161448,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48768,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48772,
@@ -68987,7 +161473,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48772,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48776,
@@ -69009,7 +161513,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48772,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48778,
@@ -69028,7 +161537,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48778,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R3 unknown after arithmetic"
+ ]
+ }
},
{
"address": 48780,
@@ -69047,7 +161588,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48778,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 48783,
@@ -69071,7 +161632,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48778,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48785,
@@ -69090,7 +161656,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48785,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48789,
@@ -69111,12 +161695,18 @@
{
"address": 63924,
"name": null,
+ "symbol": "ram_F9B4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48785,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48793,
@@ -69137,12 +161727,18 @@
{
"address": 63924,
"name": null,
+ "symbol": "ram_F9B4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48785,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48797,
@@ -69164,7 +161760,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48797,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48798,
@@ -69186,12 +161787,45 @@
{
"address": 64165,
"name": null,
+ "symbol": "ram_FAA5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48798,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "memory_load"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after memory load"
+ ]
+ }
},
{
"address": 48802,
@@ -69210,7 +161844,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48798,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "memory_load"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 48805,
@@ -69231,12 +161885,20 @@
{
"address": 64163,
"name": null,
+ "symbol": "ram_FAA3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48798,
+ "changes": [],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 48809,
@@ -69257,12 +161919,18 @@
{
"address": 64163,
"name": null,
+ "symbol": "ram_FAA3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48798,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48813,
@@ -69285,7 +161953,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48798,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48815,
@@ -69306,12 +161979,31 @@
{
"address": 64162,
"name": null,
+ "symbol": "ram_FAA2",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48815,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48819,
@@ -69335,7 +162027,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48815,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48821,
@@ -69356,12 +162053,31 @@
{
"address": 63942,
"name": null,
+ "symbol": "ram_F9C6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48821,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48825,
@@ -69384,7 +162100,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48821,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48827,
@@ -69405,12 +162126,31 @@
{
"address": 63944,
"name": null,
+ "symbol": "ram_F9C8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48827,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48831,
@@ -69433,7 +162173,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48827,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48833,
@@ -69454,12 +162199,31 @@
{
"address": 63944,
"name": null,
+ "symbol": "ram_F9C8",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48833,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48837,
@@ -69480,12 +162244,18 @@
{
"address": 63942,
"name": null,
+ "symbol": "ram_F9C6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48833,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48843,
@@ -69506,12 +162276,18 @@
{
"address": 64163,
"name": null,
+ "symbol": "ram_FAA3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48833,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48847,
@@ -69534,7 +162310,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48833,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48849,
@@ -69555,12 +162336,31 @@
{
"address": 63939,
"name": null,
+ "symbol": "ram_F9C3",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48849,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48853,
@@ -69584,7 +162384,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48849,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 48856,
@@ -69607,7 +162583,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48849,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48868,
@@ -69629,12 +162610,31 @@
{
"address": 63941,
"name": null,
+ "symbol": "ram_F9C5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48868,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48872,
@@ -69655,7 +162655,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48872,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48874,
@@ -69677,12 +162682,31 @@
{
"address": 65169,
"name": "FRT1_TCSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear OCFA (bit 5) of FRT1_TCSR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48874,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48878,
@@ -69704,12 +162728,18 @@
{
"address": 63936,
"name": null,
+ "symbol": "ram_F9C0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48874,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48882,
@@ -69731,7 +162761,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48874,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48884,
@@ -69753,12 +162788,31 @@
{
"address": 63936,
"name": null,
+ "symbol": "ram_F9C0",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48884,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48888,
@@ -69780,12 +162834,31 @@
{
"address": 63937,
"name": null,
+ "symbol": "ram_F9C1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48888,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48892,
@@ -69807,7 +162880,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48888,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48894,
@@ -69829,12 +162907,31 @@
{
"address": 63937,
"name": null,
+ "symbol": "ram_F9C1",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48894,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48898,
@@ -69856,12 +162953,31 @@
{
"address": 63942,
"name": null,
+ "symbol": "ram_F9C6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48898,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48902,
@@ -69883,7 +162999,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48898,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48904,
@@ -69905,12 +163026,31 @@
{
"address": 63942,
"name": null,
+ "symbol": "ram_F9C6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48904,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48908,
@@ -69932,12 +163072,31 @@
{
"address": 63222,
"name": null,
+ "symbol": "ram_F6F6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48908,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48912,
@@ -69959,7 +163118,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48908,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48914,
@@ -69981,12 +163145,31 @@
{
"address": 63220,
"name": null,
+ "symbol": "ram_F6F4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48914,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48918,
@@ -70008,7 +163191,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48914,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48920,
@@ -70030,12 +163218,31 @@
{
"address": 63222,
"name": null,
+ "symbol": "ram_F6F6",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48920,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48924,
@@ -70058,7 +163265,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48920,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48926,
@@ -70080,12 +163292,31 @@
{
"address": 63220,
"name": null,
+ "symbol": "ram_F6F4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48926,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48930,
@@ -70104,7 +163335,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48930,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48931,
@@ -70125,12 +163361,31 @@
{
"address": 65185,
"name": "FRT2_TCSR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear OCFA (bit 5) of FRT2_TCSR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48931,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48935,
@@ -70151,12 +163406,18 @@
{
"address": 63940,
"name": null,
+ "symbol": "ram_F9C4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48931,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48939,
@@ -70179,7 +163440,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48931,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48941,
@@ -70200,12 +163466,31 @@
{
"address": 63940,
"name": null,
+ "symbol": "ram_F9C4",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48941,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48945,
@@ -70226,12 +163511,31 @@
{
"address": 63941,
"name": null,
+ "symbol": "ram_F9C5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48945,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48949,
@@ -70254,7 +163558,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48945,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48951,
@@ -70275,12 +163584,31 @@
{
"address": 63941,
"name": null,
+ "symbol": "ram_F9C5",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48951,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48955,
@@ -70301,12 +163629,31 @@
{
"address": 63268,
"name": null,
+ "symbol": "ram_F724",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48955,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48959,
@@ -70329,7 +163676,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48955,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48961,
@@ -70350,12 +163702,31 @@
{
"address": 63268,
"name": null,
+ "symbol": "ram_F724",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48961,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48965,
@@ -70379,7 +163750,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48961,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48967,
@@ -70401,12 +163777,31 @@
{
"address": 63268,
"name": null,
+ "symbol": "ram_F724",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48967,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48972,
@@ -70428,12 +163823,18 @@
{
"address": 63267,
"name": null,
+ "symbol": "ram_F723",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48967,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48976,
@@ -70455,12 +163856,31 @@
{
"address": 64259,
"name": null,
+ "symbol": "ram_FB03",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48976,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48980,
@@ -70482,7 +163902,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48976,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48982,
@@ -70504,12 +163929,31 @@
{
"address": 64258,
"name": null,
+ "symbol": "ram_FB02",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48982,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48986,
@@ -70531,7 +163975,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48982,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48988,
@@ -70553,12 +164002,31 @@
{
"address": 64258,
"name": null,
+ "symbol": "ram_FB02",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48988,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48992,
@@ -70581,7 +164049,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48988,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 48994,
@@ -70603,12 +164076,31 @@
{
"address": 64259,
"name": null,
+ "symbol": "ram_FB03",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48994,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 48998,
@@ -70627,7 +164119,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48994,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49000,
@@ -70650,7 +164147,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48994,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49003,
@@ -70669,7 +164342,87 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 48994,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:LDM.W"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0, R1, R2, R3, R4, R5"
+ ]
+ }
},
{
"address": 49005,
@@ -70690,12 +164443,31 @@
{
"address": 63340,
"name": null,
+ "symbol": "ram_F76C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49005,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49009,
@@ -70718,7 +164490,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49005,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49011,
@@ -70739,12 +164516,31 @@
{
"address": 63340,
"name": null,
+ "symbol": "ram_F76C",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49011,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49015,
@@ -70765,12 +164561,31 @@
{
"address": 63552,
"name": null,
+ "symbol": "ram_F840",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49015,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49019,
@@ -70793,7 +164608,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49015,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49021,
@@ -70814,12 +164634,31 @@
{
"address": 63552,
"name": null,
+ "symbol": "ram_F840",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49021,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49025,
@@ -70840,12 +164679,31 @@
{
"address": 63270,
"name": null,
+ "symbol": "ram_F726",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49025,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49029,
@@ -70868,7 +164726,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49025,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49031,
@@ -70889,12 +164752,31 @@
{
"address": 63270,
"name": null,
+ "symbol": "ram_F726",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49031,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49035,
@@ -70917,7 +164799,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49031,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49037,
@@ -70938,12 +164825,31 @@
{
"address": 63251,
"name": null,
+ "symbol": "ram_F713",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49037,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49041,
@@ -70966,7 +164872,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49037,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49043,
@@ -70987,12 +164898,31 @@
{
"address": 63249,
"name": null,
+ "symbol": "ram_F711",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49043,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49047,
@@ -71013,12 +164943,18 @@
{
"address": 63249,
"name": null,
+ "symbol": "ram_F711",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49043,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49051,
@@ -71039,12 +164975,18 @@
{
"address": 63249,
"name": null,
+ "symbol": "ram_F711",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49043,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49055,
@@ -71065,12 +165007,18 @@
{
"address": 63249,
"name": null,
+ "symbol": "ram_F711",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49043,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49059,
@@ -71091,12 +165039,31 @@
{
"address": 63383,
"name": null,
+ "symbol": "ram_F797",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49059,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49063,
@@ -71119,7 +165086,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49059,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49065,
@@ -71140,12 +165112,31 @@
{
"address": 63383,
"name": null,
+ "symbol": "ram_F797",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49065,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49069,
@@ -71168,7 +165159,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49065,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49071,
@@ -71189,12 +165185,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49071,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49075,
@@ -71215,12 +165230,31 @@
{
"address": 63384,
"name": null,
+ "symbol": "ram_F798",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49075,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49079,
@@ -71243,7 +165277,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49075,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49081,
@@ -71264,12 +165303,31 @@
{
"address": 63384,
"name": null,
+ "symbol": "ram_F798",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49081,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49085,
@@ -71292,7 +165350,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49081,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49087,
@@ -71313,12 +165376,31 @@
{
"address": 63281,
"name": null,
+ "symbol": "ram_F731",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49087,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49091,
@@ -71338,7 +165420,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49091,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49092,
@@ -71360,12 +165447,31 @@
{
"address": 65260,
"name": "WDT_TCSR_R",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49092,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49096,
@@ -71387,12 +165493,18 @@
{
"address": 65260,
"name": "WDT_TCSR_R",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "WDT_TCSR_R = H'A53F (OVF=0 WT/IT=0 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, interval IRQ0, clock phi/4096)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49092,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49102,
@@ -71414,12 +165526,18 @@
{
"address": 63380,
"name": null,
+ "symbol": "ram_F794",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49092,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49106,
@@ -71441,12 +165559,18 @@
{
"address": 63380,
"name": null,
+ "symbol": "ram_F794",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49092,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49111,
@@ -71469,7 +165593,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49092,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49113,
@@ -71490,12 +165619,31 @@
{
"address": 65260,
"name": "WDT_TCSR_R",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "WDT_TCSR_R = H'A57F (OVF=0 WT/IT=1 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, watchdog NMI, clock phi/4096)",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49113,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49119,
@@ -71515,7 +165663,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49119,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49120,
@@ -71537,12 +165690,31 @@
{
"address": 63552,
"name": null,
+ "symbol": "ram_F840",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49120,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49125,
@@ -71561,7 +165733,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49125,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R2 unknown after MOV source"
+ ]
+ }
},
{
"address": 49127,
@@ -71585,7 +165789,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49125,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49129,
@@ -71609,7 +165989,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49125,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49131,
@@ -71628,7 +166015,25 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49125,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49133,
@@ -71651,7 +166056,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49125,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49135,
@@ -71672,12 +166082,31 @@
{
"address": 63552,
"name": null,
+ "symbol": "ram_F840",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49135,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49139,
@@ -71700,7 +166129,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49135,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49141,
@@ -71719,7 +166153,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49141,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R5 unknown after MOV source"
+ ]
+ }
},
{
"address": 49143,
@@ -71743,7 +166209,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49141,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49145,
@@ -71764,12 +166235,31 @@
{
"address": 63553,
"name": null,
+ "symbol": "ram_F841",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49145,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49149,
@@ -71791,7 +166281,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49149,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49150,
@@ -71813,12 +166308,31 @@
{
"address": 63552,
"name": null,
+ "symbol": "ram_F840",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49150,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49155,
@@ -71842,7 +166356,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49150,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49157,
@@ -71863,12 +166553,31 @@
{
"address": 63552,
"name": null,
+ "symbol": "ram_F840",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49150,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49161,
@@ -71891,7 +166600,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49150,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49163,
@@ -71912,12 +166626,31 @@
{
"address": 63553,
"name": null,
+ "symbol": "ram_F841",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49163,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49167,
@@ -71939,7 +166672,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49167,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49168,
@@ -71962,7 +166700,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49168,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49170,
@@ -71984,12 +166898,31 @@
{
"address": 63552,
"name": null,
+ "symbol": "ram_F840",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49170,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49174,
@@ -72011,7 +166944,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49170,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49176,
@@ -72034,7 +166972,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49176,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49179,
@@ -72053,7 +167167,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49176,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after MOV source"
+ ]
+ }
},
{
"address": 49181,
@@ -72077,7 +167223,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49176,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49183,
@@ -72100,7 +167278,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49176,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49185,
@@ -72119,7 +167302,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49185,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after MOV source"
+ ]
+ }
},
{
"address": 49187,
@@ -72143,7 +167358,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49185,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49189,
@@ -72166,7 +167557,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49185,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49191,
@@ -72185,7 +167581,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49191,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after MOV source"
+ ]
+ }
},
{
"address": 49193,
@@ -72204,7 +167632,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49191,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 49195,
@@ -72228,7 +167676,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49191,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49197,
@@ -72251,7 +167875,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49191,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49199,
@@ -72270,7 +167899,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49199,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after MOV source"
+ ]
+ }
},
{
"address": 49201,
@@ -72294,7 +167955,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49199,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49203,
@@ -72317,7 +168154,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49199,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49205,
@@ -72341,7 +168183,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49205,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49208,
@@ -72362,7 +168380,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49208,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49209,
@@ -72386,7 +168409,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49209,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49211,
@@ -72407,12 +168606,31 @@
{
"address": 63552,
"name": null,
+ "symbol": "ram_F840",
"region": "on_chip_ram",
"kind": "ram"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49211,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49215,
@@ -72435,7 +168653,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49211,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49217,
@@ -72459,7 +168682,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49217,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49220,
@@ -72478,7 +168877,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49217,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after MOV source"
+ ]
+ }
},
{
"address": 49222,
@@ -72501,7 +168932,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49217,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49224,
@@ -72523,7 +168986,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49217,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49226,
@@ -72542,7 +169010,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49226,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after MOV source"
+ ]
+ }
},
{
"address": 49228,
@@ -72565,7 +169065,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49226,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49230,
@@ -72587,7 +169263,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49226,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49232,
@@ -72610,7 +169291,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49232,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49235,
@@ -72629,7 +169486,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49232,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R0 unknown after MOV source"
+ ]
+ }
},
{
"address": 49237,
@@ -72648,7 +169537,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49232,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 49239,
@@ -72672,7 +169581,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49232,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "unsupported:BSET.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49241,
@@ -72695,7 +169636,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49232,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49243,
@@ -72719,7 +169665,183 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49243,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R2",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R6",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "register",
+ "name": "R7",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "BR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "EP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "DP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "TP",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "SR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49246,
@@ -72738,7 +169860,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49243,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "call"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R5"
+ ]
+ }
},
{
"address": 49248,
@@ -72761,7 +169915,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49243,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "flags"
+ },
+ "after": {
+ "known": false,
+ "reason": "call"
+ }
+ }
+ ],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49251,
@@ -72785,7 +169971,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49243,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49254,
@@ -72808,7 +170001,14 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49243,
+ "changes": [],
+ "notes": [
+ "call clobbers tracked register state"
+ ]
+ }
},
{
"address": 49257,
@@ -72830,7 +170030,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49257,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49258,
@@ -72849,7 +170054,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49258,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R4",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.W"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R4"
+ ]
+ }
},
{
"address": 49262,
@@ -72867,7 +170104,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49258,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49265,
@@ -72890,7 +170132,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49258,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49267,
@@ -72909,7 +170156,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49267,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R3 unknown after MOV source"
+ ]
+ }
},
{
"address": 49269,
@@ -72928,7 +170207,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49267,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 49271,
@@ -72947,7 +170246,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49267,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 49273,
@@ -72966,7 +170285,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49267,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SHLL.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 49276,
@@ -72989,7 +170328,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49267,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49278,
@@ -73008,7 +170352,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49278,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unknown_operand"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R3 unknown after MOV source"
+ ]
+ }
},
{
"address": 49280,
@@ -73027,7 +170403,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49278,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unknown_operand"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 49282,
@@ -73046,7 +170442,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49278,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SWAP.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 49284,
@@ -73065,7 +170481,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49278,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unsupported:SHLL.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 49287,
@@ -73084,7 +170520,27 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49278,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R3",
+ "before": {
+ "known": false,
+ "reason": "unsupported:AND.B"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:OR.B"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R3"
+ ]
+ }
},
{
"address": 49290,
@@ -73105,7 +170561,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49290,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49291,
@@ -73123,7 +170584,53 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49291,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 7,
+ "hex": "0x0007",
+ "width": 16,
+ "source": "MOV:I.W #H'0007, R1"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "R1 = 0x0007"
+ ],
+ "known_after": {
+ "registers": {
+ "R1": {
+ "known": true,
+ "value": 7,
+ "hex": "0x0007",
+ "width": 16,
+ "source": "MOV:I.W #H'0007, R1"
+ }
+ }
+ }
+ }
},
{
"address": 49294,
@@ -73142,7 +170649,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49294,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:SHLL.B"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R0"
+ ]
+ }
},
{
"address": 49296,
@@ -73164,7 +170703,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49294,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49298,
@@ -73186,12 +170730,31 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 7 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49298,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49302,
@@ -73214,7 +170777,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49298,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49304,
@@ -73236,12 +170804,31 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 7 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49304,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49308,
@@ -73263,12 +170850,31 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49308,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49312,
@@ -73290,12 +170896,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49308,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49316,
@@ -73317,12 +170929,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49308,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49320,
@@ -73344,12 +170962,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49308,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49324,
@@ -73372,7 +170996,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49308,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49327,
@@ -73394,12 +171023,31 @@
{
"address": 65278,
"name": "P9DDR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "P9DDR = H'13",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49327,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49332,
@@ -73421,12 +171069,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49327,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49336,
@@ -73448,12 +171102,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49327,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49340,
@@ -73475,12 +171135,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49327,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49344,
@@ -73502,7 +171168,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49327,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49346,
@@ -73524,12 +171195,31 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49346,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49350,
@@ -73551,12 +171241,18 @@
{
"address": 65278,
"name": "P9DDR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "P9DDR = H'93",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49346,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49355,
@@ -73574,7 +171270,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49346,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 0,
+ "hex": "0x00",
+ "width": 8,
+ "source": "MOV:E.B #H'00, R0"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x00"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 0,
+ "hex": "0x00",
+ "width": 8,
+ "source": "MOV:E.B #H'00, R0"
+ }
+ }
+ }
+ }
},
{
"address": 49357,
@@ -73598,7 +171328,23 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49346,
+ "changes": [],
+ "notes": [],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 0,
+ "hex": "0x00",
+ "width": 8,
+ "source": "MOV:E.B #H'00, R0"
+ }
+ }
+ }
+ }
},
{
"address": 49359,
@@ -73619,12 +171365,31 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49359,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49363,
@@ -73646,12 +171411,18 @@
{
"address": 65278,
"name": "P9DDR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "P9DDR = H'93",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49359,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49368,
@@ -73669,7 +171440,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49359,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R0",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 1,
+ "hex": "0x01",
+ "width": 8,
+ "source": "MOV:E.B #H'01, R0"
+ }
+ }
+ ],
+ "notes": [
+ "R0 = 0x01"
+ ],
+ "known_after": {
+ "registers": {
+ "R0": {
+ "known": true,
+ "value": 1,
+ "hex": "0x01",
+ "width": 8,
+ "source": "MOV:E.B #H'01, R0"
+ }
+ }
+ }
+ }
},
{
"address": 49370,
@@ -73690,7 +171495,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49370,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49371,
@@ -73712,12 +171522,31 @@
{
"address": 65278,
"name": "P9DDR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "P9DDR = H'13",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49371,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49376,
@@ -73735,7 +171564,41 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49371,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R1",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": true,
+ "value": 7,
+ "hex": "0x0007",
+ "width": 16,
+ "source": "MOV:I.W #H'0007, R1"
+ }
+ }
+ ],
+ "notes": [
+ "R1 = 0x0007"
+ ],
+ "known_after": {
+ "registers": {
+ "R1": {
+ "known": true,
+ "value": 7,
+ "hex": "0x0007",
+ "width": 16,
+ "source": "MOV:I.W #H'0007, R1"
+ }
+ }
+ }
+ }
},
{
"address": 49379,
@@ -73756,12 +171619,31 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49379,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49383,
@@ -73782,12 +171664,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49379,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49387,
@@ -73808,12 +171696,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49379,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49391,
@@ -73836,7 +171730,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49379,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49393,
@@ -73855,7 +171754,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49393,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BSET.B"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R5"
+ ]
+ }
},
{
"address": 49395,
@@ -73879,7 +171810,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49393,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49397,
@@ -73898,7 +171834,39 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49397,
+ "changes": [
+ {
+ "kind": "register",
+ "name": "R5",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "unsupported:BCLR.B"
+ }
+ },
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": [
+ "unsupported operation invalidated R5"
+ ]
+ }
},
{
"address": 49399,
@@ -73919,12 +171887,31 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49399,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49403,
@@ -73945,12 +171932,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49399,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49407,
@@ -73971,12 +171964,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49399,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49411,
@@ -73999,7 +171998,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49399,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49414,
@@ -74021,12 +172025,31 @@
{
"address": 65278,
"name": "P9DDR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "P9DDR = H'93",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49414,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49419,
@@ -74048,7 +172071,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49414,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49420,
@@ -74070,12 +172098,31 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 7 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49420,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49424,
@@ -74097,12 +172144,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49420,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49428,
@@ -74124,12 +172177,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49420,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49432,
@@ -74151,12 +172210,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49420,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49436,
@@ -74178,12 +172243,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49420,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49440,
@@ -74204,7 +172275,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49420,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49441,
@@ -74225,12 +172301,31 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 7 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49441,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49445,
@@ -74251,12 +172346,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49441,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49449,
@@ -74277,12 +172378,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49441,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49453,
@@ -74303,12 +172410,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49441,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49457,
@@ -74329,12 +172442,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 7 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49441,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49461,
@@ -74355,12 +172474,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49441,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49465,
@@ -74381,12 +172506,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49441,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49469,
@@ -74407,12 +172538,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49441,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49473,
@@ -74434,7 +172571,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49441,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49474,
@@ -74456,12 +172598,31 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 7 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49474,
+ "changes": [
+ {
+ "kind": "control",
+ "name": "CCR",
+ "before": {
+ "known": false,
+ "reason": "block_entry"
+ },
+ "after": {
+ "known": false,
+ "reason": "flags"
+ }
+ }
+ ],
+ "notes": []
+ }
},
{
"address": 49478,
@@ -74483,12 +172644,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49474,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49482,
@@ -74510,12 +172677,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49474,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49486,
@@ -74537,12 +172710,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49474,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49490,
@@ -74564,12 +172743,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 7 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49474,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49494,
@@ -74591,12 +172776,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49474,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49498,
@@ -74618,12 +172809,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "set bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49474,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49502,
@@ -74645,12 +172842,18 @@
{
"address": 65279,
"name": "P9DR",
+ "symbol": null,
"region": "register_field",
"kind": "registers"
}
],
"comment": "clear bit 1 of P9DR",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49474,
+ "changes": [],
+ "notes": []
+ }
},
{
"address": 49506,
@@ -74671,7 +172874,12 @@
},
"references": [],
"comment": "",
- "valid": true
+ "valid": true,
+ "dataflow": {
+ "block": 49474,
+ "changes": [],
+ "notes": []
+ }
}
]
}
\ No newline at end of file
diff --git a/build/rom_pseudocode.c b/build/rom_pseudocode.c
index b0d2bf5..90fccd0 100644
--- a/build/rom_pseudocode.c
+++ b/build/rom_pseudocode.c
@@ -73,6 +73,294 @@ extern volatile u8 IPRF; /* 0xFF05 */
extern volatile u8 WCR; /* 0xFF10 */
extern volatile u8 RAMCR; /* 0xFF11 */
+/* RAM/external symbols inferred from instruction references and data tables. */
+extern volatile u8 mem_1011; /* 0x1011 memory unknown */
+extern volatile u8 mem_10FB; /* 0x10FB memory unknown */
+extern volatile u8 mem_1161; /* 0x1161 memory unknown */
+extern volatile u8 mem_1170; /* 0x1170 memory unknown */
+extern volatile u8 mem_1179; /* 0x1179 memory unknown */
+extern volatile u8 mem_1188; /* 0x1188 memory unknown */
+extern volatile u8 mem_1197; /* 0x1197 memory unknown */
+extern volatile u8 mem_11A0; /* 0x11A0 memory unknown */
+extern volatile u8 mem_11A9; /* 0x11A9 memory unknown */
+extern volatile u8 mem_11DC; /* 0x11DC memory unknown */
+extern volatile u8 mem_1206; /* 0x1206 memory unknown */
+extern volatile u8 mem_1215; /* 0x1215 memory unknown */
+extern volatile u8 mem_12A8; /* 0x12A8 memory unknown */
+extern volatile u8 mem_1314; /* 0x1314 memory unknown */
+extern volatile u8 mem_1617; /* 0x1617 memory unknown */
+extern volatile u8 mem_1627; /* 0x1627 memory unknown */
+extern volatile u8 mem_1630; /* 0x1630 memory unknown */
+extern volatile u8 mem_1647; /* 0x1647 memory unknown */
+extern volatile u8 mem_1664; /* 0x1664 memory unknown */
+extern volatile u8 mem_1682; /* 0x1682 memory unknown */
+extern volatile u8 mem_1700; /* 0x1700 memory unknown */
+extern volatile u8 mem_1819; /* 0x1819 memory unknown */
+extern volatile u8 mem_1A00; /* 0x1A00 memory unknown */
+extern volatile u8 mem_1AF8; /* 0x1AF8 memory unknown */
+extern volatile u8 mem_2815; /* 0x2815 memory unknown */
+extern volatile u8 mem_2CA6; /* 0x2CA6 memory unknown */
+extern volatile u8 mem_441D; /* 0x441D memory unknown */
+extern volatile u8 mem_449C; /* 0x449C memory unknown */
+extern volatile u8 mem_449E; /* 0x449E memory unknown */
+extern volatile u8 mem_44A0; /* 0x44A0 memory unknown */
+extern volatile u16 mem_E000; /* 0xE000 memory word */
+extern volatile u16 mem_E004; /* 0xE004 memory word */
+extern volatile u16 mem_E006; /* 0xE006 memory word */
+extern volatile u16 mem_E046; /* 0xE046 memory word */
+extern volatile u16 mem_E080; /* 0xE080 memory word */
+extern volatile u16 mem_E102; /* 0xE102 memory word */
+extern volatile u16 mem_E124; /* 0xE124 memory word */
+extern volatile u16 mem_E126; /* 0xE126 memory word */
+extern volatile u16 mem_E14E; /* 0xE14E memory word */
+extern volatile u16 mem_E16E; /* 0xE16E memory word */
+extern volatile u16 mem_E172; /* 0xE172 memory word */
+extern volatile u16 mem_E1EC; /* 0xE1EC memory word */
+extern volatile u16 mem_E220; /* 0xE220 memory word */
+extern volatile u16 mem_E800; /* 0xE800 memory word */
+extern volatile u16 mem_E806; /* 0xE806 memory word */
+extern volatile u16 mem_E880; /* 0xE880 memory word */
+extern volatile u16 mem_E902; /* 0xE902 memory word */
+extern volatile u16 mem_E924; /* 0xE924 memory word */
+extern volatile u16 mem_E9EC; /* 0xE9EC memory word */
+extern volatile u8 mem_F000; /* 0xF000 memory byte */
+extern volatile u8 mem_F001; /* 0xF001 memory byte */
+extern volatile u8 mem_F002; /* 0xF002 memory mixed */
+extern volatile u8 mem_F003; /* 0xF003 memory byte */
+extern volatile u8 mem_F004; /* 0xF004 memory mixed */
+extern volatile u8 mem_F005; /* 0xF005 memory byte */
+extern volatile u8 mem_F006; /* 0xF006 memory mixed */
+extern volatile u8 mem_F007; /* 0xF007 memory byte */
+extern volatile u8 mem_F008; /* 0xF008 memory mixed */
+extern volatile u8 mem_F009; /* 0xF009 memory byte */
+extern volatile u8 mem_F00A; /* 0xF00A memory mixed */
+extern volatile u8 mem_F00B; /* 0xF00B memory byte */
+extern volatile u8 mem_F00C; /* 0xF00C memory mixed */
+extern volatile u8 mem_F00D; /* 0xF00D memory byte */
+extern volatile u8 mem_F00E; /* 0xF00E memory byte */
+extern volatile u8 mem_F00F; /* 0xF00F memory byte */
+extern volatile u8 mem_F100; /* 0xF100 memory byte */
+extern volatile u8 mem_F101; /* 0xF101 memory byte */
+extern volatile u8 mem_F102; /* 0xF102 memory mixed */
+extern volatile u8 mem_F103; /* 0xF103 memory byte */
+extern volatile u8 mem_F104; /* 0xF104 memory mixed */
+extern volatile u8 mem_F105; /* 0xF105 memory byte */
+extern volatile u8 mem_F106; /* 0xF106 memory mixed */
+extern volatile u8 mem_F107; /* 0xF107 memory byte */
+extern volatile u8 mem_F108; /* 0xF108 memory mixed */
+extern volatile u8 mem_F109; /* 0xF109 memory byte */
+extern volatile u8 mem_F10A; /* 0xF10A memory mixed */
+extern volatile u8 mem_F10B; /* 0xF10B memory byte */
+extern volatile u8 mem_F10C; /* 0xF10C memory mixed */
+extern volatile u8 mem_F10D; /* 0xF10D memory byte */
+extern volatile u8 mem_F10E; /* 0xF10E memory byte */
+extern volatile u8 mem_F10F; /* 0xF10F memory byte */
+extern volatile u8 mem_F200; /* 0xF200 memory byte */
+extern volatile u8 mem_F201; /* 0xF201 memory byte */
+extern volatile u16 mem_F402; /* 0xF402 memory word */
+extern volatile u8 mem_F404; /* 0xF404 memory byte */
+extern volatile u8 mem_F4AA; /* 0xF4AA memory byte */
+extern volatile u8 mem_F555; /* 0xF555 memory byte */
+extern volatile u8 ram_F688; /* 0xF688 ram byte */
+extern volatile u8 ram_F689; /* 0xF689 ram byte */
+extern volatile u8 ram_F68A; /* 0xF68A ram byte */
+extern volatile u8 ram_F68B; /* 0xF68B ram byte */
+extern volatile u16 ram_F68C; /* 0xF68C ram word */
+extern volatile u16 ram_F68E; /* 0xF68E ram word */
+extern volatile u16 ram_F690; /* 0xF690 ram word */
+extern volatile u16 ram_F692; /* 0xF692 ram word */
+extern volatile u16 ram_F694; /* 0xF694 ram word */
+extern volatile u16 ram_F696; /* 0xF696 ram word */
+extern volatile u16 ram_F698; /* 0xF698 ram word */
+extern volatile u16 ram_F69A; /* 0xF69A ram word */
+extern volatile u16 ram_F69C; /* 0xF69C ram word */
+extern volatile u16 ram_F69E; /* 0xF69E ram word */
+extern volatile u16 ram_F6A0; /* 0xF6A0 ram word */
+extern volatile u16 ram_F6A2; /* 0xF6A2 ram word */
+extern volatile u16 ram_F6A4; /* 0xF6A4 ram word */
+extern volatile u16 ram_F6A6; /* 0xF6A6 ram word */
+extern volatile u16 ram_F6A8; /* 0xF6A8 ram word */
+extern volatile u16 ram_F6AA; /* 0xF6AA ram word */
+extern volatile u16 ram_F6AC; /* 0xF6AC ram word */
+extern volatile u16 ram_F6AE; /* 0xF6AE ram word */
+extern volatile u16 ram_F6B2; /* 0xF6B2 ram word */
+extern volatile u16 ram_F6B4; /* 0xF6B4 ram word */
+extern volatile u16 ram_F6B6; /* 0xF6B6 ram word */
+extern volatile u16 ram_F6BA; /* 0xF6BA ram word */
+extern volatile u16 ram_F6BC; /* 0xF6BC ram word */
+extern volatile u16 ram_F6BE; /* 0xF6BE ram word */
+extern volatile u16 ram_F6C2; /* 0xF6C2 ram word */
+extern volatile u16 ram_F6C4; /* 0xF6C4 ram word */
+extern volatile u16 ram_F6C6; /* 0xF6C6 ram word */
+extern volatile u16 ram_F6C8; /* 0xF6C8 ram word */
+extern volatile u16 ram_F6CA; /* 0xF6CA ram word */
+extern volatile u16 ram_F6CC; /* 0xF6CC ram word */
+extern volatile u16 ram_F6CE; /* 0xF6CE ram word */
+extern volatile u8 ram_F6D0; /* 0xF6D0 ram byte */
+extern volatile u8 ram_F6D1; /* 0xF6D1 ram byte */
+extern volatile u8 ram_F6D2; /* 0xF6D2 ram byte */
+extern volatile u8 ram_F6D3; /* 0xF6D3 ram byte */
+extern volatile u8 ram_F6D4; /* 0xF6D4 ram byte */
+extern volatile u8 ram_F6D5; /* 0xF6D5 ram byte */
+extern volatile u8 ram_F6D6; /* 0xF6D6 ram byte */
+extern volatile u8 ram_F6D7; /* 0xF6D7 ram byte */
+extern volatile u8 ram_F6D8; /* 0xF6D8 ram byte */
+extern volatile u8 ram_F6D9; /* 0xF6D9 ram byte */
+extern volatile u8 ram_F6DA; /* 0xF6DA ram byte */
+extern volatile u8 ram_F6DB; /* 0xF6DB ram byte */
+extern volatile u8 ram_F6DC; /* 0xF6DC ram byte */
+extern volatile u8 ram_F6DD; /* 0xF6DD ram byte */
+extern volatile u8 ram_F6DE; /* 0xF6DE ram byte */
+extern volatile u8 ram_F6DF; /* 0xF6DF ram byte */
+extern volatile u8 ram_F6E0; /* 0xF6E0 ram byte */
+extern volatile u8 ram_F6E1; /* 0xF6E1 ram byte */
+extern volatile u8 ram_F6E2; /* 0xF6E2 ram byte */
+extern volatile u8 ram_F6E3; /* 0xF6E3 ram byte */
+extern volatile u8 ram_F6E4; /* 0xF6E4 ram byte */
+extern volatile u8 ram_F6E5; /* 0xF6E5 ram byte */
+extern volatile u8 ram_F6E6; /* 0xF6E6 ram byte */
+extern volatile u8 ram_F6E7; /* 0xF6E7 ram byte */
+extern volatile u8 ram_F6EB; /* 0xF6EB ram byte */
+extern volatile u8 ram_F6EC; /* 0xF6EC ram byte */
+extern volatile u8 ram_F6F0; /* 0xF6F0 ram byte */
+extern volatile u8 ram_F6F1; /* 0xF6F1 ram byte */
+extern volatile u8 ram_F6F2; /* 0xF6F2 ram byte */
+extern volatile u8 ram_F6F3; /* 0xF6F3 ram byte */
+extern volatile u16 ram_F6F4; /* 0xF6F4 ram word */
+extern volatile u8 ram_F6F6; /* 0xF6F6 ram byte */
+extern volatile u8 ram_F6F7; /* 0xF6F7 ram byte */
+extern volatile u8 ram_F6F8; /* 0xF6F8 ram byte */
+extern volatile u8 ram_F6F9; /* 0xF6F9 ram byte */
+extern volatile u8 ram_F700; /* 0xF700 ram mixed */
+extern volatile u8 ram_F701; /* 0xF701 ram byte */
+extern volatile u8 ram_F702; /* 0xF702 ram mixed */
+extern volatile u8 ram_F703; /* 0xF703 ram byte */
+extern volatile u8 ram_F704; /* 0xF704 ram mixed */
+extern volatile u8 ram_F705; /* 0xF705 ram byte */
+extern volatile u8 ram_F706; /* 0xF706 ram mixed */
+extern volatile u8 ram_F707; /* 0xF707 ram byte */
+extern volatile u8 ram_F708; /* 0xF708 ram byte */
+extern volatile u8 ram_F709; /* 0xF709 ram byte */
+extern volatile u8 ram_F70A; /* 0xF70A ram mixed */
+extern volatile u8 ram_F70B; /* 0xF70B ram byte */
+extern volatile u8 ram_F710; /* 0xF710 ram byte */
+extern volatile u8 ram_F711; /* 0xF711 ram byte */
+extern volatile u8 ram_F712; /* 0xF712 ram byte */
+extern volatile u8 ram_F713; /* 0xF713 ram byte */
+extern volatile u8 ram_F714; /* 0xF714 ram byte */
+extern volatile u8 ram_F715; /* 0xF715 ram byte */
+extern volatile u8 ram_F716; /* 0xF716 ram byte */
+extern volatile u8 ram_F717; /* 0xF717 ram byte */
+extern volatile u8 ram_F718; /* 0xF718 ram byte */
+extern volatile u8 ram_F719; /* 0xF719 ram byte */
+extern volatile u8 ram_F71A; /* 0xF71A ram byte */
+extern volatile u8 ram_F71B; /* 0xF71B ram byte */
+extern volatile u8 ram_F71C; /* 0xF71C ram byte */
+extern volatile u8 ram_F71D; /* 0xF71D ram byte */
+extern volatile u8 ram_F71E; /* 0xF71E ram byte */
+extern volatile u8 ram_F71F; /* 0xF71F ram byte */
+extern volatile u8 ram_F720; /* 0xF720 ram byte */
+extern volatile u8 ram_F721; /* 0xF721 ram byte */
+extern volatile u8 ram_F722; /* 0xF722 ram byte */
+extern volatile u8 ram_F723; /* 0xF723 ram byte */
+extern volatile u8 ram_F724; /* 0xF724 ram byte */
+extern volatile u8 ram_F726; /* 0xF726 ram byte */
+extern volatile u8 ram_F727; /* 0xF727 ram unknown */
+extern volatile u8 ram_F730; /* 0xF730 ram byte */
+extern volatile u8 ram_F731; /* 0xF731 ram byte */
+extern volatile u8 ram_F732; /* 0xF732 ram mixed */
+extern volatile u8 ram_F733; /* 0xF733 ram byte */
+extern volatile u16 ram_F734; /* 0xF734 ram word */
+extern volatile u16 ram_F736; /* 0xF736 ram word */
+extern volatile u16 ram_F738; /* 0xF738 ram word */
+extern volatile u16 ram_F73A; /* 0xF73A ram word */
+extern volatile u16 ram_F73C; /* 0xF73C ram word */
+extern volatile u16 ram_F73E; /* 0xF73E ram word */
+extern volatile u16 ram_F740; /* 0xF740 ram word */
+extern volatile u16 ram_F742; /* 0xF742 ram word */
+extern volatile u8 ram_F74C; /* 0xF74C ram unknown */
+extern volatile u8 ram_F750; /* 0xF750 ram unknown */
+extern volatile u8 ram_F752; /* 0xF752 ram unknown */
+extern volatile u16 ram_F754; /* 0xF754 ram word */
+extern volatile u8 ram_F756; /* 0xF756 ram byte */
+extern volatile u8 ram_F757; /* 0xF757 ram byte */
+extern volatile u8 ram_F758; /* 0xF758 ram byte */
+extern volatile u8 ram_F759; /* 0xF759 ram byte */
+extern volatile u8 ram_F75B; /* 0xF75B ram byte */
+extern volatile u16 ram_F75C; /* 0xF75C ram word */
+extern volatile u8 ram_F769; /* 0xF769 ram byte */
+extern volatile u16 ram_F76A; /* 0xF76A ram word */
+extern volatile u8 ram_F76C; /* 0xF76C ram byte */
+extern volatile u8 ram_F76D; /* 0xF76D ram byte */
+extern volatile u8 ram_F76E; /* 0xF76E ram byte */
+extern volatile u8 ram_F770; /* 0xF770 ram byte */
+extern volatile u16 ram_F772; /* 0xF772 ram word */
+extern volatile u8 ram_F790; /* 0xF790 ram byte */
+extern volatile u8 ram_F791; /* 0xF791 ram byte */
+extern volatile u8 ram_F794; /* 0xF794 ram byte */
+extern volatile u8 ram_F795; /* 0xF795 ram byte */
+extern volatile u8 ram_F797; /* 0xF797 ram byte */
+extern volatile u8 ram_F798; /* 0xF798 ram byte */
+extern volatile u8 ram_F840; /* 0xF840 ram byte */
+extern volatile u8 ram_F841; /* 0xF841 ram byte */
+extern volatile u8 ram_F850; /* 0xF850 ram mixed */
+extern volatile u8 ram_F851; /* 0xF851 ram byte */
+extern volatile u8 ram_F852; /* 0xF852 ram mixed */
+extern volatile u8 ram_F853; /* 0xF853 ram byte */
+extern volatile u8 ram_F854; /* 0xF854 ram mixed */
+extern volatile u8 ram_F858; /* 0xF858 ram mixed */
+extern volatile u8 ram_F859; /* 0xF859 ram byte */
+extern volatile u8 ram_F85A; /* 0xF85A ram mixed */
+extern volatile u8 ram_F85B; /* 0xF85B ram byte */
+extern volatile u8 ram_F85C; /* 0xF85C ram mixed */
+extern volatile u8 ram_F85D; /* 0xF85D ram byte */
+extern volatile u8 ram_F860; /* 0xF860 ram mixed */
+extern volatile u8 ram_F861; /* 0xF861 ram byte */
+extern volatile u8 ram_F862; /* 0xF862 ram mixed */
+extern volatile u8 ram_F863; /* 0xF863 ram byte */
+extern volatile u8 ram_F864; /* 0xF864 ram mixed */
+extern volatile u8 ram_F865; /* 0xF865 ram byte */
+extern volatile u16 ram_F868; /* 0xF868 ram word */
+extern volatile u16 ram_F86A; /* 0xF86A ram word */
+extern volatile u16 ram_F86C; /* 0xF86C ram word */
+extern volatile u8 ram_F9B0; /* 0xF9B0 ram byte */
+extern volatile u8 ram_F9B4; /* 0xF9B4 ram byte */
+extern volatile u8 ram_F9B5; /* 0xF9B5 ram byte */
+extern volatile u8 ram_F9B9; /* 0xF9B9 ram byte */
+extern volatile u8 ram_F9C0; /* 0xF9C0 ram byte */
+extern volatile u8 ram_F9C1; /* 0xF9C1 ram byte */
+extern volatile u8 ram_F9C2; /* 0xF9C2 ram byte */
+extern volatile u8 ram_F9C3; /* 0xF9C3 ram byte */
+extern volatile u8 ram_F9C4; /* 0xF9C4 ram byte */
+extern volatile u8 ram_F9C5; /* 0xF9C5 ram byte */
+extern volatile u16 ram_F9C6; /* 0xF9C6 ram word */
+extern volatile u8 ram_F9C8; /* 0xF9C8 ram byte */
+extern volatile u8 ram_F9FB; /* 0xF9FB ram unknown */
+extern volatile u8 ram_FA84; /* 0xFA84 ram unknown */
+extern volatile u8 ram_FAA2; /* 0xFAA2 ram byte */
+extern volatile u8 ram_FAA3; /* 0xFAA3 ram byte */
+extern volatile u8 ram_FAA4; /* 0xFAA4 ram byte */
+extern volatile u8 ram_FAA5; /* 0xFAA5 ram byte */
+extern volatile u8 ram_FAA6; /* 0xFAA6 ram byte */
+extern volatile u16 ram_FAF0; /* 0xFAF0 ram word */
+extern volatile u16 ram_FAF2; /* 0xFAF2 ram word */
+extern volatile u16 ram_FAF4; /* 0xFAF4 ram word */
+extern volatile u16 ram_FAF6; /* 0xFAF6 ram word */
+extern volatile u16 ram_FAF8; /* 0xFAF8 ram word */
+extern volatile u16 ram_FAFA; /* 0xFAFA ram word */
+extern volatile u16 ram_FAFC; /* 0xFAFC ram word */
+extern volatile u16 ram_FAFE; /* 0xFAFE ram word */
+extern volatile u16 ram_FB00; /* 0xFB00 ram word */
+extern volatile u8 ram_FB02; /* 0xFB02 ram byte */
+extern volatile u8 ram_FB03; /* 0xFB03 ram byte */
+extern volatile u8 ram_FC62; /* 0xFC62 ram unknown */
+extern volatile u8 ram_FC80; /* 0xFC80 ram unknown */
+extern volatile u8 ram_FC84; /* 0xFC84 ram unknown */
+extern volatile u8 ram_FCE2; /* 0xFCE2 ram unknown */
+extern volatile u8 ram_FCFE; /* 0xFCFE ram unknown */
+extern volatile u8 ram_FDFE; /* 0xFDFE ram unknown */
+extern volatile u8 ram_FE27; /* 0xFE27 ram unknown */
+
/* Function entry points discovered from vectors and call targets. */
void vec_reset_1000(void);
void loc_10CE(void);
@@ -166,267 +454,267 @@ void loc_C142(void);
void vec_reset_1000(void)
{
/* vector sources: reset, invalid_instruction, zero_divide, trap_vs, address_error, trace, trapa_0, trapa_1, trapa_2, trapa_3, trapa_4, trapa_5, trapa_6, trapa_7, trapa_8, trapa_9, trapa_a, trapa_b, trapa_c, trapa_d, trapa_e, trapa_f, irq0, irq1, irq2, irq5 */
- R7 = (uint16_t)(0xFE80); /* 1000; MOV:I.W #H'FE80, R7; cycles=3 */
- SR = (uint16_t)(0x0700); /* 1003; LDC.W #H'0700, SR; cycles=6 */
- P1DDR = (uint8_t)(0xFF); /* 1007; MOV:G.B #H'FF, @P1DDR; P1DDR = H'FF; cycles=9 */
- P1DR = (uint8_t)(0x00); /* 100C; MOV:G.B #H'00, @P1DR; P1DR = H'00; cycles=9 */
- P6DDR = (uint8_t)(0xF9); /* 1011; MOV:G.B #H'F9, @P6DDR; P6DDR = H'F9; cycles=9 */
- P6DR = (uint8_t)(0xF1); /* 1016; MOV:G.B #H'F1, @P6DR; P6DR = H'F1; cycles=9 */
- P7DDR = (uint8_t)(0x00); /* 101B; MOV:G.B #H'00, @P7DDR; P7DDR = H'00; cycles=9 */
- P7DR = (uint8_t)(0x00); /* 1020; MOV:G.B #H'00, @P7DR; P7DR = H'00; cycles=9 */
- P9DDR = (uint8_t)(0x93); /* 1025; MOV:G.B #H'93, @P9DDR; P9DDR = H'93; cycles=9 */
- P9DR = (uint8_t)(0x00); /* 102A; MOV:G.B #H'00, @P9DR; P9DR = H'00; cycles=9 */
- SYSCR1 = (uint8_t)(0x87); /* 102F; MOV:G.B #H'87, @SYSCR1; SYSCR1 = H'87 (IRQ1E=0 IRQ0E=0 NMIEG=0 BRLE=0; P12/P13 are I/O, IRQ0 disabled, IRQ1 disabled); cycles=9 */
- SYSCR2 = (uint8_t)(0x84); /* 1034; MOV:G.B #H'84, @SYSCR2; SYSCR2 = H'84 (IRQ5E=0 IRQ4E=0 IRQ3E=0 IRQ2E=0 P6PWME=1 P9PWME=0 P9SCI2E=0; enabled P6 PWM); cycles=9 */
- FRT1_TCR = (uint8_t)(0x02); /* 1039; MOV:G.B #H'02, @FRT1_TCR; FRT1_TCR = H'02 (ICIE=0 OCIEB=0 OCIEA=0 OVIE=0 OEB=0 OEA=0 CKS1=1 CKS0=0); cycles=9 */
- FRT1_TCSR = (uint8_t)(0x01); /* 103E; MOV:G.B #H'01, @FRT1_TCSR; FRT1_TCSR = H'01 (ICF=0 OCFB=0 OCFA=0 OVF=0 OLVLB=0 OLVLA=0 IEDG=0 CCLRA=1); cycles=9 */
- FRT1_FRC_H = (uint16_t)(0x00); /* 1043; MOV:G.W #H'00, @FRT1_FRC_H; FRT1_FRC_H = H'00; FRT1_FRC W write high TEMP access; cycles=9 */
- FRT1_OCRA_H = (uint16_t)(0x009C); /* 1048; MOV:G.W #H'009C, @FRT1_OCRA_H; FRT1_OCRA_H = H'9C; FRT1_OCRA W write high TEMP access; cycles=11 */
- FRT2_TCR = (uint8_t)(0x02); /* 104E; MOV:G.B #H'02, @FRT2_TCR; FRT2_TCR = H'02 (ICIE=0 OCIEB=0 OCIEA=0 OVIE=0 OEB=0 OEA=0 CKS1=1 CKS0=0); cycles=9 */
- FRT2_TCSR = (uint8_t)(0x01); /* 1053; MOV:G.B #H'01, @FRT2_TCSR; FRT2_TCSR = H'01 (ICF=0 OCFB=0 OCFA=0 OVF=0 OLVLB=0 OLVLA=0 IEDG=0 CCLRA=1); cycles=9 */
- FRT2_FRC_H = (uint16_t)(0x00); /* 1058; MOV:G.W #H'00, @FRT2_FRC_H; FRT2_FRC_H = H'00; FRT2_FRC W write high TEMP access; cycles=11 */
- FRT2_OCRA_H = (uint16_t)(0x7A12); /* 105D; MOV:G.W #H'7A12, @FRT2_OCRA_H; FRT2_OCRA_H = H'7A12; FRT2_OCRA W write high TEMP access; cycles=9 */
- FRT3_TCR = (uint8_t)(0x00); /* 1063; MOV:G.B #H'00, @FRT3_TCR; FRT3_TCR = H'00 (ICIE=0 OCIEB=0 OCIEA=0 OVIE=0 OEB=0 OEA=0 CKS1=0 CKS0=0); cycles=9 */
- FRT3_TCSR = (uint8_t)(0x00); /* 1068; MOV:G.B #H'00, @FRT3_TCSR; FRT3_TCSR = H'00 (ICF=0 OCFB=0 OCFA=0 OVF=0 OLVLB=0 OLVLA=0 IEDG=0 CCLRA=0); cycles=9 */
- TMR_TCR = (uint8_t)(0x00); /* 106D; MOV:G.B #H'00, @TMR_TCR; TMR_TCR = H'00 (CMIEB=0 CMIEA=0 OVIE=0 CCLR1=0 CCLR0=0 CKS2=0 CKS1=0 CKS0=0); cycles=9 */
- TMR_TCSR = (uint8_t)(0x10); /* 1072; MOV:G.B #H'10, @TMR_TCSR; TMR_TCSR = H'10 (CMFB=0 CMFA=0 OVF=0 OS3=0 OS2=0 OS1=0 OS0=0); cycles=9 */
- PWM1_TCR = (uint8_t)(0x38); /* 1077; MOV:G.B #H'38, @PWM1_TCR; PWM1_TCR = H'38 (OE=0 OS=0 CKS2=0 CKS1=0 CKS0=0); cycles=9 */
- PWM1_DTR = (uint8_t)(0xFF); /* 107C; MOV:G.B #H'FF, @PWM1_DTR; PWM1_DTR = H'FF; cycles=9 */
- PWM2_TCR = (uint8_t)(0x38); /* 1081; MOV:G.B #H'38, @PWM2_TCR; PWM2_TCR = H'38 (OE=0 OS=0 CKS2=0 CKS1=0 CKS0=0); cycles=9 */
- PWM2_DTR = (uint8_t)(0xFF); /* 1086; MOV:G.B #H'FF, @PWM2_DTR; PWM2_DTR = H'FF; cycles=9 */
- PWM3_TCR = (uint8_t)(0x3B); /* 108B; MOV:G.B #H'3B, @PWM3_TCR; PWM3_TCR = H'3B (OE=0 OS=0 CKS2=0 CKS1=1 CKS0=1); cycles=9 */
- PWM3_DTR = (uint8_t)(0x7D); /* 1090; MOV:G.B #H'7D, @PWM3_DTR; PWM3_DTR = H'7D; cycles=9 */
- SCI1_SMR = (uint8_t)(0x24); /* 1095; MOV:G.B #H'24, @SCI1_SMR; SCI1_SMR = H'24 (C/A=0 CHR=0 PE=1 O/E=0 STOP=0 CKS1=0 CKS0=0; SCI async, 8-bit, even parity, 1 stop, clock phi); cycles=9 */
- SCI1_SCR = (uint8_t)(0x3C); /* 109A; MOV:G.B #H'3C, @SCI1_SCR; SCI1_SCR = H'3C (TIE=0 RIE=0 TE=1 RE=1 CKE1=0 CKE0=0; SCI enables TX,RX, internal clock); cycles=9 */
- SCI1_BRR = (uint8_t)(0x07); /* 109F; MOV:G.B #H'07, @SCI1_BRR; SCI1_BRR = H'07; SCI1 async 8-bit even parity 1 stop BRR N=7 CKS n=0; baud needs --clock-hz; cycles=9 */
- SCI2_SMR = (uint8_t)(0x24); /* 10A4; MOV:G.B #H'24, @SCI2_SMR; SCI2_SMR = H'24 (C/A=0 CHR=0 PE=1 O/E=0 STOP=0 CKS1=0 CKS0=0; SCI async, 8-bit, even parity, 1 stop, clock phi); cycles=9 */
- SCI2_SCR = (uint8_t)(0x0C); /* 10A9; MOV:G.B #H'0C, @SCI2_SCR; SCI2_SCR = H'0C (TIE=0 RIE=0 TE=0 RE=0 CKE1=0 CKE0=0; SCI enables none, internal clock); cycles=9 */
- SCI2_BRR = (uint8_t)(0x07); /* 10AE; MOV:G.B #H'07, @SCI2_BRR; SCI2_BRR = H'07; SCI2 async 8-bit even parity 1 stop BRR N=7 CKS n=0; baud needs --clock-hz; cycles=9 */
- ADCSR = (uint8_t)(0x19); /* 10B3; MOV:G.B #H'19, @ADCSR; ADCSR = H'19 (ADF=0 ADIE=0 ADST=0 SCAN=1 CKS=1 CH2=0 CH1=0 CH0=1; A/D halt, scan AN0-AN1, 138-state max, ADI disabled); cycles=9 */
+ R7 = (uint16_t)(0xFE80); /* 1000; MOV:I.W #H'FE80, R7; dataflow R7=0xFE80; cycles=3 */
+ SR = (uint16_t)(0x0700); /* 1003; LDC.W #H'0700, SR; dataflow SR=0x0700; cycles=6 */
+ P1DDR = (uint8_t)(0xFF); /* 1007; MOV:G.B #H'FF, @P1DDR; P1DDR = H'FF; refs P1DDR; cycles=9 */
+ P1DR = (uint8_t)(0x00); /* 100C; MOV:G.B #H'00, @P1DR; P1DR = H'00; refs P1DR; cycles=9 */
+ P6DDR = (uint8_t)(0xF9); /* 1011; MOV:G.B #H'F9, @P6DDR; P6DDR = H'F9; refs P6DDR; cycles=9 */
+ P6DR = (uint8_t)(0xF1); /* 1016; MOV:G.B #H'F1, @P6DR; P6DR = H'F1; refs P6DR; cycles=9 */
+ P7DDR = (uint8_t)(0x00); /* 101B; MOV:G.B #H'00, @P7DDR; P7DDR = H'00; refs P7DDR; cycles=9 */
+ P7DR = (uint8_t)(0x00); /* 1020; MOV:G.B #H'00, @P7DR; P7DR = H'00; refs P7DR; cycles=9 */
+ P9DDR = (uint8_t)(0x93); /* 1025; MOV:G.B #H'93, @P9DDR; P9DDR = H'93; refs P9DDR; cycles=9 */
+ P9DR = (uint8_t)(0x00); /* 102A; MOV:G.B #H'00, @P9DR; P9DR = H'00; refs P9DR; cycles=9 */
+ SYSCR1 = (uint8_t)(0x87); /* 102F; MOV:G.B #H'87, @SYSCR1; SYSCR1 = H'87 (IRQ1E=0 IRQ0E=0 NMIEG=0 BRLE=0; P12/P13 are I/O, IRQ0 disabled, IRQ1 disabled); refs SYSCR1; cycles=9 */
+ SYSCR2 = (uint8_t)(0x84); /* 1034; MOV:G.B #H'84, @SYSCR2; SYSCR2 = H'84 (IRQ5E=0 IRQ4E=0 IRQ3E=0 IRQ2E=0 P6PWME=1 P9PWME=0 P9SCI2E=0; enabled P6 PWM); refs SYSCR2; cycles=9 */
+ FRT1_TCR = (uint8_t)(0x02); /* 1039; MOV:G.B #H'02, @FRT1_TCR; FRT1_TCR = H'02 (ICIE=0 OCIEB=0 OCIEA=0 OVIE=0 OEB=0 OEA=0 CKS1=1 CKS0=0); refs FRT1_TCR; cycles=9 */
+ FRT1_TCSR = (uint8_t)(0x01); /* 103E; MOV:G.B #H'01, @FRT1_TCSR; FRT1_TCSR = H'01 (ICF=0 OCFB=0 OCFA=0 OVF=0 OLVLB=0 OLVLA=0 IEDG=0 CCLRA=1); refs FRT1_TCSR; cycles=9 */
+ FRT1_FRC_H = (uint16_t)(0x00); /* 1043; MOV:G.W #H'00, @FRT1_FRC_H; FRT1_FRC_H = H'00; refs FRT1_FRC_H; FRT1_FRC W write high TEMP access; cycles=9 */
+ FRT1_OCRA_H = (uint16_t)(0x009C); /* 1048; MOV:G.W #H'009C, @FRT1_OCRA_H; FRT1_OCRA_H = H'9C; refs FRT1_OCRA_H; FRT1_OCRA W write high TEMP access; cycles=11 */
+ FRT2_TCR = (uint8_t)(0x02); /* 104E; MOV:G.B #H'02, @FRT2_TCR; FRT2_TCR = H'02 (ICIE=0 OCIEB=0 OCIEA=0 OVIE=0 OEB=0 OEA=0 CKS1=1 CKS0=0); refs FRT2_TCR; cycles=9 */
+ FRT2_TCSR = (uint8_t)(0x01); /* 1053; MOV:G.B #H'01, @FRT2_TCSR; FRT2_TCSR = H'01 (ICF=0 OCFB=0 OCFA=0 OVF=0 OLVLB=0 OLVLA=0 IEDG=0 CCLRA=1); refs FRT2_TCSR; cycles=9 */
+ FRT2_FRC_H = (uint16_t)(0x00); /* 1058; MOV:G.W #H'00, @FRT2_FRC_H; FRT2_FRC_H = H'00; refs FRT2_FRC_H; FRT2_FRC W write high TEMP access; cycles=11 */
+ FRT2_OCRA_H = (uint16_t)(0x7A12); /* 105D; MOV:G.W #H'7A12, @FRT2_OCRA_H; FRT2_OCRA_H = H'7A12; refs FRT2_OCRA_H; FRT2_OCRA W write high TEMP access; cycles=9 */
+ FRT3_TCR = (uint8_t)(0x00); /* 1063; MOV:G.B #H'00, @FRT3_TCR; FRT3_TCR = H'00 (ICIE=0 OCIEB=0 OCIEA=0 OVIE=0 OEB=0 OEA=0 CKS1=0 CKS0=0); refs FRT3_TCR; cycles=9 */
+ FRT3_TCSR = (uint8_t)(0x00); /* 1068; MOV:G.B #H'00, @FRT3_TCSR; FRT3_TCSR = H'00 (ICF=0 OCFB=0 OCFA=0 OVF=0 OLVLB=0 OLVLA=0 IEDG=0 CCLRA=0); refs FRT3_TCSR; cycles=9 */
+ TMR_TCR = (uint8_t)(0x00); /* 106D; MOV:G.B #H'00, @TMR_TCR; TMR_TCR = H'00 (CMIEB=0 CMIEA=0 OVIE=0 CCLR1=0 CCLR0=0 CKS2=0 CKS1=0 CKS0=0); refs TMR_TCR; cycles=9 */
+ TMR_TCSR = (uint8_t)(0x10); /* 1072; MOV:G.B #H'10, @TMR_TCSR; TMR_TCSR = H'10 (CMFB=0 CMFA=0 OVF=0 OS3=0 OS2=0 OS1=0 OS0=0); refs TMR_TCSR; cycles=9 */
+ PWM1_TCR = (uint8_t)(0x38); /* 1077; MOV:G.B #H'38, @PWM1_TCR; PWM1_TCR = H'38 (OE=0 OS=0 CKS2=0 CKS1=0 CKS0=0); refs PWM1_TCR; cycles=9 */
+ PWM1_DTR = (uint8_t)(0xFF); /* 107C; MOV:G.B #H'FF, @PWM1_DTR; PWM1_DTR = H'FF; refs PWM1_DTR; cycles=9 */
+ PWM2_TCR = (uint8_t)(0x38); /* 1081; MOV:G.B #H'38, @PWM2_TCR; PWM2_TCR = H'38 (OE=0 OS=0 CKS2=0 CKS1=0 CKS0=0); refs PWM2_TCR; cycles=9 */
+ PWM2_DTR = (uint8_t)(0xFF); /* 1086; MOV:G.B #H'FF, @PWM2_DTR; PWM2_DTR = H'FF; refs PWM2_DTR; cycles=9 */
+ PWM3_TCR = (uint8_t)(0x3B); /* 108B; MOV:G.B #H'3B, @PWM3_TCR; PWM3_TCR = H'3B (OE=0 OS=0 CKS2=0 CKS1=1 CKS0=1); refs PWM3_TCR; cycles=9 */
+ PWM3_DTR = (uint8_t)(0x7D); /* 1090; MOV:G.B #H'7D, @PWM3_DTR; PWM3_DTR = H'7D; refs PWM3_DTR; cycles=9 */
+ SCI1_SMR = (uint8_t)(0x24); /* 1095; MOV:G.B #H'24, @SCI1_SMR; SCI1_SMR = H'24 (C/A=0 CHR=0 PE=1 O/E=0 STOP=0 CKS1=0 CKS0=0; SCI async, 8-bit, even parity, 1 stop, clock phi); refs SCI1_SMR; cycles=9 */
+ SCI1_SCR = (uint8_t)(0x3C); /* 109A; MOV:G.B #H'3C, @SCI1_SCR; SCI1_SCR = H'3C (TIE=0 RIE=0 TE=1 RE=1 CKE1=0 CKE0=0; SCI enables TX,RX, internal clock); refs SCI1_SCR; cycles=9 */
+ SCI1_BRR = (uint8_t)(0x07); /* 109F; MOV:G.B #H'07, @SCI1_BRR; SCI1_BRR = H'07; SCI1 async 8-bit even parity 1 stop BRR N=7 CKS n=0; baud needs --clock-hz; refs SCI1_BRR; cycles=9 */
+ SCI2_SMR = (uint8_t)(0x24); /* 10A4; MOV:G.B #H'24, @SCI2_SMR; SCI2_SMR = H'24 (C/A=0 CHR=0 PE=1 O/E=0 STOP=0 CKS1=0 CKS0=0; SCI async, 8-bit, even parity, 1 stop, clock phi); refs SCI2_SMR; cycles=9 */
+ SCI2_SCR = (uint8_t)(0x0C); /* 10A9; MOV:G.B #H'0C, @SCI2_SCR; SCI2_SCR = H'0C (TIE=0 RIE=0 TE=0 RE=0 CKE1=0 CKE0=0; SCI enables none, internal clock); refs SCI2_SCR; cycles=9 */
+ SCI2_BRR = (uint8_t)(0x07); /* 10AE; MOV:G.B #H'07, @SCI2_BRR; SCI2_BRR = H'07; SCI2 async 8-bit even parity 1 stop BRR N=7 CKS n=0; baud needs --clock-hz; refs SCI2_BRR; cycles=9 */
+ ADCSR = (uint8_t)(0x19); /* 10B3; MOV:G.B #H'19, @ADCSR; ADCSR = H'19 (ADF=0 ADIE=0 ADST=0 SCAN=1 CKS=1 CH2=0 CH1=0 CH0=1; A/D halt, scan AN0-AN1, 138-state max, ADI disabled); refs ADCSR; cycles=9 */
MEM8[0xFEE9] = (uint8_t)(0x7F); /* 10B8; MOV:G.B #H'7F, @H'FEE9; cycles=9 */
- WCR = (uint8_t)(0xF0); /* 10BD; MOV:G.B #H'F0, @WCR; WCR = H'F0 (WMS1=0 WMS0=0 WC1=0 WC0=0; programmable wait, 0 waits); cycles=9 */
- RAMCR = (uint8_t)(0xFF); /* 10C2; MOV:G.B #H'FF, @RAMCR; RAMCR = H'FF (RAME=1; on-chip RAM enabled); cycles=9 */
- P1DR &= ~BIT(7); /* 10C7; BCLR.B #7, @P1DR; clear bit 7 of P1DR; cycles=8 */
+ WCR = (uint8_t)(0xF0); /* 10BD; MOV:G.B #H'F0, @WCR; WCR = H'F0 (WMS1=0 WMS0=0 WC1=0 WC0=0; programmable wait, 0 waits); refs WCR; cycles=9 */
+ RAMCR = (uint8_t)(0xFF); /* 10C2; MOV:G.B #H'FF, @RAMCR; RAMCR = H'FF (RAME=1; on-chip RAM enabled); refs RAMCR; cycles=9 */
+ P1DR &= ~BIT(7); /* 10C7; BCLR.B #7, @P1DR; clear bit 7 of P1DR; refs P1DR; cycles=8 */
goto loc_3F76; /* 10CB; BRA loc_3F76; cycles=8 */
}
void loc_10CE(void)
{
- R4 = (uint16_t)(0x0040); /* 10CE; MOV:I.W #H'0040, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 10D1; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0040); /* 10CE; MOV:I.W #H'0040, R4; dataflow R4=0x0040; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 10D1; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 10D4; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 10D7; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 10DA; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 10D7; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 10DA; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 10DD; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 10E0; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 10E3; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 10E0; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 10E3; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 10E6; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 10E9; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 10EC; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 10E9; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 10EC; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 10EF; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0207); /* 10F2; MOV:I.W #H'0207, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 10F5; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0207); /* 10F2; MOV:I.W #H'0207, R4; dataflow R4=0x0207; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 10F5; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 10F8; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0204); /* 10FB; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 10FE; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 10FB; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 10FE; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1101; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0204); /* 1104; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1107; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 1104; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1107; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 110A; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0204); /* 110D; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1110; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 110D; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1110; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1113; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0204); /* 1116; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1119; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 1116; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1119; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 111C; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0048); /* 111F; MOV:I.W #H'0048, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1122; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0048); /* 111F; MOV:I.W #H'0048, R4; dataflow R4=0x0048; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1122; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1125; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 1128; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 112B; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 1128; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 112B; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 112E; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 1131; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1134; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 1131; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1134; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1137; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 113A; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 113D; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 113A; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 113D; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1140; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x021B); /* 1143; MOV:I.W #H'021B, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1146; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x021B); /* 1143; MOV:I.W #H'021B, R4; dataflow R4=0x021B; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1146; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1149; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 114C; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 114F; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 114C; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 114F; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1152; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 1155; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1158; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 1155; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1158; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 115B; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 115E; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1161; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 115E; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1161; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1164; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 1167; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 116A; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 1167; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 116A; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 116D; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0050); /* 1170; MOV:I.W #H'0050, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1173; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0050); /* 1170; MOV:I.W #H'0050, R4; dataflow R4=0x0050; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1173; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1176; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 1179; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 117C; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 1179; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 117C; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 117F; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 1182; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1185; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 1182; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1185; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1188; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 118B; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 118E; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 118B; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 118E; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1191; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x021C); /* 1194; MOV:I.W #H'021C, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1197; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x021C); /* 1194; MOV:I.W #H'021C, R4; dataflow R4=0x021C; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1197; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 119A; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0204); /* 119D; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 11A0; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 119D; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 11A0; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 11A3; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0204); /* 11A6; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 11A9; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 11A6; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 11A9; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 11AC; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0204); /* 11AF; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 11B2; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 11AF; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 11B2; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 11B5; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0204); /* 11B8; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 11BB; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 11B8; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 11BB; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 11BE; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0058); /* 11C1; MOV:I.W #H'0058, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 11C4; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0058); /* 11C1; MOV:I.W #H'0058, R4; dataflow R4=0x0058; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 11C4; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 11C7; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0204); /* 11CA; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 11CD; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 11CA; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 11CD; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 11D0; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0204); /* 11D3; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 11D6; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 11D3; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 11D6; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 11D9; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0204); /* 11DC; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 11DF; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 11DC; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 11DF; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 11E2; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0207); /* 11E5; MOV:I.W #H'0207, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 11E8; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0207); /* 11E5; MOV:I.W #H'0207, R4; dataflow R4=0x0207; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 11E8; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 11EB; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 11EE; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 11F1; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 11EE; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 11F1; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 11F4; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 11F7; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 11FA; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 11F7; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 11FA; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 11FD; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 1200; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1203; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 1200; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1203; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1206; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 1209; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 120C; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 1209; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 120C; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 120F; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0060); /* 1212; MOV:I.W #H'0060, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1215; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0060); /* 1212; MOV:I.W #H'0060, R4; dataflow R4=0x0060; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1215; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1218; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 121B; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 121E; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 121B; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 121E; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1221; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 1224; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1227; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 1224; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1227; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 122A; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 122D; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1230; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 122D; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1230; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1233; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x021B); /* 1236; MOV:I.W #H'021B, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1239; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x021B); /* 1236; MOV:I.W #H'021B, R4; dataflow R4=0x021B; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1239; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 123C; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 123F; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1242; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 123F; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1242; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1245; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 1248; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 124B; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 1248; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 124B; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 124E; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 1251; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1254; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 1251; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1254; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1257; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 125A; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 125D; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 125A; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 125D; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1260; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0068); /* 1263; MOV:I.W #H'0068, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1266; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0068); /* 1263; MOV:I.W #H'0068, R4; dataflow R4=0x0068; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1266; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1269; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0204); /* 126C; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 126F; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 126C; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 126F; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1272; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0204); /* 1275; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1278; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 1275; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1278; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 127B; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0204); /* 127E; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1281; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 127E; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1281; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1284; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x021C); /* 1287; MOV:I.W #H'021C, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 128A; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x021C); /* 1287; MOV:I.W #H'021C, R4; dataflow R4=0x021C; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 128A; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 128D; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 1290; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1293; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 1290; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1293; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1296; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 1299; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 129C; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 1299; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 129C; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 129F; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 12A2; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 12A5; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 12A2; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 12A5; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 12A8; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 12AB; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 12AE; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 12AB; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 12AE; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 12B1; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0070); /* 12B4; MOV:I.W #H'0070, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 12B7; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0070); /* 12B4; MOV:I.W #H'0070, R4; dataflow R4=0x0070; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 12B7; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 12BA; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0204); /* 12BD; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 12C0; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 12BD; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 12C0; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 12C3; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0204); /* 12C6; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 12C9; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 12C6; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 12C9; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 12CC; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 12CF; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 12D2; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 12CF; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 12D2; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 12D5; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0204); /* 12D8; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 12DB; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 12D8; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 12DB; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 12DE; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0204); /* 12E1; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 12E4; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 12E1; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 12E4; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 12E7; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 12EA; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 12ED; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 12EA; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 12ED; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 12F0; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0204); /* 12F3; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 12F6; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 12F3; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 12F6; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 12F9; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0204); /* 12FC; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 12FF; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 12FC; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 12FF; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1302; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0078); /* 1305; MOV:I.W #H'0078, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1308; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0078); /* 1305; MOV:I.W #H'0078, R4; dataflow R4=0x0078; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1308; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 130B; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0204); /* 130E; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1311; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 130E; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1311; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1314; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0204); /* 1317; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 131A; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 1317; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 131A; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 131D; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0200); /* 1320; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1323; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 1320; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1323; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1326; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0204); /* 1329; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 132C; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 1329; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 132C; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 132F; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0204); /* 1332; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1335; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 1332; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1335; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1338; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0200); /* 133B; MOV:I.W #H'0200, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 133E; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0200); /* 133B; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 133E; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1341; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x0204); /* 1344; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1347; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 1344; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1347; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 134A; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0204); /* 134D; MOV:I.W #H'0204, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 1350; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0204); /* 134D; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 1350; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 1353; BSR loc_3ECC; cycles=14 */
return; /* 1356; RTS; cycles=12 */
}
@@ -434,357 +722,357 @@ void loc_10CE(void)
void loc_15E0(void)
{
loc_2650(); /* 15E0; BSR loc_2650; cycles=13 */
- MEM8[0xF689] &= ~BIT(7); /* 15E3; BCLR.B #7, @H'F689; cycles=8 */
- if (Z) goto loc_15F9; /* 15E7; BEQ loc_15F9; cycles=3/8 nt/t */
- R1 = (uint16_t)(MEM16[0xF68E]); /* 15E9; MOV:G.W @H'F68E, R1; cycles=6 */
- MEM16[0xE902] = (uint16_t)(R1); /* 15ED; MOV:G.W R1, @H'E902; cycles=6 */
- R2 = (uint8_t)(0x80); /* 15F1; MOV:E.B #H'80, R2; cycles=2 */
- R3 = (uint16_t)(0x0081); /* 15F3; MOV:I.W #H'0081, R3; cycles=3 */
- loc_3E54(); /* 15F6; BSR loc_3E54; cycles=13 */
-loc_15F9:
- set_flags_tst8(MEM8[0xF6F0]); /* 15F9; TST.B @H'F6F0; cycles=6 */
+ MEM8[0xF689] &= ~BIT(7); /* 15E3; BCLR.B #7, @H'F689; refs ram_F689; cycles=8 */
+ if (!Z) { /* 15E7; BEQ loc_15F9; cycles=3/8 nt/t */
+ R1 = (uint16_t)(MEM16[0xF68E]); /* 15E9; MOV:G.W @H'F68E, R1; refs ram_F68E; cycles=6 */
+ MEM16[0xE902] = (uint16_t)(R1); /* 15ED; MOV:G.W R1, @H'E902; refs mem_E902; cycles=6 */
+ R2 = (uint8_t)(0x80); /* 15F1; MOV:E.B #H'80, R2; dataflow R2=0x80; cycles=2 */
+ R3 = (uint16_t)(0x0081); /* 15F3; MOV:I.W #H'0081, R3; dataflow R3=0x0081; cycles=3 */
+ loc_3E54(); /* 15F6; BSR loc_3E54; cycles=13 */
+ }
+ set_flags_tst8(MEM8[0xF6F0]); /* 15F9; TST.B @H'F6F0; refs ram_F6F0; cycles=6 */
if (Z) goto loc_163D; /* 15FD; BEQ loc_163D; cycles=3/8 nt/t */
- MEM8[0xF6F0] &= ~BIT(7); /* 15FF; BCLR.B #7, @H'F6F0; cycles=8 */
- if (Z) goto loc_1608; /* 1603; BEQ loc_1608; cycles=3/8 nt/t */
- loc_4394(); /* 1605; JSR @loc_4394; cycles=14 */
-loc_1608:
- MEM8[0xF6F0] &= ~BIT(6); /* 1608; BCLR.B #6, @H'F6F0; cycles=9 */
- if (Z) goto loc_1611; /* 160C; BEQ loc_1611; cycles=3/7 nt/t */
- loc_4457(); /* 160E; JSR @loc_4457; cycles=13 */
-loc_1611:
- MEM8[0xF6F0] &= ~BIT(5); /* 1611; BCLR.B #5, @H'F6F0; cycles=8 */
- if (Z) goto loc_161A; /* 1615; BEQ loc_161A; cycles=3/8 nt/t */
- loc_451A(); /* 1617; JSR @loc_451A; cycles=14 */
-loc_161A:
- MEM8[0xF6F0] &= ~BIT(4); /* 161A; BCLR.B #4, @H'F6F0; cycles=9 */
- MEM8[0xF6F0] &= ~BIT(3); /* 161E; BCLR.B #3, @H'F6F0; cycles=9 */
- if (Z) goto loc_1627; /* 1622; BEQ loc_1627; cycles=3/7 nt/t */
- loc_1705(); /* 1624; JSR @loc_1705; cycles=13 */
-loc_1627:
- MEM8[0xF6F0] &= ~BIT(2); /* 1627; BCLR.B #2, @H'F6F0; cycles=8 */
- if (Z) goto loc_1630; /* 162B; BEQ loc_1630; cycles=3/8 nt/t */
- loc_174D(); /* 162D; JSR @loc_174D; cycles=14 */
-loc_1630:
- MEM8[0xF6F0] &= ~BIT(1); /* 1630; BCLR.B #1, @H'F6F0; cycles=9 */
- if (Z) goto loc_1639; /* 1634; BEQ loc_1639; cycles=3/7 nt/t */
- loc_1795(); /* 1636; JSR @loc_1795; cycles=13 */
-loc_1639:
- MEM8[0xF6F0] &= ~BIT(0); /* 1639; BCLR.B #0, @H'F6F0; cycles=8 */
+ MEM8[0xF6F0] &= ~BIT(7); /* 15FF; BCLR.B #7, @H'F6F0; refs ram_F6F0; cycles=8 */
+ if (!Z) { /* 1603; BEQ loc_1608; cycles=3/8 nt/t */
+ loc_4394(); /* 1605; JSR @loc_4394; cycles=14 */
+ }
+ MEM8[0xF6F0] &= ~BIT(6); /* 1608; BCLR.B #6, @H'F6F0; refs ram_F6F0; cycles=9 */
+ if (!Z) { /* 160C; BEQ loc_1611; cycles=3/7 nt/t */
+ loc_4457(); /* 160E; JSR @loc_4457; cycles=13 */
+ }
+ MEM8[0xF6F0] &= ~BIT(5); /* 1611; BCLR.B #5, @H'F6F0; refs ram_F6F0; cycles=8 */
+ if (!Z) { /* 1615; BEQ loc_161A; cycles=3/8 nt/t */
+ loc_451A(); /* 1617; JSR @loc_451A; cycles=14 */
+ }
+ MEM8[0xF6F0] &= ~BIT(4); /* 161A; BCLR.B #4, @H'F6F0; refs ram_F6F0; cycles=9 */
+ MEM8[0xF6F0] &= ~BIT(3); /* 161E; BCLR.B #3, @H'F6F0; refs ram_F6F0; cycles=9 */
+ if (!Z) { /* 1622; BEQ loc_1627; cycles=3/7 nt/t */
+ loc_1705(); /* 1624; JSR @loc_1705; cycles=13 */
+ }
+ MEM8[0xF6F0] &= ~BIT(2); /* 1627; BCLR.B #2, @H'F6F0; refs ram_F6F0; cycles=8 */
+ if (!Z) { /* 162B; BEQ loc_1630; cycles=3/8 nt/t */
+ loc_174D(); /* 162D; JSR @loc_174D; cycles=14 */
+ }
+ MEM8[0xF6F0] &= ~BIT(1); /* 1630; BCLR.B #1, @H'F6F0; refs ram_F6F0; cycles=9 */
+ if (!Z) { /* 1634; BEQ loc_1639; cycles=3/7 nt/t */
+ loc_1795(); /* 1636; JSR @loc_1795; cycles=13 */
+ }
+ MEM8[0xF6F0] &= ~BIT(0); /* 1639; BCLR.B #0, @H'F6F0; refs ram_F6F0; cycles=8 */
loc_163D:
- set_flags_tst8(MEM8[0xF6F1]); /* 163D; TST.B @H'F6F1; cycles=6 */
+ set_flags_tst8(MEM8[0xF6F1]); /* 163D; TST.B @H'F6F1; refs ram_F6F1; cycles=6 */
if (Z) goto loc_1686; /* 1641; BEQ loc_1686; cycles=3/8 nt/t */
- MEM8[0xF6F1] &= ~BIT(7); /* 1643; BCLR.B #7, @H'F6F1; cycles=8 */
- if (Z) goto loc_164C; /* 1647; BEQ loc_164C; cycles=3/8 nt/t */
- loc_17C9(); /* 1649; JSR @loc_17C9; cycles=14 */
-loc_164C:
- MEM8[0xF6F1] &= ~BIT(6); /* 164C; BCLR.B #6, @H'F6F1; cycles=9 */
- if (Z) goto loc_1655; /* 1650; BEQ loc_1655; cycles=3/7 nt/t */
- loc_17FB(); /* 1652; JSR @loc_17FB; cycles=13 */
-loc_1655:
- MEM8[0xF6F1] &= ~BIT(5); /* 1655; BCLR.B #5, @H'F6F1; cycles=8 */
- if (Z) goto loc_165E; /* 1659; BEQ loc_165E; cycles=3/8 nt/t */
- loc_182D(); /* 165B; JSR @loc_182D; cycles=14 */
-loc_165E:
- MEM8[0xF6F1] &= ~BIT(4); /* 165E; BCLR.B #4, @H'F6F1; cycles=9 */
- if (Z) goto loc_1667; /* 1662; BEQ loc_1667; cycles=3/7 nt/t */
- loc_1891(); /* 1664; JSR @loc_1891; cycles=13 */
-loc_1667:
- MEM8[0xF6F1] &= ~BIT(3); /* 1667; BCLR.B #3, @H'F6F1; cycles=8 */
- if (Z) goto loc_1670; /* 166B; BEQ loc_1670; cycles=3/8 nt/t */
- loc_18E7(); /* 166D; JSR @loc_18E7; cycles=14 */
-loc_1670:
- MEM8[0xF6F1] &= ~BIT(2); /* 1670; BCLR.B #2, @H'F6F1; cycles=9 */
- if (Z) goto loc_1679; /* 1674; BEQ loc_1679; cycles=3/7 nt/t */
- loc_194A(); /* 1676; JSR @loc_194A; cycles=13 */
-loc_1679:
- MEM8[0xF6F1] &= ~BIT(1); /* 1679; BCLR.B #1, @H'F6F1; cycles=8 */
- if (Z) goto loc_1682; /* 167D; BEQ loc_1682; cycles=3/8 nt/t */
- loc_1979(); /* 167F; JSR @loc_1979; cycles=14 */
-loc_1682:
- MEM8[0xF6F1] &= ~BIT(0); /* 1682; BCLR.B #0, @H'F6F1; cycles=9 */
+ MEM8[0xF6F1] &= ~BIT(7); /* 1643; BCLR.B #7, @H'F6F1; refs ram_F6F1; cycles=8 */
+ if (!Z) { /* 1647; BEQ loc_164C; cycles=3/8 nt/t */
+ loc_17C9(); /* 1649; JSR @loc_17C9; cycles=14 */
+ }
+ MEM8[0xF6F1] &= ~BIT(6); /* 164C; BCLR.B #6, @H'F6F1; refs ram_F6F1; cycles=9 */
+ if (!Z) { /* 1650; BEQ loc_1655; cycles=3/7 nt/t */
+ loc_17FB(); /* 1652; JSR @loc_17FB; cycles=13 */
+ }
+ MEM8[0xF6F1] &= ~BIT(5); /* 1655; BCLR.B #5, @H'F6F1; refs ram_F6F1; cycles=8 */
+ if (!Z) { /* 1659; BEQ loc_165E; cycles=3/8 nt/t */
+ loc_182D(); /* 165B; JSR @loc_182D; cycles=14 */
+ }
+ MEM8[0xF6F1] &= ~BIT(4); /* 165E; BCLR.B #4, @H'F6F1; refs ram_F6F1; cycles=9 */
+ if (!Z) { /* 1662; BEQ loc_1667; cycles=3/7 nt/t */
+ loc_1891(); /* 1664; JSR @loc_1891; cycles=13 */
+ }
+ MEM8[0xF6F1] &= ~BIT(3); /* 1667; BCLR.B #3, @H'F6F1; refs ram_F6F1; cycles=8 */
+ if (!Z) { /* 166B; BEQ loc_1670; cycles=3/8 nt/t */
+ loc_18E7(); /* 166D; JSR @loc_18E7; cycles=14 */
+ }
+ MEM8[0xF6F1] &= ~BIT(2); /* 1670; BCLR.B #2, @H'F6F1; refs ram_F6F1; cycles=9 */
+ if (!Z) { /* 1674; BEQ loc_1679; cycles=3/7 nt/t */
+ loc_194A(); /* 1676; JSR @loc_194A; cycles=13 */
+ }
+ MEM8[0xF6F1] &= ~BIT(1); /* 1679; BCLR.B #1, @H'F6F1; refs ram_F6F1; cycles=8 */
+ if (!Z) { /* 167D; BEQ loc_1682; cycles=3/8 nt/t */
+ loc_1979(); /* 167F; JSR @loc_1979; cycles=14 */
+ }
+ MEM8[0xF6F1] &= ~BIT(0); /* 1682; BCLR.B #0, @H'F6F1; refs ram_F6F1; cycles=9 */
loc_1686:
- set_flags_tst8(MEM8[0xF6F2]); /* 1686; TST.B @H'F6F2; cycles=7 */
+ set_flags_tst8(MEM8[0xF6F2]); /* 1686; TST.B @H'F6F2; refs ram_F6F2; cycles=7 */
if (Z) goto loc_16D4; /* 168A; BEQ loc_16D4; cycles=3/7 nt/t */
- MEM8[0xF6F2] &= ~BIT(7); /* 168C; BCLR.B #7, @H'F6F2; cycles=9 */
- if (Z) goto loc_1695; /* 1690; BEQ loc_1695; cycles=3/7 nt/t */
- loc_1B2D(); /* 1692; JSR @loc_1B2D; cycles=13 */
-loc_1695:
- MEM8[0xF6F2] &= ~BIT(6); /* 1695; BCLR.B #6, @H'F6F2; cycles=8 */
- if (Z) goto loc_169E; /* 1699; BEQ loc_169E; cycles=3/8 nt/t */
- loc_1B44(); /* 169B; JSR @loc_1B44; cycles=14 */
-loc_169E:
- MEM8[0xF6F2] &= ~BIT(5); /* 169E; BCLR.B #5, @H'F6F2; cycles=9 */
- if (Z) goto loc_16A7; /* 16A2; BEQ loc_16A7; cycles=3/7 nt/t */
- loc_1B5B(); /* 16A4; JSR @loc_1B5B; cycles=13 */
-loc_16A7:
- MEM8[0xF6F2] &= ~BIT(4); /* 16A7; BCLR.B #4, @H'F6F2; cycles=8 */
- if (Z) goto loc_16B0; /* 16AB; BEQ loc_16B0; cycles=3/8 nt/t */
- loc_1BA0(); /* 16AD; JSR @loc_1BA0; cycles=14 */
-loc_16B0:
- MEM8[0xF6F2] &= ~BIT(3); /* 16B0; BCLR.B #3, @H'F6F2; cycles=9 */
- if (Z) goto loc_16B9; /* 16B4; BEQ loc_16B9; cycles=3/7 nt/t */
- loc_1BB6(); /* 16B6; JSR @loc_1BB6; cycles=13 */
-loc_16B9:
- MEM8[0xF6F2] &= ~BIT(2); /* 16B9; BCLR.B #2, @H'F6F2; cycles=8 */
- if (Z) goto loc_16C2; /* 16BD; BEQ loc_16C2; cycles=3/8 nt/t */
- loc_1BCC(); /* 16BF; JSR @loc_1BCC; cycles=14 */
-loc_16C2:
- MEM8[0xF6F2] &= ~BIT(1); /* 16C2; BCLR.B #1, @H'F6F2; cycles=9 */
- if (Z) goto loc_16CB; /* 16C6; BEQ loc_16CB; cycles=3/7 nt/t */
- loc_1B72(); /* 16C8; JSR @loc_1B72; cycles=13 */
-loc_16CB:
- MEM8[0xF6F2] &= ~BIT(0); /* 16CB; BCLR.B #0, @H'F6F2; cycles=8 */
+ MEM8[0xF6F2] &= ~BIT(7); /* 168C; BCLR.B #7, @H'F6F2; refs ram_F6F2; cycles=9 */
+ if (!Z) { /* 1690; BEQ loc_1695; cycles=3/7 nt/t */
+ loc_1B2D(); /* 1692; JSR @loc_1B2D; cycles=13 */
+ }
+ MEM8[0xF6F2] &= ~BIT(6); /* 1695; BCLR.B #6, @H'F6F2; refs ram_F6F2; cycles=8 */
+ if (!Z) { /* 1699; BEQ loc_169E; cycles=3/8 nt/t */
+ loc_1B44(); /* 169B; JSR @loc_1B44; cycles=14 */
+ }
+ MEM8[0xF6F2] &= ~BIT(5); /* 169E; BCLR.B #5, @H'F6F2; refs ram_F6F2; cycles=9 */
+ if (!Z) { /* 16A2; BEQ loc_16A7; cycles=3/7 nt/t */
+ loc_1B5B(); /* 16A4; JSR @loc_1B5B; cycles=13 */
+ }
+ MEM8[0xF6F2] &= ~BIT(4); /* 16A7; BCLR.B #4, @H'F6F2; refs ram_F6F2; cycles=8 */
+ if (!Z) { /* 16AB; BEQ loc_16B0; cycles=3/8 nt/t */
+ loc_1BA0(); /* 16AD; JSR @loc_1BA0; cycles=14 */
+ }
+ MEM8[0xF6F2] &= ~BIT(3); /* 16B0; BCLR.B #3, @H'F6F2; refs ram_F6F2; cycles=9 */
+ if (!Z) { /* 16B4; BEQ loc_16B9; cycles=3/7 nt/t */
+ loc_1BB6(); /* 16B6; JSR @loc_1BB6; cycles=13 */
+ }
+ MEM8[0xF6F2] &= ~BIT(2); /* 16B9; BCLR.B #2, @H'F6F2; refs ram_F6F2; cycles=8 */
+ if (!Z) { /* 16BD; BEQ loc_16C2; cycles=3/8 nt/t */
+ loc_1BCC(); /* 16BF; JSR @loc_1BCC; cycles=14 */
+ }
+ MEM8[0xF6F2] &= ~BIT(1); /* 16C2; BCLR.B #1, @H'F6F2; refs ram_F6F2; cycles=9 */
+ if (!Z) { /* 16C6; BEQ loc_16CB; cycles=3/7 nt/t */
+ loc_1B72(); /* 16C8; JSR @loc_1B72; cycles=13 */
+ }
+ MEM8[0xF6F2] &= ~BIT(0); /* 16CB; BCLR.B #0, @H'F6F2; refs ram_F6F2; cycles=8 */
if (Z) goto loc_16D4; /* 16CF; BEQ loc_16D4; cycles=3/8 nt/t */
loc_1B89(); /* 16D1; JSR @loc_1B89; cycles=14 */
loc_16D4:
- set_flags_tst8(MEM8[0xF6F3]); /* 16D4; TST.B @H'F6F3; cycles=7 */
+ set_flags_tst8(MEM8[0xF6F3]); /* 16D4; TST.B @H'F6F3; refs ram_F6F3; cycles=7 */
if (Z) goto loc_1704; /* 16D8; BEQ loc_1704; cycles=3/7 nt/t */
- MEM8[0xF6F3] &= ~BIT(7); /* 16DA; BCLR.B #7, @H'F6F3; cycles=9 */
- MEM8[0xF6F3] &= ~BIT(6); /* 16DE; BCLR.B #6, @H'F6F3; cycles=9 */
- MEM8[0xF6F3] &= ~BIT(5); /* 16E2; BCLR.B #5, @H'F6F3; cycles=9 */
- MEM8[0xF6F3] &= ~BIT(4); /* 16E6; BCLR.B #4, @H'F6F3; cycles=9 */
- if (Z) goto loc_16EF; /* 16EA; BEQ loc_16EF; cycles=3/7 nt/t */
- loc_1BE2(); /* 16EC; JSR @loc_1BE2; cycles=13 */
-loc_16EF:
- MEM8[0xF6F3] &= ~BIT(3); /* 16EF; BCLR.B #3, @H'F6F3; cycles=8 */
- if (Z) goto loc_16F8; /* 16F3; BEQ loc_16F8; cycles=3/8 nt/t */
- loc_1BF8(); /* 16F5; JSR @loc_1BF8; cycles=14 */
-loc_16F8:
- MEM8[0xF6F3] &= ~BIT(2); /* 16F8; BCLR.B #2, @H'F6F3; cycles=9 */
- MEM8[0xF6F3] &= ~BIT(1); /* 16FC; BCLR.B #1, @H'F6F3; cycles=9 */
- MEM8[0xF6F3] &= ~BIT(0); /* 1700; BCLR.B #0, @H'F6F3; cycles=9 */
+ MEM8[0xF6F3] &= ~BIT(7); /* 16DA; BCLR.B #7, @H'F6F3; refs ram_F6F3; cycles=9 */
+ MEM8[0xF6F3] &= ~BIT(6); /* 16DE; BCLR.B #6, @H'F6F3; refs ram_F6F3; cycles=9 */
+ MEM8[0xF6F3] &= ~BIT(5); /* 16E2; BCLR.B #5, @H'F6F3; refs ram_F6F3; cycles=9 */
+ MEM8[0xF6F3] &= ~BIT(4); /* 16E6; BCLR.B #4, @H'F6F3; refs ram_F6F3; cycles=9 */
+ if (!Z) { /* 16EA; BEQ loc_16EF; cycles=3/7 nt/t */
+ loc_1BE2(); /* 16EC; JSR @loc_1BE2; cycles=13 */
+ }
+ MEM8[0xF6F3] &= ~BIT(3); /* 16EF; BCLR.B #3, @H'F6F3; refs ram_F6F3; cycles=8 */
+ if (!Z) { /* 16F3; BEQ loc_16F8; cycles=3/8 nt/t */
+ loc_1BF8(); /* 16F5; JSR @loc_1BF8; cycles=14 */
+ }
+ MEM8[0xF6F3] &= ~BIT(2); /* 16F8; BCLR.B #2, @H'F6F3; refs ram_F6F3; cycles=9 */
+ MEM8[0xF6F3] &= ~BIT(1); /* 16FC; BCLR.B #1, @H'F6F3; refs ram_F6F3; cycles=9 */
+ MEM8[0xF6F3] &= ~BIT(0); /* 1700; BCLR.B #0, @H'F6F3; refs ram_F6F3; cycles=9 */
loc_1704:
return; /* 1704; RTS; cycles=12 */
}
void loc_1705(void)
{
- set_flags_cmp8(MEM8[0xF731], 0x02); /* 1705; CMP:G.B #H'02, @H'F731; cycles=6 */
+ set_flags_cmp8(MEM8[0xF731], 0x02); /* 1705; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
if (!C && !Z) goto loc_1744; /* 170A; BHI loc_1744; cycles=3/7 nt/t */
- set_flags_btst(MEM16[0xE14E], 15); /* 170C; BTST.W #15, @H'E14E; cycles=7 */
+ set_flags_btst(MEM16[0xE14E], 15); /* 170C; BTST.W #15, @H'E14E; refs mem_E14E; cycles=7 */
if (!Z) goto loc_1736; /* 1710; BNE loc_1736; cycles=3/7 nt/t */
- set_flags_btst(MEM8[0xF730], 6); /* 1712; BTST.B #6, @H'F730; cycles=7 */
+ set_flags_btst(MEM8[0xF730], 6); /* 1712; BTST.B #6, @H'F730; refs ram_F730; cycles=7 */
if (!Z) goto loc_1736; /* 1716; BNE loc_1736; cycles=3/7 nt/t */
- MEM8[0xFB03] |= BIT(7); /* 1718; BSET.B #7, @H'FB03; cycles=9 */
- if (!Z) goto loc_1726; /* 171C; BNE loc_1726; cycles=3/7 nt/t */
- R1 = (uint16_t)(MEM16[0xF732]); /* 171E; MOV:G.W @H'F732, R1; cycles=7 */
- MEM16[0xF734] = (uint16_t)(R1); /* 1722; MOV:G.W R1, @H'F734; cycles=7 */
-loc_1726:
- MEM16[0xF732] = (uint16_t)(0x1C07); /* 1726; MOV:G.W #H'1C07, @H'F732; cycles=11 */
- MEM8[0xFB02] = (uint8_t)(0x14); /* 172C; MOV:G.B #H'14, @H'FB02; cycles=9 */
+ MEM8[0xFB03] |= BIT(7); /* 1718; BSET.B #7, @H'FB03; refs ram_FB03; cycles=9 */
+ if (Z) { /* 171C; BNE loc_1726; cycles=3/7 nt/t */
+ R1 = (uint16_t)(MEM16[0xF732]); /* 171E; MOV:G.W @H'F732, R1; refs ram_F732; cycles=7 */
+ MEM16[0xF734] = (uint16_t)(R1); /* 1722; MOV:G.W R1, @H'F734; refs ram_F734; cycles=7 */
+ }
+ MEM16[0xF732] = (uint16_t)(0x1C07); /* 1726; MOV:G.W #H'1C07, @H'F732; refs ram_F732; cycles=11 */
+ MEM8[0xFB02] = (uint8_t)(0x14); /* 172C; MOV:G.B #H'14, @H'FB02; refs ram_FB02; cycles=9 */
loc_48FA(); /* 1731; BSR loc_48FA; cycles=14 */
goto loc_1744; /* 1734; BRA loc_1744; cycles=7 */
loc_1736:
- R4 = (uint16_t)(MEM16[0xF696]); /* 1736; MOV:G.W @H'F696, R4; cycles=7 */
- R4 -= (uint16_t)(MEM16[0xF6B6]); /* 173A; SUB.W @H'F6B6, R4; cycles=7 */
- R3 = (uint16_t)(0x00A9); /* 173E; MOV:I.W #H'00A9, R3; cycles=3 */
+ R4 = (uint16_t)(MEM16[0xF696]); /* 1736; MOV:G.W @H'F696, R4; refs ram_F696; cycles=7 */
+ R4 -= (uint16_t)(MEM16[0xF6B6]); /* 173A; SUB.W @H'F6B6, R4; refs ram_F6B6; cycles=7 */
+ R3 = (uint16_t)(0x00A9); /* 173E; MOV:I.W #H'00A9, R3; dataflow R3=0x00A9; cycles=3 */
loc_19A2(); /* 1741; BSR loc_19A2; cycles=14 */
loc_1744:
- R4 = (uint16_t)(MEM16[0xF696]); /* 1744; MOV:G.W @H'F696, R4; cycles=7 */
- MEM16[0xF6B6] = (uint16_t)(R4); /* 1748; MOV:G.W R4, @H'F6B6; cycles=7 */
+ R4 = (uint16_t)(MEM16[0xF696]); /* 1744; MOV:G.W @H'F696, R4; refs ram_F696; cycles=7 */
+ MEM16[0xF6B6] = (uint16_t)(R4); /* 1748; MOV:G.W R4, @H'F6B6; refs ram_F6B6; cycles=7 */
return; /* 174C; RTS; cycles=12 */
}
void loc_174D(void)
{
- set_flags_cmp8(MEM8[0xF731], 0x02); /* 174D; CMP:G.B #H'02, @H'F731; cycles=6 */
+ set_flags_cmp8(MEM8[0xF731], 0x02); /* 174D; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
if (!C && !Z) goto loc_178C; /* 1752; BHI loc_178C; cycles=3/7 nt/t */
- set_flags_btst(MEM8[0xF730], 7); /* 1754; BTST.B #7, @H'F730; cycles=7 */
+ set_flags_btst(MEM8[0xF730], 7); /* 1754; BTST.B #7, @H'F730; refs ram_F730; cycles=7 */
if (Z) goto loc_178C; /* 1758; BEQ loc_178C; cycles=3/7 nt/t */
- set_flags_btst(MEM16[0xE16E], 13); /* 175A; BTST.W #13, @H'E16E; cycles=7 */
+ set_flags_btst(MEM16[0xE16E], 13); /* 175A; BTST.W #13, @H'E16E; refs mem_E16E; cycles=7 */
if (!Z) goto loc_177E; /* 175E; BNE loc_177E; cycles=3/7 nt/t */
- MEM8[0xFB03] |= BIT(7); /* 1760; BSET.B #7, @H'FB03; cycles=9 */
- if (!Z) goto loc_176E; /* 1764; BNE loc_176E; cycles=3/7 nt/t */
- R1 = (uint16_t)(MEM16[0xF732]); /* 1766; MOV:G.W @H'F732, R1; cycles=7 */
- MEM16[0xF734] = (uint16_t)(R1); /* 176A; MOV:G.W R1, @H'F734; cycles=7 */
-loc_176E:
- MEM16[0xF732] = (uint16_t)(0x1C06); /* 176E; MOV:G.W #H'1C06, @H'F732; cycles=11 */
- MEM8[0xFB02] = (uint8_t)(0x14); /* 1774; MOV:G.B #H'14, @H'FB02; cycles=9 */
+ MEM8[0xFB03] |= BIT(7); /* 1760; BSET.B #7, @H'FB03; refs ram_FB03; cycles=9 */
+ if (Z) { /* 1764; BNE loc_176E; cycles=3/7 nt/t */
+ R1 = (uint16_t)(MEM16[0xF732]); /* 1766; MOV:G.W @H'F732, R1; refs ram_F732; cycles=7 */
+ MEM16[0xF734] = (uint16_t)(R1); /* 176A; MOV:G.W R1, @H'F734; refs ram_F734; cycles=7 */
+ }
+ MEM16[0xF732] = (uint16_t)(0x1C06); /* 176E; MOV:G.W #H'1C06, @H'F732; refs ram_F732; cycles=11 */
+ MEM8[0xFB02] = (uint8_t)(0x14); /* 1774; MOV:G.B #H'14, @H'FB02; refs ram_FB02; cycles=9 */
loc_48FA(); /* 1779; BSR loc_48FA; cycles=14 */
goto loc_178C; /* 177C; BRA loc_178C; cycles=7 */
loc_177E:
- R4 = (uint16_t)(MEM16[0xF694]); /* 177E; MOV:G.W @H'F694, R4; cycles=7 */
- R4 -= (uint16_t)(MEM16[0xF6B4]); /* 1782; SUB.W @H'F6B4, R4; cycles=7 */
- R3 = (uint16_t)(0x00C5); /* 1786; MOV:I.W #H'00C5, R3; cycles=3 */
+ R4 = (uint16_t)(MEM16[0xF694]); /* 177E; MOV:G.W @H'F694, R4; refs ram_F694; cycles=7 */
+ R4 -= (uint16_t)(MEM16[0xF6B4]); /* 1782; SUB.W @H'F6B4, R4; refs ram_F6B4; cycles=7 */
+ R3 = (uint16_t)(0x00C5); /* 1786; MOV:I.W #H'00C5, R3; dataflow R3=0x00C5; cycles=3 */
loc_19A2(); /* 1789; BSR loc_19A2; cycles=14 */
loc_178C:
- R4 = (uint16_t)(MEM16[0xF694]); /* 178C; MOV:G.W @H'F694, R4; cycles=7 */
- MEM16[0xF6B4] = (uint16_t)(R4); /* 1790; MOV:G.W R4, @H'F6B4; cycles=7 */
+ R4 = (uint16_t)(MEM16[0xF694]); /* 178C; MOV:G.W @H'F694, R4; refs ram_F694; cycles=7 */
+ MEM16[0xF6B4] = (uint16_t)(R4); /* 1790; MOV:G.W R4, @H'F6B4; refs ram_F6B4; cycles=7 */
return; /* 1794; RTS; cycles=12 */
}
void loc_1795(void)
{
- set_flags_cmp8(MEM8[0xF731], 0x02); /* 1795; CMP:G.B #H'02, @H'F731; cycles=6 */
+ set_flags_cmp8(MEM8[0xF731], 0x02); /* 1795; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
if (!C && !Z) goto loc_17C0; /* 179A; BHI loc_17C0; cycles=3/7 nt/t */
- set_flags_btst(MEM16[0xE172], 13); /* 179C; BTST.W #13, @H'E172; cycles=7 */
+ set_flags_btst(MEM16[0xE172], 13); /* 179C; BTST.W #13, @H'E172; refs mem_E172; cycles=7 */
if (!Z) goto loc_17A7; /* 17A0; BNE loc_17A7; cycles=3/7 nt/t */
loc_2127(); /* 17A2; BSR loc_2127; cycles=13 */
goto loc_17C0; /* 17A5; BRA loc_17C0; cycles=8 */
loc_17A7:
- set_flags_btst(MEM16[0xE220], 15); /* 17A7; BTST.W #15, @H'E220; cycles=6 */
+ set_flags_btst(MEM16[0xE220], 15); /* 17A7; BTST.W #15, @H'E220; refs mem_E220; cycles=6 */
if (Z) goto loc_17B2; /* 17AB; BEQ loc_17B2; cycles=3/8 nt/t */
loc_2127(); /* 17AD; BSR loc_2127; cycles=14 */
goto loc_17C0; /* 17B0; BRA loc_17C0; cycles=7 */
loc_17B2:
- R4 = (uint16_t)(MEM16[0xF692]); /* 17B2; MOV:G.W @H'F692, R4; cycles=7 */
- R4 -= (uint16_t)(MEM16[0xF6B2]); /* 17B6; SUB.W @H'F6B2, R4; cycles=7 */
- R3 = (uint16_t)(0x00BC); /* 17BA; MOV:I.W #H'00BC, R3; cycles=3 */
+ R4 = (uint16_t)(MEM16[0xF692]); /* 17B2; MOV:G.W @H'F692, R4; refs ram_F692; cycles=7 */
+ R4 -= (uint16_t)(MEM16[0xF6B2]); /* 17B6; SUB.W @H'F6B2, R4; refs ram_F6B2; cycles=7 */
+ R3 = (uint16_t)(0x00BC); /* 17BA; MOV:I.W #H'00BC, R3; dataflow R3=0x00BC; cycles=3 */
loc_19A2(); /* 17BD; BSR loc_19A2; cycles=14 */
loc_17C0:
- R4 = (uint16_t)(MEM16[0xF692]); /* 17C0; MOV:G.W @H'F692, R4; cycles=7 */
- MEM16[0xF6B2] = (uint16_t)(R4); /* 17C4; MOV:G.W R4, @H'F6B2; cycles=7 */
+ R4 = (uint16_t)(MEM16[0xF692]); /* 17C0; MOV:G.W @H'F692, R4; refs ram_F692; cycles=7 */
+ MEM16[0xF6B2] = (uint16_t)(R4); /* 17C4; MOV:G.W R4, @H'F6B2; refs ram_F6B2; cycles=7 */
return; /* 17C8; RTS; cycles=12 */
}
void loc_17C9(void)
{
- set_flags_cmp8(MEM8[0xF731], 0x02); /* 17C9; CMP:G.B #H'02, @H'F731; cycles=6 */
+ set_flags_cmp8(MEM8[0xF731], 0x02); /* 17C9; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
if (!C && !Z) goto loc_17F2; /* 17CE; BHI loc_17F2; cycles=3/7 nt/t */
- set_flags_btst(MEM16[0xE126], 12); /* 17D0; BTST.W #12, @H'E126; cycles=7 */
+ set_flags_btst(MEM16[0xE126], 12); /* 17D0; BTST.W #12, @H'E126; refs mem_E126; cycles=7 */
if (Z) goto loc_17F2; /* 17D4; BEQ loc_17F2; cycles=3/7 nt/t */
- R4 = (uint16_t)(MEM16[0xF6AE]); /* 17D6; MOV:G.W @H'F6AE, R4; cycles=7 */
- R4 -= (uint16_t)(MEM16[0xF6CE]); /* 17DA; SUB.W @H'F6CE, R4; cycles=7 */
- R3 = (uint16_t)(0x00A3); /* 17DE; MOV:I.W #H'00A3, R3; cycles=3 */
- set_flags_btst(MEM8[0xF791], 7); /* 17E1; BTST.B #7, @H'F791; cycles=6 */
+ R4 = (uint16_t)(MEM16[0xF6AE]); /* 17D6; MOV:G.W @H'F6AE, R4; refs ram_F6AE; cycles=7 */
+ R4 -= (uint16_t)(MEM16[0xF6CE]); /* 17DA; SUB.W @H'F6CE, R4; refs ram_F6CE; cycles=7 */
+ R3 = (uint16_t)(0x00A3); /* 17DE; MOV:I.W #H'00A3, R3; dataflow R3=0x00A3; cycles=3 */
+ set_flags_btst(MEM8[0xF791], 7); /* 17E1; BTST.B #7, @H'F791; refs ram_F791; cycles=6 */
if (Z) goto loc_17EF; /* 17E5; BEQ loc_17EF; cycles=3/8 nt/t */
- set_flags_btst(MEM8[0xF404], 3); /* 17E7; BTST.B #3, @H'F404; cycles=6 */
+ set_flags_btst(MEM8[0xF404], 3); /* 17E7; BTST.B #3, @H'F404; refs mem_F404; cycles=6 */
if (Z) goto loc_17EF; /* 17EB; BEQ loc_17EF; cycles=3/8 nt/t */
R3 |= BIT(14); /* 17ED; BSET.W #14, R3; cycles=3 */
loc_17EF:
loc_19A2(); /* 17EF; BSR loc_19A2; cycles=14 */
loc_17F2:
- R4 = (uint16_t)(MEM16[0xF6AE]); /* 17F2; MOV:G.W @H'F6AE, R4; cycles=7 */
- MEM16[0xF6CE] = (uint16_t)(R4); /* 17F6; MOV:G.W R4, @H'F6CE; cycles=7 */
+ R4 = (uint16_t)(MEM16[0xF6AE]); /* 17F2; MOV:G.W @H'F6AE, R4; refs ram_F6AE; cycles=7 */
+ MEM16[0xF6CE] = (uint16_t)(R4); /* 17F6; MOV:G.W R4, @H'F6CE; refs ram_F6CE; cycles=7 */
return; /* 17FA; RTS; cycles=12 */
}
void loc_17FB(void)
{
- set_flags_cmp8(MEM8[0xF731], 0x02); /* 17FB; CMP:G.B #H'02, @H'F731; cycles=6 */
+ set_flags_cmp8(MEM8[0xF731], 0x02); /* 17FB; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
if (!C && !Z) goto loc_1824; /* 1800; BHI loc_1824; cycles=3/7 nt/t */
- set_flags_btst(MEM16[0xE126], 12); /* 1802; BTST.W #12, @H'E126; cycles=7 */
+ set_flags_btst(MEM16[0xE126], 12); /* 1802; BTST.W #12, @H'E126; refs mem_E126; cycles=7 */
if (Z) goto loc_1824; /* 1806; BEQ loc_1824; cycles=3/7 nt/t */
- R4 = (uint16_t)(MEM16[0xF6AC]); /* 1808; MOV:G.W @H'F6AC, R4; cycles=7 */
- R4 -= (uint16_t)(MEM16[0xF6CC]); /* 180C; SUB.W @H'F6CC, R4; cycles=7 */
- R3 = (uint16_t)(0x00A4); /* 1810; MOV:I.W #H'00A4, R3; cycles=3 */
- set_flags_btst(MEM8[0xF791], 7); /* 1813; BTST.B #7, @H'F791; cycles=6 */
+ R4 = (uint16_t)(MEM16[0xF6AC]); /* 1808; MOV:G.W @H'F6AC, R4; refs ram_F6AC; cycles=7 */
+ R4 -= (uint16_t)(MEM16[0xF6CC]); /* 180C; SUB.W @H'F6CC, R4; refs ram_F6CC; cycles=7 */
+ R3 = (uint16_t)(0x00A4); /* 1810; MOV:I.W #H'00A4, R3; dataflow R3=0x00A4; cycles=3 */
+ set_flags_btst(MEM8[0xF791], 7); /* 1813; BTST.B #7, @H'F791; refs ram_F791; cycles=6 */
if (Z) goto loc_1821; /* 1817; BEQ loc_1821; cycles=3/8 nt/t */
- set_flags_btst(MEM8[0xF404], 3); /* 1819; BTST.B #3, @H'F404; cycles=6 */
+ set_flags_btst(MEM8[0xF404], 3); /* 1819; BTST.B #3, @H'F404; refs mem_F404; cycles=6 */
if (Z) goto loc_1821; /* 181D; BEQ loc_1821; cycles=3/8 nt/t */
R3 |= BIT(14); /* 181F; BSET.W #14, R3; cycles=3 */
loc_1821:
loc_19A2(); /* 1821; BSR loc_19A2; cycles=14 */
loc_1824:
- R4 = (uint16_t)(MEM16[0xF6AC]); /* 1824; MOV:G.W @H'F6AC, R4; cycles=7 */
- MEM16[0xF6CC] = (uint16_t)(R4); /* 1828; MOV:G.W R4, @H'F6CC; cycles=7 */
+ R4 = (uint16_t)(MEM16[0xF6AC]); /* 1824; MOV:G.W @H'F6AC, R4; refs ram_F6AC; cycles=7 */
+ MEM16[0xF6CC] = (uint16_t)(R4); /* 1828; MOV:G.W R4, @H'F6CC; refs ram_F6CC; cycles=7 */
return; /* 182C; RTS; cycles=12 */
}
void loc_182D(void)
{
- set_flags_btst(MEM8[0xF717], 2); /* 182D; BTST.B #2, @H'F717; cycles=6 */
+ set_flags_btst(MEM8[0xF717], 2); /* 182D; BTST.B #2, @H'F717; refs ram_F717; cycles=6 */
if (!Z) goto loc_1865; /* 1831; BNE loc_1865; cycles=3/8 nt/t */
- set_flags_cmp8(MEM8[0xF731], 0x02); /* 1833; CMP:G.B #H'02, @H'F731; cycles=6 */
+ set_flags_cmp8(MEM8[0xF731], 0x02); /* 1833; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
if (!C && !Z) goto loc_185C; /* 1838; BHI loc_185C; cycles=3/7 nt/t */
- set_flags_btst(MEM16[0xE126], 5); /* 183A; BTST.W #5, @H'E126; cycles=7 */
+ set_flags_btst(MEM16[0xE126], 5); /* 183A; BTST.W #5, @H'E126; refs mem_E126; cycles=7 */
if (Z) goto loc_185C; /* 183E; BEQ loc_185C; cycles=3/7 nt/t */
- R4 = (uint16_t)(MEM16[0xF6AA]); /* 1840; MOV:G.W @H'F6AA, R4; cycles=7 */
- R4 -= (uint16_t)(MEM16[0xF6CA]); /* 1844; SUB.W @H'F6CA, R4; cycles=7 */
- R3 = (uint16_t)(0x00A5); /* 1848; MOV:I.W #H'00A5, R3; cycles=3 */
- set_flags_btst(MEM8[0xF791], 7); /* 184B; BTST.B #7, @H'F791; cycles=6 */
+ R4 = (uint16_t)(MEM16[0xF6AA]); /* 1840; MOV:G.W @H'F6AA, R4; refs ram_F6AA; cycles=7 */
+ R4 -= (uint16_t)(MEM16[0xF6CA]); /* 1844; SUB.W @H'F6CA, R4; refs ram_F6CA; cycles=7 */
+ R3 = (uint16_t)(0x00A5); /* 1848; MOV:I.W #H'00A5, R3; dataflow R3=0x00A5; cycles=3 */
+ set_flags_btst(MEM8[0xF791], 7); /* 184B; BTST.B #7, @H'F791; refs ram_F791; cycles=6 */
if (Z) goto loc_1859; /* 184F; BEQ loc_1859; cycles=3/8 nt/t */
- set_flags_btst(MEM8[0xF404], 2); /* 1851; BTST.B #2, @H'F404; cycles=6 */
+ set_flags_btst(MEM8[0xF404], 2); /* 1851; BTST.B #2, @H'F404; refs mem_F404; cycles=6 */
if (Z) goto loc_1859; /* 1855; BEQ loc_1859; cycles=3/8 nt/t */
R3 |= BIT(14); /* 1857; BSET.W #14, R3; cycles=3 */
loc_1859:
loc_19A2(); /* 1859; BSR loc_19A2; cycles=14 */
loc_185C:
- R4 = (uint16_t)(MEM16[0xF6AA]); /* 185C; MOV:G.W @H'F6AA, R4; cycles=7 */
- MEM16[0xF6CA] = (uint16_t)(R4); /* 1860; MOV:G.W R4, @H'F6CA; cycles=7 */
+ R4 = (uint16_t)(MEM16[0xF6AA]); /* 185C; MOV:G.W @H'F6AA, R4; refs ram_F6AA; cycles=7 */
+ MEM16[0xF6CA] = (uint16_t)(R4); /* 1860; MOV:G.W R4, @H'F6CA; refs ram_F6CA; cycles=7 */
return; /* 1864; RTS; cycles=12 */
}
void loc_1891(void)
{
- set_flags_btst(MEM8[0xF717], 2); /* 1891; BTST.B #2, @H'F717; cycles=6 */
+ set_flags_btst(MEM8[0xF717], 2); /* 1891; BTST.B #2, @H'F717; refs ram_F717; cycles=6 */
if (!Z) goto loc_18BB; /* 1895; BNE loc_18BB; cycles=3/8 nt/t */
- set_flags_cmp8(MEM8[0xF731], 0x02); /* 1897; CMP:G.B #H'02, @H'F731; cycles=6 */
+ set_flags_cmp8(MEM8[0xF731], 0x02); /* 1897; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
if (!C && !Z) goto loc_18B2; /* 189C; BHI loc_18B2; cycles=3/7 nt/t */
- set_flags_btst(MEM16[0xE126], 5); /* 189E; BTST.W #5, @H'E126; cycles=7 */
+ set_flags_btst(MEM16[0xE126], 5); /* 189E; BTST.W #5, @H'E126; refs mem_E126; cycles=7 */
if (Z) goto loc_18B2; /* 18A2; BEQ loc_18B2; cycles=3/7 nt/t */
- R4 = (uint16_t)(MEM16[0xF6A8]); /* 18A4; MOV:G.W @H'F6A8, R4; cycles=7 */
- R4 -= (uint16_t)(MEM16[0xF6C8]); /* 18A8; SUB.W @H'F6C8, R4; cycles=7 */
- R3 = (uint16_t)(0x0080); /* 18AC; MOV:I.W #H'0080, R3; cycles=3 */
+ R4 = (uint16_t)(MEM16[0xF6A8]); /* 18A4; MOV:G.W @H'F6A8, R4; refs ram_F6A8; cycles=7 */
+ R4 -= (uint16_t)(MEM16[0xF6C8]); /* 18A8; SUB.W @H'F6C8, R4; refs ram_F6C8; cycles=7 */
+ R3 = (uint16_t)(0x0080); /* 18AC; MOV:I.W #H'0080, R3; dataflow R3=0x0080; cycles=3 */
loc_19A2(); /* 18AF; BSR loc_19A2; cycles=14 */
loc_18B2:
- R4 = (uint16_t)(MEM16[0xF6A8]); /* 18B2; MOV:G.W @H'F6A8, R4; cycles=7 */
- MEM16[0xF6C8] = (uint16_t)(R4); /* 18B6; MOV:G.W R4, @H'F6C8; cycles=7 */
+ R4 = (uint16_t)(MEM16[0xF6A8]); /* 18B2; MOV:G.W @H'F6A8, R4; refs ram_F6A8; cycles=7 */
+ MEM16[0xF6C8] = (uint16_t)(R4); /* 18B6; MOV:G.W R4, @H'F6C8; refs ram_F6C8; cycles=7 */
return; /* 18BA; RTS; cycles=12 */
}
void loc_18E7(void)
{
- set_flags_btst(MEM8[0xF717], 2); /* 18E7; BTST.B #2, @H'F717; cycles=6 */
+ set_flags_btst(MEM8[0xF717], 2); /* 18E7; BTST.B #2, @H'F717; refs ram_F717; cycles=6 */
if (!Z) goto loc_191F; /* 18EB; BNE loc_191F; cycles=3/8 nt/t */
- set_flags_cmp8(MEM8[0xF731], 0x02); /* 18ED; CMP:G.B #H'02, @H'F731; cycles=6 */
+ set_flags_cmp8(MEM8[0xF731], 0x02); /* 18ED; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
if (!C && !Z) goto loc_1916; /* 18F2; BHI loc_1916; cycles=3/7 nt/t */
- set_flags_btst(MEM16[0xE126], 5); /* 18F4; BTST.W #5, @H'E126; cycles=7 */
+ set_flags_btst(MEM16[0xE126], 5); /* 18F4; BTST.W #5, @H'E126; refs mem_E126; cycles=7 */
if (Z) goto loc_1916; /* 18F8; BEQ loc_1916; cycles=3/7 nt/t */
- R4 = (uint16_t)(MEM16[0xF6A6]); /* 18FA; MOV:G.W @H'F6A6, R4; cycles=7 */
- R4 -= (uint16_t)(MEM16[0xF6C6]); /* 18FE; SUB.W @H'F6C6, R4; cycles=7 */
- R3 = (uint16_t)(0x00A6); /* 1902; MOV:I.W #H'00A6, R3; cycles=3 */
- set_flags_btst(MEM8[0xF791], 7); /* 1905; BTST.B #7, @H'F791; cycles=6 */
+ R4 = (uint16_t)(MEM16[0xF6A6]); /* 18FA; MOV:G.W @H'F6A6, R4; refs ram_F6A6; cycles=7 */
+ R4 -= (uint16_t)(MEM16[0xF6C6]); /* 18FE; SUB.W @H'F6C6, R4; refs ram_F6C6; cycles=7 */
+ R3 = (uint16_t)(0x00A6); /* 1902; MOV:I.W #H'00A6, R3; dataflow R3=0x00A6; cycles=3 */
+ set_flags_btst(MEM8[0xF791], 7); /* 1905; BTST.B #7, @H'F791; refs ram_F791; cycles=6 */
if (Z) goto loc_1913; /* 1909; BEQ loc_1913; cycles=3/8 nt/t */
- set_flags_btst(MEM8[0xF404], 2); /* 190B; BTST.B #2, @H'F404; cycles=6 */
+ set_flags_btst(MEM8[0xF404], 2); /* 190B; BTST.B #2, @H'F404; refs mem_F404; cycles=6 */
if (Z) goto loc_1913; /* 190F; BEQ loc_1913; cycles=3/8 nt/t */
R3 |= BIT(14); /* 1911; BSET.W #14, R3; cycles=3 */
loc_1913:
loc_19A2(); /* 1913; BSR loc_19A2; cycles=14 */
loc_1916:
- R4 = (uint16_t)(MEM16[0xF6A6]); /* 1916; MOV:G.W @H'F6A6, R4; cycles=7 */
- MEM16[0xF6C6] = (uint16_t)(R4); /* 191A; MOV:G.W R4, @H'F6C6; cycles=7 */
+ R4 = (uint16_t)(MEM16[0xF6A6]); /* 1916; MOV:G.W @H'F6A6, R4; refs ram_F6A6; cycles=7 */
+ MEM16[0xF6C6] = (uint16_t)(R4); /* 191A; MOV:G.W R4, @H'F6C6; refs ram_F6C6; cycles=7 */
return; /* 191E; RTS; cycles=12 */
}
void loc_194A(void)
{
- set_flags_cmp8(MEM8[0xF731], 0x03); /* 194A; CMP:G.B #H'03, @H'F731; cycles=7 */
+ set_flags_cmp8(MEM8[0xF731], 0x03); /* 194A; CMP:G.B #H'03, @H'F731; refs ram_F731; cycles=7 */
if (!C && !Z) goto loc_1970; /* 194F; BHI loc_1970; cycles=3/8 nt/t */
- R4 = (uint16_t)(MEM16[0xF6A4]); /* 1951; MOV:G.W @H'F6A4, R4; cycles=6 */
- R4 -= (uint16_t)(MEM16[0xF6C4]); /* 1955; SUB.W @H'F6C4, R4; cycles=6 */
- set_flags_btst(P7DR, 4); /* 1959; BTST.B #4, @P7DR; cycles=6 */
+ R4 = (uint16_t)(MEM16[0xF6A4]); /* 1951; MOV:G.W @H'F6A4, R4; refs ram_F6A4; cycles=6 */
+ R4 -= (uint16_t)(MEM16[0xF6C4]); /* 1955; SUB.W @H'F6C4, R4; refs ram_F6C4; cycles=6 */
+ set_flags_btst(P7DR, 4); /* 1959; BTST.B #4, @P7DR; refs P7DR; cycles=6 */
if (!Z) goto loc_195F; /* 195D; BNE loc_195F; cycles=3/8 nt/t */
loc_195F:
- R3 = (uint16_t)(0x0080); /* 195F; MOV:I.W #H'0080, R3; cycles=3 */
- set_flags_btst(MEM8[0xF791], 5); /* 1962; BTST.B #5, @H'F791; cycles=7 */
- if (Z) goto loc_196A; /* 1966; BEQ loc_196A; cycles=3/7 nt/t */
- R3 |= BIT(14); /* 1968; BSET.W #14, R3; cycles=3 */
-loc_196A:
+ R3 = (uint16_t)(0x0080); /* 195F; MOV:I.W #H'0080, R3; dataflow R3=0x0080; cycles=3 */
+ set_flags_btst(MEM8[0xF791], 5); /* 1962; BTST.B #5, @H'F791; refs ram_F791; cycles=7 */
+ if (!Z) { /* 1966; BEQ loc_196A; cycles=3/7 nt/t */
+ R3 |= BIT(14); /* 1968; BSET.W #14, R3; cycles=3 */
+ }
loc_19A2(); /* 196A; BSR loc_19A2; cycles=13 */
- MEM8[0xF76D] |= BIT(7); /* 196C; BSET.B #7, @H'F76D; cycles=9 */
+ MEM8[0xF76D] |= BIT(7); /* 196C; BSET.B #7, @H'F76D; refs ram_F76D; cycles=9 */
loc_1970:
- R4 = (uint16_t)(MEM16[0xF6A4]); /* 1970; MOV:G.W @H'F6A4, R4; cycles=7 */
- MEM16[0xF6C4] = (uint16_t)(R4); /* 1974; MOV:G.W R4, @H'F6C4; cycles=7 */
+ R4 = (uint16_t)(MEM16[0xF6A4]); /* 1970; MOV:G.W @H'F6A4, R4; refs ram_F6A4; cycles=7 */
+ MEM16[0xF6C4] = (uint16_t)(R4); /* 1974; MOV:G.W R4, @H'F6C4; refs ram_F6C4; cycles=7 */
return; /* 1978; RTS; cycles=12 */
}
void loc_1979(void)
{
- set_flags_cmp8(MEM8[0xF731], 0x03); /* 1979; CMP:G.B #H'03, @H'F731; cycles=6 */
+ set_flags_cmp8(MEM8[0xF731], 0x03); /* 1979; CMP:G.B #H'03, @H'F731; refs ram_F731; cycles=6 */
if (!C && !Z) goto loc_1999; /* 197E; BHI loc_1999; cycles=3/7 nt/t */
- R0 = (uint16_t)(MEM16[0xF6A2]); /* 1980; MOV:G.W @H'F6A2, R0; cycles=7 */
- R0 -= (uint16_t)(MEM16[0xF6C2]); /* 1984; SUB.W @H'F6C2, R0; cycles=7 */
- R0 = mulxu16(R0, MEM16[0xF68C]); /* 1988; MULXU.W @H'F68C, R0; cycles=26 */
- R3 = (uint16_t)(0x0081); /* 198C; MOV:I.W #H'0081, R3; cycles=3 */
- set_flags_btst(MEM8[0xF791], 5); /* 198F; BTST.B #5, @H'F791; cycles=6 */
- if (Z) goto loc_1997; /* 1993; BEQ loc_1997; cycles=3/8 nt/t */
- R3 |= BIT(14); /* 1995; BSET.W #14, R3; cycles=3 */
-loc_1997:
+ R0 = (uint16_t)(MEM16[0xF6A2]); /* 1980; MOV:G.W @H'F6A2, R0; refs ram_F6A2; cycles=7 */
+ R0 -= (uint16_t)(MEM16[0xF6C2]); /* 1984; SUB.W @H'F6C2, R0; refs ram_F6C2; cycles=7 */
+ R0 = mulxu16(R0, MEM16[0xF68C]); /* 1988; MULXU.W @H'F68C, R0; refs ram_F68C; cycles=26 */
+ R3 = (uint16_t)(0x0081); /* 198C; MOV:I.W #H'0081, R3; dataflow R3=0x0081; cycles=3 */
+ set_flags_btst(MEM8[0xF791], 5); /* 198F; BTST.B #5, @H'F791; refs ram_F791; cycles=6 */
+ if (!Z) { /* 1993; BEQ loc_1997; cycles=3/8 nt/t */
+ R3 |= BIT(14); /* 1995; BSET.W #14, R3; cycles=3 */
+ }
loc_19DB(); /* 1997; BSR loc_19DB; cycles=14 */
loc_1999:
- R4 = (uint16_t)(MEM16[0xF6A2]); /* 1999; MOV:G.W @H'F6A2, R4; cycles=6 */
- MEM16[0xF6C2] = (uint16_t)(R4); /* 199D; MOV:G.W R4, @H'F6C2; cycles=6 */
+ R4 = (uint16_t)(MEM16[0xF6A2]); /* 1999; MOV:G.W @H'F6A2, R4; refs ram_F6A2; cycles=6 */
+ MEM16[0xF6C2] = (uint16_t)(R4); /* 199D; MOV:G.W R4, @H'F6C2; refs ram_F6C2; cycles=6 */
return; /* 19A1; RTS; cycles=13 */
}
@@ -795,9 +1083,9 @@ void loc_19A2(void)
R3 <<= 1; /* 19A8; SHLL.W R3; cycles=3 */
R0 = (uint16_t)(MEM16[R3 - 0x1C00]); /* 19AA; MOV:G.W @(-H'1C00,R3), R0; cycles=7 */
set_flags_cmp16(R0, 0xFC00); /* 19AE; CMP:I #H'FC00, R0; cycles=3 */
- if (!C && !Z) goto loc_19B6; /* 19B1; BHI loc_19B6; cycles=3/8 nt/t */
- R0 = (uint16_t)(0xFE00); /* 19B3; MOV:I.W #H'FE00, R0; cycles=3 */
-loc_19B6:
+ if (C || Z) { /* 19B1; BHI loc_19B6; cycles=3/8 nt/t */
+ R0 = (uint16_t)(0xFE00); /* 19B3; MOV:I.W #H'FE00, R0; dataflow R0=0xFE00; cycles=3 */
+ }
R0 = ~R0; /* 19B6; NOT.W R0; cycles=3 */
R0 += (uint16_t)(1); /* 19B8; ADD:Q.W #1, R0; cycles=4 */
set_flags_cmp16(R4, 0x000F); /* 19BA; CMP:I #H'000F, R4; cycles=3 */
@@ -806,10 +1094,10 @@ loc_19B6:
if (!C) goto loc_19D3; /* 19C2; BCC loc_19D3; cycles=3/7 nt/t */
set_flags_cmp16(R4, 0x8000); /* 19C4; CMP:I #H'8000, R4; cycles=3 */
if (!C) goto loc_19CE; /* 19C7; BCC loc_19CE; cycles=3/8 nt/t */
- R4 = (uint16_t)(0x001A); /* 19C9; MOV:I.W #H'001A, R4; cycles=3 */
+ R4 = (uint16_t)(0x001A); /* 19C9; MOV:I.W #H'001A, R4; dataflow R4=0x001A; cycles=3 */
goto loc_19D7; /* 19CC; BRA loc_19D7; cycles=7 */
loc_19CE:
- R4 = (uint16_t)(0xFF1C); /* 19CE; MOV:I.W #H'FF1C, R4; cycles=3 */
+ R4 = (uint16_t)(0xFF1C); /* 19CE; MOV:I.W #H'FF1C, R4; dataflow R4=0xFF1C; cycles=3 */
goto loc_19D7; /* 19D1; BRA loc_19D7; cycles=8 */
loc_19D3:
R4 = (uint8_t)(MEM8[R4 + 0x1A25]); /* 19D3; MOV:G.B @(H'1A25,R4), R4; cycles=6 */
@@ -831,21 +1119,21 @@ loc_19E3:
R2 -= (uint16_t)(R0); /* 19ED; SUB.W R0, R2; cycles=3 */
set_flags_cmp16(R2, 0x8000); /* 19EF; CMP:I #H'8000, R2; cycles=3 */
if (C || Z) goto loc_1A03; /* 19F2; BLS loc_1A03; cycles=3/7 nt/t */
- R1 = (uint16_t)(0x0000); /* 19F4; MOV:I.W #H'0000, R1; cycles=3 */
+ R1 = (uint16_t)(0x0000); /* 19F4; MOV:I.W #H'0000, R1; dataflow R1=0x0000; cycles=3 */
goto loc_1A03; /* 19F7; BRA loc_1A03; cycles=8 */
loc_19F9:
R0 -= (uint16_t)(R2); /* 19F9; SUB.W R2, R0; cycles=3 */
set_flags_cmp16(R0, 0x8000); /* 19FB; CMP:I #H'8000, R0; cycles=3 */
if (C || Z) goto loc_1A03; /* 19FE; BLS loc_1A03; cycles=3/7 nt/t */
- R1 = (uint16_t)(0xFFFF); /* 1A00; MOV:I.W #H'FFFF, R1; cycles=3 */
+ R1 = (uint16_t)(0xFFFF); /* 1A00; MOV:I.W #H'FFFF, R1; dataflow R1=0xFFFF; cycles=3 */
loc_1A03:
set_flags_cmp16(R1, MEM16[R3 - 0x2000]); /* 1A03; CMP:G.W @(-H'2000,R3), R1; cycles=6 */
- if (Z) goto loc_1A14; /* 1A07; BEQ loc_1A14; cycles=3/8 nt/t */
- MEM16[R3 - 0x1800] = (uint16_t)(R1); /* 1A09; MOV:G.W R1, @(-H'1800,R3); cycles=6 */
- R2 = (uint8_t)(0x80); /* 1A0D; MOV:E.B #H'80, R2; cycles=2 */
- R3 = (uint16_t)(R5); /* 1A0F; MOV:G.W R5, R3; cycles=3 */
- loc_3E54(); /* 1A11; BSR loc_3E54; cycles=14 */
-loc_1A14:
+ if (!Z) { /* 1A07; BEQ loc_1A14; cycles=3/8 nt/t */
+ MEM16[R3 - 0x1800] = (uint16_t)(R1); /* 1A09; MOV:G.W R1, @(-H'1800,R3); cycles=6 */
+ R2 = (uint8_t)(0x80); /* 1A0D; MOV:E.B #H'80, R2; dataflow R2=0x80; cycles=2 */
+ R3 = (uint16_t)(R5); /* 1A0F; MOV:G.W R5, R3; cycles=3 */
+ loc_3E54(); /* 1A11; BSR loc_3E54; cycles=14 */
+ }
return; /* 1A14; RTS; cycles=12 */
}
@@ -881,24 +1169,24 @@ loc_1A69:
R0 = (uint16_t)(R2); /* 1A69; MOV:G.W R2, R0; cycles=3 */
loc_1A6B:
set_flags_cmp16(R0, MEM16[R3 - 0x2000]); /* 1A6B; CMP:G.W @(-H'2000,R3), R0; cycles=6 */
- if (Z) goto loc_1A7C; /* 1A6F; BEQ loc_1A7C; cycles=3/8 nt/t */
- MEM16[R3 - 0x1800] = (uint16_t)(R0); /* 1A71; MOV:G.W R0, @(-H'1800,R3); cycles=6 */
- R2 = (uint8_t)(0x80); /* 1A75; MOV:E.B #H'80, R2; cycles=2 */
- R3 = (uint16_t)(R5); /* 1A77; MOV:G.W R5, R3; cycles=3 */
- loc_3E54(); /* 1A79; BSR loc_3E54; cycles=14 */
-loc_1A7C:
+ if (!Z) { /* 1A6F; BEQ loc_1A7C; cycles=3/8 nt/t */
+ MEM16[R3 - 0x1800] = (uint16_t)(R0); /* 1A71; MOV:G.W R0, @(-H'1800,R3); cycles=6 */
+ R2 = (uint8_t)(0x80); /* 1A75; MOV:E.B #H'80, R2; dataflow R2=0x80; cycles=2 */
+ R3 = (uint16_t)(R5); /* 1A77; MOV:G.W R5, R3; cycles=3 */
+ loc_3E54(); /* 1A79; BSR loc_3E54; cycles=14 */
+ }
return; /* 1A7C; RTS; cycles=12 */
}
void loc_1A8D(void)
{
- R1 = (uint16_t)(0x000F); /* 1A8D; MOV:I.W #H'000F, R1; cycles=3 */
+ R1 = (uint16_t)(0x000F); /* 1A8D; MOV:I.W #H'000F, R1; dataflow R1=0x000F; cycles=3 */
loc_1A90:
set_flags_btst(R0, R1); /* 1A90; BTST.W R1, R0; cycles=3 */
if (!Z) goto loc_1A97; /* 1A92; BNE loc_1A97; cycles=3/7 nt/t */
if (scb_f(R1)) goto loc_1A90; /* 1A94; SCB/F R1, loc_1A90; cycles=? */
loc_1A97:
- R0 = 0; /* 1A97; CLR.W R0; cycles=3 */
+ R0 = 0; /* 1A97; CLR.W R0; dataflow R0=0x0000; cycles=3 */
R0 |= BIT(R1); /* 1A99; BSET.W R1, R0; cycles=3 */
return; /* 1A9B; RTS; cycles=13 */
}
@@ -908,16 +1196,16 @@ void loc_1A9C(void)
set_flags_tst16(R3); /* 1A9C; TST.W R3; cycles=3 */
if (Z) goto loc_1AD2; /* 1A9E; BEQ loc_1AD2; cycles=3/7 nt/t */
R3 <<= 1; /* 1AA0; SHLL.W R3; cycles=3 */
- R0 = (uint8_t)(MEM8[0xF733]); /* 1AA2; MOV:G.B @H'F733, R0; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF733]); /* 1AA2; MOV:G.B @H'F733, R0; refs ram_F733; cycles=7 */
R0 = ~R0; /* 1AA6; NOT.B R0; cycles=2 */
R0 &= (uint8_t)(0x0F); /* 1AA8; AND.B #H'0F, R0; cycles=3 */
set_flags_tst16(R4); /* 1AAB; TST.W R4; cycles=3 */
if (!Z) goto loc_1ABC; /* 1AAD; BNE loc_1ABC; cycles=3/8 nt/t */
-loc_1AAF:
- R0 += (uint8_t)(-1); /* 1AAF; ADD:Q.B #-1, R0; cycles=4 */
- R0 &= (uint8_t)(0x0F); /* 1AB1; AND.B #H'0F, R0; cycles=3 */
- set_flags_btst(MEM16[R3 - 0x1C00], R0); /* 1AB4; BTST.W R0, @(-H'1C00,R3); cycles=7 */
- if (Z) goto loc_1AAF; /* 1AB8; BEQ loc_1AAF; cycles=3/7 nt/t */
+ do {
+ R0 += (uint8_t)(-1); /* 1AAF; ADD:Q.B #-1, R0; cycles=4 */
+ R0 &= (uint8_t)(0x0F); /* 1AB1; AND.B #H'0F, R0; cycles=3 */
+ set_flags_btst(MEM16[R3 - 0x1C00], R0); /* 1AB4; BTST.W R0, @(-H'1C00,R3); cycles=7 */
+ } while (Z); /* 1AB8; BEQ loc_1AAF; cycles=3/7 nt/t */
goto loc_1AC7; /* 1ABA; BRA loc_1AC7; cycles=7 */
loc_1ABC:
R0 += (uint8_t)(1); /* 1ABC; ADD:Q.B #1, R0; cycles=4 */
@@ -927,15 +1215,15 @@ loc_1ABC:
loc_1AC7:
R0 = ~R0; /* 1AC7; NOT.B R0; cycles=2 */
R0 &= (uint8_t)(0x0F); /* 1AC9; AND.B #H'0F, R0; cycles=3 */
- MEM8[0xF733] = (uint8_t)(R0); /* 1ACC; MOV:G.B R0, @H'F733; cycles=7 */
+ MEM8[0xF733] = (uint8_t)(R0); /* 1ACC; MOV:G.B R0, @H'F733; refs ram_F733; cycles=7 */
goto loc_1AE0; /* 1AD0; BRA loc_1AE0; cycles=7 */
loc_1AD2:
set_flags_tst16(R4); /* 1AD2; TST.W R4; cycles=3 */
if (!Z) goto loc_1ADC; /* 1AD4; BNE loc_1ADC; cycles=3/7 nt/t */
- MEM8[0xF733] += (uint8_t)(1); /* 1AD6; ADD:Q.B #1, @H'F733; cycles=9 */
+ MEM8[0xF733] += (uint8_t)(1); /* 1AD6; ADD:Q.B #1, @H'F733; refs ram_F733; cycles=9 */
goto loc_1AE0; /* 1ADA; BRA loc_1AE0; cycles=7 */
loc_1ADC:
- MEM8[0xF733] += (uint8_t)(-1); /* 1ADC; ADD:Q.B #-1, @H'F733; cycles=9 */
+ MEM8[0xF733] += (uint8_t)(-1); /* 1ADC; ADD:Q.B #-1, @H'F733; refs ram_F733; cycles=9 */
loc_1AE0:
loc_48FA(); /* 1AE0; BSR loc_48FA; cycles=13 */
return; /* 1AE3; RTS; cycles=13 */
@@ -943,7 +1231,7 @@ loc_1AE0:
void loc_1AE4(void)
{
- R0 = (uint8_t)(MEM8[0xF75B]); /* 1AE4; MOV:G.B @H'F75B, R0; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF75B]); /* 1AE4; MOV:G.B @H'F75B, R0; refs ram_F75B; cycles=7 */
R0 = zero_extend8(R0); /* 1AE8; EXTU.B R0; cycles=3 */
R1 = (uint8_t)(MEM8[R0 - 0x08A3]); /* 1AEA; MOV:G.B @(-H'08A3,R0), R1; cycles=7 */
set_flags_tst16(R4); /* 1AEE; TST.W R4; cycles=3 */
@@ -951,12 +1239,12 @@ void loc_1AE4(void)
R1 += (uint8_t)(1); /* 1AF2; ADD:Q.B #1, R1; cycles=4 */
set_flags_cmp8(R1, 0x2E); /* 1AF4; CMP:E #H'2E, R1; cycles=2 */
if (C || Z) goto loc_1B03; /* 1AF6; BLS loc_1B03; cycles=3/7 nt/t */
- R1 = (uint8_t)(0x00); /* 1AF8; MOV:E.B #H'00, R1; cycles=2 */
+ R1 = (uint8_t)(0x00); /* 1AF8; MOV:E.B #H'00, R1; dataflow R1=0x00; cycles=2 */
goto loc_1B03; /* 1AFA; BRA loc_1B03; cycles=7 */
loc_1AFC:
R1 -= (uint8_t)(0x01); /* 1AFC; SUB.B #H'01, R1; cycles=3 */
if (!C) goto loc_1B03; /* 1AFF; BCC loc_1B03; cycles=3/8 nt/t */
- R1 = (uint8_t)(0x2E); /* 1B01; MOV:E.B #H'2E, R1; cycles=2 */
+ R1 = (uint8_t)(0x2E); /* 1B01; MOV:E.B #H'2E, R1; dataflow R1=0x2E; cycles=2 */
loc_1B03:
MEM8[R0 - 0x08A3] = (uint8_t)(R1); /* 1B03; MOV:G.B R1, @(-H'08A3,R0); cycles=6 */
loc_48FA(); /* 1B07; BSR loc_48FA; cycles=14 */
@@ -965,144 +1253,144 @@ loc_1B03:
void loc_1B0B(void)
{
- R0 = (uint8_t)(MEM8[0xF75B]); /* 1B0B; MOV:G.B @H'F75B, R0; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF75B]); /* 1B0B; MOV:G.B @H'F75B, R0; refs ram_F75B; cycles=6 */
set_flags_tst16(R4); /* 1B0F; TST.W R4; cycles=3 */
if (!Z) goto loc_1B1D; /* 1B11; BNE loc_1B1D; cycles=3/8 nt/t */
R0 += (uint8_t)(1); /* 1B13; ADD:Q.B #1, R0; cycles=4 */
set_flags_cmp8(R0, 0x08); /* 1B15; CMP:E #H'08, R0; cycles=2 */
if (C || Z) goto loc_1B25; /* 1B17; BLS loc_1B25; cycles=3/8 nt/t */
- R0 = (uint8_t)(0x08); /* 1B19; MOV:E.B #H'08, R0; cycles=2 */
+ R0 = (uint8_t)(0x08); /* 1B19; MOV:E.B #H'08, R0; dataflow R0=0x08; cycles=2 */
goto loc_1B25; /* 1B1B; BRA loc_1B25; cycles=8 */
loc_1B1D:
R0 += (uint8_t)(-1); /* 1B1D; ADD:Q.B #-1, R0; cycles=4 */
set_flags_cmp8(R0, 0x01); /* 1B1F; CMP:E #H'01, R0; cycles=2 */
if (!C) goto loc_1B25; /* 1B21; BCC loc_1B25; cycles=3/8 nt/t */
- R0 = (uint8_t)(0x01); /* 1B23; MOV:E.B #H'01, R0; cycles=2 */
+ R0 = (uint8_t)(0x01); /* 1B23; MOV:E.B #H'01, R0; dataflow R0=0x01; cycles=2 */
loc_1B25:
- MEM8[0xF75B] = (uint8_t)(R0); /* 1B25; MOV:G.B R0, @H'F75B; cycles=6 */
+ MEM8[0xF75B] = (uint8_t)(R0); /* 1B25; MOV:G.B R0, @H'F75B; refs ram_F75B; cycles=6 */
loc_48FA(); /* 1B29; BSR loc_48FA; cycles=14 */
return; /* 1B2C; RTS; cycles=12 */
}
void loc_1B2D(void)
{
- R4 = (uint8_t)(MEM8[0xF6D7]); /* 1B2D; MOV:G.B @H'F6D7, R4; cycles=6 */
- R4 ^= (uint8_t)(MEM8[0xF6E7]); /* 1B31; XOR.B @H'F6E7, R4; cycles=6 */
- R5 = (uint16_t)(0x007E); /* 1B35; MOV:I.W #H'007E, R5; cycles=3 */
+ R4 = (uint8_t)(MEM8[0xF6D7]); /* 1B2D; MOV:G.B @H'F6D7, R4; refs ram_F6D7; cycles=6 */
+ R4 ^= (uint8_t)(MEM8[0xF6E7]); /* 1B31; XOR.B @H'F6E7, R4; refs ram_F6E7; cycles=6 */
+ R5 = (uint16_t)(0x007E); /* 1B35; MOV:I.W #H'007E, R5; dataflow R5=0x007E; cycles=3 */
loc_1C0E(); /* 1B38; BSR loc_1C0E; cycles=13 */
- R4 = (uint8_t)(MEM8[0xF6D7]); /* 1B3B; MOV:G.B @H'F6D7, R4; cycles=6 */
- MEM8[0xF6E7] = (uint8_t)(R4); /* 1B3F; MOV:G.B R4, @H'F6E7; cycles=6 */
+ R4 = (uint8_t)(MEM8[0xF6D7]); /* 1B3B; MOV:G.B @H'F6D7, R4; refs ram_F6D7; cycles=6 */
+ MEM8[0xF6E7] = (uint8_t)(R4); /* 1B3F; MOV:G.B R4, @H'F6E7; refs ram_F6E7; cycles=6 */
return; /* 1B43; RTS; cycles=13 */
}
void loc_1B44(void)
{
- R4 = (uint8_t)(MEM8[0xF6D6]); /* 1B44; MOV:G.B @H'F6D6, R4; cycles=7 */
- R4 ^= (uint8_t)(MEM8[0xF6E6]); /* 1B48; XOR.B @H'F6E6, R4; cycles=7 */
- R5 = (uint16_t)(0x006E); /* 1B4C; MOV:I.W #H'006E, R5; cycles=3 */
+ R4 = (uint8_t)(MEM8[0xF6D6]); /* 1B44; MOV:G.B @H'F6D6, R4; refs ram_F6D6; cycles=7 */
+ R4 ^= (uint8_t)(MEM8[0xF6E6]); /* 1B48; XOR.B @H'F6E6, R4; refs ram_F6E6; cycles=7 */
+ R5 = (uint16_t)(0x006E); /* 1B4C; MOV:I.W #H'006E, R5; dataflow R5=0x006E; cycles=3 */
loc_1C0E(); /* 1B4F; BSR loc_1C0E; cycles=14 */
- R4 = (uint8_t)(MEM8[0xF6D6]); /* 1B52; MOV:G.B @H'F6D6, R4; cycles=7 */
- MEM8[0xF6E6] = (uint8_t)(R4); /* 1B56; MOV:G.B R4, @H'F6E6; cycles=7 */
+ R4 = (uint8_t)(MEM8[0xF6D6]); /* 1B52; MOV:G.B @H'F6D6, R4; refs ram_F6D6; cycles=7 */
+ MEM8[0xF6E6] = (uint8_t)(R4); /* 1B56; MOV:G.B R4, @H'F6E6; refs ram_F6E6; cycles=7 */
return; /* 1B5A; RTS; cycles=12 */
}
void loc_1B5B(void)
{
- R4 = (uint8_t)(MEM8[0xF6D5]); /* 1B5B; MOV:G.B @H'F6D5, R4; cycles=6 */
- R4 ^= (uint8_t)(MEM8[0xF6E5]); /* 1B5F; XOR.B @H'F6E5, R4; cycles=6 */
- R5 = (uint16_t)(0x005E); /* 1B63; MOV:I.W #H'005E, R5; cycles=3 */
+ R4 = (uint8_t)(MEM8[0xF6D5]); /* 1B5B; MOV:G.B @H'F6D5, R4; refs ram_F6D5; cycles=6 */
+ R4 ^= (uint8_t)(MEM8[0xF6E5]); /* 1B5F; XOR.B @H'F6E5, R4; refs ram_F6E5; cycles=6 */
+ R5 = (uint16_t)(0x005E); /* 1B63; MOV:I.W #H'005E, R5; dataflow R5=0x005E; cycles=3 */
loc_1C0E(); /* 1B66; BSR loc_1C0E; cycles=13 */
- R4 = (uint8_t)(MEM8[0xF6D5]); /* 1B69; MOV:G.B @H'F6D5, R4; cycles=6 */
- MEM8[0xF6E5] = (uint8_t)(R4); /* 1B6D; MOV:G.B R4, @H'F6E5; cycles=6 */
+ R4 = (uint8_t)(MEM8[0xF6D5]); /* 1B69; MOV:G.B @H'F6D5, R4; refs ram_F6D5; cycles=6 */
+ MEM8[0xF6E5] = (uint8_t)(R4); /* 1B6D; MOV:G.B R4, @H'F6E5; refs ram_F6E5; cycles=6 */
return; /* 1B71; RTS; cycles=13 */
}
void loc_1B72(void)
{
- R4 = (uint8_t)(MEM8[0xF6D1]); /* 1B72; MOV:G.B @H'F6D1, R4; cycles=7 */
- R4 ^= (uint8_t)(MEM8[0xF6E1]); /* 1B76; XOR.B @H'F6E1, R4; cycles=7 */
- R5 = (uint16_t)(0x001E); /* 1B7A; MOV:I.W #H'001E, R5; cycles=3 */
+ R4 = (uint8_t)(MEM8[0xF6D1]); /* 1B72; MOV:G.B @H'F6D1, R4; refs ram_F6D1; cycles=7 */
+ R4 ^= (uint8_t)(MEM8[0xF6E1]); /* 1B76; XOR.B @H'F6E1, R4; refs ram_F6E1; cycles=7 */
+ R5 = (uint16_t)(0x001E); /* 1B7A; MOV:I.W #H'001E, R5; dataflow R5=0x001E; cycles=3 */
loc_1C0E(); /* 1B7D; BSR loc_1C0E; cycles=14 */
- R4 = (uint8_t)(MEM8[0xF6D1]); /* 1B80; MOV:G.B @H'F6D1, R4; cycles=7 */
- MEM8[0xF6E1] = (uint8_t)(R4); /* 1B84; MOV:G.B R4, @H'F6E1; cycles=7 */
+ R4 = (uint8_t)(MEM8[0xF6D1]); /* 1B80; MOV:G.B @H'F6D1, R4; refs ram_F6D1; cycles=7 */
+ MEM8[0xF6E1] = (uint8_t)(R4); /* 1B84; MOV:G.B R4, @H'F6E1; refs ram_F6E1; cycles=7 */
return; /* 1B88; RTS; cycles=12 */
}
void loc_1B89(void)
{
- R4 = (uint8_t)(MEM8[0xF6D0]); /* 1B89; MOV:G.B @H'F6D0, R4; cycles=6 */
- R4 ^= (uint8_t)(MEM8[0xF6E0]); /* 1B8D; XOR.B @H'F6E0, R4; cycles=6 */
- R5 = (uint16_t)(0x000E); /* 1B91; MOV:I.W #H'000E, R5; cycles=3 */
+ R4 = (uint8_t)(MEM8[0xF6D0]); /* 1B89; MOV:G.B @H'F6D0, R4; refs ram_F6D0; cycles=6 */
+ R4 ^= (uint8_t)(MEM8[0xF6E0]); /* 1B8D; XOR.B @H'F6E0, R4; refs ram_F6E0; cycles=6 */
+ R5 = (uint16_t)(0x000E); /* 1B91; MOV:I.W #H'000E, R5; dataflow R5=0x000E; cycles=3 */
loc_1C0E(); /* 1B94; BSR loc_1C0E; cycles=13 */
- R4 = (uint8_t)(MEM8[0xF6D0]); /* 1B97; MOV:G.B @H'F6D0, R4; cycles=6 */
- MEM8[0xF6E0] = (uint8_t)(R4); /* 1B9B; MOV:G.B R4, @H'F6E0; cycles=6 */
+ R4 = (uint8_t)(MEM8[0xF6D0]); /* 1B97; MOV:G.B @H'F6D0, R4; refs ram_F6D0; cycles=6 */
+ MEM8[0xF6E0] = (uint8_t)(R4); /* 1B9B; MOV:G.B R4, @H'F6E0; refs ram_F6E0; cycles=6 */
return; /* 1B9F; RTS; cycles=13 */
}
void loc_1BA0(void)
{
- R4 = (uint8_t)(MEM8[0xF6D4]); /* 1BA0; MOV:G.B @H'F6D4, R4; cycles=7 */
- R4 ^= (uint8_t)(MEM8[0xF6E4]); /* 1BA4; XOR.B @H'F6E4, R4; cycles=7 */
- R5 = (uint16_t)(0x004E); /* 1BA8; MOV:I.W #H'004E, R5; cycles=3 */
+ R4 = (uint8_t)(MEM8[0xF6D4]); /* 1BA0; MOV:G.B @H'F6D4, R4; refs ram_F6D4; cycles=7 */
+ R4 ^= (uint8_t)(MEM8[0xF6E4]); /* 1BA4; XOR.B @H'F6E4, R4; refs ram_F6E4; cycles=7 */
+ R5 = (uint16_t)(0x004E); /* 1BA8; MOV:I.W #H'004E, R5; dataflow R5=0x004E; cycles=3 */
loc_1C0E(); /* 1BAB; BSR loc_1C0E; cycles=14 */
- R4 = (uint8_t)(MEM8[0xF6D4]); /* 1BAD; MOV:G.B @H'F6D4, R4; cycles=6 */
- MEM8[0xF6E4] = (uint8_t)(R4); /* 1BB1; MOV:G.B R4, @H'F6E4; cycles=6 */
+ R4 = (uint8_t)(MEM8[0xF6D4]); /* 1BAD; MOV:G.B @H'F6D4, R4; refs ram_F6D4; cycles=6 */
+ MEM8[0xF6E4] = (uint8_t)(R4); /* 1BB1; MOV:G.B R4, @H'F6E4; refs ram_F6E4; cycles=6 */
return; /* 1BB5; RTS; cycles=13 */
}
void loc_1BB6(void)
{
- R4 = (uint8_t)(MEM8[0xF6D3]); /* 1BB6; MOV:G.B @H'F6D3, R4; cycles=7 */
- R4 ^= (uint8_t)(MEM8[0xF6E3]); /* 1BBA; XOR.B @H'F6E3, R4; cycles=7 */
- R5 = (uint16_t)(0x003E); /* 1BBE; MOV:I.W #H'003E, R5; cycles=3 */
+ R4 = (uint8_t)(MEM8[0xF6D3]); /* 1BB6; MOV:G.B @H'F6D3, R4; refs ram_F6D3; cycles=7 */
+ R4 ^= (uint8_t)(MEM8[0xF6E3]); /* 1BBA; XOR.B @H'F6E3, R4; refs ram_F6E3; cycles=7 */
+ R5 = (uint16_t)(0x003E); /* 1BBE; MOV:I.W #H'003E, R5; dataflow R5=0x003E; cycles=3 */
loc_1C0E(); /* 1BC1; BSR loc_1C0E; cycles=14 */
- R4 = (uint8_t)(MEM8[0xF6D3]); /* 1BC3; MOV:G.B @H'F6D3, R4; cycles=6 */
- MEM8[0xF6E3] = (uint8_t)(R4); /* 1BC7; MOV:G.B R4, @H'F6E3; cycles=6 */
+ R4 = (uint8_t)(MEM8[0xF6D3]); /* 1BC3; MOV:G.B @H'F6D3, R4; refs ram_F6D3; cycles=6 */
+ MEM8[0xF6E3] = (uint8_t)(R4); /* 1BC7; MOV:G.B R4, @H'F6E3; refs ram_F6E3; cycles=6 */
return; /* 1BCB; RTS; cycles=13 */
}
void loc_1BCC(void)
{
- R4 = (uint8_t)(MEM8[0xF6D2]); /* 1BCC; MOV:G.B @H'F6D2, R4; cycles=7 */
- R4 ^= (uint8_t)(MEM8[0xF6E2]); /* 1BD0; XOR.B @H'F6E2, R4; cycles=7 */
- R5 = (uint16_t)(0x002E); /* 1BD4; MOV:I.W #H'002E, R5; cycles=3 */
+ R4 = (uint8_t)(MEM8[0xF6D2]); /* 1BCC; MOV:G.B @H'F6D2, R4; refs ram_F6D2; cycles=7 */
+ R4 ^= (uint8_t)(MEM8[0xF6E2]); /* 1BD0; XOR.B @H'F6E2, R4; refs ram_F6E2; cycles=7 */
+ R5 = (uint16_t)(0x002E); /* 1BD4; MOV:I.W #H'002E, R5; dataflow R5=0x002E; cycles=3 */
loc_1C0E(); /* 1BD7; BSR loc_1C0E; cycles=14 */
- R4 = (uint8_t)(MEM8[0xF6D2]); /* 1BD9; MOV:G.B @H'F6D2, R4; cycles=6 */
- MEM8[0xF6E2] = (uint8_t)(R4); /* 1BDD; MOV:G.B R4, @H'F6E2; cycles=6 */
+ R4 = (uint8_t)(MEM8[0xF6D2]); /* 1BD9; MOV:G.B @H'F6D2, R4; refs ram_F6D2; cycles=6 */
+ MEM8[0xF6E2] = (uint8_t)(R4); /* 1BDD; MOV:G.B R4, @H'F6E2; refs ram_F6E2; cycles=6 */
return; /* 1BE1; RTS; cycles=13 */
}
void loc_1BE2(void)
{
- R4 = (uint8_t)(MEM8[0xF6DC]); /* 1BE2; MOV:G.B @H'F6DC, R4; cycles=7 */
- R4 ^= (uint8_t)(MEM8[0xF6EC]); /* 1BE6; XOR.B @H'F6EC, R4; cycles=7 */
- R5 = (uint16_t)(0x00CE); /* 1BEA; MOV:I.W #H'00CE, R5; cycles=3 */
+ R4 = (uint8_t)(MEM8[0xF6DC]); /* 1BE2; MOV:G.B @H'F6DC, R4; refs ram_F6DC; cycles=7 */
+ R4 ^= (uint8_t)(MEM8[0xF6EC]); /* 1BE6; XOR.B @H'F6EC, R4; refs ram_F6EC; cycles=7 */
+ R5 = (uint16_t)(0x00CE); /* 1BEA; MOV:I.W #H'00CE, R5; dataflow R5=0x00CE; cycles=3 */
loc_1C0E(); /* 1BED; BSR loc_1C0E; cycles=14 */
- R4 = (uint8_t)(MEM8[0xF6DC]); /* 1BEF; MOV:G.B @H'F6DC, R4; cycles=6 */
- MEM8[0xF6EC] = (uint8_t)(R4); /* 1BF3; MOV:G.B R4, @H'F6EC; cycles=6 */
+ R4 = (uint8_t)(MEM8[0xF6DC]); /* 1BEF; MOV:G.B @H'F6DC, R4; refs ram_F6DC; cycles=6 */
+ MEM8[0xF6EC] = (uint8_t)(R4); /* 1BF3; MOV:G.B R4, @H'F6EC; refs ram_F6EC; cycles=6 */
return; /* 1BF7; RTS; cycles=13 */
}
void loc_1BF8(void)
{
- R4 = (uint8_t)(MEM8[0xF6DB]); /* 1BF8; MOV:G.B @H'F6DB, R4; cycles=7 */
- R4 ^= (uint8_t)(MEM8[0xF6EB]); /* 1BFC; XOR.B @H'F6EB, R4; cycles=7 */
- R5 = (uint16_t)(0x00BE); /* 1C00; MOV:I.W #H'00BE, R5; cycles=3 */
+ R4 = (uint8_t)(MEM8[0xF6DB]); /* 1BF8; MOV:G.B @H'F6DB, R4; refs ram_F6DB; cycles=7 */
+ R4 ^= (uint8_t)(MEM8[0xF6EB]); /* 1BFC; XOR.B @H'F6EB, R4; refs ram_F6EB; cycles=7 */
+ R5 = (uint16_t)(0x00BE); /* 1C00; MOV:I.W #H'00BE, R5; dataflow R5=0x00BE; cycles=3 */
loc_1C0E(); /* 1C03; BSR loc_1C0E; cycles=14 */
- R4 = (uint8_t)(MEM8[0xF6DB]); /* 1C05; MOV:G.B @H'F6DB, R4; cycles=6 */
- MEM8[0xF6EB] = (uint8_t)(R4); /* 1C09; MOV:G.B R4, @H'F6EB; cycles=6 */
+ R4 = (uint8_t)(MEM8[0xF6DB]); /* 1C05; MOV:G.B @H'F6DB, R4; refs ram_F6DB; cycles=6 */
+ MEM8[0xF6EB] = (uint8_t)(R4); /* 1C09; MOV:G.B R4, @H'F6EB; refs ram_F6EB; cycles=6 */
return; /* 1C0D; RTS; cycles=13 */
}
void loc_1C0E(void)
{
R4 <<= 1; /* 1C0E; SHLL.B R4; cycles=2 */
- if (!C) goto loc_1C1C; /* 1C10; BCC loc_1C1C; cycles=3/7 nt/t */
- R0 = (uint16_t)(MEM16[R5 + 0x2706]); /* 1C12; MOV:G.W @(H'2706,R5), R0; cycles=7 */
- push_registers(R4, R5); /* 1C16; STM.W {R4,R5}, @-SP; cycles=12 */
- call_indirect(MEM8[R0]); /* 1C18; JSR @R0; cycles=13 */
- pop_registers(R4, R5); /* 1C1A; LDM.W @SP+, {R4,R5}; cycles=14 */
-loc_1C1C:
+ if (C) { /* 1C10; BCC loc_1C1C; cycles=3/7 nt/t */
+ R0 = (uint16_t)(MEM16[R5 + 0x2706]); /* 1C12; MOV:G.W @(H'2706,R5), R0; cycles=7 */
+ push_registers(R4, R5); /* 1C16; STM.W {R4,R5}, @-SP; cycles=12 */
+ call_indirect(MEM8[R0]); /* 1C18; JSR @R0; JSR @R0 uses R0; target not resolved; cycles=13 */
+ pop_registers(R4, R5); /* 1C1A; LDM.W @SP+, {R4,R5}; cycles=14 */
+ }
set_flags_tst8(R4); /* 1C1C; TST.B R4; cycles=2 */
if (Z) goto loc_1C24; /* 1C1E; BEQ loc_1C24; cycles=3/7 nt/t */
R5 += (uint16_t)(-2); /* 1C20; ADD:Q.W #-2, R5; cycles=4 */
@@ -1113,74 +1401,74 @@ loc_1C24:
void loc_2127(void)
{
- MEM8[0xFB03] |= BIT(7); /* 2127; BSET.B #7, @H'FB03; cycles=8 */
- if (!Z) goto loc_2135; /* 212B; BNE loc_2135; cycles=3/8 nt/t */
- R1 = (uint16_t)(MEM16[0xF732]); /* 212D; MOV:G.W @H'F732, R1; cycles=6 */
- MEM16[0xF734] = (uint16_t)(R1); /* 2131; MOV:G.W R1, @H'F734; cycles=6 */
-loc_2135:
- MEM16[0xF732] = (uint16_t)(0x1C03); /* 2135; MOV:G.W #H'1C03, @H'F732; cycles=9 */
- MEM8[0xFB02] = (uint8_t)(0x14); /* 213B; MOV:G.B #H'14, @H'FB02; cycles=9 */
+ MEM8[0xFB03] |= BIT(7); /* 2127; BSET.B #7, @H'FB03; refs ram_FB03; cycles=8 */
+ if (Z) { /* 212B; BNE loc_2135; cycles=3/8 nt/t */
+ R1 = (uint16_t)(MEM16[0xF732]); /* 212D; MOV:G.W @H'F732, R1; refs ram_F732; cycles=6 */
+ MEM16[0xF734] = (uint16_t)(R1); /* 2131; MOV:G.W R1, @H'F734; refs ram_F734; cycles=6 */
+ }
+ MEM16[0xF732] = (uint16_t)(0x1C03); /* 2135; MOV:G.W #H'1C03, @H'F732; refs ram_F732; cycles=9 */
+ MEM8[0xFB02] = (uint8_t)(0x14); /* 213B; MOV:G.B #H'14, @H'FB02; refs ram_FB02; cycles=9 */
loc_48FA(); /* 2140; BSR loc_48FA; cycles=13 */
return; /* 2143; RTS; cycles=13 */
}
void loc_2650(void)
{
- MEM8[0xF6F6] &= ~BIT(5); /* 2650; BCLR.B #5, @H'F6F6; cycles=9 */
+ MEM8[0xF6F6] &= ~BIT(5); /* 2650; BCLR.B #5, @H'F6F6; refs ram_F6F6; cycles=9 */
if (Z) goto loc_26BF; /* 2654; BEQ loc_26BF; cycles=3/7 nt/t */
- R0 = (uint16_t)(MEM16[0xE124]); /* 2657; MOV:G.W @H'E124, R0; cycles=6 */
+ R0 = (uint16_t)(MEM16[0xE124]); /* 2657; MOV:G.W @H'E124, R0; refs mem_E124; cycles=6 */
R0 <<= 1; /* 265B; SHLL.W R0; cycles=3 */
R0 = swap_bytes(R0); /* 265D; SWAP.B R0; cycles=3 */
- set_flags_btst(MEM8[0xF6F6], 6); /* 265F; BTST.B #6, @H'F6F6; cycles=6 */
+ set_flags_btst(MEM8[0xF6F6], 6); /* 265F; BTST.B #6, @H'F6F6; refs ram_F6F6; cycles=6 */
if (!Z) goto loc_266D; /* 2663; BNE loc_266D; cycles=3/8 nt/t */
R0 += (uint8_t)(1); /* 2665; ADD:Q.B #1, R0; cycles=4 */
if (!C) goto loc_2683; /* 2667; BCC loc_2683; cycles=3/8 nt/t */
- R0 = (uint8_t)(0xFF); /* 2669; MOV:E.B #H'FF, R0; cycles=2 */
+ R0 = (uint8_t)(0xFF); /* 2669; MOV:E.B #H'FF, R0; dataflow R0=0xFF; cycles=2 */
goto loc_2683; /* 266B; BRA loc_2683; cycles=8 */
loc_266D:
R0 += (uint8_t)(-1); /* 266D; ADD:Q.B #-1, R0; cycles=4 */
- set_flags_btst(MEM16[0xE004], 13); /* 266F; BTST.W #13, @H'E004; cycles=6 */
+ set_flags_btst(MEM16[0xE004], 13); /* 266F; BTST.W #13, @H'E004; refs mem_E004; cycles=6 */
if (!Z) goto loc_267D; /* 2673; BNE loc_267D; cycles=3/8 nt/t */
set_flags_cmp8(R0, 0x49); /* 2675; CMP:E #H'49, R0; cycles=2 */
if (!C) goto loc_2683; /* 2677; BCC loc_2683; cycles=3/8 nt/t */
- R0 = (uint8_t)(0x49); /* 2679; MOV:E.B #H'49, R0; cycles=2 */
+ R0 = (uint8_t)(0x49); /* 2679; MOV:E.B #H'49, R0; dataflow R0=0x49; cycles=2 */
goto loc_2683; /* 267B; BRA loc_2683; cycles=8 */
loc_267D:
set_flags_cmp8(R0, 0x16); /* 267D; CMP:E #H'16, R0; cycles=2 */
if (!C) goto loc_2683; /* 267F; BCC loc_2683; cycles=3/8 nt/t */
- R0 = (uint8_t)(0x16); /* 2681; MOV:E.B #H'16, R0; cycles=2 */
+ R0 = (uint8_t)(0x16); /* 2681; MOV:E.B #H'16, R0; dataflow R0=0x16; cycles=2 */
loc_2683:
R0 = zero_extend8(R0); /* 2683; EXTU.B R0; cycles=3 */
R0 = swap_bytes(R0); /* 2685; SWAP.B R0; cycles=3 */
R0 >>= 1; /* 2687; SHLR.W R0; cycles=3 */
R0 |= BIT(15); /* 2689; BSET.W #15, R0; cycles=3 */
- set_flags_cmp16(R0, MEM16[0xE124]); /* 268B; CMP:G.W @H'E124, R0; cycles=6 */
+ set_flags_cmp16(R0, MEM16[0xE124]); /* 268B; CMP:G.W @H'E124, R0; refs mem_E124; cycles=6 */
if (Z) goto loc_26BF; /* 268F; BEQ loc_26BF; cycles=3/8 nt/t */
- MEM16[0xE924] = (uint16_t)(R0); /* 2691; MOV:G.W R0, @H'E924; cycles=6 */
- R2 = (uint8_t)(0x80); /* 2695; MOV:E.B #H'80, R2; cycles=2 */
- R3 = (uint16_t)(0x0092); /* 2697; MOV:I.W #H'0092, R3; cycles=3 */
- set_flags_btst(MEM8[0xF791], 7); /* 269A; BTST.B #7, @H'F791; cycles=7 */
+ MEM16[0xE924] = (uint16_t)(R0); /* 2691; MOV:G.W R0, @H'E924; refs mem_E924; cycles=6 */
+ R2 = (uint8_t)(0x80); /* 2695; MOV:E.B #H'80, R2; dataflow R2=0x80; cycles=2 */
+ R3 = (uint16_t)(0x0092); /* 2697; MOV:I.W #H'0092, R3; dataflow R3=0x0092; cycles=3 */
+ set_flags_btst(MEM8[0xF791], 7); /* 269A; BTST.B #7, @H'F791; refs ram_F791; cycles=7 */
if (Z) goto loc_26A8; /* 269E; BEQ loc_26A8; cycles=3/7 nt/t */
- set_flags_btst(MEM8[0xF404], 4); /* 26A0; BTST.B #4, @H'F404; cycles=7 */
+ set_flags_btst(MEM8[0xF404], 4); /* 26A0; BTST.B #4, @H'F404; refs mem_F404; cycles=7 */
if (Z) goto loc_26A8; /* 26A4; BEQ loc_26A8; cycles=3/7 nt/t */
R3 |= BIT(14); /* 26A6; BSET.W #14, R3; cycles=3 */
loc_26A8:
loc_3E54(); /* 26A8; BSR loc_3E54; cycles=13 */
- MEM8[0xF6F6] |= BIT(0); /* 26AB; BSET.B #0, @H'F6F6; cycles=8 */
+ MEM8[0xF6F6] |= BIT(0); /* 26AB; BSET.B #0, @H'F6F6; refs ram_F6F6; cycles=8 */
if (!Z) goto loc_26B9; /* 26AF; BNE loc_26B9; cycles=3/8 nt/t */
- MEM16[0xF6F4] = (uint16_t)(0x07D0); /* 26B1; MOV:G.W #H'07D0, @H'F6F4; cycles=9 */
+ MEM16[0xF6F4] = (uint16_t)(0x07D0); /* 26B1; MOV:G.W #H'07D0, @H'F6F4; refs ram_F6F4; cycles=9 */
goto loc_26BF; /* 26B7; BRA loc_26BF; cycles=8 */
loc_26B9:
- MEM16[0xF6F4] = (uint16_t)(0x00C8); /* 26B9; MOV:G.W #H'00C8, @H'F6F4; cycles=9 */
+ MEM16[0xF6F4] = (uint16_t)(0x00C8); /* 26B9; MOV:G.W #H'00C8, @H'F6F4; refs ram_F6F4; cycles=9 */
loc_26BF:
return; /* 26BF; RTS; cycles=13 */
}
void loc_2806(void)
{
- R1 = (uint8_t)(MEM8[0xF9B9]); /* 2806; MOV:G.B @H'F9B9, R1; cycles=7 */
+ R1 = (uint8_t)(MEM8[0xF9B9]); /* 2806; MOV:G.B @H'F9B9, R1; refs ram_F9B9; cycles=7 */
R1 = zero_extend8(R1); /* 280A; EXTU.B R1; cycles=3 */
- set_flags_cmp8(R1, MEM8[0xF9B4]); /* 280C; CMP:G.B @H'F9B4, R1; cycles=7 */
+ set_flags_cmp8(R1, MEM8[0xF9B4]); /* 280C; CMP:G.B @H'F9B4, R1; refs ram_F9B4; cycles=7 */
if (!Z) goto loc_2815; /* 2810; BNE loc_2815; cycles=3/7 nt/t */
goto loc_2CA6; /* 2812; BRA loc_2CA6; cycles=7 */
loc_2815:
@@ -1189,7 +1477,7 @@ loc_2815:
R0 = (uint16_t)(MEM16[R0 - 0x0690]); /* 2819; MOV:G.W @(-H'0690,R0), R0; cycles=6 */
R1 += (uint8_t)(1); /* 281D; ADD:Q.B #1, R1; cycles=4 */
R1 &= (uint8_t)(0x1F); /* 281F; AND.B #H'1F, R1; cycles=3 */
- MEM8[0xF9B9] = (uint8_t)(R1); /* 2822; MOV:G.B R1, @H'F9B9; cycles=7 */
+ MEM8[0xF9B9] = (uint8_t)(R1); /* 2822; MOV:G.B R1, @H'F9B9; refs ram_F9B9; cycles=7 */
R0 &= (uint16_t)(0x01FF); /* 2826; AND.W #H'01FF, R0; cycles=4 */
R5 = (uint16_t)(R0); /* 282A; MOV:G.W R0, R5; cycles=3 */
loc_6206(); /* 282C; BSR loc_6206; cycles=13 */
@@ -1197,51 +1485,51 @@ loc_2815:
R4 <<= 1; /* 2831; SHLL.W R4; cycles=3 */
set_flags_tst16(R0); /* 2833; TST.W R0; cycles=3 */
if (Z) goto loc_289F; /* 2835; BEQ loc_289F; cycles=3/8 nt/t */
- R1 = (uint16_t)(MEM16[0xF736]); /* 2837; MOV:G.W @H'F736, R1; cycles=6 */
+ R1 = (uint16_t)(MEM16[0xF736]); /* 2837; MOV:G.W @H'F736, R1; refs ram_F736; cycles=6 */
R1 &= (uint16_t)(0x01FF); /* 283B; AND.W #H'01FF, R1; cycles=4 */
set_flags_cmp16(R0, R1); /* 283F; CMP:G.W R1, R0; cycles=3 */
if (Z) goto loc_2CAB; /* 2841; BEQ loc_2CAB; cycles=3/8 nt/t */
- R1 = (uint16_t)(MEM16[0xF738]); /* 2844; MOV:G.W @H'F738, R1; cycles=7 */
+ R1 = (uint16_t)(MEM16[0xF738]); /* 2844; MOV:G.W @H'F738, R1; refs ram_F738; cycles=7 */
R1 &= (uint16_t)(0x01FF); /* 2848; AND.W #H'01FF, R1; cycles=4 */
set_flags_cmp16(R0, R1); /* 284C; CMP:G.W R1, R0; cycles=3 */
if (Z) goto loc_2CAB; /* 284E; BEQ loc_2CAB; cycles=3/7 nt/t */
- R1 = (uint16_t)(MEM16[0xF73A]); /* 2851; MOV:G.W @H'F73A, R1; cycles=6 */
+ R1 = (uint16_t)(MEM16[0xF73A]); /* 2851; MOV:G.W @H'F73A, R1; refs ram_F73A; cycles=6 */
R1 &= (uint16_t)(0x01FF); /* 2855; AND.W #H'01FF, R1; cycles=4 */
set_flags_cmp16(R0, R1); /* 2859; CMP:G.W R1, R0; cycles=3 */
if (Z) goto loc_2CAB; /* 285B; BEQ loc_2CAB; cycles=3/8 nt/t */
- R1 = (uint16_t)(MEM16[0xF73C]); /* 285E; MOV:G.W @H'F73C, R1; cycles=7 */
+ R1 = (uint16_t)(MEM16[0xF73C]); /* 285E; MOV:G.W @H'F73C, R1; refs ram_F73C; cycles=7 */
R1 &= (uint16_t)(0x01FF); /* 2862; AND.W #H'01FF, R1; cycles=4 */
set_flags_cmp16(R0, R1); /* 2866; CMP:G.W R1, R0; cycles=3 */
if (Z) goto loc_2CAB; /* 2868; BEQ loc_2CAB; cycles=3/7 nt/t */
- R1 = (uint16_t)(MEM16[0xF73E]); /* 286B; MOV:G.W @H'F73E, R1; cycles=6 */
+ R1 = (uint16_t)(MEM16[0xF73E]); /* 286B; MOV:G.W @H'F73E, R1; refs ram_F73E; cycles=6 */
R1 &= (uint16_t)(0x01FF); /* 286F; AND.W #H'01FF, R1; cycles=4 */
set_flags_cmp16(R0, R1); /* 2873; CMP:G.W R1, R0; cycles=3 */
if (Z) goto loc_2CAB; /* 2875; BEQ loc_2CAB; cycles=3/8 nt/t */
- R1 = (uint16_t)(MEM16[0xF740]); /* 2878; MOV:G.W @H'F740, R1; cycles=7 */
+ R1 = (uint16_t)(MEM16[0xF740]); /* 2878; MOV:G.W @H'F740, R1; refs ram_F740; cycles=7 */
R1 &= (uint16_t)(0x01FF); /* 287C; AND.W #H'01FF, R1; cycles=4 */
set_flags_cmp16(R0, R1); /* 2880; CMP:G.W R1, R0; cycles=3 */
if (Z) goto loc_2CAB; /* 2882; BEQ loc_2CAB; cycles=3/7 nt/t */
- R1 = (uint16_t)(MEM16[0xF742]); /* 2885; MOV:G.W @H'F742, R1; cycles=6 */
+ R1 = (uint16_t)(MEM16[0xF742]); /* 2885; MOV:G.W @H'F742, R1; refs ram_F742; cycles=6 */
R1 &= (uint16_t)(0x01FF); /* 2889; AND.W #H'01FF, R1; cycles=4 */
set_flags_cmp16(R0, R1); /* 288D; CMP:G.W R1, R0; cycles=3 */
if (Z) goto loc_2CAB; /* 288F; BEQ loc_2CAB; cycles=3/8 nt/t */
- R1 = (uint16_t)(MEM16[0xF754]); /* 2892; MOV:G.W @H'F754, R1; cycles=7 */
+ R1 = (uint16_t)(MEM16[0xF754]); /* 2892; MOV:G.W @H'F754, R1; refs ram_F754; cycles=7 */
R1 &= (uint16_t)(0x01FF); /* 2896; AND.W #H'01FF, R1; cycles=4 */
set_flags_cmp16(R0, R1); /* 289A; CMP:G.W R1, R0; cycles=3 */
if (Z) goto loc_2CAB; /* 289C; BEQ loc_2CAB; cycles=3/7 nt/t */
loc_289F:
R1 = (uint16_t)(MEM16[R4 + 0x28A6]); /* 289F; MOV:G.W @(H'28A6,R4), R1; cycles=6 */
- goto_indirect(MEM8[R1]); /* 28A3; JMP @R1; cycles=7 */
+ goto_indirect_table(0x28A6, R4, R1); /* 28A3; JMP @R1; JMP @R1 uses R1 loaded from pointer table H'28A6 via R4 (103/128 decoded targets); cycles=7 */
loc_2CA6:
- MEM8[0xF769] &= ~BIT(7); /* 2CA6; BCLR.B #7, @H'F769; cycles=9 */
+ MEM8[0xF769] &= ~BIT(7); /* 2CA6; BCLR.B #7, @H'F769; refs ram_F769; cycles=9 */
return; /* 2CAA; RTS; cycles=12 */
}
void loc_3930(void)
{
- R0 = (uint16_t)(0x0007); /* 3930; MOV:I.W #H'0007, R0; cycles=3 */
+ R0 = (uint16_t)(0x0007); /* 3930; MOV:I.W #H'0007, R0; dataflow R0=0x0007; cycles=3 */
loc_3933:
- set_flags_btst(P7DR, R0); /* 3933; BTST.B R0, @P7DR; cycles=6 */
+ set_flags_btst(P7DR, R0); /* 3933; BTST.B R0, @P7DR; refs P7DR; cycles=6 */
if (Z) goto loc_3943; /* 3937; BEQ loc_3943; cycles=3/8 nt/t */
MEM8[R0 - 0x0980] <<= 1; /* 3939; SHLL.B @(-H'0980,R0); cycles=8 */
MEM8[R0 - 0x0980] |= BIT(0); /* 393D; BSET.B #0, @(-H'0980,R0); cycles=8 */
@@ -1251,119 +1539,119 @@ loc_3943:
loc_3947:
set_flags_cmp8(MEM8[R0 - 0x0980], 0xFF); /* 3947; CMP:G.B #H'FF, @(-H'0980,R0); cycles=6 */
if (!Z) goto loc_3954; /* 394C; BNE loc_3954; cycles=3/7 nt/t */
- MEM8[0xF688] |= BIT(R0); /* 394E; BSET.B R0, @H'F688; cycles=9 */
+ MEM8[0xF688] |= BIT(R0); /* 394E; BSET.B R0, @H'F688; refs ram_F688; cycles=9 */
goto loc_395F; /* 3952; BRA loc_395F; cycles=7 */
loc_3954:
set_flags_cmp8(MEM8[R0 - 0x0980], 0x00); /* 3954; CMP:G.B #H'00, @(-H'0980,R0); cycles=7 */
if (!Z) goto loc_395F; /* 3959; BNE loc_395F; cycles=3/8 nt/t */
- MEM8[0xF688] &= ~BIT(R0); /* 395B; BCLR.B R0, @H'F688; cycles=8 */
+ MEM8[0xF688] &= ~BIT(R0); /* 395B; BCLR.B R0, @H'F688; refs ram_F688; cycles=8 */
loc_395F:
if (scb_f(R0)) goto loc_3933; /* 395F; SCB/F R0, loc_3933; cycles=? */
- MEM8[0xF722] += (uint8_t)(1); /* 3962; ADD:Q.B #1, @H'F722; cycles=9 */
- set_flags_cmp8(MEM8[0xF722], 0x3C); /* 3966; CMP:G.B #H'3C, @H'F722; cycles=7 */
+ MEM8[0xF722] += (uint8_t)(1); /* 3962; ADD:Q.B #1, @H'F722; refs ram_F722; cycles=9 */
+ set_flags_cmp8(MEM8[0xF722], 0x3C); /* 3966; CMP:G.B #H'3C, @H'F722; refs ram_F722; cycles=7 */
if (Z) goto loc_397C; /* 396B; BEQ loc_397C; cycles=3/8 nt/t */
- set_flags_cmp8(MEM8[0xF722], 0x78); /* 396D; CMP:G.B #H'78, @H'F722; cycles=6 */
+ set_flags_cmp8(MEM8[0xF722], 0x78); /* 396D; CMP:G.B #H'78, @H'F722; refs ram_F722; cycles=6 */
if (Z) goto loc_397F; /* 3972; BEQ loc_397F; cycles=3/7 nt/t */
- set_flags_cmp8(MEM8[0xF722], 0xB4); /* 3974; CMP:G.B #H'B4, @H'F722; cycles=7 */
+ set_flags_cmp8(MEM8[0xF722], 0xB4); /* 3974; CMP:G.B #H'B4, @H'F722; refs ram_F722; cycles=7 */
if (Z) goto loc_3983; /* 3979; BEQ loc_3983; cycles=3/8 nt/t */
return; /* 397B; RTS; cycles=13 */
}
void loc_398A(void)
{
- set_flags_btst(ADCSR, 7); /* 398A; BTST.B #7, @ADCSR; cycles=7 */
- if (!Z) goto loc_3994; /* 398E; BNE loc_3994; cycles=3/7 nt/t */
- ADCSR |= BIT(5); /* 3990; BSET.B #5, @ADCSR; set ADST (bit 5) of ADCSR; cycles=9 */
-loc_3994:
+ set_flags_btst(ADCSR, 7); /* 398A; BTST.B #7, @ADCSR; refs ADCSR; cycles=7 */
+ if (Z) { /* 398E; BNE loc_3994; cycles=3/7 nt/t */
+ ADCSR |= BIT(5); /* 3990; BSET.B #5, @ADCSR; set ADST (bit 5) of ADCSR; refs ADCSR; cycles=9 */
+ }
return; /* 3994; RTS; cycles=12 */
}
void loc_3995(void)
{
- set_flags_tst8(MEM8[0xF720]); /* 3995; TST.B @H'F720; cycles=6 */
+ set_flags_tst8(MEM8[0xF720]); /* 3995; TST.B @H'F720; refs ram_F720; cycles=6 */
if (!Z) goto loc_3A2D; /* 3999; BNE loc_3A2D; cycles=3/8 nt/t */
- MEM8[0xF101] = (uint8_t)(0xA0); /* 399C; MOV:G.B #H'A0, @H'F101; cycles=9 */
- set_flags_btst(MEM8[0xF100], 1); /* 39A1; BTST.B #1, @H'F100; cycles=6 */
+ MEM8[0xF101] = (uint8_t)(0xA0); /* 399C; MOV:G.B #H'A0, @H'F101; refs mem_F101; cycles=9 */
+ set_flags_btst(MEM8[0xF100], 1); /* 39A1; BTST.B #1, @H'F100; refs mem_F100; cycles=6 */
if (Z) goto loc_3A2D; /* 39A5; BEQ loc_3A2D; cycles=3/8 nt/t */
- R0 = (uint8_t)(MEM8[0xF71B]); /* 39A8; MOV:G.B @H'F71B, R0; cycles=7 */
- R0 |= (uint8_t)(MEM8[0xF723]); /* 39AC; OR.B @H'F723, R0; cycles=7 */
- R0 &= (uint8_t)(MEM8[0xF713]); /* 39B0; AND.B @H'F713, R0; cycles=7 */
- MEM8[0xF102] = (uint8_t)(R0); /* 39B4; MOV:G.B R0, @H'F102; cycles=7 */
- R0 = (uint8_t)(MEM8[0xF71A]); /* 39B8; MOV:G.B @H'F71A, R0; cycles=7 */
- R0 |= (uint8_t)(MEM8[0xF723]); /* 39BC; OR.B @H'F723, R0; cycles=7 */
- R0 &= (uint8_t)(MEM8[0xF712]); /* 39C0; AND.B @H'F712, R0; cycles=7 */
- MEM8[0xF103] = (uint8_t)(R0); /* 39C4; MOV:G.B R0, @H'F103; cycles=7 */
- R0 = (uint8_t)(MEM8[0xF719]); /* 39C8; MOV:G.B @H'F719, R0; cycles=7 */
- R0 |= (uint8_t)(MEM8[0xF723]); /* 39CC; OR.B @H'F723, R0; cycles=7 */
- R0 &= (uint8_t)(MEM8[0xF711]); /* 39D0; AND.B @H'F711, R0; cycles=7 */
- MEM8[0xF104] = (uint8_t)(R0); /* 39D4; MOV:G.B R0, @H'F104; cycles=7 */
- R0 = (uint8_t)(MEM8[0xF718]); /* 39D8; MOV:G.B @H'F718, R0; cycles=7 */
- R0 |= (uint8_t)(MEM8[0xF723]); /* 39DC; OR.B @H'F723, R0; cycles=7 */
- R0 &= (uint8_t)(MEM8[0xF710]); /* 39E0; AND.B @H'F710, R0; cycles=7 */
- MEM8[0xF105] = (uint8_t)(R0); /* 39E4; MOV:G.B R0, @H'F105; cycles=7 */
- R0 = (uint8_t)(MEM8[0xF702]); /* 39E8; MOV:G.B @H'F702, R0; cycles=7 */
- MEM8[0xF109] = (uint8_t)(R0); /* 39EC; MOV:G.B R0, @H'F109; cycles=7 */
- R0 = (uint8_t)(MEM8[0xF703]); /* 39F0; MOV:G.B @H'F703, R0; cycles=7 */
- MEM8[0xF10A] = (uint8_t)(R0); /* 39F4; MOV:G.B R0, @H'F10A; cycles=7 */
- R0 = (uint8_t)(MEM8[0xF704]); /* 39F8; MOV:G.B @H'F704, R0; cycles=7 */
- MEM8[0xF10B] = (uint8_t)(R0); /* 39FC; MOV:G.B R0, @H'F10B; cycles=7 */
- R0 = (uint8_t)(MEM8[0xF705]); /* 3A00; MOV:G.B @H'F705, R0; cycles=7 */
- MEM8[0xF10C] = (uint8_t)(R0); /* 3A04; MOV:G.B R0, @H'F10C; cycles=7 */
- R0 = (uint8_t)(MEM8[0xF700]); /* 3A08; MOV:G.B @H'F700, R0; cycles=7 */
- MEM8[0xF10D] = (uint8_t)(R0); /* 3A0C; MOV:G.B R0, @H'F10D; cycles=7 */
- R0 = (uint8_t)(MEM8[0xF701]); /* 3A10; MOV:G.B @H'F701, R0; cycles=7 */
- MEM8[0xF10E] = (uint8_t)(R0); /* 3A14; MOV:G.B R0, @H'F10E; cycles=7 */
- R0 = (uint8_t)(P7DR); /* 3A18; MOV:G.B @P7DR, R0; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF71B]); /* 39A8; MOV:G.B @H'F71B, R0; refs ram_F71B; cycles=7 */
+ R0 |= (uint8_t)(MEM8[0xF723]); /* 39AC; OR.B @H'F723, R0; refs ram_F723; cycles=7 */
+ R0 &= (uint8_t)(MEM8[0xF713]); /* 39B0; AND.B @H'F713, R0; refs ram_F713; cycles=7 */
+ MEM8[0xF102] = (uint8_t)(R0); /* 39B4; MOV:G.B R0, @H'F102; refs mem_F102; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF71A]); /* 39B8; MOV:G.B @H'F71A, R0; refs ram_F71A; cycles=7 */
+ R0 |= (uint8_t)(MEM8[0xF723]); /* 39BC; OR.B @H'F723, R0; refs ram_F723; cycles=7 */
+ R0 &= (uint8_t)(MEM8[0xF712]); /* 39C0; AND.B @H'F712, R0; refs ram_F712; cycles=7 */
+ MEM8[0xF103] = (uint8_t)(R0); /* 39C4; MOV:G.B R0, @H'F103; refs mem_F103; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF719]); /* 39C8; MOV:G.B @H'F719, R0; refs ram_F719; cycles=7 */
+ R0 |= (uint8_t)(MEM8[0xF723]); /* 39CC; OR.B @H'F723, R0; refs ram_F723; cycles=7 */
+ R0 &= (uint8_t)(MEM8[0xF711]); /* 39D0; AND.B @H'F711, R0; refs ram_F711; cycles=7 */
+ MEM8[0xF104] = (uint8_t)(R0); /* 39D4; MOV:G.B R0, @H'F104; refs mem_F104; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF718]); /* 39D8; MOV:G.B @H'F718, R0; refs ram_F718; cycles=7 */
+ R0 |= (uint8_t)(MEM8[0xF723]); /* 39DC; OR.B @H'F723, R0; refs ram_F723; cycles=7 */
+ R0 &= (uint8_t)(MEM8[0xF710]); /* 39E0; AND.B @H'F710, R0; refs ram_F710; cycles=7 */
+ MEM8[0xF105] = (uint8_t)(R0); /* 39E4; MOV:G.B R0, @H'F105; refs mem_F105; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF702]); /* 39E8; MOV:G.B @H'F702, R0; refs ram_F702; cycles=7 */
+ MEM8[0xF109] = (uint8_t)(R0); /* 39EC; MOV:G.B R0, @H'F109; refs mem_F109; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF703]); /* 39F0; MOV:G.B @H'F703, R0; refs ram_F703; cycles=7 */
+ MEM8[0xF10A] = (uint8_t)(R0); /* 39F4; MOV:G.B R0, @H'F10A; refs mem_F10A; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF704]); /* 39F8; MOV:G.B @H'F704, R0; refs ram_F704; cycles=7 */
+ MEM8[0xF10B] = (uint8_t)(R0); /* 39FC; MOV:G.B R0, @H'F10B; refs mem_F10B; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF705]); /* 3A00; MOV:G.B @H'F705, R0; refs ram_F705; cycles=7 */
+ MEM8[0xF10C] = (uint8_t)(R0); /* 3A04; MOV:G.B R0, @H'F10C; refs mem_F10C; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF700]); /* 3A08; MOV:G.B @H'F700, R0; refs ram_F700; cycles=7 */
+ MEM8[0xF10D] = (uint8_t)(R0); /* 3A0C; MOV:G.B R0, @H'F10D; refs mem_F10D; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF701]); /* 3A10; MOV:G.B @H'F701, R0; refs ram_F701; cycles=7 */
+ MEM8[0xF10E] = (uint8_t)(R0); /* 3A14; MOV:G.B R0, @H'F10E; refs mem_F10E; cycles=7 */
+ R0 = (uint8_t)(P7DR); /* 3A18; MOV:G.B @P7DR, R0; refs P7DR; cycles=7 */
R0 = ~R0; /* 3A1C; NOT.B R0; cycles=2 */
R0 &= (uint8_t)(0x03); /* 3A1E; AND.B #H'03, R0; cycles=3 */
R0 |= (uint8_t)(0xA0); /* 3A21; OR.B #H'A0, R0; cycles=3 */
- MEM8[0xF10F] = (uint8_t)(R0); /* 3A24; MOV:G.B R0, @H'F10F; cycles=7 */
- MEM8[0xF720] = (uint8_t)(0x03); /* 3A28; MOV:G.B #H'03, @H'F720; cycles=9 */
+ MEM8[0xF10F] = (uint8_t)(R0); /* 3A24; MOV:G.B R0, @H'F10F; refs mem_F10F; cycles=7 */
+ MEM8[0xF720] = (uint8_t)(0x03); /* 3A28; MOV:G.B #H'03, @H'F720; refs ram_F720; cycles=9 */
loc_3A2D:
return; /* 3A2D; RTS; cycles=13 */
}
void loc_3A2E(void)
{
- set_flags_tst8(MEM8[0xF721]); /* 3A2E; TST.B @H'F721; cycles=7 */
+ set_flags_tst8(MEM8[0xF721]); /* 3A2E; TST.B @H'F721; refs ram_F721; cycles=7 */
if (!Z) goto loc_3AC6; /* 3A32; BNE loc_3AC6; cycles=3/7 nt/t */
- MEM8[0xF001] = (uint8_t)(0xA0); /* 3A35; MOV:G.B #H'A0, @H'F001; cycles=9 */
- set_flags_btst(MEM8[0xF000], 1); /* 3A3A; BTST.B #1, @H'F000; cycles=7 */
+ MEM8[0xF001] = (uint8_t)(0xA0); /* 3A35; MOV:G.B #H'A0, @H'F001; refs mem_F001; cycles=9 */
+ set_flags_btst(MEM8[0xF000], 1); /* 3A3A; BTST.B #1, @H'F000; refs mem_F000; cycles=7 */
if (Z) goto loc_3AC6; /* 3A3E; BEQ loc_3AC6; cycles=3/7 nt/t */
- R0 = (uint8_t)(MEM8[0xF71F]); /* 3A41; MOV:G.B @H'F71F, R0; cycles=6 */
- R0 |= (uint8_t)(MEM8[0xF723]); /* 3A45; OR.B @H'F723, R0; cycles=6 */
- R0 &= (uint8_t)(MEM8[0xF717]); /* 3A49; AND.B @H'F717, R0; cycles=6 */
- MEM8[0xF002] = (uint8_t)(R0); /* 3A4D; MOV:G.B R0, @H'F002; cycles=6 */
- R0 = (uint8_t)(MEM8[0xF71E]); /* 3A51; MOV:G.B @H'F71E, R0; cycles=6 */
- R0 |= (uint8_t)(MEM8[0xF723]); /* 3A55; OR.B @H'F723, R0; cycles=6 */
- R0 &= (uint8_t)(MEM8[0xF716]); /* 3A59; AND.B @H'F716, R0; cycles=6 */
- MEM8[0xF003] = (uint8_t)(R0); /* 3A5D; MOV:G.B R0, @H'F003; cycles=6 */
- R0 = (uint8_t)(MEM8[0xF71D]); /* 3A61; MOV:G.B @H'F71D, R0; cycles=6 */
- R0 |= (uint8_t)(MEM8[0xF723]); /* 3A65; OR.B @H'F723, R0; cycles=6 */
- R0 &= (uint8_t)(MEM8[0xF715]); /* 3A69; AND.B @H'F715, R0; cycles=6 */
- MEM8[0xF004] = (uint8_t)(R0); /* 3A6D; MOV:G.B R0, @H'F004; cycles=6 */
- R0 = (uint8_t)(MEM8[0xF71C]); /* 3A71; MOV:G.B @H'F71C, R0; cycles=6 */
- R0 |= (uint8_t)(MEM8[0xF723]); /* 3A75; OR.B @H'F723, R0; cycles=6 */
- R0 &= (uint8_t)(MEM8[0xF714]); /* 3A79; AND.B @H'F714, R0; cycles=6 */
- MEM8[0xF005] = (uint8_t)(R0); /* 3A7D; MOV:G.B R0, @H'F005; cycles=6 */
- R0 = (uint8_t)(MEM8[0xF708]); /* 3A81; MOV:G.B @H'F708, R0; cycles=6 */
- MEM8[0xF009] = (uint8_t)(R0); /* 3A85; MOV:G.B R0, @H'F009; cycles=6 */
- R0 = (uint8_t)(MEM8[0xF709]); /* 3A89; MOV:G.B @H'F709, R0; cycles=6 */
- MEM8[0xF00A] = (uint8_t)(R0); /* 3A8D; MOV:G.B R0, @H'F00A; cycles=6 */
- R0 = (uint8_t)(MEM8[0xF70A]); /* 3A91; MOV:G.B @H'F70A, R0; cycles=6 */
- MEM8[0xF00B] = (uint8_t)(R0); /* 3A95; MOV:G.B R0, @H'F00B; cycles=6 */
- R0 = (uint8_t)(MEM8[0xF70B]); /* 3A99; MOV:G.B @H'F70B, R0; cycles=6 */
- MEM8[0xF00C] = (uint8_t)(R0); /* 3A9D; MOV:G.B R0, @H'F00C; cycles=6 */
- R0 = (uint8_t)(MEM8[0xF706]); /* 3AA1; MOV:G.B @H'F706, R0; cycles=6 */
- MEM8[0xF00D] = (uint8_t)(R0); /* 3AA5; MOV:G.B R0, @H'F00D; cycles=6 */
- R0 = (uint8_t)(MEM8[0xF707]); /* 3AA9; MOV:G.B @H'F707, R0; cycles=6 */
- MEM8[0xF00E] = (uint8_t)(R0); /* 3AAD; MOV:G.B R0, @H'F00E; cycles=6 */
- R0 = (uint8_t)(P7DR); /* 3AB1; MOV:G.B @P7DR, R0; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF71F]); /* 3A41; MOV:G.B @H'F71F, R0; refs ram_F71F; cycles=6 */
+ R0 |= (uint8_t)(MEM8[0xF723]); /* 3A45; OR.B @H'F723, R0; refs ram_F723; cycles=6 */
+ R0 &= (uint8_t)(MEM8[0xF717]); /* 3A49; AND.B @H'F717, R0; refs ram_F717; cycles=6 */
+ MEM8[0xF002] = (uint8_t)(R0); /* 3A4D; MOV:G.B R0, @H'F002; refs mem_F002; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF71E]); /* 3A51; MOV:G.B @H'F71E, R0; refs ram_F71E; cycles=6 */
+ R0 |= (uint8_t)(MEM8[0xF723]); /* 3A55; OR.B @H'F723, R0; refs ram_F723; cycles=6 */
+ R0 &= (uint8_t)(MEM8[0xF716]); /* 3A59; AND.B @H'F716, R0; refs ram_F716; cycles=6 */
+ MEM8[0xF003] = (uint8_t)(R0); /* 3A5D; MOV:G.B R0, @H'F003; refs mem_F003; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF71D]); /* 3A61; MOV:G.B @H'F71D, R0; refs ram_F71D; cycles=6 */
+ R0 |= (uint8_t)(MEM8[0xF723]); /* 3A65; OR.B @H'F723, R0; refs ram_F723; cycles=6 */
+ R0 &= (uint8_t)(MEM8[0xF715]); /* 3A69; AND.B @H'F715, R0; refs ram_F715; cycles=6 */
+ MEM8[0xF004] = (uint8_t)(R0); /* 3A6D; MOV:G.B R0, @H'F004; refs mem_F004; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF71C]); /* 3A71; MOV:G.B @H'F71C, R0; refs ram_F71C; cycles=6 */
+ R0 |= (uint8_t)(MEM8[0xF723]); /* 3A75; OR.B @H'F723, R0; refs ram_F723; cycles=6 */
+ R0 &= (uint8_t)(MEM8[0xF714]); /* 3A79; AND.B @H'F714, R0; refs ram_F714; cycles=6 */
+ MEM8[0xF005] = (uint8_t)(R0); /* 3A7D; MOV:G.B R0, @H'F005; refs mem_F005; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF708]); /* 3A81; MOV:G.B @H'F708, R0; refs ram_F708; cycles=6 */
+ MEM8[0xF009] = (uint8_t)(R0); /* 3A85; MOV:G.B R0, @H'F009; refs mem_F009; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF709]); /* 3A89; MOV:G.B @H'F709, R0; refs ram_F709; cycles=6 */
+ MEM8[0xF00A] = (uint8_t)(R0); /* 3A8D; MOV:G.B R0, @H'F00A; refs mem_F00A; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF70A]); /* 3A91; MOV:G.B @H'F70A, R0; refs ram_F70A; cycles=6 */
+ MEM8[0xF00B] = (uint8_t)(R0); /* 3A95; MOV:G.B R0, @H'F00B; refs mem_F00B; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF70B]); /* 3A99; MOV:G.B @H'F70B, R0; refs ram_F70B; cycles=6 */
+ MEM8[0xF00C] = (uint8_t)(R0); /* 3A9D; MOV:G.B R0, @H'F00C; refs mem_F00C; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF706]); /* 3AA1; MOV:G.B @H'F706, R0; refs ram_F706; cycles=6 */
+ MEM8[0xF00D] = (uint8_t)(R0); /* 3AA5; MOV:G.B R0, @H'F00D; refs mem_F00D; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF707]); /* 3AA9; MOV:G.B @H'F707, R0; refs ram_F707; cycles=6 */
+ MEM8[0xF00E] = (uint8_t)(R0); /* 3AAD; MOV:G.B R0, @H'F00E; refs mem_F00E; cycles=6 */
+ R0 = (uint8_t)(P7DR); /* 3AB1; MOV:G.B @P7DR, R0; refs P7DR; cycles=6 */
R0 = ~R0; /* 3AB5; NOT.B R0; cycles=2 */
R0 &= (uint8_t)(0x03); /* 3AB7; AND.B #H'03, R0; cycles=3 */
R0 |= (uint8_t)(0xA0); /* 3ABA; OR.B #H'A0, R0; cycles=3 */
- MEM8[0xF00F] = (uint8_t)(R0); /* 3ABD; MOV:G.B R0, @H'F00F; cycles=6 */
- MEM8[0xF721] = (uint8_t)(0x03); /* 3AC1; MOV:G.B #H'03, @H'F721; cycles=9 */
+ MEM8[0xF00F] = (uint8_t)(R0); /* 3ABD; MOV:G.B R0, @H'F00F; refs mem_F00F; cycles=6 */
+ MEM8[0xF721] = (uint8_t)(0x03); /* 3AC1; MOV:G.B #H'03, @H'F721; refs ram_F721; cycles=9 */
loc_3AC6:
return; /* 3AC6; RTS; cycles=12 */
}
@@ -1372,124 +1660,124 @@ void vec_irq4_3AC7(void)
{
/* vector sources: irq4 */
MEM16[--R7] = (uint16_t)(R0); /* 3AC7; MOV:G.W R0, @-R7; cycles=5 */
- set_flags_btst(MEM8[0xF100], 1); /* 3AC9; BTST.B #1, @H'F100; cycles=6 */
+ set_flags_btst(MEM8[0xF100], 1); /* 3AC9; BTST.B #1, @H'F100; refs mem_F100; cycles=6 */
if (!Z) goto loc_3C2D; /* 3ACD; BNE loc_3C2D; cycles=3/8 nt/t */
- R0 = (uint8_t)(MEM8[0xF10F]); /* 3AD0; MOV:G.B @H'F10F, R0; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF10F]); /* 3AD0; MOV:G.B @H'F10F, R0; refs mem_F10F; cycles=7 */
set_flags_cmp8(R0, 0xA9); /* 3AD4; CMP:E #H'A9, R0; cycles=2 */
if (Z) goto loc_3AE0; /* 3AD6; BEQ loc_3AE0; cycles=3/7 nt/t */
set_flags_cmp8(R0, 0xA8); /* 3AD8; CMP:E #H'A8, R0; cycles=2 */
if (Z) goto loc_3B62; /* 3ADA; BEQ loc_3B62; cycles=3/7 nt/t */
goto loc_3C2D; /* 3ADD; BRA loc_3C2D; cycles=8 */
loc_3AE0:
- R0 = (uint8_t)(MEM8[0xF6F0]); /* 3AE0; MOV:G.B @H'F6F0, R0; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF6F0]); /* 3AE0; MOV:G.B @H'F6F0, R0; refs ram_F6F0; cycles=7 */
R0 &= (uint8_t)(0xC0); /* 3AE4; AND.B #H'C0, R0; cycles=3 */
- MEM8[0xF6F0] = (uint8_t)(R0); /* 3AE7; MOV:G.B R0, @H'F6F0; cycles=6 */
- R0 = (uint16_t)(MEM16[0xF10C]); /* 3AEB; MOV:G.W @H'F10C, R0; cycles=6 */
- set_flags_cmp16(R0, MEM16[0xF69A]); /* 3AEF; CMP:G.W @H'F69A, R0; cycles=6 */
- if (Z) goto loc_3AFD; /* 3AF3; BEQ loc_3AFD; cycles=3/8 nt/t */
- MEM8[0xF6F0] |= BIT(5); /* 3AF5; BSET.B #5, @H'F6F0; cycles=8 */
- MEM16[0xF69A] = (uint16_t)(R0); /* 3AF9; MOV:G.W R0, @H'F69A; cycles=6 */
-loc_3AFD:
- R0 = (uint16_t)(MEM16[0xF10A]); /* 3AFD; MOV:G.W @H'F10A, R0; cycles=6 */
- set_flags_cmp16(R0, MEM16[0xF698]); /* 3B01; CMP:G.W @H'F698, R0; cycles=6 */
- if (Z) goto loc_3B0F; /* 3B05; BEQ loc_3B0F; cycles=3/8 nt/t */
- MEM8[0xF6F0] |= BIT(4); /* 3B07; BSET.B #4, @H'F6F0; cycles=8 */
- MEM16[0xF698] = (uint16_t)(R0); /* 3B0B; MOV:G.W R0, @H'F698; cycles=6 */
-loc_3B0F:
- R0 = (uint16_t)(MEM16[0xF108]); /* 3B0F; MOV:G.W @H'F108, R0; cycles=6 */
- set_flags_cmp16(R0, MEM16[0xF696]); /* 3B13; CMP:G.W @H'F696, R0; cycles=6 */
- if (Z) goto loc_3B21; /* 3B17; BEQ loc_3B21; cycles=3/8 nt/t */
- MEM8[0xF6F0] |= BIT(3); /* 3B19; BSET.B #3, @H'F6F0; cycles=8 */
- MEM16[0xF696] = (uint16_t)(R0); /* 3B1D; MOV:G.W R0, @H'F696; cycles=6 */
-loc_3B21:
- R0 = (uint16_t)(MEM16[0xF106]); /* 3B21; MOV:G.W @H'F106, R0; cycles=6 */
- set_flags_cmp16(R0, MEM16[0xF694]); /* 3B25; CMP:G.W @H'F694, R0; cycles=6 */
- if (Z) goto loc_3B33; /* 3B29; BEQ loc_3B33; cycles=3/8 nt/t */
- MEM8[0xF6F0] |= BIT(2); /* 3B2B; BSET.B #2, @H'F6F0; cycles=8 */
- MEM16[0xF694] = (uint16_t)(R0); /* 3B2F; MOV:G.W R0, @H'F694; cycles=6 */
-loc_3B33:
- R0 = (uint16_t)(MEM16[0xF104]); /* 3B33; MOV:G.W @H'F104, R0; cycles=6 */
- set_flags_cmp16(R0, MEM16[0xF692]); /* 3B37; CMP:G.W @H'F692, R0; cycles=6 */
- if (Z) goto loc_3B45; /* 3B3B; BEQ loc_3B45; cycles=3/8 nt/t */
- MEM8[0xF6F0] |= BIT(1); /* 3B3D; BSET.B #1, @H'F6F0; cycles=8 */
- MEM16[0xF692] = (uint16_t)(R0); /* 3B41; MOV:G.W R0, @H'F692; cycles=6 */
-loc_3B45:
- R0 = (uint16_t)(MEM16[0xF102]); /* 3B45; MOV:G.W @H'F102, R0; cycles=6 */
- set_flags_cmp16(R0, MEM16[0xF690]); /* 3B49; CMP:G.W @H'F690, R0; cycles=6 */
- if (Z) goto loc_3B57; /* 3B4D; BEQ loc_3B57; cycles=3/8 nt/t */
- MEM8[0xF6F0] |= BIT(0); /* 3B4F; BSET.B #0, @H'F6F0; cycles=8 */
- MEM16[0xF690] = (uint16_t)(R0); /* 3B53; MOV:G.W R0, @H'F690; cycles=6 */
-loc_3B57:
- R0 = (uint8_t)(MEM8[0xF101]); /* 3B57; MOV:G.B @H'F101, R0; cycles=6 */
- MEM8[0xF720] &= ~BIT(0); /* 3B5B; BCLR.B #0, @H'F720; cycles=8 */
+ MEM8[0xF6F0] = (uint8_t)(R0); /* 3AE7; MOV:G.B R0, @H'F6F0; refs ram_F6F0; cycles=6 */
+ R0 = (uint16_t)(MEM16[0xF10C]); /* 3AEB; MOV:G.W @H'F10C, R0; refs mem_F10C; cycles=6 */
+ set_flags_cmp16(R0, MEM16[0xF69A]); /* 3AEF; CMP:G.W @H'F69A, R0; refs ram_F69A; cycles=6 */
+ if (!Z) { /* 3AF3; BEQ loc_3AFD; cycles=3/8 nt/t */
+ MEM8[0xF6F0] |= BIT(5); /* 3AF5; BSET.B #5, @H'F6F0; refs ram_F6F0; cycles=8 */
+ MEM16[0xF69A] = (uint16_t)(R0); /* 3AF9; MOV:G.W R0, @H'F69A; refs ram_F69A; cycles=6 */
+ }
+ R0 = (uint16_t)(MEM16[0xF10A]); /* 3AFD; MOV:G.W @H'F10A, R0; refs mem_F10A; cycles=6 */
+ set_flags_cmp16(R0, MEM16[0xF698]); /* 3B01; CMP:G.W @H'F698, R0; refs ram_F698; cycles=6 */
+ if (!Z) { /* 3B05; BEQ loc_3B0F; cycles=3/8 nt/t */
+ MEM8[0xF6F0] |= BIT(4); /* 3B07; BSET.B #4, @H'F6F0; refs ram_F6F0; cycles=8 */
+ MEM16[0xF698] = (uint16_t)(R0); /* 3B0B; MOV:G.W R0, @H'F698; refs ram_F698; cycles=6 */
+ }
+ R0 = (uint16_t)(MEM16[0xF108]); /* 3B0F; MOV:G.W @H'F108, R0; refs mem_F108; cycles=6 */
+ set_flags_cmp16(R0, MEM16[0xF696]); /* 3B13; CMP:G.W @H'F696, R0; refs ram_F696; cycles=6 */
+ if (!Z) { /* 3B17; BEQ loc_3B21; cycles=3/8 nt/t */
+ MEM8[0xF6F0] |= BIT(3); /* 3B19; BSET.B #3, @H'F6F0; refs ram_F6F0; cycles=8 */
+ MEM16[0xF696] = (uint16_t)(R0); /* 3B1D; MOV:G.W R0, @H'F696; refs ram_F696; cycles=6 */
+ }
+ R0 = (uint16_t)(MEM16[0xF106]); /* 3B21; MOV:G.W @H'F106, R0; refs mem_F106; cycles=6 */
+ set_flags_cmp16(R0, MEM16[0xF694]); /* 3B25; CMP:G.W @H'F694, R0; refs ram_F694; cycles=6 */
+ if (!Z) { /* 3B29; BEQ loc_3B33; cycles=3/8 nt/t */
+ MEM8[0xF6F0] |= BIT(2); /* 3B2B; BSET.B #2, @H'F6F0; refs ram_F6F0; cycles=8 */
+ MEM16[0xF694] = (uint16_t)(R0); /* 3B2F; MOV:G.W R0, @H'F694; refs ram_F694; cycles=6 */
+ }
+ R0 = (uint16_t)(MEM16[0xF104]); /* 3B33; MOV:G.W @H'F104, R0; refs mem_F104; cycles=6 */
+ set_flags_cmp16(R0, MEM16[0xF692]); /* 3B37; CMP:G.W @H'F692, R0; refs ram_F692; cycles=6 */
+ if (!Z) { /* 3B3B; BEQ loc_3B45; cycles=3/8 nt/t */
+ MEM8[0xF6F0] |= BIT(1); /* 3B3D; BSET.B #1, @H'F6F0; refs ram_F6F0; cycles=8 */
+ MEM16[0xF692] = (uint16_t)(R0); /* 3B41; MOV:G.W R0, @H'F692; refs ram_F692; cycles=6 */
+ }
+ R0 = (uint16_t)(MEM16[0xF102]); /* 3B45; MOV:G.W @H'F102, R0; refs mem_F102; cycles=6 */
+ set_flags_cmp16(R0, MEM16[0xF690]); /* 3B49; CMP:G.W @H'F690, R0; refs ram_F690; cycles=6 */
+ if (!Z) { /* 3B4D; BEQ loc_3B57; cycles=3/8 nt/t */
+ MEM8[0xF6F0] |= BIT(0); /* 3B4F; BSET.B #0, @H'F6F0; refs ram_F6F0; cycles=8 */
+ MEM16[0xF690] = (uint16_t)(R0); /* 3B53; MOV:G.W R0, @H'F690; refs ram_F690; cycles=6 */
+ }
+ R0 = (uint8_t)(MEM8[0xF101]); /* 3B57; MOV:G.B @H'F101, R0; refs mem_F101; cycles=6 */
+ MEM8[0xF720] &= ~BIT(0); /* 3B5B; BCLR.B #0, @H'F720; refs ram_F720; cycles=8 */
goto loc_3C2D; /* 3B5F; BRA loc_3C2D; cycles=8 */
loc_3B62:
- R0 = (uint8_t)(MEM8[0xF6F0]); /* 3B62; MOV:G.B @H'F6F0, R0; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF6F0]); /* 3B62; MOV:G.B @H'F6F0, R0; refs ram_F6F0; cycles=7 */
R0 &= (uint8_t)(0x3F); /* 3B66; AND.B #H'3F, R0; cycles=3 */
- MEM8[0xF6F0] = (uint8_t)(R0); /* 3B69; MOV:G.B R0, @H'F6F0; cycles=6 */
- MEM8[0xF6F2] = 0; /* 3B6D; CLR.B @H'F6F2; cycles=8 */
- R0 = (uint16_t)(MEM16[0xF10C]); /* 3B71; MOV:G.W @H'F10C, R0; cycles=6 */
- set_flags_cmp16(R0, MEM16[0xF69E]); /* 3B75; CMP:G.W @H'F69E, R0; cycles=6 */
- if (Z) goto loc_3B83; /* 3B79; BEQ loc_3B83; cycles=3/8 nt/t */
- MEM8[0xF6F0] |= BIT(7); /* 3B7B; BSET.B #7, @H'F6F0; cycles=8 */
- MEM16[0xF69E] = (uint16_t)(R0); /* 3B7F; MOV:G.W R0, @H'F69E; cycles=6 */
-loc_3B83:
- R0 = (uint16_t)(MEM16[0xF10A]); /* 3B83; MOV:G.W @H'F10A, R0; cycles=6 */
- set_flags_cmp16(R0, MEM16[0xF69C]); /* 3B87; CMP:G.W @H'F69C, R0; cycles=6 */
- if (Z) goto loc_3B95; /* 3B8B; BEQ loc_3B95; cycles=3/8 nt/t */
- MEM8[0xF6F0] |= BIT(6); /* 3B8D; BSET.B #6, @H'F6F0; cycles=8 */
- MEM16[0xF69C] = (uint16_t)(R0); /* 3B91; MOV:G.W R0, @H'F69C; cycles=6 */
-loc_3B95:
- R0 = (uint8_t)(MEM8[0xF109]); /* 3B95; MOV:G.B @H'F109, R0; cycles=6 */
- set_flags_cmp8(R0, MEM8[0xF6D0]); /* 3B99; CMP:G.B @H'F6D0, R0; cycles=6 */
- if (Z) goto loc_3BA7; /* 3B9D; BEQ loc_3BA7; cycles=3/8 nt/t */
- MEM8[0xF6F2] |= BIT(0); /* 3B9F; BSET.B #0, @H'F6F2; cycles=8 */
- MEM8[0xF6D0] = (uint8_t)(R0); /* 3BA3; MOV:G.B R0, @H'F6D0; cycles=6 */
-loc_3BA7:
- R0 = (uint8_t)(MEM8[0xF108]); /* 3BA7; MOV:G.B @H'F108, R0; cycles=6 */
- set_flags_cmp8(R0, MEM8[0xF6D1]); /* 3BAB; CMP:G.B @H'F6D1, R0; cycles=6 */
- if (Z) goto loc_3BB9; /* 3BAF; BEQ loc_3BB9; cycles=3/8 nt/t */
- MEM8[0xF6F2] |= BIT(1); /* 3BB1; BSET.B #1, @H'F6F2; cycles=8 */
- MEM8[0xF6D1] = (uint8_t)(R0); /* 3BB5; MOV:G.B R0, @H'F6D1; cycles=6 */
-loc_3BB9:
- R0 = (uint8_t)(MEM8[0xF107]); /* 3BB9; MOV:G.B @H'F107, R0; cycles=6 */
- set_flags_cmp8(R0, MEM8[0xF6D2]); /* 3BBD; CMP:G.B @H'F6D2, R0; cycles=6 */
- if (Z) goto loc_3BCB; /* 3BC1; BEQ loc_3BCB; cycles=3/8 nt/t */
- MEM8[0xF6F2] |= BIT(2); /* 3BC3; BSET.B #2, @H'F6F2; cycles=8 */
- MEM8[0xF6D2] = (uint8_t)(R0); /* 3BC7; MOV:G.B R0, @H'F6D2; cycles=6 */
-loc_3BCB:
- R0 = (uint8_t)(MEM8[0xF106]); /* 3BCB; MOV:G.B @H'F106, R0; cycles=6 */
- set_flags_cmp8(R0, MEM8[0xF6D3]); /* 3BCF; CMP:G.B @H'F6D3, R0; cycles=6 */
- if (Z) goto loc_3BDD; /* 3BD3; BEQ loc_3BDD; cycles=3/8 nt/t */
- MEM8[0xF6F2] |= BIT(3); /* 3BD5; BSET.B #3, @H'F6F2; cycles=8 */
- MEM8[0xF6D3] = (uint8_t)(R0); /* 3BD9; MOV:G.B R0, @H'F6D3; cycles=6 */
-loc_3BDD:
- R0 = (uint8_t)(MEM8[0xF105]); /* 3BDD; MOV:G.B @H'F105, R0; cycles=6 */
- set_flags_cmp8(R0, MEM8[0xF6D4]); /* 3BE1; CMP:G.B @H'F6D4, R0; cycles=6 */
- if (Z) goto loc_3BEF; /* 3BE5; BEQ loc_3BEF; cycles=3/8 nt/t */
- MEM8[0xF6F2] |= BIT(4); /* 3BE7; BSET.B #4, @H'F6F2; cycles=8 */
- MEM8[0xF6D4] = (uint8_t)(R0); /* 3BEB; MOV:G.B R0, @H'F6D4; cycles=6 */
-loc_3BEF:
- R0 = (uint8_t)(MEM8[0xF104]); /* 3BEF; MOV:G.B @H'F104, R0; cycles=6 */
- set_flags_cmp8(R0, MEM8[0xF6D5]); /* 3BF3; CMP:G.B @H'F6D5, R0; cycles=6 */
- if (Z) goto loc_3C01; /* 3BF7; BEQ loc_3C01; cycles=3/8 nt/t */
- MEM8[0xF6F2] |= BIT(5); /* 3BF9; BSET.B #5, @H'F6F2; cycles=8 */
- MEM8[0xF6D5] = (uint8_t)(R0); /* 3BFD; MOV:G.B R0, @H'F6D5; cycles=6 */
-loc_3C01:
- R0 = (uint8_t)(MEM8[0xF103]); /* 3C01; MOV:G.B @H'F103, R0; cycles=6 */
- set_flags_cmp8(R0, MEM8[0xF6D6]); /* 3C05; CMP:G.B @H'F6D6, R0; cycles=6 */
- if (Z) goto loc_3C13; /* 3C09; BEQ loc_3C13; cycles=3/8 nt/t */
- MEM8[0xF6F2] |= BIT(6); /* 3C0B; BSET.B #6, @H'F6F2; cycles=8 */
- MEM8[0xF6D6] = (uint8_t)(R0); /* 3C0F; MOV:G.B R0, @H'F6D6; cycles=6 */
-loc_3C13:
- R0 = (uint8_t)(MEM8[0xF102]); /* 3C13; MOV:G.B @H'F102, R0; cycles=6 */
- set_flags_cmp8(R0, MEM8[0xF6D7]); /* 3C17; CMP:G.B @H'F6D7, R0; cycles=6 */
- if (Z) goto loc_3C25; /* 3C1B; BEQ loc_3C25; cycles=3/8 nt/t */
- MEM8[0xF6F2] |= BIT(7); /* 3C1D; BSET.B #7, @H'F6F2; cycles=8 */
- MEM8[0xF6D7] = (uint8_t)(R0); /* 3C21; MOV:G.B R0, @H'F6D7; cycles=6 */
-loc_3C25:
- R0 = (uint8_t)(MEM8[0xF101]); /* 3C25; MOV:G.B @H'F101, R0; cycles=6 */
- MEM8[0xF720] &= ~BIT(1); /* 3C29; BCLR.B #1, @H'F720; cycles=8 */
+ MEM8[0xF6F0] = (uint8_t)(R0); /* 3B69; MOV:G.B R0, @H'F6F0; refs ram_F6F0; cycles=6 */
+ MEM8[0xF6F2] = 0; /* 3B6D; CLR.B @H'F6F2; refs ram_F6F2; cycles=8 */
+ R0 = (uint16_t)(MEM16[0xF10C]); /* 3B71; MOV:G.W @H'F10C, R0; refs mem_F10C; cycles=6 */
+ set_flags_cmp16(R0, MEM16[0xF69E]); /* 3B75; CMP:G.W @H'F69E, R0; refs ram_F69E; cycles=6 */
+ if (!Z) { /* 3B79; BEQ loc_3B83; cycles=3/8 nt/t */
+ MEM8[0xF6F0] |= BIT(7); /* 3B7B; BSET.B #7, @H'F6F0; refs ram_F6F0; cycles=8 */
+ MEM16[0xF69E] = (uint16_t)(R0); /* 3B7F; MOV:G.W R0, @H'F69E; refs ram_F69E; cycles=6 */
+ }
+ R0 = (uint16_t)(MEM16[0xF10A]); /* 3B83; MOV:G.W @H'F10A, R0; refs mem_F10A; cycles=6 */
+ set_flags_cmp16(R0, MEM16[0xF69C]); /* 3B87; CMP:G.W @H'F69C, R0; refs ram_F69C; cycles=6 */
+ if (!Z) { /* 3B8B; BEQ loc_3B95; cycles=3/8 nt/t */
+ MEM8[0xF6F0] |= BIT(6); /* 3B8D; BSET.B #6, @H'F6F0; refs ram_F6F0; cycles=8 */
+ MEM16[0xF69C] = (uint16_t)(R0); /* 3B91; MOV:G.W R0, @H'F69C; refs ram_F69C; cycles=6 */
+ }
+ R0 = (uint8_t)(MEM8[0xF109]); /* 3B95; MOV:G.B @H'F109, R0; refs mem_F109; cycles=6 */
+ set_flags_cmp8(R0, MEM8[0xF6D0]); /* 3B99; CMP:G.B @H'F6D0, R0; refs ram_F6D0; cycles=6 */
+ if (!Z) { /* 3B9D; BEQ loc_3BA7; cycles=3/8 nt/t */
+ MEM8[0xF6F2] |= BIT(0); /* 3B9F; BSET.B #0, @H'F6F2; refs ram_F6F2; cycles=8 */
+ MEM8[0xF6D0] = (uint8_t)(R0); /* 3BA3; MOV:G.B R0, @H'F6D0; refs ram_F6D0; cycles=6 */
+ }
+ R0 = (uint8_t)(MEM8[0xF108]); /* 3BA7; MOV:G.B @H'F108, R0; refs mem_F108; cycles=6 */
+ set_flags_cmp8(R0, MEM8[0xF6D1]); /* 3BAB; CMP:G.B @H'F6D1, R0; refs ram_F6D1; cycles=6 */
+ if (!Z) { /* 3BAF; BEQ loc_3BB9; cycles=3/8 nt/t */
+ MEM8[0xF6F2] |= BIT(1); /* 3BB1; BSET.B #1, @H'F6F2; refs ram_F6F2; cycles=8 */
+ MEM8[0xF6D1] = (uint8_t)(R0); /* 3BB5; MOV:G.B R0, @H'F6D1; refs ram_F6D1; cycles=6 */
+ }
+ R0 = (uint8_t)(MEM8[0xF107]); /* 3BB9; MOV:G.B @H'F107, R0; refs mem_F107; cycles=6 */
+ set_flags_cmp8(R0, MEM8[0xF6D2]); /* 3BBD; CMP:G.B @H'F6D2, R0; refs ram_F6D2; cycles=6 */
+ if (!Z) { /* 3BC1; BEQ loc_3BCB; cycles=3/8 nt/t */
+ MEM8[0xF6F2] |= BIT(2); /* 3BC3; BSET.B #2, @H'F6F2; refs ram_F6F2; cycles=8 */
+ MEM8[0xF6D2] = (uint8_t)(R0); /* 3BC7; MOV:G.B R0, @H'F6D2; refs ram_F6D2; cycles=6 */
+ }
+ R0 = (uint8_t)(MEM8[0xF106]); /* 3BCB; MOV:G.B @H'F106, R0; refs mem_F106; cycles=6 */
+ set_flags_cmp8(R0, MEM8[0xF6D3]); /* 3BCF; CMP:G.B @H'F6D3, R0; refs ram_F6D3; cycles=6 */
+ if (!Z) { /* 3BD3; BEQ loc_3BDD; cycles=3/8 nt/t */
+ MEM8[0xF6F2] |= BIT(3); /* 3BD5; BSET.B #3, @H'F6F2; refs ram_F6F2; cycles=8 */
+ MEM8[0xF6D3] = (uint8_t)(R0); /* 3BD9; MOV:G.B R0, @H'F6D3; refs ram_F6D3; cycles=6 */
+ }
+ R0 = (uint8_t)(MEM8[0xF105]); /* 3BDD; MOV:G.B @H'F105, R0; refs mem_F105; cycles=6 */
+ set_flags_cmp8(R0, MEM8[0xF6D4]); /* 3BE1; CMP:G.B @H'F6D4, R0; refs ram_F6D4; cycles=6 */
+ if (!Z) { /* 3BE5; BEQ loc_3BEF; cycles=3/8 nt/t */
+ MEM8[0xF6F2] |= BIT(4); /* 3BE7; BSET.B #4, @H'F6F2; refs ram_F6F2; cycles=8 */
+ MEM8[0xF6D4] = (uint8_t)(R0); /* 3BEB; MOV:G.B R0, @H'F6D4; refs ram_F6D4; cycles=6 */
+ }
+ R0 = (uint8_t)(MEM8[0xF104]); /* 3BEF; MOV:G.B @H'F104, R0; refs mem_F104; cycles=6 */
+ set_flags_cmp8(R0, MEM8[0xF6D5]); /* 3BF3; CMP:G.B @H'F6D5, R0; refs ram_F6D5; cycles=6 */
+ if (!Z) { /* 3BF7; BEQ loc_3C01; cycles=3/8 nt/t */
+ MEM8[0xF6F2] |= BIT(5); /* 3BF9; BSET.B #5, @H'F6F2; refs ram_F6F2; cycles=8 */
+ MEM8[0xF6D5] = (uint8_t)(R0); /* 3BFD; MOV:G.B R0, @H'F6D5; refs ram_F6D5; cycles=6 */
+ }
+ R0 = (uint8_t)(MEM8[0xF103]); /* 3C01; MOV:G.B @H'F103, R0; refs mem_F103; cycles=6 */
+ set_flags_cmp8(R0, MEM8[0xF6D6]); /* 3C05; CMP:G.B @H'F6D6, R0; refs ram_F6D6; cycles=6 */
+ if (!Z) { /* 3C09; BEQ loc_3C13; cycles=3/8 nt/t */
+ MEM8[0xF6F2] |= BIT(6); /* 3C0B; BSET.B #6, @H'F6F2; refs ram_F6F2; cycles=8 */
+ MEM8[0xF6D6] = (uint8_t)(R0); /* 3C0F; MOV:G.B R0, @H'F6D6; refs ram_F6D6; cycles=6 */
+ }
+ R0 = (uint8_t)(MEM8[0xF102]); /* 3C13; MOV:G.B @H'F102, R0; refs mem_F102; cycles=6 */
+ set_flags_cmp8(R0, MEM8[0xF6D7]); /* 3C17; CMP:G.B @H'F6D7, R0; refs ram_F6D7; cycles=6 */
+ if (!Z) { /* 3C1B; BEQ loc_3C25; cycles=3/8 nt/t */
+ MEM8[0xF6F2] |= BIT(7); /* 3C1D; BSET.B #7, @H'F6F2; refs ram_F6F2; cycles=8 */
+ MEM8[0xF6D7] = (uint8_t)(R0); /* 3C21; MOV:G.B R0, @H'F6D7; refs ram_F6D7; cycles=6 */
+ }
+ R0 = (uint8_t)(MEM8[0xF101]); /* 3C25; MOV:G.B @H'F101, R0; refs mem_F101; cycles=6 */
+ MEM8[0xF720] &= ~BIT(1); /* 3C29; BCLR.B #1, @H'F720; refs ram_F720; cycles=8 */
loc_3C2D:
R0 = (uint16_t)(MEM16[R7++]); /* 3C2D; MOV:G.W @R7+, R0; cycles=6 */
return_from_interrupt(); /* 3C2F; RTE; cycles=14 */
@@ -1499,124 +1787,124 @@ void vec_irq3_3C30(void)
{
/* vector sources: irq3 */
MEM16[--R7] = (uint16_t)(R0); /* 3C30; MOV:G.W R0, @-R7; cycles=6 */
- set_flags_btst(MEM8[0xF000], 1); /* 3C32; BTST.B #1, @H'F000; cycles=7 */
+ set_flags_btst(MEM8[0xF000], 1); /* 3C32; BTST.B #1, @H'F000; refs mem_F000; cycles=7 */
if (!Z) goto loc_3D96; /* 3C36; BNE loc_3D96; cycles=3/7 nt/t */
- R0 = (uint8_t)(MEM8[0xF00F]); /* 3C39; MOV:G.B @H'F00F, R0; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF00F]); /* 3C39; MOV:G.B @H'F00F, R0; refs mem_F00F; cycles=6 */
set_flags_cmp8(R0, 0xA9); /* 3C3D; CMP:E #H'A9, R0; cycles=2 */
if (Z) goto loc_3C49; /* 3C3F; BEQ loc_3C49; cycles=3/8 nt/t */
set_flags_cmp8(R0, 0xA8); /* 3C41; CMP:E #H'A8, R0; cycles=2 */
if (Z) goto loc_3CCB; /* 3C43; BEQ loc_3CCB; cycles=3/8 nt/t */
goto loc_3D96; /* 3C46; BRA loc_3D96; cycles=7 */
loc_3C49:
- R0 = (uint8_t)(MEM8[0xF6F1]); /* 3C49; MOV:G.B @H'F6F1, R0; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF6F1]); /* 3C49; MOV:G.B @H'F6F1, R0; refs ram_F6F1; cycles=6 */
R0 &= (uint8_t)(0xC0); /* 3C4D; AND.B #H'C0, R0; cycles=3 */
- MEM8[0xF6F1] = (uint8_t)(R0); /* 3C50; MOV:G.B R0, @H'F6F1; cycles=7 */
- R0 = (uint16_t)(MEM16[0xF00C]); /* 3C54; MOV:G.W @H'F00C, R0; cycles=7 */
- set_flags_cmp16(R0, MEM16[0xF6AA]); /* 3C58; CMP:G.W @H'F6AA, R0; cycles=7 */
- if (Z) goto loc_3C66; /* 3C5C; BEQ loc_3C66; cycles=3/7 nt/t */
- MEM8[0xF6F1] |= BIT(5); /* 3C5E; BSET.B #5, @H'F6F1; cycles=9 */
- MEM16[0xF6AA] = (uint16_t)(R0); /* 3C62; MOV:G.W R0, @H'F6AA; cycles=7 */
-loc_3C66:
- R0 = (uint16_t)(MEM16[0xF00A]); /* 3C66; MOV:G.W @H'F00A, R0; cycles=7 */
- set_flags_cmp16(R0, MEM16[0xF6A8]); /* 3C6A; CMP:G.W @H'F6A8, R0; cycles=7 */
- if (Z) goto loc_3C78; /* 3C6E; BEQ loc_3C78; cycles=3/7 nt/t */
- MEM8[0xF6F1] |= BIT(4); /* 3C70; BSET.B #4, @H'F6F1; cycles=9 */
- MEM16[0xF6A8] = (uint16_t)(R0); /* 3C74; MOV:G.W R0, @H'F6A8; cycles=7 */
-loc_3C78:
- R0 = (uint16_t)(MEM16[0xF008]); /* 3C78; MOV:G.W @H'F008, R0; cycles=7 */
- set_flags_cmp16(R0, MEM16[0xF6A6]); /* 3C7C; CMP:G.W @H'F6A6, R0; cycles=7 */
- if (Z) goto loc_3C8A; /* 3C80; BEQ loc_3C8A; cycles=3/7 nt/t */
- MEM8[0xF6F1] |= BIT(3); /* 3C82; BSET.B #3, @H'F6F1; cycles=9 */
- MEM16[0xF6A6] = (uint16_t)(R0); /* 3C86; MOV:G.W R0, @H'F6A6; cycles=7 */
-loc_3C8A:
- R0 = (uint16_t)(MEM16[0xF006]); /* 3C8A; MOV:G.W @H'F006, R0; cycles=7 */
- set_flags_cmp16(R0, MEM16[0xF6A4]); /* 3C8E; CMP:G.W @H'F6A4, R0; cycles=7 */
- if (Z) goto loc_3C9C; /* 3C92; BEQ loc_3C9C; cycles=3/7 nt/t */
- MEM8[0xF6F1] |= BIT(2); /* 3C94; BSET.B #2, @H'F6F1; cycles=9 */
- MEM16[0xF6A4] = (uint16_t)(R0); /* 3C98; MOV:G.W R0, @H'F6A4; cycles=7 */
-loc_3C9C:
- R0 = (uint16_t)(MEM16[0xF004]); /* 3C9C; MOV:G.W @H'F004, R0; cycles=7 */
- set_flags_cmp16(R0, MEM16[0xF6A2]); /* 3CA0; CMP:G.W @H'F6A2, R0; cycles=7 */
- if (Z) goto loc_3CAE; /* 3CA4; BEQ loc_3CAE; cycles=3/7 nt/t */
- MEM8[0xF6F1] |= BIT(1); /* 3CA6; BSET.B #1, @H'F6F1; cycles=9 */
- MEM16[0xF6A2] = (uint16_t)(R0); /* 3CAA; MOV:G.W R0, @H'F6A2; cycles=7 */
-loc_3CAE:
- R0 = (uint16_t)(MEM16[0xF002]); /* 3CAE; MOV:G.W @H'F002, R0; cycles=7 */
- set_flags_cmp16(R0, MEM16[0xF6A0]); /* 3CB2; CMP:G.W @H'F6A0, R0; cycles=7 */
- if (Z) goto loc_3CC0; /* 3CB6; BEQ loc_3CC0; cycles=3/7 nt/t */
- MEM8[0xF6F1] |= BIT(0); /* 3CB8; BSET.B #0, @H'F6F1; cycles=9 */
- MEM16[0xF6A0] = (uint16_t)(R0); /* 3CBC; MOV:G.W R0, @H'F6A0; cycles=7 */
-loc_3CC0:
- R0 = (uint8_t)(MEM8[0xF001]); /* 3CC0; MOV:G.B @H'F001, R0; cycles=7 */
- MEM8[0xF721] &= ~BIT(0); /* 3CC4; BCLR.B #0, @H'F721; cycles=9 */
+ MEM8[0xF6F1] = (uint8_t)(R0); /* 3C50; MOV:G.B R0, @H'F6F1; refs ram_F6F1; cycles=7 */
+ R0 = (uint16_t)(MEM16[0xF00C]); /* 3C54; MOV:G.W @H'F00C, R0; refs mem_F00C; cycles=7 */
+ set_flags_cmp16(R0, MEM16[0xF6AA]); /* 3C58; CMP:G.W @H'F6AA, R0; refs ram_F6AA; cycles=7 */
+ if (!Z) { /* 3C5C; BEQ loc_3C66; cycles=3/7 nt/t */
+ MEM8[0xF6F1] |= BIT(5); /* 3C5E; BSET.B #5, @H'F6F1; refs ram_F6F1; cycles=9 */
+ MEM16[0xF6AA] = (uint16_t)(R0); /* 3C62; MOV:G.W R0, @H'F6AA; refs ram_F6AA; cycles=7 */
+ }
+ R0 = (uint16_t)(MEM16[0xF00A]); /* 3C66; MOV:G.W @H'F00A, R0; refs mem_F00A; cycles=7 */
+ set_flags_cmp16(R0, MEM16[0xF6A8]); /* 3C6A; CMP:G.W @H'F6A8, R0; refs ram_F6A8; cycles=7 */
+ if (!Z) { /* 3C6E; BEQ loc_3C78; cycles=3/7 nt/t */
+ MEM8[0xF6F1] |= BIT(4); /* 3C70; BSET.B #4, @H'F6F1; refs ram_F6F1; cycles=9 */
+ MEM16[0xF6A8] = (uint16_t)(R0); /* 3C74; MOV:G.W R0, @H'F6A8; refs ram_F6A8; cycles=7 */
+ }
+ R0 = (uint16_t)(MEM16[0xF008]); /* 3C78; MOV:G.W @H'F008, R0; refs mem_F008; cycles=7 */
+ set_flags_cmp16(R0, MEM16[0xF6A6]); /* 3C7C; CMP:G.W @H'F6A6, R0; refs ram_F6A6; cycles=7 */
+ if (!Z) { /* 3C80; BEQ loc_3C8A; cycles=3/7 nt/t */
+ MEM8[0xF6F1] |= BIT(3); /* 3C82; BSET.B #3, @H'F6F1; refs ram_F6F1; cycles=9 */
+ MEM16[0xF6A6] = (uint16_t)(R0); /* 3C86; MOV:G.W R0, @H'F6A6; refs ram_F6A6; cycles=7 */
+ }
+ R0 = (uint16_t)(MEM16[0xF006]); /* 3C8A; MOV:G.W @H'F006, R0; refs mem_F006; cycles=7 */
+ set_flags_cmp16(R0, MEM16[0xF6A4]); /* 3C8E; CMP:G.W @H'F6A4, R0; refs ram_F6A4; cycles=7 */
+ if (!Z) { /* 3C92; BEQ loc_3C9C; cycles=3/7 nt/t */
+ MEM8[0xF6F1] |= BIT(2); /* 3C94; BSET.B #2, @H'F6F1; refs ram_F6F1; cycles=9 */
+ MEM16[0xF6A4] = (uint16_t)(R0); /* 3C98; MOV:G.W R0, @H'F6A4; refs ram_F6A4; cycles=7 */
+ }
+ R0 = (uint16_t)(MEM16[0xF004]); /* 3C9C; MOV:G.W @H'F004, R0; refs mem_F004; cycles=7 */
+ set_flags_cmp16(R0, MEM16[0xF6A2]); /* 3CA0; CMP:G.W @H'F6A2, R0; refs ram_F6A2; cycles=7 */
+ if (!Z) { /* 3CA4; BEQ loc_3CAE; cycles=3/7 nt/t */
+ MEM8[0xF6F1] |= BIT(1); /* 3CA6; BSET.B #1, @H'F6F1; refs ram_F6F1; cycles=9 */
+ MEM16[0xF6A2] = (uint16_t)(R0); /* 3CAA; MOV:G.W R0, @H'F6A2; refs ram_F6A2; cycles=7 */
+ }
+ R0 = (uint16_t)(MEM16[0xF002]); /* 3CAE; MOV:G.W @H'F002, R0; refs mem_F002; cycles=7 */
+ set_flags_cmp16(R0, MEM16[0xF6A0]); /* 3CB2; CMP:G.W @H'F6A0, R0; refs ram_F6A0; cycles=7 */
+ if (!Z) { /* 3CB6; BEQ loc_3CC0; cycles=3/7 nt/t */
+ MEM8[0xF6F1] |= BIT(0); /* 3CB8; BSET.B #0, @H'F6F1; refs ram_F6F1; cycles=9 */
+ MEM16[0xF6A0] = (uint16_t)(R0); /* 3CBC; MOV:G.W R0, @H'F6A0; refs ram_F6A0; cycles=7 */
+ }
+ R0 = (uint8_t)(MEM8[0xF001]); /* 3CC0; MOV:G.B @H'F001, R0; refs mem_F001; cycles=7 */
+ MEM8[0xF721] &= ~BIT(0); /* 3CC4; BCLR.B #0, @H'F721; refs ram_F721; cycles=9 */
goto loc_3D96; /* 3CC8; BRA loc_3D96; cycles=7 */
loc_3CCB:
- R0 = (uint8_t)(MEM8[0xF6F1]); /* 3CCB; MOV:G.B @H'F6F1, R0; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF6F1]); /* 3CCB; MOV:G.B @H'F6F1, R0; refs ram_F6F1; cycles=6 */
R0 &= (uint8_t)(0x3F); /* 3CCF; AND.B #H'3F, R0; cycles=3 */
- MEM8[0xF6F1] = (uint8_t)(R0); /* 3CD2; MOV:G.B R0, @H'F6F1; cycles=7 */
- MEM8[0xF6F3] = 0; /* 3CD6; CLR.B @H'F6F3; cycles=9 */
- R0 = (uint16_t)(MEM16[0xF00C]); /* 3CDA; MOV:G.W @H'F00C, R0; cycles=7 */
- set_flags_cmp16(R0, MEM16[0xF6AE]); /* 3CDE; CMP:G.W @H'F6AE, R0; cycles=7 */
- if (Z) goto loc_3CEC; /* 3CE2; BEQ loc_3CEC; cycles=3/7 nt/t */
- MEM8[0xF6F1] |= BIT(7); /* 3CE4; BSET.B #7, @H'F6F1; cycles=9 */
- MEM16[0xF6AE] = (uint16_t)(R0); /* 3CE8; MOV:G.W R0, @H'F6AE; cycles=7 */
-loc_3CEC:
- R0 = (uint16_t)(MEM16[0xF00A]); /* 3CEC; MOV:G.W @H'F00A, R0; cycles=7 */
- set_flags_cmp16(R0, MEM16[0xF6AC]); /* 3CF0; CMP:G.W @H'F6AC, R0; cycles=7 */
- if (Z) goto loc_3CFE; /* 3CF4; BEQ loc_3CFE; cycles=3/7 nt/t */
- MEM8[0xF6F1] |= BIT(6); /* 3CF6; BSET.B #6, @H'F6F1; cycles=9 */
- MEM16[0xF6AC] = (uint16_t)(R0); /* 3CFA; MOV:G.W R0, @H'F6AC; cycles=7 */
-loc_3CFE:
- R0 = (uint8_t)(MEM8[0xF009]); /* 3CFE; MOV:G.B @H'F009, R0; cycles=7 */
- set_flags_cmp8(R0, MEM8[0xF6D8]); /* 3D02; CMP:G.B @H'F6D8, R0; cycles=7 */
- if (Z) goto loc_3D10; /* 3D06; BEQ loc_3D10; cycles=3/7 nt/t */
- MEM8[0xF6F3] |= BIT(0); /* 3D08; BSET.B #0, @H'F6F3; cycles=9 */
- MEM8[0xF6D8] = (uint8_t)(R0); /* 3D0C; MOV:G.B R0, @H'F6D8; cycles=7 */
-loc_3D10:
- R0 = (uint8_t)(MEM8[0xF008]); /* 3D10; MOV:G.B @H'F008, R0; cycles=7 */
- set_flags_cmp8(R0, MEM8[0xF6D9]); /* 3D14; CMP:G.B @H'F6D9, R0; cycles=7 */
- if (Z) goto loc_3D22; /* 3D18; BEQ loc_3D22; cycles=3/7 nt/t */
- MEM8[0xF6F3] |= BIT(1); /* 3D1A; BSET.B #1, @H'F6F3; cycles=9 */
- MEM8[0xF6D9] = (uint8_t)(R0); /* 3D1E; MOV:G.B R0, @H'F6D9; cycles=7 */
-loc_3D22:
- R0 = (uint8_t)(MEM8[0xF007]); /* 3D22; MOV:G.B @H'F007, R0; cycles=7 */
- set_flags_cmp8(R0, MEM8[0xF6DA]); /* 3D26; CMP:G.B @H'F6DA, R0; cycles=7 */
- if (Z) goto loc_3D34; /* 3D2A; BEQ loc_3D34; cycles=3/7 nt/t */
- MEM8[0xF6F3] |= BIT(2); /* 3D2C; BSET.B #2, @H'F6F3; cycles=9 */
- MEM8[0xF6DA] = (uint8_t)(R0); /* 3D30; MOV:G.B R0, @H'F6DA; cycles=7 */
-loc_3D34:
- R0 = (uint8_t)(MEM8[0xF006]); /* 3D34; MOV:G.B @H'F006, R0; cycles=7 */
- set_flags_cmp8(R0, MEM8[0xF6DB]); /* 3D38; CMP:G.B @H'F6DB, R0; cycles=7 */
- if (Z) goto loc_3D46; /* 3D3C; BEQ loc_3D46; cycles=3/7 nt/t */
- MEM8[0xF6F3] |= BIT(3); /* 3D3E; BSET.B #3, @H'F6F3; cycles=9 */
- MEM8[0xF6DB] = (uint8_t)(R0); /* 3D42; MOV:G.B R0, @H'F6DB; cycles=7 */
-loc_3D46:
- R0 = (uint8_t)(MEM8[0xF005]); /* 3D46; MOV:G.B @H'F005, R0; cycles=7 */
- set_flags_cmp8(R0, MEM8[0xF6DC]); /* 3D4A; CMP:G.B @H'F6DC, R0; cycles=7 */
- if (Z) goto loc_3D58; /* 3D4E; BEQ loc_3D58; cycles=3/7 nt/t */
- MEM8[0xF6F3] |= BIT(4); /* 3D50; BSET.B #4, @H'F6F3; cycles=9 */
- MEM8[0xF6DC] = (uint8_t)(R0); /* 3D54; MOV:G.B R0, @H'F6DC; cycles=7 */
-loc_3D58:
- R0 = (uint8_t)(MEM8[0xF004]); /* 3D58; MOV:G.B @H'F004, R0; cycles=7 */
- set_flags_cmp8(R0, MEM8[0xF6DD]); /* 3D5C; CMP:G.B @H'F6DD, R0; cycles=7 */
- if (Z) goto loc_3D6A; /* 3D60; BEQ loc_3D6A; cycles=3/7 nt/t */
- MEM8[0xF6F3] |= BIT(5); /* 3D62; BSET.B #5, @H'F6F3; cycles=9 */
- MEM8[0xF6DD] = (uint8_t)(R0); /* 3D66; MOV:G.B R0, @H'F6DD; cycles=7 */
-loc_3D6A:
- R0 = (uint8_t)(MEM8[0xF003]); /* 3D6A; MOV:G.B @H'F003, R0; cycles=7 */
- set_flags_cmp8(R0, MEM8[0xF6DE]); /* 3D6E; CMP:G.B @H'F6DE, R0; cycles=7 */
- if (Z) goto loc_3D7C; /* 3D72; BEQ loc_3D7C; cycles=3/7 nt/t */
- MEM8[0xF6F3] |= BIT(6); /* 3D74; BSET.B #6, @H'F6F3; cycles=9 */
- MEM8[0xF6DE] = (uint8_t)(R0); /* 3D78; MOV:G.B R0, @H'F6DE; cycles=7 */
-loc_3D7C:
- R0 = (uint8_t)(MEM8[0xF002]); /* 3D7C; MOV:G.B @H'F002, R0; cycles=7 */
- set_flags_cmp8(R0, MEM8[0xF6DF]); /* 3D80; CMP:G.B @H'F6DF, R0; cycles=7 */
- if (Z) goto loc_3D8E; /* 3D84; BEQ loc_3D8E; cycles=3/7 nt/t */
- MEM8[0xF6F3] |= BIT(7); /* 3D86; BSET.B #7, @H'F6F3; cycles=9 */
- MEM8[0xF6DF] = (uint8_t)(R0); /* 3D8A; MOV:G.B R0, @H'F6DF; cycles=7 */
-loc_3D8E:
- R0 = (uint8_t)(MEM8[0xF001]); /* 3D8E; MOV:G.B @H'F001, R0; cycles=7 */
- MEM8[0xF721] &= ~BIT(1); /* 3D92; BCLR.B #1, @H'F721; cycles=9 */
+ MEM8[0xF6F1] = (uint8_t)(R0); /* 3CD2; MOV:G.B R0, @H'F6F1; refs ram_F6F1; cycles=7 */
+ MEM8[0xF6F3] = 0; /* 3CD6; CLR.B @H'F6F3; refs ram_F6F3; cycles=9 */
+ R0 = (uint16_t)(MEM16[0xF00C]); /* 3CDA; MOV:G.W @H'F00C, R0; refs mem_F00C; cycles=7 */
+ set_flags_cmp16(R0, MEM16[0xF6AE]); /* 3CDE; CMP:G.W @H'F6AE, R0; refs ram_F6AE; cycles=7 */
+ if (!Z) { /* 3CE2; BEQ loc_3CEC; cycles=3/7 nt/t */
+ MEM8[0xF6F1] |= BIT(7); /* 3CE4; BSET.B #7, @H'F6F1; refs ram_F6F1; cycles=9 */
+ MEM16[0xF6AE] = (uint16_t)(R0); /* 3CE8; MOV:G.W R0, @H'F6AE; refs ram_F6AE; cycles=7 */
+ }
+ R0 = (uint16_t)(MEM16[0xF00A]); /* 3CEC; MOV:G.W @H'F00A, R0; refs mem_F00A; cycles=7 */
+ set_flags_cmp16(R0, MEM16[0xF6AC]); /* 3CF0; CMP:G.W @H'F6AC, R0; refs ram_F6AC; cycles=7 */
+ if (!Z) { /* 3CF4; BEQ loc_3CFE; cycles=3/7 nt/t */
+ MEM8[0xF6F1] |= BIT(6); /* 3CF6; BSET.B #6, @H'F6F1; refs ram_F6F1; cycles=9 */
+ MEM16[0xF6AC] = (uint16_t)(R0); /* 3CFA; MOV:G.W R0, @H'F6AC; refs ram_F6AC; cycles=7 */
+ }
+ R0 = (uint8_t)(MEM8[0xF009]); /* 3CFE; MOV:G.B @H'F009, R0; refs mem_F009; cycles=7 */
+ set_flags_cmp8(R0, MEM8[0xF6D8]); /* 3D02; CMP:G.B @H'F6D8, R0; refs ram_F6D8; cycles=7 */
+ if (!Z) { /* 3D06; BEQ loc_3D10; cycles=3/7 nt/t */
+ MEM8[0xF6F3] |= BIT(0); /* 3D08; BSET.B #0, @H'F6F3; refs ram_F6F3; cycles=9 */
+ MEM8[0xF6D8] = (uint8_t)(R0); /* 3D0C; MOV:G.B R0, @H'F6D8; refs ram_F6D8; cycles=7 */
+ }
+ R0 = (uint8_t)(MEM8[0xF008]); /* 3D10; MOV:G.B @H'F008, R0; refs mem_F008; cycles=7 */
+ set_flags_cmp8(R0, MEM8[0xF6D9]); /* 3D14; CMP:G.B @H'F6D9, R0; refs ram_F6D9; cycles=7 */
+ if (!Z) { /* 3D18; BEQ loc_3D22; cycles=3/7 nt/t */
+ MEM8[0xF6F3] |= BIT(1); /* 3D1A; BSET.B #1, @H'F6F3; refs ram_F6F3; cycles=9 */
+ MEM8[0xF6D9] = (uint8_t)(R0); /* 3D1E; MOV:G.B R0, @H'F6D9; refs ram_F6D9; cycles=7 */
+ }
+ R0 = (uint8_t)(MEM8[0xF007]); /* 3D22; MOV:G.B @H'F007, R0; refs mem_F007; cycles=7 */
+ set_flags_cmp8(R0, MEM8[0xF6DA]); /* 3D26; CMP:G.B @H'F6DA, R0; refs ram_F6DA; cycles=7 */
+ if (!Z) { /* 3D2A; BEQ loc_3D34; cycles=3/7 nt/t */
+ MEM8[0xF6F3] |= BIT(2); /* 3D2C; BSET.B #2, @H'F6F3; refs ram_F6F3; cycles=9 */
+ MEM8[0xF6DA] = (uint8_t)(R0); /* 3D30; MOV:G.B R0, @H'F6DA; refs ram_F6DA; cycles=7 */
+ }
+ R0 = (uint8_t)(MEM8[0xF006]); /* 3D34; MOV:G.B @H'F006, R0; refs mem_F006; cycles=7 */
+ set_flags_cmp8(R0, MEM8[0xF6DB]); /* 3D38; CMP:G.B @H'F6DB, R0; refs ram_F6DB; cycles=7 */
+ if (!Z) { /* 3D3C; BEQ loc_3D46; cycles=3/7 nt/t */
+ MEM8[0xF6F3] |= BIT(3); /* 3D3E; BSET.B #3, @H'F6F3; refs ram_F6F3; cycles=9 */
+ MEM8[0xF6DB] = (uint8_t)(R0); /* 3D42; MOV:G.B R0, @H'F6DB; refs ram_F6DB; cycles=7 */
+ }
+ R0 = (uint8_t)(MEM8[0xF005]); /* 3D46; MOV:G.B @H'F005, R0; refs mem_F005; cycles=7 */
+ set_flags_cmp8(R0, MEM8[0xF6DC]); /* 3D4A; CMP:G.B @H'F6DC, R0; refs ram_F6DC; cycles=7 */
+ if (!Z) { /* 3D4E; BEQ loc_3D58; cycles=3/7 nt/t */
+ MEM8[0xF6F3] |= BIT(4); /* 3D50; BSET.B #4, @H'F6F3; refs ram_F6F3; cycles=9 */
+ MEM8[0xF6DC] = (uint8_t)(R0); /* 3D54; MOV:G.B R0, @H'F6DC; refs ram_F6DC; cycles=7 */
+ }
+ R0 = (uint8_t)(MEM8[0xF004]); /* 3D58; MOV:G.B @H'F004, R0; refs mem_F004; cycles=7 */
+ set_flags_cmp8(R0, MEM8[0xF6DD]); /* 3D5C; CMP:G.B @H'F6DD, R0; refs ram_F6DD; cycles=7 */
+ if (!Z) { /* 3D60; BEQ loc_3D6A; cycles=3/7 nt/t */
+ MEM8[0xF6F3] |= BIT(5); /* 3D62; BSET.B #5, @H'F6F3; refs ram_F6F3; cycles=9 */
+ MEM8[0xF6DD] = (uint8_t)(R0); /* 3D66; MOV:G.B R0, @H'F6DD; refs ram_F6DD; cycles=7 */
+ }
+ R0 = (uint8_t)(MEM8[0xF003]); /* 3D6A; MOV:G.B @H'F003, R0; refs mem_F003; cycles=7 */
+ set_flags_cmp8(R0, MEM8[0xF6DE]); /* 3D6E; CMP:G.B @H'F6DE, R0; refs ram_F6DE; cycles=7 */
+ if (!Z) { /* 3D72; BEQ loc_3D7C; cycles=3/7 nt/t */
+ MEM8[0xF6F3] |= BIT(6); /* 3D74; BSET.B #6, @H'F6F3; refs ram_F6F3; cycles=9 */
+ MEM8[0xF6DE] = (uint8_t)(R0); /* 3D78; MOV:G.B R0, @H'F6DE; refs ram_F6DE; cycles=7 */
+ }
+ R0 = (uint8_t)(MEM8[0xF002]); /* 3D7C; MOV:G.B @H'F002, R0; refs mem_F002; cycles=7 */
+ set_flags_cmp8(R0, MEM8[0xF6DF]); /* 3D80; CMP:G.B @H'F6DF, R0; refs ram_F6DF; cycles=7 */
+ if (!Z) { /* 3D84; BEQ loc_3D8E; cycles=3/7 nt/t */
+ MEM8[0xF6F3] |= BIT(7); /* 3D86; BSET.B #7, @H'F6F3; refs ram_F6F3; cycles=9 */
+ MEM8[0xF6DF] = (uint8_t)(R0); /* 3D8A; MOV:G.B R0, @H'F6DF; refs ram_F6DF; cycles=7 */
+ }
+ R0 = (uint8_t)(MEM8[0xF001]); /* 3D8E; MOV:G.B @H'F001, R0; refs mem_F001; cycles=7 */
+ MEM8[0xF721] &= ~BIT(1); /* 3D92; BCLR.B #1, @H'F721; refs ram_F721; cycles=9 */
loc_3D96:
R0 = (uint16_t)(MEM16[R7++]); /* 3D96; MOV:G.W @R7+, R0; cycles=5 */
return_from_interrupt(); /* 3D98; RTE; cycles=13 */
@@ -1625,76 +1913,76 @@ loc_3D96:
void vec_ad_adi_3D99(void)
{
/* vector sources: ad_adi */
- ADCSR &= ~BIT(5); /* 3D99; BCLR.B #5, @ADCSR; clear ADST (bit 5) of ADCSR; cycles=8 */
+ ADCSR &= ~BIT(5); /* 3D99; BCLR.B #5, @ADCSR; clear ADST (bit 5) of ADCSR; refs ADCSR; cycles=8 */
push_registers(R0, R1, R2, R3, R4, R5); /* 3D9D; STM.W {R0,R1,R2,R3,R4,R5}, @-SP; cycles=24 */
- R0 = (uint8_t)(MEM8[0xF68A]); /* 3D9F; MOV:G.B @H'F68A, R0; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF68A]); /* 3D9F; MOV:G.B @H'F68A, R0; refs ram_F68A; cycles=6 */
R0 = mulxu8(R0, 0x14); /* 3DA3; MULXU.B #H'14, R0; cycles=19 */
- R1 = (uint16_t)(ADDRA_H); /* 3DA6; MOV:G.W @ADDRA_H, R1; ADDRA W read high TEMP access; cycles=7 */
+ R1 = (uint16_t)(ADDRA_H); /* 3DA6; MOV:G.W @ADDRA_H, R1; refs ADDRA_H; ADDRA W read high TEMP access; cycles=7 */
R1 = swap_bytes(R1); /* 3DAA; SWAP.B R1; cycles=3 */
R1 = zero_extend8(R1); /* 3DAC; EXTU.B R1; cycles=3 */
R1 = (uint8_t)(MEM8[R1 - 0x304A]); /* 3DAE; MOV:G.B @(-H'304A,R1), R1; cycles=7 */
R0 += (uint16_t)(R1); /* 3DB2; ADD:G.W R1, R0; cycles=3 */
R0 = divxu8(R0, 0x15); /* 3DB4; DIVXU.B #H'15, R0; cycles=23 */
- set_flags_cmp8(R0, MEM8[0xF68A]); /* 3DB7; CMP:G.B @H'F68A, R0; cycles=6 */
+ set_flags_cmp8(R0, MEM8[0xF68A]); /* 3DB7; CMP:G.B @H'F68A, R0; refs ram_F68A; cycles=6 */
if (Z) goto loc_3E08; /* 3DBB; BEQ loc_3E08; cycles=3/8 nt/t */
- R2 = (uint8_t)(MEM8[0xF68A]); /* 3DBD; MOV:G.B @H'F68A, R2; cycles=6 */
- MEM8[0xF68A] = (uint8_t)(R0); /* 3DC1; MOV:G.B R0, @H'F68A; cycles=6 */
- set_flags_cmp8(MEM8[0xF731], 0x03); /* 3DC5; CMP:G.B #H'03, @H'F731; cycles=6 */
+ R2 = (uint8_t)(MEM8[0xF68A]); /* 3DBD; MOV:G.B @H'F68A, R2; refs ram_F68A; cycles=6 */
+ MEM8[0xF68A] = (uint8_t)(R0); /* 3DC1; MOV:G.B R0, @H'F68A; refs ram_F68A; cycles=6 */
+ set_flags_cmp8(MEM8[0xF731], 0x03); /* 3DC5; CMP:G.B #H'03, @H'F731; refs ram_F731; cycles=6 */
if (!C && !Z) goto loc_3E08; /* 3DCA; BHI loc_3E08; cycles=3/7 nt/t */
R0 = zero_extend8(R0); /* 3DCC; EXTU.B R0; cycles=3 */
R2 = zero_extend8(R2); /* 3DCE; EXTU.B R2; cycles=3 */
R0 = mulxu16(R0, 0x0101); /* 3DD0; MULXU.W #H'0101, R0; cycles=25 */
R2 = mulxu16(R2, 0x0101); /* 3DD4; MULXU.W #H'0101, R2; cycles=25 */
R1 -= (uint16_t)(R3); /* 3DD8; SUB.W R3, R1; cycles=3 */
- R0 = (uint16_t)(MEM16[0xE102]); /* 3DDA; MOV:G.W @H'E102, R0; cycles=7 */
+ R0 = (uint16_t)(MEM16[0xE102]); /* 3DDA; MOV:G.W @H'E102, R0; refs mem_E102; cycles=7 */
R1 += (uint16_t)(R0); /* 3DDE; ADD:G.W R0, R1; cycles=3 */
R2 = (uint16_t)(R1); /* 3DE0; MOV:G.W R1, R2; cycles=3 */
if (C) goto loc_3DF0; /* 3DE2; BCS loc_3DF0; cycles=3/7 nt/t */
R2 -= (uint16_t)(R0); /* 3DE4; SUB.W R0, R2; cycles=3 */
set_flags_cmp16(R2, 0x8000); /* 3DE6; CMP:I #H'8000, R2; cycles=3 */
if (C || Z) goto loc_3DFA; /* 3DE9; BLS loc_3DFA; cycles=3/8 nt/t */
- R1 = (uint16_t)(0x0000); /* 3DEB; MOV:I.W #H'0000, R1; cycles=3 */
+ R1 = (uint16_t)(0x0000); /* 3DEB; MOV:I.W #H'0000, R1; dataflow R1=0x0000; cycles=3 */
goto loc_3DFA; /* 3DEE; BRA loc_3DFA; cycles=7 */
loc_3DF0:
R0 -= (uint16_t)(R2); /* 3DF0; SUB.W R2, R0; cycles=3 */
set_flags_cmp16(R0, 0x8000); /* 3DF2; CMP:I #H'8000, R0; cycles=3 */
if (C || Z) goto loc_3DFA; /* 3DF5; BLS loc_3DFA; cycles=3/8 nt/t */
- R1 = (uint16_t)(0xFFFF); /* 3DF7; MOV:I.W #H'FFFF, R1; cycles=3 */
+ R1 = (uint16_t)(0xFFFF); /* 3DF7; MOV:I.W #H'FFFF, R1; dataflow R1=0xFFFF; cycles=3 */
loc_3DFA:
- set_flags_cmp16(R1, MEM16[0xE102]); /* 3DFA; CMP:G.W @H'E102, R1; cycles=7 */
+ set_flags_cmp16(R1, MEM16[0xE102]); /* 3DFA; CMP:G.W @H'E102, R1; refs mem_E102; cycles=7 */
if (Z) goto loc_3E08; /* 3DFE; BEQ loc_3E08; cycles=3/7 nt/t */
- MEM16[0xF68E] = (uint16_t)(R1); /* 3E00; MOV:G.W R1, @H'F68E; cycles=7 */
- MEM8[0xF689] |= BIT(7); /* 3E04; BSET.B #7, @H'F689; cycles=9 */
+ MEM16[0xF68E] = (uint16_t)(R1); /* 3E00; MOV:G.W R1, @H'F68E; refs ram_F68E; cycles=7 */
+ MEM8[0xF689] |= BIT(7); /* 3E04; BSET.B #7, @H'F689; refs ram_F689; cycles=9 */
loc_3E08:
- R0 = (uint8_t)(MEM8[0xF68B]); /* 3E08; MOV:G.B @H'F68B, R0; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF68B]); /* 3E08; MOV:G.B @H'F68B, R0; refs ram_F68B; cycles=7 */
R0 = mulxu8(R0, 0x14); /* 3E0C; MULXU.B #H'14, R0; cycles=19 */
- R1 = (uint16_t)(ADDRB_H); /* 3E0F; MOV:G.W @ADDRB_H, R1; ADDRB W read high TEMP access; cycles=6 */
+ R1 = (uint16_t)(ADDRB_H); /* 3E0F; MOV:G.W @ADDRB_H, R1; refs ADDRB_H; ADDRB W read high TEMP access; cycles=6 */
R1 = swap_bytes(R1); /* 3E13; SWAP.B R1; cycles=3 */
R1 = zero_extend8(R1); /* 3E15; EXTU.B R1; cycles=3 */
R0 += (uint16_t)(R1); /* 3E17; ADD:G.W R1, R0; cycles=3 */
R0 = divxu8(R0, 0x15); /* 3E19; DIVXU.B #H'15, R0; cycles=23 */
- set_flags_tst16(MEM16[0xF68C]); /* 3E1C; TST.W @H'F68C; cycles=7 */
+ set_flags_tst16(MEM16[0xF68C]); /* 3E1C; TST.W @H'F68C; refs ram_F68C; cycles=7 */
if (Z) goto loc_3E28; /* 3E20; BEQ loc_3E28; cycles=3/7 nt/t */
- set_flags_cmp8(R0, MEM8[0xF68B]); /* 3E22; CMP:G.B @H'F68B, R0; cycles=7 */
+ set_flags_cmp8(R0, MEM8[0xF68B]); /* 3E22; CMP:G.B @H'F68B, R0; refs ram_F68B; cycles=7 */
if (Z) goto loc_3E4D; /* 3E26; BEQ loc_3E4D; cycles=3/7 nt/t */
loc_3E28:
- MEM8[0xF68B] = (uint8_t)(R0); /* 3E28; MOV:G.B R0, @H'F68B; cycles=7 */
+ MEM8[0xF68B] = (uint8_t)(R0); /* 3E28; MOV:G.B R0, @H'F68B; refs ram_F68B; cycles=7 */
R0 = zero_extend8(R0); /* 3E2C; EXTU.B R0; cycles=3 */
R3 = (uint16_t)(R0); /* 3E2E; MOV:G.W R0, R3; cycles=3 */
R3 = mulxu8(R3, R3); /* 3E30; MULXU.B R3, R3; cycles=18 */
- R2 = 0; /* 3E32; CLR.W R2; cycles=3 */
+ R2 = 0; /* 3E32; CLR.W R2; dataflow R2=0x0000; cycles=3 */
R2 = divxu16(R2, 0x00C8); /* 3E34; DIVXU.W #H'00C8, R2; cycles=29 */
R0 = mulxu8(R0, 0x04); /* 3E38; MULXU.B #H'04, R0; cycles=19 */
R0 += (uint16_t)(0x00AB); /* 3E3B; ADD:G.W #H'00AB, R0; cycles=4 */
R0 += (uint16_t)(R3); /* 3E3F; ADD:G.W R3, R0; cycles=3 */
- set_flags_btst(P7DR, 4); /* 3E41; BTST.B #4, @P7DR; cycles=6 */
- if (!Z) goto loc_3E49; /* 3E45; BNE loc_3E49; cycles=3/8 nt/t */
- R0 >>= 1; /* 3E47; SHLR.W R0; cycles=3 */
-loc_3E49:
- MEM16[0xF68C] = (uint16_t)(R0); /* 3E49; MOV:G.W R0, @H'F68C; cycles=6 */
+ set_flags_btst(P7DR, 4); /* 3E41; BTST.B #4, @P7DR; refs P7DR; cycles=6 */
+ if (Z) { /* 3E45; BNE loc_3E49; cycles=3/8 nt/t */
+ R0 >>= 1; /* 3E47; SHLR.W R0; cycles=3 */
+ }
+ MEM16[0xF68C] = (uint16_t)(R0); /* 3E49; MOV:G.W R0, @H'F68C; refs ram_F68C; cycles=6 */
loc_3E4D:
pop_registers(R0, R1, R2, R3, R4, R5); /* 3E4D; LDM.W @SP+, {R0,R1,R2,R3,R4,R5}; cycles=30 */
- ADCSR &= ~BIT(7); /* 3E4F; BCLR.B #7, @ADCSR; clear ADF (bit 7) of ADCSR; cycles=8 */
+ ADCSR &= ~BIT(7); /* 3E4F; BCLR.B #7, @ADCSR; clear ADF (bit 7) of ADCSR; refs ADCSR; cycles=8 */
return_from_interrupt(); /* 3E53; RTE; cycles=14 */
}
@@ -1702,10 +1990,10 @@ void loc_3E54(void)
{
set_flags_btst(R2, 7); /* 3E54; BTST.B #7, R2; cycles=2 */
if (Z) goto loc_3E9A; /* 3E56; BEQ loc_3E9A; cycles=3/7 nt/t */
- R0 = (uint8_t)(MEM8[0xF9B5]); /* 3E58; MOV:G.B @H'F9B5, R0; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF9B5]); /* 3E58; MOV:G.B @H'F9B5, R0; refs ram_F9B5; cycles=7 */
R0 = zero_extend8(R0); /* 3E5C; EXTU.B R0; cycles=3 */
R0 <<= 1; /* 3E5E; SHLL.W R0; cycles=3 */
- R1 = (uint8_t)(MEM8[0xF9B0]); /* 3E60; MOV:G.B @H'F9B0, R1; cycles=7 */
+ R1 = (uint8_t)(MEM8[0xF9B0]); /* 3E60; MOV:G.B @H'F9B0, R1; refs ram_F9B0; cycles=7 */
R1 = zero_extend8(R1); /* 3E64; EXTU.B R1; cycles=3 */
R1 <<= 1; /* 3E66; SHLL.W R1; cycles=3 */
loc_3E68:
@@ -1717,13 +2005,13 @@ loc_3E68:
goto loc_3E68; /* 3E74; BRA loc_3E68; cycles=7 */
loc_3E76:
MEM16[R1 - 0x0790] = (uint16_t)(R3); /* 3E76; MOV:G.W R3, @(-H'0790,R1); cycles=7 */
- MEM8[0xF9B0] += (uint8_t)(1); /* 3E7A; ADD:Q.B #1, @H'F9B0; cycles=9 */
- MEM8[0xF9B0] &= ~BIT(7); /* 3E7E; BCLR.B #7, @H'F9B0; cycles=9 */
+ MEM8[0xF9B0] += (uint8_t)(1); /* 3E7A; ADD:Q.B #1, @H'F9B0; refs ram_F9B0; cycles=9 */
+ MEM8[0xF9B0] &= ~BIT(7); /* 3E7E; BCLR.B #7, @H'F9B0; refs ram_F9B0; cycles=9 */
loc_3E82:
- R0 = (uint8_t)(MEM8[0xF9B0]); /* 3E82; MOV:G.B @H'F9B0, R0; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF9B0]); /* 3E82; MOV:G.B @H'F9B0, R0; refs ram_F9B0; cycles=7 */
R0 += (uint8_t)(1); /* 3E86; ADD:Q.B #1, R0; cycles=4 */
R0 &= (uint8_t)(0x7F); /* 3E88; AND.B #H'7F, R0; cycles=3 */
- set_flags_cmp8(R0, MEM8[0xF9B5]); /* 3E8B; CMP:G.B @H'F9B5, R0; cycles=6 */
+ set_flags_cmp8(R0, MEM8[0xF9B5]); /* 3E8B; CMP:G.B @H'F9B5, R0; refs ram_F9B5; cycles=6 */
if (!Z) goto loc_3E9A; /* 3E8F; BNE loc_3E9A; cycles=3/8 nt/t */
push_registers(R2, R3); /* 3E91; STM.W {R2,R3}, @-SP; cycles=12 */
loc_3FD3(); /* 3E93; BSR loc_3FD3; cycles=14 */
@@ -1732,10 +2020,10 @@ loc_3E82:
loc_3E9A:
set_flags_btst(R2, 6); /* 3E9A; BTST.B #6, R2; cycles=2 */
if (Z) goto loc_3ECB; /* 3E9C; BEQ loc_3ECB; cycles=3/7 nt/t */
- R0 = (uint8_t)(MEM8[0xF9B9]); /* 3E9E; MOV:G.B @H'F9B9, R0; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF9B9]); /* 3E9E; MOV:G.B @H'F9B9, R0; refs ram_F9B9; cycles=7 */
R0 = zero_extend8(R0); /* 3EA2; EXTU.B R0; cycles=3 */
R0 <<= 1; /* 3EA4; SHLL.W R0; cycles=3 */
- R1 = (uint8_t)(MEM8[0xF9B4]); /* 3EA6; MOV:G.B @H'F9B4, R1; cycles=7 */
+ R1 = (uint8_t)(MEM8[0xF9B4]); /* 3EA6; MOV:G.B @H'F9B4, R1; refs ram_F9B4; cycles=7 */
R1 = zero_extend8(R1); /* 3EAA; EXTU.B R1; cycles=3 */
R1 <<= 1; /* 3EAC; SHLL.W R1; cycles=3 */
loc_3EAE:
@@ -1748,8 +2036,8 @@ loc_3EAE:
goto loc_3EAE; /* 3EBD; BRA loc_3EAE; cycles=8 */
loc_3EBF:
MEM16[R1 - 0x0690] = (uint16_t)(R3); /* 3EBF; MOV:G.W R3, @(-H'0690,R1); cycles=6 */
- MEM8[0xF9B4] += (uint8_t)(1); /* 3EC3; ADD:Q.B #1, @H'F9B4; cycles=8 */
- MEM8[0xF9B4] &= ~BIT(5); /* 3EC7; BCLR.B #5, @H'F9B4; cycles=8 */
+ MEM8[0xF9B4] += (uint8_t)(1); /* 3EC3; ADD:Q.B #1, @H'F9B4; refs ram_F9B4; cycles=8 */
+ MEM8[0xF9B4] &= ~BIT(5); /* 3EC7; BCLR.B #5, @H'F9B4; refs ram_F9B4; cycles=8 */
loc_3ECB:
return; /* 3ECB; RTS; cycles=13 */
}
@@ -1772,35 +2060,35 @@ loc_3ED9:
if (Z) goto loc_3EF3; /* 3EE5; BEQ loc_3EF3; cycles=3/8 nt/t */
goto loc_3EF8; /* 3EE7; BRA loc_3EF8; cycles=8 */
loc_3EE9:
- R5 = (uint16_t)(0x0080); /* 3EE9; MOV:I.W #H'0080, R5; cycles=3 */
+ R5 = (uint16_t)(0x0080); /* 3EE9; MOV:I.W #H'0080, R5; dataflow R5=0x0080; cycles=3 */
goto loc_3EFB; /* 3EEC; BRA loc_3EFB; cycles=7 */
loc_3EEE:
- R5 = (uint16_t)(0x00C0); /* 3EEE; MOV:I.W #H'00C0, R5; cycles=3 */
+ R5 = (uint16_t)(0x00C0); /* 3EEE; MOV:I.W #H'00C0, R5; dataflow R5=0x00C0; cycles=3 */
goto loc_3EFB; /* 3EF1; BRA loc_3EFB; cycles=8 */
loc_3EF3:
- R5 = (uint16_t)(0x0090); /* 3EF3; MOV:I.W #H'0090, R5; cycles=3 */
+ R5 = (uint16_t)(0x0090); /* 3EF3; MOV:I.W #H'0090, R5; dataflow R5=0x0090; cycles=3 */
goto loc_3EFB; /* 3EF6; BRA loc_3EFB; cycles=7 */
loc_3EF8:
- R5 = (uint16_t)(0x00D0); /* 3EF8; MOV:I.W #H'00D0, R5; cycles=3 */
+ R5 = (uint16_t)(0x00D0); /* 3EF8; MOV:I.W #H'00D0, R5; dataflow R5=0x00D0; cycles=3 */
loc_3EFB:
R3 = mulxu8(R3, 0x10); /* 3EFB; MULXU.B #H'10, R3; cycles=19 */
R3 += (uint16_t)(0xFAB0); /* 3EFE; ADD:G.W #H'FAB0, R3; cycles=4 */
- R1 = 0; /* 3F02; CLR.W R1; cycles=3 */
+ R1 = 0; /* 3F02; CLR.W R1; dataflow R1=0x0000; cycles=3 */
loc_3F04:
R2 = (uint8_t)(MEM8[R1 - 0x0510]); /* 3F04; MOV:G.B @(-H'0510,R1), R2; cycles=7 */
set_flags_cmp8(R2, MEM8[R3]); /* 3F08; CMP:G.B @R3, R2; cycles=6 */
- if (Z) goto loc_3F10; /* 3F0A; BEQ loc_3F10; cycles=3/7 nt/t */
- MEM8[R3] = (uint8_t)(R2); /* 3F0C; MOV:G.B R2, @R3; cycles=6 */
- loc_3F28(); /* 3F0E; BSR loc_3F28; cycles=13 */
-loc_3F10:
+ if (!Z) { /* 3F0A; BEQ loc_3F10; cycles=3/7 nt/t */
+ MEM8[R3] = (uint8_t)(R2); /* 3F0C; MOV:G.B R2, @R3; cycles=6 */
+ loc_3F28(); /* 3F0E; BSR loc_3F28; cycles=13 */
+ }
R1 += (uint8_t)(1); /* 3F10; ADD:Q.B #1, R1; cycles=4 */
R3 += (uint8_t)(1); /* 3F12; ADD:Q.B #1, R3; cycles=4 */
set_flags_cmp8(R1, 0x10); /* 3F14; CMP:E #H'10, R1; cycles=2 */
if (Z) goto loc_3F1A; /* 3F16; BEQ loc_3F1A; cycles=3/7 nt/t */
goto loc_3F04; /* 3F18; BRA loc_3F04; cycles=7 */
loc_3F1A:
- MEM16[0xFB00] = (uint16_t)(0x00E0); /* 3F1A; MOV:G.W #H'00E0, @H'FB00; cycles=11 */
- R4 = (uint16_t)(0x00E0); /* 3F20; MOV:I.W #H'00E0, R4; cycles=3 */
+ MEM16[0xFB00] = (uint16_t)(0x00E0); /* 3F1A; MOV:G.W #H'00E0, @H'FB00; refs ram_FB00; cycles=11 */
+ R4 = (uint16_t)(0x00E0); /* 3F20; MOV:I.W #H'00E0, R4; dataflow R4=0x00E0; cycles=3 */
loc_3F40(); /* 3F23; BSR loc_3F40; cycles=14 */
loc_3F25:
pop_registers(R0, R1, R2, R3, R4); /* 3F25; LDM.W @SP+, {R0,R1,R2,R3,R4}; cycles=26 */
@@ -1811,12 +2099,12 @@ void loc_3F28(void)
{
R4 = (uint16_t)(R5); /* 3F28; MOV:G.W R5, R4; cycles=3 */
R4 += (uint8_t)(R1); /* 3F2A; ADD:G.B R1, R4; cycles=2 */
- set_flags_cmp16(R4, MEM16[0xFB00]); /* 3F2C; CMP:G.W @H'FB00, R4; cycles=7 */
- if (Z) goto loc_3F38; /* 3F30; BEQ loc_3F38; cycles=3/7 nt/t */
- MEM16[0xFB00] = (uint16_t)(R4); /* 3F32; MOV:G.W R4, @H'FB00; cycles=7 */
- loc_3F40(); /* 3F36; BSR loc_3F40; cycles=13 */
-loc_3F38:
- R4 = (uint16_t)(0x0200); /* 3F38; MOV:I.W #H'0200, R4; cycles=3 */
+ set_flags_cmp16(R4, MEM16[0xFB00]); /* 3F2C; CMP:G.W @H'FB00, R4; refs ram_FB00; cycles=7 */
+ if (!Z) { /* 3F30; BEQ loc_3F38; cycles=3/7 nt/t */
+ MEM16[0xFB00] = (uint16_t)(R4); /* 3F32; MOV:G.W R4, @H'FB00; refs ram_FB00; cycles=7 */
+ loc_3F40(); /* 3F36; BSR loc_3F40; cycles=13 */
+ }
+ R4 = (uint16_t)(0x0200); /* 3F38; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
R4 += (uint8_t)(R2); /* 3F3B; ADD:G.B R2, R4; cycles=2 */
loc_3F40(); /* 3F3D; BSR loc_3F40; cycles=14 */
return; /* 3F3F; RTS; cycles=13 */
@@ -1827,22 +2115,22 @@ void loc_3F40(void)
MEM16[--R7] = (uint16_t)(SR); /* 3F40; STC.W SR, @-R7; cycles=8 */
SR &= (uint16_t)(0x00FF); /* 3F42; ANDC.W #H'00FF, SR; cycles=4 */
SR |= (uint16_t)(0x0600); /* 3F46; ORC.W #H'0600, SR; cycles=4 */
-loc_3F4A:
- R0 = read_eclock(MEM8[0xF200]); /* 3F4A; MOVFPE.B @H'F200, R0; cycles=13 */
- set_flags_btst(R0, 7); /* 3F4F; BTST.B #7, R0; cycles=2 */
- if (!Z) goto loc_3F4A; /* 3F51; BNE loc_3F4A; cycles=3/8 nt/t */
+ do {
+ R0 = read_eclock(MEM8[0xF200]); /* 3F4A; MOVFPE.B @H'F200, R0; refs mem_F200; cycles=13 */
+ set_flags_btst(R0, 7); /* 3F4F; BTST.B #7, R0; cycles=2 */
+ } while (!Z); /* 3F51; BNE loc_3F4A; cycles=3/8 nt/t */
set_flags_btst(R4, 8); /* 3F53; BTST.W #8, R4; cycles=3 */
if (!Z) goto loc_3F6D; /* 3F55; BNE loc_3F6D; cycles=3/8 nt/t */
set_flags_btst(R4, 9); /* 3F57; BTST.W #9, R4; cycles=3 */
if (!Z) goto loc_3F62; /* 3F59; BNE loc_3F62; cycles=3/8 nt/t */
- write_eclock(MEM8[0xF200], R4); /* 3F5B; MOVTPE.B R4, @H'F200; cycles=13 */
+ write_eclock(MEM8[0xF200], R4); /* 3F5B; MOVTPE.B R4, @H'F200; refs mem_F200; cycles=13 */
goto loc_3F72; /* 3F60; BRA loc_3F72; cycles=7 */
loc_3F62:
- write_eclock(MEM8[0xF201], R4); /* 3F62; MOVTPE.B R4, @H'F201; cycles=13 */
- MEM16[0xFB00] += (uint16_t)(1); /* 3F67; ADD:Q.W #1, @H'FB00; cycles=8 */
+ write_eclock(MEM8[0xF201], R4); /* 3F62; MOVTPE.B R4, @H'F201; refs mem_F201; cycles=13 */
+ MEM16[0xFB00] += (uint16_t)(1); /* 3F67; ADD:Q.W #1, @H'FB00; refs ram_FB00; cycles=8 */
goto loc_3F72; /* 3F6B; BRA loc_3F72; cycles=8 */
loc_3F6D:
- R4 = read_eclock(MEM8[0xF201]); /* 3F6D; MOVFPE.B @H'F201, R4; cycles=13 */
+ R4 = read_eclock(MEM8[0xF201]); /* 3F6D; MOVFPE.B @H'F201, R4; refs mem_F201; cycles=13 */
loc_3F72:
SR = (uint16_t)(MEM16[R7++]); /* 3F72; LDC.W @R7+, SR; cycles=7 */
return; /* 3F74; RTS; cycles=12 */
@@ -1850,14 +2138,14 @@ loc_3F72:
void loc_3FD3(void)
{
- set_flags_tst8(MEM8[0xFAA2]); /* 3FD3; TST.B @H'FAA2; cycles=6 */
+ set_flags_tst8(MEM8[0xFAA2]); /* 3FD3; TST.B @H'FAA2; refs ram_FAA2; cycles=6 */
if (!Z) goto loc_3FEE; /* 3FD7; BNE loc_3FEE; cycles=3/8 nt/t */
- set_flags_btst(MEM8[0xFAA5], 7); /* 3FD9; BTST.B #7, @H'FAA5; cycles=6 */
+ set_flags_btst(MEM8[0xFAA5], 7); /* 3FD9; BTST.B #7, @H'FAA5; refs ram_FAA5; cycles=6 */
if (Z) goto loc_3FE5; /* 3FDD; BEQ loc_3FE5; cycles=3/8 nt/t */
- set_flags_tst8(MEM8[0xF9C3]); /* 3FDF; TST.B @H'F9C3; cycles=6 */
+ set_flags_tst8(MEM8[0xF9C3]); /* 3FDF; TST.B @H'F9C3; refs ram_F9C3; cycles=6 */
if (!Z) goto loc_3FEE; /* 3FE3; BNE loc_3FEE; cycles=3/8 nt/t */
loc_3FE5:
- set_flags_tst8(MEM8[0xF9C0]); /* 3FE5; TST.B @H'F9C0; cycles=6 */
+ set_flags_tst8(MEM8[0xF9C0]); /* 3FE5; TST.B @H'F9C0; refs ram_F9C0; cycles=6 */
if (!Z) goto loc_3FEE; /* 3FE9; BNE loc_3FEE; cycles=3/8 nt/t */
loc_BAF2(); /* 3FEB; BSR loc_BAF2; cycles=14 */
loc_3FEE:
@@ -1866,35 +2154,35 @@ loc_3FEE:
void loc_3FEF(void)
{
- set_flags_tst8(MEM8[0xF9C5]); /* 3FEF; TST.B @H'F9C5; cycles=6 */
+ set_flags_tst8(MEM8[0xF9C5]); /* 3FEF; TST.B @H'F9C5; refs ram_F9C5; cycles=6 */
if (!Z) goto loc_4007; /* 3FF3; BNE loc_4007; cycles=3/8 nt/t */
- MEM8[0xF9B5] = 0; /* 3FF5; CLR.B @H'F9B5; cycles=8 */
- MEM8[0xF9B0] = 0; /* 3FF9; CLR.B @H'F9B0; cycles=8 */
- MEM8[0xFAA5] &= ~BIT(7); /* 3FFD; BCLR.B #7, @H'FAA5; cycles=8 */
+ MEM8[0xF9B5] = 0; /* 3FF5; CLR.B @H'F9B5; refs ram_F9B5; cycles=8 */
+ MEM8[0xF9B0] = 0; /* 3FF9; CLR.B @H'F9B0; refs ram_F9B0; cycles=8 */
+ MEM8[0xFAA5] &= ~BIT(7); /* 3FFD; BCLR.B #7, @H'FAA5; refs ram_FAA5; cycles=8 */
if (Z) goto loc_400B; /* 4001; BEQ loc_400B; cycles=3/8 nt/t */
loc_400C(); /* 4003; BSR loc_400C; cycles=14 */
goto loc_400B; /* 4005; BRA loc_400B; cycles=8 */
loc_4007:
- MEM8[0xFAA5] |= BIT(7); /* 4007; BSET.B #7, @H'FAA5; cycles=8 */
+ MEM8[0xFAA5] |= BIT(7); /* 4007; BSET.B #7, @H'FAA5; refs ram_FAA5; cycles=8 */
loc_400B:
return; /* 400B; RTS; cycles=13 */
}
void loc_400C(void)
{
- MEM8[0xF730] = 0; /* 400C; CLR.B @H'F730; cycles=9 */
- MEM8[0xF756] = 0; /* 4010; CLR.B @H'F756; cycles=9 */
- MEM8[0xF757] = 0; /* 4014; CLR.B @H'F757; cycles=9 */
- MEM8[0xF758] = 0; /* 4018; CLR.B @H'F758; cycles=9 */
- MEM8[0xF759] = 0; /* 401C; CLR.B @H'F759; cycles=9 */
- MEM16[0xF732] = 0; /* 4020; CLR.W @H'F732; cycles=9 */
- MEM16[0xF75C] = 0; /* 4024; CLR.W @H'F75C; cycles=9 */
- MEM8[0xFB03] = 0; /* 4028; CLR.B @H'FB03; cycles=9 */
- MEM16[0xE046] = 0; /* 402C; CLR.W @H'E046; cycles=9 */
- MEM16[0xF76A] = 0; /* 4030; CLR.W @H'F76A; cycles=9 */
- MEM8[0xF791] = 0; /* 4034; CLR.B @H'F791; cycles=9 */
- MEM8[0xF795] = 0; /* 4038; CLR.B @H'F795; cycles=9 */
- MEM8[0xF76E] = 0; /* 403C; CLR.B @H'F76E; cycles=9 */
+ MEM8[0xF730] = 0; /* 400C; CLR.B @H'F730; refs ram_F730; cycles=9 */
+ MEM8[0xF756] = 0; /* 4010; CLR.B @H'F756; refs ram_F756; cycles=9 */
+ MEM8[0xF757] = 0; /* 4014; CLR.B @H'F757; refs ram_F757; cycles=9 */
+ MEM8[0xF758] = 0; /* 4018; CLR.B @H'F758; refs ram_F758; cycles=9 */
+ MEM8[0xF759] = 0; /* 401C; CLR.B @H'F759; refs ram_F759; cycles=9 */
+ MEM16[0xF732] = 0; /* 4020; CLR.W @H'F732; refs ram_F732; cycles=9 */
+ MEM16[0xF75C] = 0; /* 4024; CLR.W @H'F75C; refs ram_F75C; cycles=9 */
+ MEM8[0xFB03] = 0; /* 4028; CLR.B @H'FB03; refs ram_FB03; cycles=9 */
+ MEM16[0xE046] = 0; /* 402C; CLR.W @H'E046; refs mem_E046; cycles=9 */
+ MEM16[0xF76A] = 0; /* 4030; CLR.W @H'F76A; refs ram_F76A; cycles=9 */
+ MEM8[0xF791] = 0; /* 4034; CLR.B @H'F791; refs ram_F791; cycles=9 */
+ MEM8[0xF795] = 0; /* 4038; CLR.B @H'F795; refs ram_F795; cycles=9 */
+ MEM8[0xF76E] = 0; /* 403C; CLR.B @H'F76E; refs ram_F76E; cycles=9 */
loc_4075(); /* 4040; BSR loc_4075; cycles=13 */
loc_4217(); /* 4042; BSR loc_4217; cycles=13 */
return; /* 4045; RTS; cycles=13 */
@@ -1902,11 +2190,11 @@ void loc_400C(void)
void loc_4046(void)
{
- set_flags_tst8(MEM8[0xF9C4]); /* 4046; TST.B @H'F9C4; cycles=7 */
+ set_flags_tst8(MEM8[0xF9C4]); /* 4046; TST.B @H'F9C4; refs ram_F9C4; cycles=7 */
if (!Z) goto loc_4058; /* 404A; BNE loc_4058; cycles=3/7 nt/t */
- set_flags_btst(MEM8[0xFAA5], 7); /* 404C; BTST.B #7, @H'FAA5; cycles=7 */
+ set_flags_btst(MEM8[0xFAA5], 7); /* 404C; BTST.B #7, @H'FAA5; refs ram_FAA5; cycles=7 */
if (Z) goto loc_4059; /* 4050; BEQ loc_4059; cycles=3/7 nt/t */
- set_flags_tst8(MEM8[0xF9C3]); /* 4052; TST.B @H'F9C3; cycles=7 */
+ set_flags_tst8(MEM8[0xF9C3]); /* 4052; TST.B @H'F9C3; refs ram_F9C3; cycles=7 */
if (Z) goto loc_4059; /* 4056; BEQ loc_4059; cycles=3/7 nt/t */
loc_4058:
return; /* 4058; RTS; cycles=12 */
@@ -1914,15 +2202,15 @@ loc_4058:
void loc_4075(void)
{
- R0 = 0; /* 4075; CLR.W R0; cycles=3 */
+ R0 = 0; /* 4075; CLR.W R0; dataflow R0=0x0000; cycles=3 */
loc_4077:
MEM16[R0 - 0x2000] = 0; /* 4077; CLR.W @(-H'2000,R0); cycles=8 */
MEM16[R0 - 0x1C00] = 0; /* 407B; CLR.W @(-H'1C00,R0); cycles=8 */
MEM16[R0 - 0x1800] = 0; /* 407F; CLR.W @(-H'1800,R0); cycles=8 */
set_flags_cmp16(R0, 0x0200); /* 4083; CMP:I #H'0200, R0; cycles=3 */
- if (!C) goto loc_408C; /* 4086; BCC loc_408C; cycles=3/7 nt/t */
- MEM16[R0 - 0x1400] = 0; /* 4088; CLR.W @(-H'1400,R0); cycles=9 */
-loc_408C:
+ if (C) { /* 4086; BCC loc_408C; cycles=3/7 nt/t */
+ MEM16[R0 - 0x1400] = 0; /* 4088; CLR.W @(-H'1400,R0); cycles=9 */
+ }
R0 += (uint16_t)(2); /* 408C; ADD:Q.W #2, R0; cycles=4 */
set_flags_cmp16(R0, 0x0400); /* 408E; CMP:I #H'0400, R0; cycles=3 */
if (!Z) goto loc_4077; /* 4091; BNE loc_4077; cycles=3/8 nt/t */
@@ -1932,36 +2220,36 @@ loc_408C:
void loc_4096(void)
{
- MEM16[0xE000] = (uint16_t)(0x0080); /* 4096; MOV:G.W #H'0080, @H'E000; cycles=11 */
- MEM16[0xE006] = (uint16_t)(0x8000); /* 409C; MOV:G.W #H'8000, @H'E006; cycles=11 */
- MEM16[0xE080] = (uint16_t)(0xFFFF); /* 40A2; MOV:G.W #H'FFFF, @H'E080; cycles=11 */
- MEM16[0xE800] = (uint16_t)(0x0080); /* 40A8; MOV:G.W #H'0080, @H'E800; cycles=11 */
- MEM16[0xE806] = (uint16_t)(0x8000); /* 40AE; MOV:G.W #H'8000, @H'E806; cycles=11 */
- MEM16[0xE880] = (uint16_t)(0xFFFF); /* 40B4; MOV:G.W #H'FFFF, @H'E880; cycles=11 */
+ MEM16[0xE000] = (uint16_t)(0x0080); /* 4096; MOV:G.W #H'0080, @H'E000; refs mem_E000; cycles=11 */
+ MEM16[0xE006] = (uint16_t)(0x8000); /* 409C; MOV:G.W #H'8000, @H'E006; refs mem_E006; cycles=11 */
+ MEM16[0xE080] = (uint16_t)(0xFFFF); /* 40A2; MOV:G.W #H'FFFF, @H'E080; refs mem_E080; cycles=11 */
+ MEM16[0xE800] = (uint16_t)(0x0080); /* 40A8; MOV:G.W #H'0080, @H'E800; refs mem_E800; cycles=11 */
+ MEM16[0xE806] = (uint16_t)(0x8000); /* 40AE; MOV:G.W #H'8000, @H'E806; refs mem_E806; cycles=11 */
+ MEM16[0xE880] = (uint16_t)(0xFFFF); /* 40B4; MOV:G.W #H'FFFF, @H'E880; refs mem_E880; cycles=11 */
return; /* 40BA; RTS; cycles=12 */
}
void loc_40BB(void)
{
- R0 = (uint16_t)(0x0040); /* 40BB; MOV:I.W #H'0040, R0; cycles=3 */
-loc_40BE:
- MEM16[R0 - 0x0792] = (uint16_t)(0xFFFF); /* 40BE; MOV:G.W #H'FFFF, @(-H'0792,R0); cycles=9 */
- MEM16[R0 - 0x0752] = (uint16_t)(0xFFFF); /* 40C4; MOV:G.W #H'FFFF, @(-H'0752,R0); cycles=9 */
- MEM16[R0 - 0x0712] = (uint16_t)(0xFFFF); /* 40CA; MOV:G.W #H'FFFF, @(-H'0712,R0); cycles=9 */
- MEM16[R0 - 0x06D2] = (uint16_t)(0xFFFF); /* 40D0; MOV:G.W #H'FFFF, @(-H'06D2,R0); cycles=9 */
- MEM16[R0 - 0x0692] = (uint16_t)(0xFFFF); /* 40D6; MOV:G.W #H'FFFF, @(-H'0692,R0); cycles=9 */
- R0 += (uint16_t)(-2); /* 40DC; ADD:Q.W #-2, R0; cycles=4 */
- if (!Z) goto loc_40BE; /* 40DE; BNE loc_40BE; cycles=3/7 nt/t */
- MEM8[0xF9C4] = (uint8_t)(0x14); /* 40E0; MOV:G.B #H'14, @H'F9C4; cycles=9 */
- MEM8[0xF6F7] = (uint8_t)(0x80); /* 40E5; MOV:G.B #H'80, @H'F6F7; cycles=9 */
- MEM8[0xF6F8] = (uint8_t)(0x80); /* 40EA; MOV:G.B #H'80, @H'F6F8; cycles=9 */
- MEM8[0xF6F9] = (uint8_t)(0x80); /* 40EF; MOV:G.B #H'80, @H'F6F9; cycles=9 */
- set_flags_btst(P7DR, 7); /* 40F4; BTST.B #7, @P7DR; cycles=7 */
+ R0 = (uint16_t)(0x0040); /* 40BB; MOV:I.W #H'0040, R0; dataflow R0=0x0040; cycles=3 */
+ do {
+ MEM16[R0 - 0x0792] = (uint16_t)(0xFFFF); /* 40BE; MOV:G.W #H'FFFF, @(-H'0792,R0); cycles=9 */
+ MEM16[R0 - 0x0752] = (uint16_t)(0xFFFF); /* 40C4; MOV:G.W #H'FFFF, @(-H'0752,R0); cycles=9 */
+ MEM16[R0 - 0x0712] = (uint16_t)(0xFFFF); /* 40CA; MOV:G.W #H'FFFF, @(-H'0712,R0); cycles=9 */
+ MEM16[R0 - 0x06D2] = (uint16_t)(0xFFFF); /* 40D0; MOV:G.W #H'FFFF, @(-H'06D2,R0); cycles=9 */
+ MEM16[R0 - 0x0692] = (uint16_t)(0xFFFF); /* 40D6; MOV:G.W #H'FFFF, @(-H'0692,R0); cycles=9 */
+ R0 += (uint16_t)(-2); /* 40DC; ADD:Q.W #-2, R0; cycles=4 */
+ } while (!Z); /* 40DE; BNE loc_40BE; cycles=3/7 nt/t */
+ MEM8[0xF9C4] = (uint8_t)(0x14); /* 40E0; MOV:G.B #H'14, @H'F9C4; refs ram_F9C4; cycles=9 */
+ MEM8[0xF6F7] = (uint8_t)(0x80); /* 40E5; MOV:G.B #H'80, @H'F6F7; refs ram_F6F7; cycles=9 */
+ MEM8[0xF6F8] = (uint8_t)(0x80); /* 40EA; MOV:G.B #H'80, @H'F6F8; refs ram_F6F8; cycles=9 */
+ MEM8[0xF6F9] = (uint8_t)(0x80); /* 40EF; MOV:G.B #H'80, @H'F6F9; refs ram_F6F9; cycles=9 */
+ set_flags_btst(P7DR, 7); /* 40F4; BTST.B #7, @P7DR; refs P7DR; cycles=7 */
if (Z) goto loc_4103; /* 40F8; BEQ loc_4103; cycles=3/7 nt/t */
- set_flags_cmp16(MEM16[0xF402], 0x6B6F); /* 40FA; CMP:G.W #H'6B6F, @H'F402; cycles=7 */
+ set_flags_cmp16(MEM16[0xF402], 0x6B6F); /* 40FA; CMP:G.W #H'6B6F, @H'F402; refs mem_F402; cycles=7 */
if (Z) goto loc_41B0; /* 4100; BEQ loc_41B0; cycles=3/7 nt/t */
loc_4103:
- R0 = (uint16_t)(0x0100); /* 4103; MOV:I.W #H'0100, R0; cycles=3 */
+ R0 = (uint16_t)(0x0100); /* 4103; MOV:I.W #H'0100, R0; dataflow R0=0x0100; cycles=3 */
loc_4106:
R0 += (uint16_t)(-2); /* 4106; ADD:Q.W #-2, R0; cycles=4 */
R5 = (uint16_t)(MEM16[R0 - 0x369C]); /* 4108; MOV:G.W @(-H'369C,R0), R5; cycles=7 */
@@ -2001,28 +2289,28 @@ loc_4106:
loc_BFE0(); /* 417D; JSR @loc_BFE0; cycles=14 */
R0 = (uint16_t)(MEM16[R7++]); /* 4180; MOV:G.W @R7+, R0; cycles=5 */
if (!Z) goto loc_4106; /* 4182; BNE loc_4106; cycles=3/7 nt/t */
- R0 = (uint16_t)(0x000F); /* 4184; MOV:I.W #H'000F, R0; cycles=3 */
+ R0 = (uint16_t)(0x000F); /* 4184; MOV:I.W #H'000F, R0; dataflow R0=0x000F; cycles=3 */
loc_4187:
MEM16[--R7] = (uint16_t)(R0); /* 4187; MOV:G.W R0, @-R7; cycles=5 */
R4 = (uint16_t)(R0); /* 4189; MOV:G.W R0, R4; cycles=3 */
R4 = swap_bytes(R4); /* 418B; SWAP.B R4; cycles=3 */
- R5 = (uint16_t)(0x2020); /* 418D; MOV:I.W #H'2020, R5; cycles=3 */
+ R5 = (uint16_t)(0x2020); /* 418D; MOV:I.W #H'2020, R5; dataflow R5=0x2020; cycles=3 */
loc_BFE0(); /* 4190; JSR @loc_BFE0; cycles=13 */
R4 += (uint16_t)(2); /* 4193; ADD:Q.W #2, R4; cycles=4 */
- R5 = (uint16_t)(0x2020); /* 4195; MOV:I.W #H'2020, R5; cycles=3 */
+ R5 = (uint16_t)(0x2020); /* 4195; MOV:I.W #H'2020, R5; dataflow R5=0x2020; cycles=3 */
loc_BFE0(); /* 4198; JSR @loc_BFE0; cycles=13 */
R4 += (uint16_t)(2); /* 419B; ADD:Q.W #2, R4; cycles=4 */
- R5 = (uint16_t)(0x2020); /* 419D; MOV:I.W #H'2020, R5; cycles=3 */
+ R5 = (uint16_t)(0x2020); /* 419D; MOV:I.W #H'2020, R5; dataflow R5=0x2020; cycles=3 */
loc_BFE0(); /* 41A0; JSR @loc_BFE0; cycles=13 */
R4 += (uint16_t)(2); /* 41A3; ADD:Q.W #2, R4; cycles=4 */
- R5 = (uint16_t)(0x2020); /* 41A5; MOV:I.W #H'2020, R5; cycles=3 */
+ R5 = (uint16_t)(0x2020); /* 41A5; MOV:I.W #H'2020, R5; dataflow R5=0x2020; cycles=3 */
loc_BFE0(); /* 41A8; JSR @loc_BFE0; cycles=13 */
R0 = (uint16_t)(MEM16[R7++]); /* 41AB; MOV:G.W @R7+, R0; cycles=6 */
if (scb_f(R0)) goto loc_4187; /* 41AD; SCB/F R0, loc_4187; cycles=? */
loc_41B0:
goto loc_41D2; /* 41B0; BRA loc_41D2; cycles=7 */
loc_41D2:
- R0 = (uint16_t)(0x000F); /* 41D2; MOV:I.W #H'000F, R0; cycles=3 */
+ R0 = (uint16_t)(0x000F); /* 41D2; MOV:I.W #H'000F, R0; dataflow R0=0x000F; cycles=3 */
loc_41D5:
R1 = (uint16_t)(R0); /* 41D5; MOV:G.W R0, R1; cycles=3 */
R1 <<= 1; /* 41D7; SHLL.B R1; cycles=2 */
@@ -2055,82 +2343,82 @@ loc_41D5:
void loc_4217(void)
{
- MEM8[0xF798] = 0; /* 4217; CLR.B @H'F798; cycles=8 */
- MEM8[0xF731] |= BIT(7); /* 421B; BSET.B #7, @H'F731; cycles=8 */
- P1DR &= ~BIT(2); /* 421F; BCLR.B #2, @P1DR; clear bit 2 of P1DR; cycles=8 */
- MEM16[0xF700] = (uint16_t)(0x2424); /* 4223; MOV:G.W #H'2424, @H'F700; cycles=9 */
- MEM16[0xF702] = (uint16_t)(0x2424); /* 4229; MOV:G.W #H'2424, @H'F702; cycles=9 */
- MEM16[0xF704] = (uint16_t)(0x2424); /* 422F; MOV:G.W #H'2424, @H'F704; cycles=9 */
- MEM16[0xF706] = (uint16_t)(0x2424); /* 4235; MOV:G.W #H'2424, @H'F706; cycles=9 */
- MEM8[0xF708] = (uint8_t)(0x7F); /* 423B; MOV:G.B #H'7F, @H'F708; cycles=9 */
- MEM8[0xF709] = (uint8_t)(0x24); /* 4240; MOV:G.B #H'24, @H'F709; cycles=9 */
- MEM16[0xF70A] = (uint16_t)(0x2424); /* 4245; MOV:G.W #H'2424, @H'F70A; cycles=9 */
- MEM8[0xF710] = 0; /* 424B; CLR.B @H'F710; cycles=8 */
- MEM8[0xF711] = 0; /* 424F; CLR.B @H'F711; cycles=8 */
- MEM8[0xF712] = 0; /* 4253; CLR.B @H'F712; cycles=8 */
- MEM8[0xF713] = 0; /* 4257; CLR.B @H'F713; cycles=8 */
- MEM8[0xF714] = 0; /* 425B; CLR.B @H'F714; cycles=8 */
- MEM8[0xF715] = 0; /* 425F; CLR.B @H'F715; cycles=8 */
- MEM8[0xF716] = 0; /* 4263; CLR.B @H'F716; cycles=8 */
- MEM8[0xF717] = 0; /* 4267; CLR.B @H'F717; cycles=8 */
- MEM8[0xF718] = (uint8_t)(0xFF); /* 426B; MOV:G.B #H'FF, @H'F718; cycles=9 */
- MEM8[0xF719] = (uint8_t)(0xFF); /* 4270; MOV:G.B #H'FF, @H'F719; cycles=9 */
- MEM8[0xF71A] = (uint8_t)(0xFF); /* 4275; MOV:G.B #H'FF, @H'F71A; cycles=9 */
- MEM8[0xF71B] = (uint8_t)(0xFF); /* 427A; MOV:G.B #H'FF, @H'F71B; cycles=9 */
- MEM8[0xF71C] = (uint8_t)(0xFF); /* 427F; MOV:G.B #H'FF, @H'F71C; cycles=9 */
- MEM8[0xF71D] = (uint8_t)(0xFF); /* 4284; MOV:G.B #H'FF, @H'F71D; cycles=9 */
- MEM8[0xF71E] = (uint8_t)(0xFF); /* 4289; MOV:G.B #H'FF, @H'F71E; cycles=9 */
- MEM8[0xF71F] = (uint8_t)(0xFF); /* 428E; MOV:G.B #H'FF, @H'F71F; cycles=9 */
- MEM16[0xFAF0] = (uint16_t)(0x2043); /* 4293; MOV:G.W #H'2043, @H'FAF0; cycles=9 */
- MEM16[0xFAF2] = (uint16_t)(0x4F4E); /* 4299; MOV:G.W #H'4F4E, @H'FAF2; cycles=9 */
- MEM16[0xFAF4] = (uint16_t)(0x4E45); /* 429F; MOV:G.W #H'4E45, @H'FAF4; cycles=9 */
- MEM16[0xFAF6] = (uint16_t)(0x4354); /* 42A5; MOV:G.W #H'4354, @H'FAF6; cycles=9 */
- MEM16[0xFAF8] = (uint16_t)(0x3A4E); /* 42AB; MOV:G.W #H'3A4E, @H'FAF8; cycles=9 */
- MEM16[0xFAFA] = (uint16_t)(0x4F54); /* 42B1; MOV:G.W #H'4F54, @H'FAFA; cycles=9 */
- MEM16[0xFAFC] = (uint16_t)(0x2041); /* 42B7; MOV:G.W #H'2041, @H'FAFC; cycles=9 */
- MEM16[0xFAFE] = (uint16_t)(0x4354); /* 42BD; MOV:G.W #H'4354, @H'FAFE; cycles=9 */
- R5 = (uint16_t)(0x0000); /* 42C3; MOV:I.W #H'0000, R5; cycles=3 */
+ MEM8[0xF798] = 0; /* 4217; CLR.B @H'F798; refs ram_F798; cycles=8 */
+ MEM8[0xF731] |= BIT(7); /* 421B; BSET.B #7, @H'F731; refs ram_F731; cycles=8 */
+ P1DR &= ~BIT(2); /* 421F; BCLR.B #2, @P1DR; clear bit 2 of P1DR; refs P1DR; cycles=8 */
+ MEM16[0xF700] = (uint16_t)(0x2424); /* 4223; MOV:G.W #H'2424, @H'F700; refs ram_F700; cycles=9 */
+ MEM16[0xF702] = (uint16_t)(0x2424); /* 4229; MOV:G.W #H'2424, @H'F702; refs ram_F702; cycles=9 */
+ MEM16[0xF704] = (uint16_t)(0x2424); /* 422F; MOV:G.W #H'2424, @H'F704; refs ram_F704; cycles=9 */
+ MEM16[0xF706] = (uint16_t)(0x2424); /* 4235; MOV:G.W #H'2424, @H'F706; refs ram_F706; cycles=9 */
+ MEM8[0xF708] = (uint8_t)(0x7F); /* 423B; MOV:G.B #H'7F, @H'F708; refs ram_F708; cycles=9 */
+ MEM8[0xF709] = (uint8_t)(0x24); /* 4240; MOV:G.B #H'24, @H'F709; refs ram_F709; cycles=9 */
+ MEM16[0xF70A] = (uint16_t)(0x2424); /* 4245; MOV:G.W #H'2424, @H'F70A; refs ram_F70A; cycles=9 */
+ MEM8[0xF710] = 0; /* 424B; CLR.B @H'F710; refs ram_F710; cycles=8 */
+ MEM8[0xF711] = 0; /* 424F; CLR.B @H'F711; refs ram_F711; cycles=8 */
+ MEM8[0xF712] = 0; /* 4253; CLR.B @H'F712; refs ram_F712; cycles=8 */
+ MEM8[0xF713] = 0; /* 4257; CLR.B @H'F713; refs ram_F713; cycles=8 */
+ MEM8[0xF714] = 0; /* 425B; CLR.B @H'F714; refs ram_F714; cycles=8 */
+ MEM8[0xF715] = 0; /* 425F; CLR.B @H'F715; refs ram_F715; cycles=8 */
+ MEM8[0xF716] = 0; /* 4263; CLR.B @H'F716; refs ram_F716; cycles=8 */
+ MEM8[0xF717] = 0; /* 4267; CLR.B @H'F717; refs ram_F717; cycles=8 */
+ MEM8[0xF718] = (uint8_t)(0xFF); /* 426B; MOV:G.B #H'FF, @H'F718; refs ram_F718; cycles=9 */
+ MEM8[0xF719] = (uint8_t)(0xFF); /* 4270; MOV:G.B #H'FF, @H'F719; refs ram_F719; cycles=9 */
+ MEM8[0xF71A] = (uint8_t)(0xFF); /* 4275; MOV:G.B #H'FF, @H'F71A; refs ram_F71A; cycles=9 */
+ MEM8[0xF71B] = (uint8_t)(0xFF); /* 427A; MOV:G.B #H'FF, @H'F71B; refs ram_F71B; cycles=9 */
+ MEM8[0xF71C] = (uint8_t)(0xFF); /* 427F; MOV:G.B #H'FF, @H'F71C; refs ram_F71C; cycles=9 */
+ MEM8[0xF71D] = (uint8_t)(0xFF); /* 4284; MOV:G.B #H'FF, @H'F71D; refs ram_F71D; cycles=9 */
+ MEM8[0xF71E] = (uint8_t)(0xFF); /* 4289; MOV:G.B #H'FF, @H'F71E; refs ram_F71E; cycles=9 */
+ MEM8[0xF71F] = (uint8_t)(0xFF); /* 428E; MOV:G.B #H'FF, @H'F71F; refs ram_F71F; cycles=9 */
+ MEM16[0xFAF0] = (uint16_t)(0x2043); /* 4293; MOV:G.W #H'2043, @H'FAF0; refs ram_FAF0; cycles=9 */
+ MEM16[0xFAF2] = (uint16_t)(0x4F4E); /* 4299; MOV:G.W #H'4F4E, @H'FAF2; refs ram_FAF2; cycles=9 */
+ MEM16[0xFAF4] = (uint16_t)(0x4E45); /* 429F; MOV:G.W #H'4E45, @H'FAF4; refs ram_FAF4; cycles=9 */
+ MEM16[0xFAF6] = (uint16_t)(0x4354); /* 42A5; MOV:G.W #H'4354, @H'FAF6; refs ram_FAF6; cycles=9 */
+ MEM16[0xFAF8] = (uint16_t)(0x3A4E); /* 42AB; MOV:G.W #H'3A4E, @H'FAF8; refs ram_FAF8; cycles=9 */
+ MEM16[0xFAFA] = (uint16_t)(0x4F54); /* 42B1; MOV:G.W #H'4F54, @H'FAFA; refs ram_FAFA; cycles=9 */
+ MEM16[0xFAFC] = (uint16_t)(0x2041); /* 42B7; MOV:G.W #H'2041, @H'FAFC; refs ram_FAFC; cycles=9 */
+ MEM16[0xFAFE] = (uint16_t)(0x4354); /* 42BD; MOV:G.W #H'4354, @H'FAFE; refs ram_FAFE; cycles=9 */
+ R5 = (uint16_t)(0x0000); /* 42C3; MOV:I.W #H'0000, R5; dataflow R5=0x0000; cycles=3 */
loc_3ECC(); /* 42C6; BSR loc_3ECC; cycles=13 */
- MEM16[0xFAF0] = (uint16_t)(0x2020); /* 42C9; MOV:G.W #H'2020, @H'FAF0; cycles=9 */
- MEM16[0xFAF2] = (uint16_t)(0x2020); /* 42CF; MOV:G.W #H'2020, @H'FAF2; cycles=9 */
- MEM16[0xFAF4] = (uint16_t)(0x2020); /* 42D5; MOV:G.W #H'2020, @H'FAF4; cycles=9 */
- MEM16[0xFAF6] = (uint16_t)(0x2020); /* 42DB; MOV:G.W #H'2020, @H'FAF6; cycles=9 */
- MEM16[0xFAF8] = (uint16_t)(0x2020); /* 42E1; MOV:G.W #H'2020, @H'FAF8; cycles=9 */
- MEM16[0xFAFA] = (uint16_t)(0x2020); /* 42E7; MOV:G.W #H'2020, @H'FAFA; cycles=9 */
- MEM16[0xFAFC] = (uint16_t)(0x2020); /* 42ED; MOV:G.W #H'2020, @H'FAFC; cycles=9 */
- MEM16[0xFAFE] = (uint16_t)(0x2020); /* 42F3; MOV:G.W #H'2020, @H'FAFE; cycles=9 */
- R5 = (uint16_t)(0x0001); /* 42F9; MOV:I.W #H'0001, R5; cycles=3 */
+ MEM16[0xFAF0] = (uint16_t)(0x2020); /* 42C9; MOV:G.W #H'2020, @H'FAF0; refs ram_FAF0; cycles=9 */
+ MEM16[0xFAF2] = (uint16_t)(0x2020); /* 42CF; MOV:G.W #H'2020, @H'FAF2; refs ram_FAF2; cycles=9 */
+ MEM16[0xFAF4] = (uint16_t)(0x2020); /* 42D5; MOV:G.W #H'2020, @H'FAF4; refs ram_FAF4; cycles=9 */
+ MEM16[0xFAF6] = (uint16_t)(0x2020); /* 42DB; MOV:G.W #H'2020, @H'FAF6; refs ram_FAF6; cycles=9 */
+ MEM16[0xFAF8] = (uint16_t)(0x2020); /* 42E1; MOV:G.W #H'2020, @H'FAF8; refs ram_FAF8; cycles=9 */
+ MEM16[0xFAFA] = (uint16_t)(0x2020); /* 42E7; MOV:G.W #H'2020, @H'FAFA; refs ram_FAFA; cycles=9 */
+ MEM16[0xFAFC] = (uint16_t)(0x2020); /* 42ED; MOV:G.W #H'2020, @H'FAFC; refs ram_FAFC; cycles=9 */
+ MEM16[0xFAFE] = (uint16_t)(0x2020); /* 42F3; MOV:G.W #H'2020, @H'FAFE; refs ram_FAFE; cycles=9 */
+ R5 = (uint16_t)(0x0001); /* 42F9; MOV:I.W #H'0001, R5; dataflow R5=0x0001; cycles=3 */
loc_3ECC(); /* 42FC; BSR loc_3ECC; cycles=13 */
- R5 = (uint16_t)(0x0002); /* 42FF; MOV:I.W #H'0002, R5; cycles=3 */
+ R5 = (uint16_t)(0x0002); /* 42FF; MOV:I.W #H'0002, R5; dataflow R5=0x0002; cycles=3 */
loc_3ECC(); /* 4302; BSR loc_3ECC; cycles=13 */
- R5 = (uint16_t)(0x0003); /* 4305; MOV:I.W #H'0003, R5; cycles=3 */
+ R5 = (uint16_t)(0x0003); /* 4305; MOV:I.W #H'0003, R5; dataflow R5=0x0003; cycles=3 */
loc_3ECC(); /* 4308; BSR loc_3ECC; cycles=13 */
return; /* 430B; RTS; cycles=13 */
}
void loc_430C(void)
{
- P6DR &= ~BIT(0); /* 430C; BCLR.B #0, @P6DR; clear bit 0 of P6DR; cycles=9 */
- MEM8[0xF555] = (uint8_t)(0xAA); /* 4310; MOV:G.B #H'AA, @H'F555; cycles=9 */
- MEM8[0xF4AA] = (uint8_t)(0x55); /* 4315; MOV:G.B #H'55, @H'F4AA; cycles=9 */
- MEM8[0xF555] = (uint8_t)(0xCC); /* 431A; MOV:G.B #H'CC, @H'F555; cycles=9 */
- P6DR |= BIT(0); /* 431F; BSET.B #0, @P6DR; set bit 0 of P6DR; cycles=8 */
+ P6DR &= ~BIT(0); /* 430C; BCLR.B #0, @P6DR; clear bit 0 of P6DR; refs P6DR; cycles=9 */
+ MEM8[0xF555] = (uint8_t)(0xAA); /* 4310; MOV:G.B #H'AA, @H'F555; refs mem_F555; cycles=9 */
+ MEM8[0xF4AA] = (uint8_t)(0x55); /* 4315; MOV:G.B #H'55, @H'F4AA; refs mem_F4AA; cycles=9 */
+ MEM8[0xF555] = (uint8_t)(0xCC); /* 431A; MOV:G.B #H'CC, @H'F555; refs mem_F555; cycles=9 */
+ P6DR |= BIT(0); /* 431F; BSET.B #0, @P6DR; set bit 0 of P6DR; refs P6DR; cycles=8 */
return; /* 4323; RTS; cycles=13 */
}
void loc_4324(void)
{
- R4 = (uint16_t)(0x0038); /* 4324; MOV:I.W #H'0038, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 4327; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0038); /* 4324; MOV:I.W #H'0038, R4; dataflow R4=0x0038; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 4327; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 432A; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0001); /* 432D; MOV:I.W #H'0001, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 4330; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0001); /* 432D; MOV:I.W #H'0001, R4; dataflow R4=0x0001; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 4330; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 4333; BSR loc_3ECC; cycles=14 */
- R4 = (uint16_t)(0x000E); /* 4336; MOV:I.W #H'000E, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 4339; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x000E); /* 4336; MOV:I.W #H'000E, R4; dataflow R4=0x000E; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 4339; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 433C; BSR loc_3ECC; cycles=13 */
- R4 = (uint16_t)(0x0006); /* 433F; MOV:I.W #H'0006, R4; cycles=3 */
- R5 = (uint16_t)(0x0004); /* 4342; MOV:I.W #H'0004, R5; cycles=3 */
+ R4 = (uint16_t)(0x0006); /* 433F; MOV:I.W #H'0006, R4; dataflow R4=0x0006; cycles=3 */
+ R5 = (uint16_t)(0x0004); /* 4342; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
loc_3ECC(); /* 4345; BSR loc_3ECC; cycles=14 */
loc_10CE(); /* 4348; BSR loc_10CE; cycles=13 */
return; /* 434B; RTS; cycles=13 */
@@ -2138,23 +2426,23 @@ void loc_4324(void)
void loc_434C(void)
{
- IPRA = (uint8_t)(0x70); /* 434C; MOV:G.B #H'70, @IPRA; IPRA = H'70 (irq0 priority=7; irq1 priority=0); cycles=9 */
- IPRB = (uint8_t)(0x44); /* 4351; MOV:G.B #H'44, @IPRB; IPRB = H'44 (irq2/irq3 priority=4; irq4/irq5 priority=4); cycles=9 */
- IPRC = (uint8_t)(0x66); /* 4356; MOV:G.B #H'66, @IPRC; IPRC = H'66 (FRT1 priority=6; FRT2 priority=6); cycles=9 */
- IPRD = (uint8_t)(0x00); /* 435B; MOV:G.B #H'00, @IPRD; IPRD = H'00 (FRT3 priority=0; 8-bit timer priority=0); cycles=9 */
- IPRE = (uint8_t)(0x50); /* 4360; MOV:G.B #H'50, @IPRE; IPRE = H'50 (SCI1 priority=5; SCI2 priority=0); cycles=9 */
- IPRF = (uint8_t)(0x40); /* 4365; MOV:G.B #H'40, @IPRF; IPRF = H'40 (A/D priority=4); cycles=9 */
- SCI1_SCR |= BIT(6); /* 436A; BSET.B #6, @SCI1_SCR; set RIE (bit 6) of SCI1_SCR; cycles=9 */
- FRT1_TCR |= BIT(5); /* 436E; BSET.B #5, @FRT1_TCR; set OCIEA (bit 5) of FRT1_TCR; cycles=9 */
- FRT2_TCR |= BIT(5); /* 4372; BSET.B #5, @FRT2_TCR; set OCIEA (bit 5) of FRT2_TCR; cycles=9 */
- ADCSR |= BIT(6); /* 4376; BSET.B #6, @ADCSR; set ADIE (bit 6) of ADCSR; cycles=9 */
- SYSCR2 |= BIT(4); /* 437A; BSET.B #4, @SYSCR2; set IRQ3E (bit 4) of SYSCR2; cycles=9 */
- SYSCR2 |= BIT(5); /* 437E; BSET.B #5, @SYSCR2; set IRQ4E (bit 5) of SYSCR2; cycles=9 */
- set_flags_btst(P7DR, 6); /* 4382; BTST.B #6, @P7DR; cycles=7 */
- if (Z) goto loc_438E; /* 4386; BEQ loc_438E; cycles=3/7 nt/t */
- WDT_TCSR_R = (uint16_t)(0xA53F); /* 4388; MOV:G.W #H'A53F, @WDT_TCSR_R; WDT_TCSR_R = H'A53F (OVF=0 WT/IT=0 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, interval IRQ0, clock phi/4096); cycles=11 */
-loc_438E:
- SR = (uint16_t)(0x0300); /* 438E; LDC.W #H'0300, SR; cycles=6 */
+ IPRA = (uint8_t)(0x70); /* 434C; MOV:G.B #H'70, @IPRA; IPRA = H'70 (irq0 priority=7; irq1 priority=0); refs IPRA; cycles=9 */
+ IPRB = (uint8_t)(0x44); /* 4351; MOV:G.B #H'44, @IPRB; IPRB = H'44 (irq2/irq3 priority=4; irq4/irq5 priority=4); refs IPRB; cycles=9 */
+ IPRC = (uint8_t)(0x66); /* 4356; MOV:G.B #H'66, @IPRC; IPRC = H'66 (FRT1 priority=6; FRT2 priority=6); refs IPRC; cycles=9 */
+ IPRD = (uint8_t)(0x00); /* 435B; MOV:G.B #H'00, @IPRD; IPRD = H'00 (FRT3 priority=0; 8-bit timer priority=0); refs IPRD; cycles=9 */
+ IPRE = (uint8_t)(0x50); /* 4360; MOV:G.B #H'50, @IPRE; IPRE = H'50 (SCI1 priority=5; SCI2 priority=0); refs IPRE; cycles=9 */
+ IPRF = (uint8_t)(0x40); /* 4365; MOV:G.B #H'40, @IPRF; IPRF = H'40 (A/D priority=4); refs IPRF; cycles=9 */
+ SCI1_SCR |= BIT(6); /* 436A; BSET.B #6, @SCI1_SCR; set RIE (bit 6) of SCI1_SCR; refs SCI1_SCR; cycles=9 */
+ FRT1_TCR |= BIT(5); /* 436E; BSET.B #5, @FRT1_TCR; set OCIEA (bit 5) of FRT1_TCR; refs FRT1_TCR; cycles=9 */
+ FRT2_TCR |= BIT(5); /* 4372; BSET.B #5, @FRT2_TCR; set OCIEA (bit 5) of FRT2_TCR; refs FRT2_TCR; cycles=9 */
+ ADCSR |= BIT(6); /* 4376; BSET.B #6, @ADCSR; set ADIE (bit 6) of ADCSR; refs ADCSR; cycles=9 */
+ SYSCR2 |= BIT(4); /* 437A; BSET.B #4, @SYSCR2; set IRQ3E (bit 4) of SYSCR2; refs SYSCR2; cycles=9 */
+ SYSCR2 |= BIT(5); /* 437E; BSET.B #5, @SYSCR2; set IRQ4E (bit 5) of SYSCR2; refs SYSCR2; cycles=9 */
+ set_flags_btst(P7DR, 6); /* 4382; BTST.B #6, @P7DR; refs P7DR; cycles=7 */
+ if (!Z) { /* 4386; BEQ loc_438E; cycles=3/7 nt/t */
+ WDT_TCSR_R = (uint16_t)(0xA53F); /* 4388; MOV:G.W #H'A53F, @WDT_TCSR_R; WDT_TCSR_R = H'A53F (OVF=0 WT/IT=0 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, interval IRQ0, clock phi/4096); refs WDT_TCSR_R; cycles=11 */
+ }
+ SR = (uint16_t)(0x0300); /* 438E; LDC.W #H'0300, SR; dataflow SR=0x0300; cycles=6 */
return; /* 4392; RTS; cycles=12 */
}
@@ -2166,14 +2454,14 @@ void vec_nmi_4393(void)
void loc_4394(void)
{
- set_flags_cmp8(MEM8[0xF731], 0x01); /* 4394; CMP:G.B #H'01, @H'F731; cycles=7 */
+ set_flags_cmp8(MEM8[0xF731], 0x01); /* 4394; CMP:G.B #H'01, @H'F731; refs ram_F731; cycles=7 */
if (!C && !Z) goto loc_4422; /* 4399; BHI loc_4422; cycles=3/8 nt/t */
- set_flags_btst(MEM8[0xFB03], 7); /* 439C; BTST.B #7, @H'FB03; cycles=7 */
+ set_flags_btst(MEM8[0xFB03], 7); /* 439C; BTST.B #7, @H'FB03; refs ram_FB03; cycles=7 */
if (!Z) goto loc_4422; /* 43A0; BNE loc_4422; cycles=3/7 nt/t */
- R3 = (uint16_t)(MEM16[0xF736]); /* 43A3; MOV:G.W @H'F736, R3; cycles=6 */
+ R3 = (uint16_t)(MEM16[0xF736]); /* 43A3; MOV:G.W @H'F736, R3; refs ram_F736; cycles=6 */
if (Z) goto loc_4422; /* 43A7; BEQ loc_4422; cycles=3/8 nt/t */
- R4 = (uint16_t)(MEM16[0xF69E]); /* 43AA; MOV:G.W @H'F69E, R4; cycles=7 */
- R4 -= (uint16_t)(MEM16[0xF6BE]); /* 43AE; SUB.W @H'F6BE, R4; cycles=7 */
+ R4 = (uint16_t)(MEM16[0xF69E]); /* 43AA; MOV:G.W @H'F69E, R4; refs ram_F69E; cycles=7 */
+ R4 -= (uint16_t)(MEM16[0xF6BE]); /* 43AE; SUB.W @H'F6BE, R4; refs ram_F6BE; cycles=7 */
R3 &= ~BIT(15); /* 43B2; BCLR.W #15, R3; cycles=3 */
if (!Z) goto loc_43CF; /* 43B4; BNE loc_43CF; cycles=3/7 nt/t */
R3 &= ~BIT(14); /* 43B6; BCLR.W #14, R3; cycles=3 */
@@ -2191,83 +2479,83 @@ void loc_4394(void)
loc_43CF:
loc_442F(); /* 43CF; BSR loc_442F; cycles=14 */
set_flags_cmp16(R4, 0x0002); /* 43D1; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_43D9; /* 43D4; BEQ loc_43D9; cycles=3/7 nt/t */
- loc_1A35(); /* 43D6; BSR loc_1A35; cycles=13 */
-loc_43D9:
+ if (!Z) { /* 43D4; BEQ loc_43D9; cycles=3/7 nt/t */
+ loc_1A35(); /* 43D6; BSR loc_1A35; cycles=13 */
+ }
goto loc_4422; /* 43D9; BRA loc_4422; cycles=8 */
loc_43DB:
loc_442F(); /* 43DB; BSR loc_442F; cycles=14 */
set_flags_cmp16(R4, 0x0002); /* 43DD; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_43E5; /* 43E0; BEQ loc_43E5; cycles=3/7 nt/t */
- loc_1A9C(); /* 43E2; BSR loc_1A9C; cycles=13 */
-loc_43E5:
+ if (!Z) { /* 43E0; BEQ loc_43E5; cycles=3/7 nt/t */
+ loc_1A9C(); /* 43E2; BSR loc_1A9C; cycles=13 */
+ }
goto loc_4422; /* 43E5; BRA loc_4422; cycles=8 */
loc_43E7:
loc_442F(); /* 43E7; BSR loc_442F; cycles=14 */
set_flags_cmp16(R4, 0x0002); /* 43E9; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_43F1; /* 43EC; BEQ loc_43F1; cycles=3/7 nt/t */
- loc_1AE4(); /* 43EE; BSR loc_1AE4; cycles=13 */
-loc_43F1:
+ if (!Z) { /* 43EC; BEQ loc_43F1; cycles=3/7 nt/t */
+ loc_1AE4(); /* 43EE; BSR loc_1AE4; cycles=13 */
+ }
goto loc_4422; /* 43F1; BRA loc_4422; cycles=8 */
loc_43F3:
loc_442F(); /* 43F3; BSR loc_442F; cycles=14 */
set_flags_cmp16(R4, 0x0002); /* 43F5; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_43FD; /* 43F8; BEQ loc_43FD; cycles=3/7 nt/t */
- loc_1B0B(); /* 43FA; BSR loc_1B0B; cycles=13 */
-loc_43FD:
+ if (!Z) { /* 43F8; BEQ loc_43FD; cycles=3/7 nt/t */
+ loc_1B0B(); /* 43FA; BSR loc_1B0B; cycles=13 */
+ }
goto loc_4422; /* 43FD; BRA loc_4422; cycles=8 */
loc_43FF:
- MEM8[0xF770] = (uint8_t)(0x80); /* 43FF; MOV:G.B #H'80, @H'F770; cycles=9 */
- MEM16[0xF772] = (uint16_t)(R4); /* 4404; MOV:G.W R4, @H'F772; cycles=7 */
+ MEM8[0xF770] = (uint8_t)(0x80); /* 43FF; MOV:G.B #H'80, @H'F770; refs ram_F770; cycles=9 */
+ MEM16[0xF772] = (uint16_t)(R4); /* 4404; MOV:G.W R4, @H'F772; refs ram_F772; cycles=7 */
loc_48FA(); /* 4408; BSR loc_48FA; cycles=13 */
goto loc_4422; /* 440B; BRA loc_4422; cycles=8 */
loc_440D:
loc_442F(); /* 440D; BSR loc_442F; cycles=14 */
set_flags_cmp16(R4, 0x0002); /* 440F; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_4420; /* 4412; BEQ loc_4420; cycles=3/7 nt/t */
- MEM8[0xF770] = (uint8_t)(0x80); /* 4414; MOV:G.B #H'80, @H'F770; cycles=9 */
- MEM16[0xF772] = (uint16_t)(R4); /* 4419; MOV:G.W R4, @H'F772; cycles=6 */
- loc_48FA(); /* 441D; BSR loc_48FA; cycles=14 */
-loc_4420:
+ if (!Z) { /* 4412; BEQ loc_4420; cycles=3/7 nt/t */
+ MEM8[0xF770] = (uint8_t)(0x80); /* 4414; MOV:G.B #H'80, @H'F770; refs ram_F770; cycles=9 */
+ MEM16[0xF772] = (uint16_t)(R4); /* 4419; MOV:G.W R4, @H'F772; refs ram_F772; cycles=6 */
+ loc_48FA(); /* 441D; BSR loc_48FA; cycles=14 */
+ }
goto loc_4422; /* 4420; BRA loc_4422; cycles=7 */
loc_4422:
- R4 = (uint16_t)(MEM16[0xF69E]); /* 4422; MOV:G.W @H'F69E, R4; cycles=7 */
- MEM16[0xF6BE] = (uint16_t)(R4); /* 4426; MOV:G.W R4, @H'F6BE; cycles=7 */
- MEM8[0xFB02] = 0; /* 442A; CLR.B @H'FB02; cycles=9 */
+ R4 = (uint16_t)(MEM16[0xF69E]); /* 4422; MOV:G.W @H'F69E, R4; refs ram_F69E; cycles=7 */
+ MEM16[0xF6BE] = (uint16_t)(R4); /* 4426; MOV:G.W R4, @H'F6BE; refs ram_F6BE; cycles=7 */
+ MEM8[0xFB02] = 0; /* 442A; CLR.B @H'FB02; refs ram_FB02; cycles=9 */
return; /* 442E; RTS; cycles=12 */
}
void loc_442F(void)
{
- R4 += (uint8_t)(MEM8[0xF6F7]); /* 442F; ADD:G.B @H'F6F7, R4; cycles=6 */
+ R4 += (uint8_t)(MEM8[0xF6F7]); /* 442F; ADD:G.B @H'F6F7, R4; refs ram_F6F7; cycles=6 */
set_flags_cmp8(R4, 0x88); /* 4433; CMP:E #H'88, R4; cycles=2 */
if (!C) goto loc_4444; /* 4435; BCC loc_4444; cycles=3/8 nt/t */
set_flags_cmp8(R4, 0x78); /* 4437; CMP:E #H'78, R4; cycles=2 */
if (C || Z) goto loc_444E; /* 4439; BLS loc_444E; cycles=3/8 nt/t */
- MEM8[0xF6F7] = (uint8_t)(R4); /* 443B; MOV:G.B R4, @H'F6F7; cycles=6 */
- R4 = (uint16_t)(0x0002); /* 443F; MOV:I.W #H'0002, R4; cycles=3 */
+ MEM8[0xF6F7] = (uint8_t)(R4); /* 443B; MOV:G.B R4, @H'F6F7; refs ram_F6F7; cycles=6 */
+ R4 = (uint16_t)(0x0002); /* 443F; MOV:I.W #H'0002, R4; dataflow R4=0x0002; cycles=3 */
goto loc_4456; /* 4442; BRA loc_4456; cycles=7 */
loc_4444:
- MEM8[0xF6F7] = (uint8_t)(0x80); /* 4444; MOV:G.B #H'80, @H'F6F7; cycles=9 */
- R4 = (uint16_t)(0x0000); /* 4449; MOV:I.W #H'0000, R4; cycles=3 */
+ MEM8[0xF6F7] = (uint8_t)(0x80); /* 4444; MOV:G.B #H'80, @H'F6F7; refs ram_F6F7; cycles=9 */
+ R4 = (uint16_t)(0x0000); /* 4449; MOV:I.W #H'0000, R4; dataflow R4=0x0000; cycles=3 */
goto loc_4456; /* 444C; BRA loc_4456; cycles=7 */
loc_444E:
- MEM8[0xF6F7] = (uint8_t)(0x80); /* 444E; MOV:G.B #H'80, @H'F6F7; cycles=9 */
- R4 = (uint16_t)(0x0001); /* 4453; MOV:I.W #H'0001, R4; cycles=3 */
+ MEM8[0xF6F7] = (uint8_t)(0x80); /* 444E; MOV:G.B #H'80, @H'F6F7; refs ram_F6F7; cycles=9 */
+ R4 = (uint16_t)(0x0001); /* 4453; MOV:I.W #H'0001, R4; dataflow R4=0x0001; cycles=3 */
loc_4456:
return; /* 4456; RTS; cycles=12 */
}
void loc_4457(void)
{
- set_flags_cmp8(MEM8[0xF731], 0x01); /* 4457; CMP:G.B #H'01, @H'F731; cycles=6 */
+ set_flags_cmp8(MEM8[0xF731], 0x01); /* 4457; CMP:G.B #H'01, @H'F731; refs ram_F731; cycles=6 */
if (!C && !Z) goto loc_44E5; /* 445C; BHI loc_44E5; cycles=3/7 nt/t */
- set_flags_btst(MEM8[0xFB03], 7); /* 445F; BTST.B #7, @H'FB03; cycles=6 */
+ set_flags_btst(MEM8[0xFB03], 7); /* 445F; BTST.B #7, @H'FB03; refs ram_FB03; cycles=6 */
if (!Z) goto loc_44E5; /* 4463; BNE loc_44E5; cycles=3/8 nt/t */
- R3 = (uint16_t)(MEM16[0xF738]); /* 4466; MOV:G.W @H'F738, R3; cycles=7 */
+ R3 = (uint16_t)(MEM16[0xF738]); /* 4466; MOV:G.W @H'F738, R3; refs ram_F738; cycles=7 */
if (Z) goto loc_44E5; /* 446A; BEQ loc_44E5; cycles=3/7 nt/t */
- R4 = (uint16_t)(MEM16[0xF69C]); /* 446D; MOV:G.W @H'F69C, R4; cycles=6 */
- R4 -= (uint16_t)(MEM16[0xF6BC]); /* 4471; SUB.W @H'F6BC, R4; cycles=6 */
+ R4 = (uint16_t)(MEM16[0xF69C]); /* 446D; MOV:G.W @H'F69C, R4; refs ram_F69C; cycles=6 */
+ R4 -= (uint16_t)(MEM16[0xF6BC]); /* 4471; SUB.W @H'F6BC, R4; refs ram_F6BC; cycles=6 */
R3 &= ~BIT(15); /* 4475; BCLR.W #15, R3; cycles=3 */
if (!Z) goto loc_4492; /* 4477; BNE loc_4492; cycles=3/8 nt/t */
R3 &= ~BIT(14); /* 4479; BCLR.W #14, R3; cycles=3 */
@@ -2285,83 +2573,83 @@ void loc_4457(void)
loc_4492:
loc_44F2(); /* 4492; BSR loc_44F2; cycles=13 */
set_flags_cmp16(R4, 0x0002); /* 4494; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_449C; /* 4497; BEQ loc_449C; cycles=3/8 nt/t */
- loc_1A35(); /* 4499; BSR loc_1A35; cycles=14 */
-loc_449C:
+ if (!Z) { /* 4497; BEQ loc_449C; cycles=3/8 nt/t */
+ loc_1A35(); /* 4499; BSR loc_1A35; cycles=14 */
+ }
goto loc_44E5; /* 449C; BRA loc_44E5; cycles=7 */
loc_449E:
loc_44F2(); /* 449E; BSR loc_44F2; cycles=13 */
set_flags_cmp16(R4, 0x0002); /* 44A0; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_44A8; /* 44A3; BEQ loc_44A8; cycles=3/8 nt/t */
- loc_1A9C(); /* 44A5; BSR loc_1A9C; cycles=14 */
-loc_44A8:
+ if (!Z) { /* 44A3; BEQ loc_44A8; cycles=3/8 nt/t */
+ loc_1A9C(); /* 44A5; BSR loc_1A9C; cycles=14 */
+ }
goto loc_44E5; /* 44A8; BRA loc_44E5; cycles=7 */
loc_44AA:
loc_44F2(); /* 44AA; BSR loc_44F2; cycles=13 */
set_flags_cmp16(R4, 0x0002); /* 44AC; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_44B4; /* 44AF; BEQ loc_44B4; cycles=3/8 nt/t */
- loc_1AE4(); /* 44B1; BSR loc_1AE4; cycles=14 */
-loc_44B4:
+ if (!Z) { /* 44AF; BEQ loc_44B4; cycles=3/8 nt/t */
+ loc_1AE4(); /* 44B1; BSR loc_1AE4; cycles=14 */
+ }
goto loc_44E5; /* 44B4; BRA loc_44E5; cycles=7 */
loc_44B6:
loc_44F2(); /* 44B6; BSR loc_44F2; cycles=13 */
set_flags_cmp16(R4, 0x0002); /* 44B8; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_44C0; /* 44BB; BEQ loc_44C0; cycles=3/8 nt/t */
- loc_1B0B(); /* 44BD; BSR loc_1B0B; cycles=14 */
-loc_44C0:
+ if (!Z) { /* 44BB; BEQ loc_44C0; cycles=3/8 nt/t */
+ loc_1B0B(); /* 44BD; BSR loc_1B0B; cycles=14 */
+ }
goto loc_44E5; /* 44C0; BRA loc_44E5; cycles=7 */
loc_44C2:
- MEM8[0xF770] = (uint8_t)(0x40); /* 44C2; MOV:G.B #H'40, @H'F770; cycles=9 */
- MEM16[0xF772] = (uint16_t)(R4); /* 44C7; MOV:G.W R4, @H'F772; cycles=6 */
+ MEM8[0xF770] = (uint8_t)(0x40); /* 44C2; MOV:G.B #H'40, @H'F770; refs ram_F770; cycles=9 */
+ MEM16[0xF772] = (uint16_t)(R4); /* 44C7; MOV:G.W R4, @H'F772; refs ram_F772; cycles=6 */
loc_48FA(); /* 44CB; BSR loc_48FA; cycles=14 */
goto loc_44E5; /* 44CE; BRA loc_44E5; cycles=7 */
loc_44D0:
loc_44F2(); /* 44D0; BSR loc_44F2; cycles=13 */
set_flags_cmp16(R4, 0x0002); /* 44D2; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_44E3; /* 44D5; BEQ loc_44E3; cycles=3/8 nt/t */
- MEM8[0xF770] = (uint8_t)(0x40); /* 44D7; MOV:G.B #H'40, @H'F770; cycles=9 */
- MEM16[0xF772] = (uint16_t)(R4); /* 44DC; MOV:G.W R4, @H'F772; cycles=7 */
- loc_48FA(); /* 44E0; BSR loc_48FA; cycles=13 */
-loc_44E3:
+ if (!Z) { /* 44D5; BEQ loc_44E3; cycles=3/8 nt/t */
+ MEM8[0xF770] = (uint8_t)(0x40); /* 44D7; MOV:G.B #H'40, @H'F770; refs ram_F770; cycles=9 */
+ MEM16[0xF772] = (uint16_t)(R4); /* 44DC; MOV:G.W R4, @H'F772; refs ram_F772; cycles=7 */
+ loc_48FA(); /* 44E0; BSR loc_48FA; cycles=13 */
+ }
goto loc_44E5; /* 44E3; BRA loc_44E5; cycles=8 */
loc_44E5:
- R4 = (uint16_t)(MEM16[0xF69C]); /* 44E5; MOV:G.W @H'F69C, R4; cycles=6 */
- MEM16[0xF6BC] = (uint16_t)(R4); /* 44E9; MOV:G.W R4, @H'F6BC; cycles=6 */
- MEM8[0xFB02] = 0; /* 44ED; CLR.B @H'FB02; cycles=8 */
+ R4 = (uint16_t)(MEM16[0xF69C]); /* 44E5; MOV:G.W @H'F69C, R4; refs ram_F69C; cycles=6 */
+ MEM16[0xF6BC] = (uint16_t)(R4); /* 44E9; MOV:G.W R4, @H'F6BC; refs ram_F6BC; cycles=6 */
+ MEM8[0xFB02] = 0; /* 44ED; CLR.B @H'FB02; refs ram_FB02; cycles=8 */
return; /* 44F1; RTS; cycles=13 */
}
void loc_44F2(void)
{
- R4 += (uint8_t)(MEM8[0xF6F8]); /* 44F2; ADD:G.B @H'F6F8, R4; cycles=7 */
+ R4 += (uint8_t)(MEM8[0xF6F8]); /* 44F2; ADD:G.B @H'F6F8, R4; refs ram_F6F8; cycles=7 */
set_flags_cmp8(R4, 0x88); /* 44F6; CMP:E #H'88, R4; cycles=2 */
if (!C) goto loc_4507; /* 44F8; BCC loc_4507; cycles=3/7 nt/t */
set_flags_cmp8(R4, 0x78); /* 44FA; CMP:E #H'78, R4; cycles=2 */
if (C || Z) goto loc_4511; /* 44FC; BLS loc_4511; cycles=3/7 nt/t */
- MEM8[0xF6F8] = (uint8_t)(R4); /* 44FE; MOV:G.B R4, @H'F6F8; cycles=7 */
- R4 = (uint16_t)(0x0002); /* 4502; MOV:I.W #H'0002, R4; cycles=3 */
+ MEM8[0xF6F8] = (uint8_t)(R4); /* 44FE; MOV:G.B R4, @H'F6F8; refs ram_F6F8; cycles=7 */
+ R4 = (uint16_t)(0x0002); /* 4502; MOV:I.W #H'0002, R4; dataflow R4=0x0002; cycles=3 */
goto loc_4519; /* 4505; BRA loc_4519; cycles=8 */
loc_4507:
- MEM8[0xF6F8] = (uint8_t)(0x80); /* 4507; MOV:G.B #H'80, @H'F6F8; cycles=9 */
- R4 = (uint16_t)(0x0000); /* 450C; MOV:I.W #H'0000, R4; cycles=3 */
+ MEM8[0xF6F8] = (uint8_t)(0x80); /* 4507; MOV:G.B #H'80, @H'F6F8; refs ram_F6F8; cycles=9 */
+ R4 = (uint16_t)(0x0000); /* 450C; MOV:I.W #H'0000, R4; dataflow R4=0x0000; cycles=3 */
goto loc_4519; /* 450F; BRA loc_4519; cycles=8 */
loc_4511:
- MEM8[0xF6F8] = (uint8_t)(0x80); /* 4511; MOV:G.B #H'80, @H'F6F8; cycles=9 */
- R4 = (uint16_t)(0x0001); /* 4516; MOV:I.W #H'0001, R4; cycles=3 */
+ MEM8[0xF6F8] = (uint8_t)(0x80); /* 4511; MOV:G.B #H'80, @H'F6F8; refs ram_F6F8; cycles=9 */
+ R4 = (uint16_t)(0x0001); /* 4516; MOV:I.W #H'0001, R4; dataflow R4=0x0001; cycles=3 */
loc_4519:
return; /* 4519; RTS; cycles=13 */
}
void loc_451A(void)
{
- set_flags_cmp8(MEM8[0xF731], 0x01); /* 451A; CMP:G.B #H'01, @H'F731; cycles=7 */
+ set_flags_cmp8(MEM8[0xF731], 0x01); /* 451A; CMP:G.B #H'01, @H'F731; refs ram_F731; cycles=7 */
if (!C && !Z) goto loc_45A8; /* 451F; BHI loc_45A8; cycles=3/8 nt/t */
- set_flags_btst(MEM8[0xFB03], 7); /* 4522; BTST.B #7, @H'FB03; cycles=7 */
+ set_flags_btst(MEM8[0xFB03], 7); /* 4522; BTST.B #7, @H'FB03; refs ram_FB03; cycles=7 */
if (!Z) goto loc_45A8; /* 4526; BNE loc_45A8; cycles=3/7 nt/t */
- R3 = (uint16_t)(MEM16[0xF73A]); /* 4529; MOV:G.W @H'F73A, R3; cycles=6 */
+ R3 = (uint16_t)(MEM16[0xF73A]); /* 4529; MOV:G.W @H'F73A, R3; refs ram_F73A; cycles=6 */
if (Z) goto loc_45A8; /* 452D; BEQ loc_45A8; cycles=3/8 nt/t */
- R4 = (uint16_t)(MEM16[0xF69A]); /* 4530; MOV:G.W @H'F69A, R4; cycles=7 */
- R4 -= (uint16_t)(MEM16[0xF6BA]); /* 4534; SUB.W @H'F6BA, R4; cycles=7 */
+ R4 = (uint16_t)(MEM16[0xF69A]); /* 4530; MOV:G.W @H'F69A, R4; refs ram_F69A; cycles=7 */
+ R4 -= (uint16_t)(MEM16[0xF6BA]); /* 4534; SUB.W @H'F6BA, R4; refs ram_F6BA; cycles=7 */
R3 &= ~BIT(15); /* 4538; BCLR.W #15, R3; cycles=3 */
if (!Z) goto loc_4555; /* 453A; BNE loc_4555; cycles=3/7 nt/t */
R3 &= ~BIT(14); /* 453C; BCLR.W #14, R3; cycles=3 */
@@ -2379,106 +2667,106 @@ void loc_451A(void)
loc_4555:
loc_45B5(); /* 4555; BSR loc_45B5; cycles=14 */
set_flags_cmp16(R4, 0x0002); /* 4557; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_455F; /* 455A; BEQ loc_455F; cycles=3/7 nt/t */
- loc_1A35(); /* 455C; BSR loc_1A35; cycles=13 */
-loc_455F:
+ if (!Z) { /* 455A; BEQ loc_455F; cycles=3/7 nt/t */
+ loc_1A35(); /* 455C; BSR loc_1A35; cycles=13 */
+ }
goto loc_45A8; /* 455F; BRA loc_45A8; cycles=8 */
loc_4561:
loc_45B5(); /* 4561; BSR loc_45B5; cycles=14 */
set_flags_cmp16(R4, 0x0002); /* 4563; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_456B; /* 4566; BEQ loc_456B; cycles=3/7 nt/t */
- loc_1A9C(); /* 4568; BSR loc_1A9C; cycles=13 */
-loc_456B:
+ if (!Z) { /* 4566; BEQ loc_456B; cycles=3/7 nt/t */
+ loc_1A9C(); /* 4568; BSR loc_1A9C; cycles=13 */
+ }
goto loc_45A8; /* 456B; BRA loc_45A8; cycles=8 */
loc_456D:
loc_45B5(); /* 456D; BSR loc_45B5; cycles=14 */
set_flags_cmp16(R4, 0x0002); /* 456F; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_4577; /* 4572; BEQ loc_4577; cycles=3/7 nt/t */
- loc_1AE4(); /* 4574; BSR loc_1AE4; cycles=13 */
-loc_4577:
+ if (!Z) { /* 4572; BEQ loc_4577; cycles=3/7 nt/t */
+ loc_1AE4(); /* 4574; BSR loc_1AE4; cycles=13 */
+ }
goto loc_45A8; /* 4577; BRA loc_45A8; cycles=8 */
loc_4579:
loc_45B5(); /* 4579; BSR loc_45B5; cycles=14 */
set_flags_cmp16(R4, 0x0002); /* 457B; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_4583; /* 457E; BEQ loc_4583; cycles=3/7 nt/t */
- loc_1B0B(); /* 4580; BSR loc_1B0B; cycles=13 */
-loc_4583:
+ if (!Z) { /* 457E; BEQ loc_4583; cycles=3/7 nt/t */
+ loc_1B0B(); /* 4580; BSR loc_1B0B; cycles=13 */
+ }
goto loc_45A8; /* 4583; BRA loc_45A8; cycles=8 */
loc_4585:
- MEM8[0xF770] = (uint8_t)(0x20); /* 4585; MOV:G.B #H'20, @H'F770; cycles=9 */
- MEM16[0xF772] = (uint16_t)(R4); /* 458A; MOV:G.W R4, @H'F772; cycles=7 */
+ MEM8[0xF770] = (uint8_t)(0x20); /* 4585; MOV:G.B #H'20, @H'F770; refs ram_F770; cycles=9 */
+ MEM16[0xF772] = (uint16_t)(R4); /* 458A; MOV:G.W R4, @H'F772; refs ram_F772; cycles=7 */
loc_48FA(); /* 458E; BSR loc_48FA; cycles=13 */
goto loc_45A8; /* 4591; BRA loc_45A8; cycles=8 */
loc_4593:
loc_45B5(); /* 4593; BSR loc_45B5; cycles=14 */
set_flags_cmp16(R4, 0x0002); /* 4595; CMP:I #H'0002, R4; cycles=3 */
- if (Z) goto loc_45A6; /* 4598; BEQ loc_45A6; cycles=3/7 nt/t */
- MEM8[0xF770] = (uint8_t)(0x20); /* 459A; MOV:G.B #H'20, @H'F770; cycles=9 */
- MEM16[0xF772] = (uint16_t)(R4); /* 459F; MOV:G.W R4, @H'F772; cycles=6 */
- loc_48FA(); /* 45A3; BSR loc_48FA; cycles=14 */
-loc_45A6:
+ if (!Z) { /* 4598; BEQ loc_45A6; cycles=3/7 nt/t */
+ MEM8[0xF770] = (uint8_t)(0x20); /* 459A; MOV:G.B #H'20, @H'F770; refs ram_F770; cycles=9 */
+ MEM16[0xF772] = (uint16_t)(R4); /* 459F; MOV:G.W R4, @H'F772; refs ram_F772; cycles=6 */
+ loc_48FA(); /* 45A3; BSR loc_48FA; cycles=14 */
+ }
goto loc_45A8; /* 45A6; BRA loc_45A8; cycles=7 */
loc_45A8:
- R4 = (uint16_t)(MEM16[0xF69A]); /* 45A8; MOV:G.W @H'F69A, R4; cycles=7 */
- MEM16[0xF6BA] = (uint16_t)(R4); /* 45AC; MOV:G.W R4, @H'F6BA; cycles=7 */
- MEM8[0xFB02] = 0; /* 45B0; CLR.B @H'FB02; cycles=9 */
+ R4 = (uint16_t)(MEM16[0xF69A]); /* 45A8; MOV:G.W @H'F69A, R4; refs ram_F69A; cycles=7 */
+ MEM16[0xF6BA] = (uint16_t)(R4); /* 45AC; MOV:G.W R4, @H'F6BA; refs ram_F6BA; cycles=7 */
+ MEM8[0xFB02] = 0; /* 45B0; CLR.B @H'FB02; refs ram_FB02; cycles=9 */
return; /* 45B4; RTS; cycles=12 */
}
void loc_45B5(void)
{
- R4 += (uint8_t)(MEM8[0xF6F9]); /* 45B5; ADD:G.B @H'F6F9, R4; cycles=6 */
+ R4 += (uint8_t)(MEM8[0xF6F9]); /* 45B5; ADD:G.B @H'F6F9, R4; refs ram_F6F9; cycles=6 */
set_flags_cmp8(R4, 0x88); /* 45B9; CMP:E #H'88, R4; cycles=2 */
if (!C) goto loc_45CA; /* 45BB; BCC loc_45CA; cycles=3/8 nt/t */
set_flags_cmp8(R4, 0x78); /* 45BD; CMP:E #H'78, R4; cycles=2 */
if (C || Z) goto loc_45D4; /* 45BF; BLS loc_45D4; cycles=3/8 nt/t */
- MEM8[0xF6F9] = (uint8_t)(R4); /* 45C1; MOV:G.B R4, @H'F6F9; cycles=6 */
- R4 = (uint16_t)(0x0002); /* 45C5; MOV:I.W #H'0002, R4; cycles=3 */
+ MEM8[0xF6F9] = (uint8_t)(R4); /* 45C1; MOV:G.B R4, @H'F6F9; refs ram_F6F9; cycles=6 */
+ R4 = (uint16_t)(0x0002); /* 45C5; MOV:I.W #H'0002, R4; dataflow R4=0x0002; cycles=3 */
goto loc_45DC; /* 45C8; BRA loc_45DC; cycles=7 */
loc_45CA:
- MEM8[0xF6F9] = (uint8_t)(0x80); /* 45CA; MOV:G.B #H'80, @H'F6F9; cycles=9 */
- R4 = (uint16_t)(0x0000); /* 45CF; MOV:I.W #H'0000, R4; cycles=3 */
+ MEM8[0xF6F9] = (uint8_t)(0x80); /* 45CA; MOV:G.B #H'80, @H'F6F9; refs ram_F6F9; cycles=9 */
+ R4 = (uint16_t)(0x0000); /* 45CF; MOV:I.W #H'0000, R4; dataflow R4=0x0000; cycles=3 */
goto loc_45DC; /* 45D2; BRA loc_45DC; cycles=7 */
loc_45D4:
- MEM8[0xF6F9] = (uint8_t)(0x80); /* 45D4; MOV:G.B #H'80, @H'F6F9; cycles=9 */
- R4 = (uint16_t)(0x0001); /* 45D9; MOV:I.W #H'0001, R4; cycles=3 */
+ MEM8[0xF6F9] = (uint8_t)(0x80); /* 45D4; MOV:G.B #H'80, @H'F6F9; refs ram_F6F9; cycles=9 */
+ R4 = (uint16_t)(0x0001); /* 45D9; MOV:I.W #H'0001, R4; dataflow R4=0x0001; cycles=3 */
loc_45DC:
return; /* 45DC; RTS; cycles=12 */
}
void loc_48EF(void)
{
- R0 = (uint16_t)(MEM16[0xF734]); /* 48EF; MOV:G.W @H'F734, R0; cycles=6 */
- MEM16[0xF732] = (uint16_t)(R0); /* 48F3; MOV:G.W R0, @H'F732; cycles=6 */
+ R0 = (uint16_t)(MEM16[0xF734]); /* 48EF; MOV:G.W @H'F734, R0; refs ram_F734; cycles=6 */
+ MEM16[0xF732] = (uint16_t)(R0); /* 48F3; MOV:G.W R0, @H'F732; refs ram_F732; cycles=6 */
loc_48FA(); /* 48F7; BSR loc_48FA; cycles=14 */
return; /* 48F9; RTS; cycles=13 */
}
void loc_48FA(void)
{
- set_flags_btst(MEM8[0xFB03], 7); /* 48FA; BTST.B #7, @H'FB03; cycles=7 */
+ set_flags_btst(MEM8[0xFB03], 7); /* 48FA; BTST.B #7, @H'FB03; refs ram_FB03; cycles=7 */
if (!Z) goto loc_4929; /* 48FE; BNE loc_4929; cycles=3/7 nt/t */
- set_flags_cmp8(MEM8[0xF732], 0x1A); /* 4900; CMP:G.B #H'1A, @H'F732; cycles=7 */
+ set_flags_cmp8(MEM8[0xF732], 0x1A); /* 4900; CMP:G.B #H'1A, @H'F732; refs ram_F732; cycles=7 */
if (Z) goto loc_4929; /* 4905; BEQ loc_4929; cycles=3/8 nt/t */
- set_flags_cmp16(MEM16[0xF732], 0x1900); /* 4907; CMP:G.W #H'1900, @H'F732; cycles=6 */
+ set_flags_cmp16(MEM16[0xF732], 0x1900); /* 4907; CMP:G.W #H'1900, @H'F732; refs ram_F732; cycles=6 */
if (Z) goto loc_4929; /* 490D; BEQ loc_4929; cycles=3/8 nt/t */
- set_flags_btst(MEM16[0xE1EC], 13); /* 490F; BTST.W #13, @H'E1EC; cycles=6 */
+ set_flags_btst(MEM16[0xE1EC], 13); /* 490F; BTST.W #13, @H'E1EC; refs mem_E1EC; cycles=6 */
if (Z) goto loc_4929; /* 4913; BEQ loc_4929; cycles=3/8 nt/t */
- R0 = (uint16_t)(MEM16[0xE1EC]); /* 4915; MOV:G.W @H'E1EC, R0; cycles=6 */
+ R0 = (uint16_t)(MEM16[0xE1EC]); /* 4915; MOV:G.W @H'E1EC, R0; refs mem_E1EC; cycles=6 */
R0 &= (uint16_t)(0x9FFF); /* 4919; AND.W #H'9FFF, R0; cycles=4 */
- MEM16[0xE9EC] = (uint16_t)(R0); /* 491D; MOV:G.W R0, @H'E9EC; cycles=6 */
- R2 = (uint8_t)(0x80); /* 4921; MOV:E.B #H'80, R2; cycles=2 */
- R3 = (uint16_t)(0x00F6); /* 4923; MOV:I.W #H'00F6, R3; cycles=3 */
+ MEM16[0xE9EC] = (uint16_t)(R0); /* 491D; MOV:G.W R0, @H'E9EC; refs mem_E9EC; cycles=6 */
+ R2 = (uint8_t)(0x80); /* 4921; MOV:E.B #H'80, R2; dataflow R2=0x80; cycles=2 */
+ R3 = (uint16_t)(0x00F6); /* 4923; MOV:I.W #H'00F6, R3; dataflow R3=0x00F6; cycles=3 */
loc_3E54(); /* 4926; BSR loc_3E54; cycles=13 */
loc_4929:
- set_flags_btst(MEM8[0xF76E], 6); /* 4929; BTST.B #6, @H'F76E; cycles=6 */
- if (!Z) goto loc_493D; /* 492D; BNE loc_493D; cycles=3/8 nt/t */
- R0 = (uint8_t)(MEM8[0xF732]); /* 492F; MOV:G.B @H'F732, R0; cycles=6 */
- R0 = zero_extend8(R0); /* 4933; EXTU.B R0; cycles=3 */
- R0 <<= 1; /* 4935; SHLL.B R0; cycles=2 */
- R0 = (uint16_t)(MEM16[R0 + 0x493E]); /* 4937; MOV:G.W @(H'493E,R0), R0; cycles=6 */
- call_indirect(MEM8[R0]); /* 493B; JSR @R0; cycles=14 */
-loc_493D:
+ set_flags_btst(MEM8[0xF76E], 6); /* 4929; BTST.B #6, @H'F76E; refs ram_F76E; cycles=6 */
+ if (Z) { /* 492D; BNE loc_493D; cycles=3/8 nt/t */
+ R0 = (uint8_t)(MEM8[0xF732]); /* 492F; MOV:G.B @H'F732, R0; refs ram_F732; cycles=6 */
+ R0 = zero_extend8(R0); /* 4933; EXTU.B R0; cycles=3 */
+ R0 <<= 1; /* 4935; SHLL.B R0; cycles=2 */
+ R0 = (uint16_t)(MEM16[R0 + 0x493E]); /* 4937; MOV:G.W @(H'493E,R0), R0; cycles=6 */
+ call_indirect_table(0x493E, R0, R0); /* 493B; JSR @R0; JSR @R0 uses R0 loaded from pointer table H'493E via R0 (0/52 decoded targets); cycles=14 */
+ }
return; /* 493D; RTS; cycles=13 */
}
@@ -2520,21 +2808,21 @@ void loc_622B(void)
loc_6244:
set_flags_cmp8(R5, 0x7F); /* 6244; CMP:E #H'7F, R5; cycles=2 */
if (!C && !Z) goto loc_625F; /* 6246; BHI loc_625F; cycles=3/7 nt/t */
- R4 = (uint16_t)(0x0000); /* 6248; MOV:I.W #H'0000, R4; cycles=3 */
+ R4 = (uint16_t)(0x0000); /* 6248; MOV:I.W #H'0000, R4; dataflow R4=0x0000; cycles=3 */
goto loc_6264; /* 624B; BRA loc_6264; cycles=8 */
loc_624D:
set_flags_cmp8(R5, 0xFF); /* 624D; CMP:E #H'FF, R5; cycles=2 */
if (!C && !Z) goto loc_625F; /* 624F; BHI loc_625F; cycles=3/8 nt/t */
- R4 = (uint16_t)(0x0080); /* 6251; MOV:I.W #H'0080, R4; cycles=3 */
+ R4 = (uint16_t)(0x0080); /* 6251; MOV:I.W #H'0080, R4; dataflow R4=0x0080; cycles=3 */
goto loc_6264; /* 6254; BRA loc_6264; cycles=7 */
loc_6256:
set_flags_cmp8(R5, 0x7F); /* 6256; CMP:E #H'7F, R5; cycles=2 */
if (!C && !Z) goto loc_625F; /* 6258; BHI loc_625F; cycles=3/7 nt/t */
- R4 = (uint16_t)(0x0180); /* 625A; MOV:I.W #H'0180, R4; cycles=3 */
+ R4 = (uint16_t)(0x0180); /* 625A; MOV:I.W #H'0180, R4; dataflow R4=0x0180; cycles=3 */
goto loc_6264; /* 625D; BRA loc_6264; cycles=8 */
loc_625F:
- R4 = 0; /* 625F; CLR.W R4; cycles=3 */
- R5 = (uint16_t)(0x01FF); /* 6261; MOV:I.W #H'01FF, R5; cycles=3 */
+ R4 = 0; /* 625F; CLR.W R4; dataflow R4=0x0000; cycles=3 */
+ R5 = (uint16_t)(0x01FF); /* 6261; MOV:I.W #H'01FF, R5; dataflow R5=0x01FF; cycles=3 */
loc_6264:
R5 += (uint16_t)(R4); /* 6264; ADD:G.W R4, R5; cycles=3 */
return; /* 6266; RTS; cycles=12 */
@@ -2542,86 +2830,87 @@ loc_6264:
void loc_BA26(void)
{
- set_flags_tst8(MEM8[0xF9C0]); /* BA26; TST.B @H'F9C0; cycles=7 */
- if (!Z) goto loc_BA26; /* BA2A; BNE loc_BA26; cycles=3/7 nt/t */
- MEM8[0xF9C0] = (uint8_t)(0x64); /* BA2C; MOV:G.B #H'64, @H'F9C0; cycles=9 */
- MEM8[0xF9C4] = (uint8_t)(0x07); /* BA31; MOV:G.B #H'07, @H'F9C4; cycles=9 */
- R0 = (uint16_t)(MEM16[0xF850]); /* BA36; MOV:G.W @H'F850, R0; cycles=7 */
- MEM16[0xF858] = (uint16_t)(R0); /* BA3A; MOV:G.W R0, @H'F858; cycles=7 */
- R0 = (uint16_t)(MEM16[0xF852]); /* BA3E; MOV:G.W @H'F852, R0; cycles=7 */
- MEM16[0xF85A] = (uint16_t)(R0); /* BA42; MOV:G.W R0, @H'F85A; cycles=7 */
- R0 = (uint8_t)(MEM8[0xF854]); /* BA46; MOV:G.B @H'F854, R0; cycles=7 */
- MEM8[0xF85C] = (uint8_t)(R0); /* BA4A; MOV:G.B R0, @H'F85C; cycles=7 */
- R0 = (uint8_t)(0x5A); /* BA4E; MOV:E.B #H'5A, R0; cycles=2 */
- R0 ^= (uint8_t)(MEM8[0xF858]); /* BA50; XOR.B @H'F858, R0; cycles=7 */
- R0 ^= (uint8_t)(MEM8[0xF859]); /* BA54; XOR.B @H'F859, R0; cycles=7 */
- R0 ^= (uint8_t)(MEM8[0xF85A]); /* BA58; XOR.B @H'F85A, R0; cycles=7 */
- R0 ^= (uint8_t)(MEM8[0xF85B]); /* BA5C; XOR.B @H'F85B, R0; cycles=7 */
- R0 ^= (uint8_t)(MEM8[0xF85C]); /* BA60; XOR.B @H'F85C, R0; cycles=7 */
- MEM8[0xF85D] = (uint8_t)(R0); /* BA64; MOV:G.B R0, @H'F85D; cycles=7 */
-loc_BA68:
- set_flags_btst(SCI1_SSR, 7); /* BA68; BTST.B #7, @SCI1_SSR; cycles=7 */
- if (Z) goto loc_BA68; /* BA6C; BEQ loc_BA68; cycles=3/7 nt/t */
- R0 = (uint8_t)(MEM8[0xF858]); /* BA6E; MOV:G.B @H'F858, R0; cycles=7 */
- SCI1_TDR = (uint8_t)(R0); /* BA72; MOV:G.B R0, @SCI1_TDR; SCI1_TDR; cycles=7 */
- MEM8[0xF9C2] = (uint8_t)(0x01); /* BA76; MOV:G.B #H'01, @H'F9C2; cycles=9 */
- SCI1_SSR &= ~BIT(7); /* BA7B; BCLR.B #7, @SCI1_SSR; clear TDRE (bit 7) of SCI1_SSR; cycles=8 */
- SCI1_SCR |= BIT(7); /* BA7F; BSET.B #7, @SCI1_SCR; set TIE (bit 7) of SCI1_SCR; cycles=8 */
+ do {
+ set_flags_tst8(MEM8[0xF9C0]); /* BA26; TST.B @H'F9C0; refs ram_F9C0; cycles=7 */
+ } while (!Z); /* BA2A; BNE loc_BA26; cycles=3/7 nt/t */
+ MEM8[0xF9C0] = (uint8_t)(0x64); /* BA2C; MOV:G.B #H'64, @H'F9C0; refs ram_F9C0; cycles=9 */
+ MEM8[0xF9C4] = (uint8_t)(0x07); /* BA31; MOV:G.B #H'07, @H'F9C4; refs ram_F9C4; cycles=9 */
+ R0 = (uint16_t)(MEM16[0xF850]); /* BA36; MOV:G.W @H'F850, R0; refs ram_F850; cycles=7 */
+ MEM16[0xF858] = (uint16_t)(R0); /* BA3A; MOV:G.W R0, @H'F858; refs ram_F858; cycles=7 */
+ R0 = (uint16_t)(MEM16[0xF852]); /* BA3E; MOV:G.W @H'F852, R0; refs ram_F852; cycles=7 */
+ MEM16[0xF85A] = (uint16_t)(R0); /* BA42; MOV:G.W R0, @H'F85A; refs ram_F85A; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF854]); /* BA46; MOV:G.B @H'F854, R0; refs ram_F854; cycles=7 */
+ MEM8[0xF85C] = (uint8_t)(R0); /* BA4A; MOV:G.B R0, @H'F85C; refs ram_F85C; cycles=7 */
+ R0 = (uint8_t)(0x5A); /* BA4E; MOV:E.B #H'5A, R0; dataflow R0=0x5A; cycles=2 */
+ R0 ^= (uint8_t)(MEM8[0xF858]); /* BA50; XOR.B @H'F858, R0; refs ram_F858; cycles=7 */
+ R0 ^= (uint8_t)(MEM8[0xF859]); /* BA54; XOR.B @H'F859, R0; refs ram_F859; cycles=7 */
+ R0 ^= (uint8_t)(MEM8[0xF85A]); /* BA58; XOR.B @H'F85A, R0; refs ram_F85A; cycles=7 */
+ R0 ^= (uint8_t)(MEM8[0xF85B]); /* BA5C; XOR.B @H'F85B, R0; refs ram_F85B; cycles=7 */
+ R0 ^= (uint8_t)(MEM8[0xF85C]); /* BA60; XOR.B @H'F85C, R0; refs ram_F85C; cycles=7 */
+ MEM8[0xF85D] = (uint8_t)(R0); /* BA64; MOV:G.B R0, @H'F85D; refs ram_F85D; cycles=7 */
+ do {
+ set_flags_btst(SCI1_SSR, 7); /* BA68; BTST.B #7, @SCI1_SSR; refs SCI1_SSR; cycles=7 */
+ } while (Z); /* BA6C; BEQ loc_BA68; cycles=3/7 nt/t */
+ R0 = (uint8_t)(MEM8[0xF858]); /* BA6E; MOV:G.B @H'F858, R0; refs ram_F858; cycles=7 */
+ SCI1_TDR = (uint8_t)(R0); /* BA72; MOV:G.B R0, @SCI1_TDR; SCI1_TDR; refs SCI1_TDR; cycles=7 */
+ MEM8[0xF9C2] = (uint8_t)(0x01); /* BA76; MOV:G.B #H'01, @H'F9C2; refs ram_F9C2; cycles=9 */
+ SCI1_SSR &= ~BIT(7); /* BA7B; BCLR.B #7, @SCI1_SSR; clear TDRE (bit 7) of SCI1_SSR; refs SCI1_SSR; cycles=8 */
+ SCI1_SCR |= BIT(7); /* BA7F; BSET.B #7, @SCI1_SCR; set TIE (bit 7) of SCI1_SCR; refs SCI1_SCR; cycles=8 */
return; /* BA83; RTS; cycles=13 */
}
void vec_sci1_txi_BA84(void)
{
/* vector sources: sci1_txi */
- set_flags_btst(MEM8[0xFAA2], 3); /* BA84; BTST.B #3, @H'FAA2; cycles=7 */
+ set_flags_btst(MEM8[0xFAA2], 3); /* BA84; BTST.B #3, @H'FAA2; refs ram_FAA2; cycles=7 */
if (Z) goto loc_BAA9; /* BA88; BEQ loc_BAA9; cycles=3/7 nt/t */
- set_flags_btst(MEM8[0xFAA5], 7); /* BA8A; BTST.B #7, @H'FAA5; cycles=7 */
+ set_flags_btst(MEM8[0xFAA5], 7); /* BA8A; BTST.B #7, @H'FAA5; refs ram_FAA5; cycles=7 */
if (Z) goto loc_BAA9; /* BA8E; BEQ loc_BAA9; cycles=3/7 nt/t */
- set_flags_tst8(MEM8[0xF9C3]); /* BA90; TST.B @H'F9C3; cycles=7 */
+ set_flags_tst8(MEM8[0xF9C3]); /* BA90; TST.B @H'F9C3; refs ram_F9C3; cycles=7 */
if (Z) goto loc_BAA9; /* BA94; BEQ loc_BAA9; cycles=3/7 nt/t */
- MEM8[0xFAA2] &= ~BIT(3); /* BA96; BCLR.B #3, @H'FAA2; cycles=9 */
- MEM8[0xFAA3] = 0; /* BA9A; CLR.B @H'FAA3; cycles=9 */
- SCI1_SCR &= ~BIT(7); /* BA9E; BCLR.B #7, @SCI1_SCR; clear TIE (bit 7) of SCI1_SCR; cycles=9 */
- MEM8[0xF9C0] = (uint8_t)(0x1F); /* BAA2; MOV:G.B #H'1F, @H'F9C0; cycles=9 */
+ MEM8[0xFAA2] &= ~BIT(3); /* BA96; BCLR.B #3, @H'FAA2; refs ram_FAA2; cycles=9 */
+ MEM8[0xFAA3] = 0; /* BA9A; CLR.B @H'FAA3; refs ram_FAA3; cycles=9 */
+ SCI1_SCR &= ~BIT(7); /* BA9E; BCLR.B #7, @SCI1_SCR; clear TIE (bit 7) of SCI1_SCR; refs SCI1_SCR; cycles=9 */
+ MEM8[0xF9C0] = (uint8_t)(0x1F); /* BAA2; MOV:G.B #H'1F, @H'F9C0; refs ram_F9C0; cycles=9 */
goto loc_BAF1; /* BAA7; BRA loc_BAF1; cycles=8 */
loc_BAA9:
MEM16[--R7] = (uint16_t)(R0); /* BAA9; MOV:G.W R0, @-R7; cycles=5 */
- R0 = (uint8_t)(MEM8[0xF9C2]); /* BAAB; MOV:G.B @H'F9C2, R0; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF9C2]); /* BAAB; MOV:G.B @H'F9C2, R0; refs ram_F9C2; cycles=6 */
R0 = zero_extend8(R0); /* BAAF; EXTU.B R0; cycles=3 */
R0 = (uint8_t)(MEM8[R0 - 0x07A8]); /* BAB1; MOV:G.B @(-H'07A8,R0), R0; cycles=6 */
- SCI1_TDR = (uint8_t)(R0); /* BAB5; MOV:G.B R0, @SCI1_TDR; SCI1_TDR; cycles=6 */
+ SCI1_TDR = (uint8_t)(R0); /* BAB5; MOV:G.B R0, @SCI1_TDR; SCI1_TDR; refs SCI1_TDR; cycles=6 */
R0 = (uint16_t)(MEM16[R7++]); /* BAB9; MOV:G.W @R7+, R0; cycles=6 */
- SCI1_SSR &= ~BIT(7); /* BABB; BCLR.B #7, @SCI1_SSR; clear TDRE (bit 7) of SCI1_SSR; cycles=8 */
- MEM8[0xF9C2] += (uint8_t)(1); /* BABF; ADD:Q.B #1, @H'F9C2; cycles=8 */
- set_flags_cmp8(MEM8[0xF9C2], 0x06); /* BAC3; CMP:G.B #H'06, @H'F9C2; cycles=6 */
+ SCI1_SSR &= ~BIT(7); /* BABB; BCLR.B #7, @SCI1_SSR; clear TDRE (bit 7) of SCI1_SSR; refs SCI1_SSR; cycles=8 */
+ MEM8[0xF9C2] += (uint8_t)(1); /* BABF; ADD:Q.B #1, @H'F9C2; refs ram_F9C2; cycles=8 */
+ set_flags_cmp8(MEM8[0xF9C2], 0x06); /* BAC3; CMP:G.B #H'06, @H'F9C2; refs ram_F9C2; cycles=6 */
if (!Z) goto loc_BAF1; /* BAC8; BNE loc_BAF1; cycles=3/7 nt/t */
- SCI1_SCR &= ~BIT(7); /* BACA; BCLR.B #7, @SCI1_SCR; clear TIE (bit 7) of SCI1_SCR; cycles=9 */
- set_flags_btst(MEM8[0xF795], 6); /* BACE; BTST.B #6, @H'F795; cycles=7 */
+ SCI1_SCR &= ~BIT(7); /* BACA; BCLR.B #7, @SCI1_SCR; clear TIE (bit 7) of SCI1_SCR; refs SCI1_SCR; cycles=9 */
+ set_flags_btst(MEM8[0xF795], 6); /* BACE; BTST.B #6, @H'F795; refs ram_F795; cycles=7 */
if (!Z) goto loc_BAE8; /* BAD2; BNE loc_BAE8; cycles=3/7 nt/t */
- set_flags_btst(MEM8[0xF791], 7); /* BAD4; BTST.B #7, @H'F791; cycles=7 */
+ set_flags_btst(MEM8[0xF791], 7); /* BAD4; BTST.B #7, @H'F791; refs ram_F791; cycles=7 */
if (!Z) goto loc_BAE1; /* BAD8; BNE loc_BAE1; cycles=3/7 nt/t */
- MEM8[0xF9C0] = (uint8_t)(0x09); /* BADA; MOV:G.B #H'09, @H'F9C0; cycles=9 */
+ MEM8[0xF9C0] = (uint8_t)(0x09); /* BADA; MOV:G.B #H'09, @H'F9C0; refs ram_F9C0; cycles=9 */
goto loc_BAED; /* BADF; BRA loc_BAED; cycles=8 */
loc_BAE1:
- MEM8[0xF9C0] = (uint8_t)(0x09); /* BAE1; MOV:G.B #H'09, @H'F9C0; cycles=9 */
+ MEM8[0xF9C0] = (uint8_t)(0x09); /* BAE1; MOV:G.B #H'09, @H'F9C0; refs ram_F9C0; cycles=9 */
goto loc_BAED; /* BAE6; BRA loc_BAED; cycles=7 */
loc_BAE8:
- MEM8[0xF9C0] = (uint8_t)(0xF0); /* BAE8; MOV:G.B #H'F0, @H'F9C0; cycles=9 */
+ MEM8[0xF9C0] = (uint8_t)(0xF0); /* BAE8; MOV:G.B #H'F0, @H'F9C0; refs ram_F9C0; cycles=9 */
loc_BAED:
- MEM8[0xF9C1] = 0; /* BAED; CLR.B @H'F9C1; cycles=8 */
+ MEM8[0xF9C1] = 0; /* BAED; CLR.B @H'F9C1; refs ram_F9C1; cycles=8 */
loc_BAF1:
return_from_interrupt(); /* BAF1; RTE; cycles=14 */
}
void loc_BAF2(void)
{
- R1 = (uint8_t)(MEM8[0xF9B5]); /* BAF2; MOV:G.B @H'F9B5, R1; cycles=7 */
+ R1 = (uint8_t)(MEM8[0xF9B5]); /* BAF2; MOV:G.B @H'F9B5, R1; refs ram_F9B5; cycles=7 */
R1 = zero_extend8(R1); /* BAF6; EXTU.B R1; cycles=3 */
- set_flags_cmp8(R1, MEM8[0xF9B0]); /* BAF8; CMP:G.B @H'F9B0, R1; cycles=7 */
+ set_flags_cmp8(R1, MEM8[0xF9B0]); /* BAF8; CMP:G.B @H'F9B0, R1; refs ram_F9B0; cycles=7 */
if (!Z) goto loc_BB00; /* BAFC; BNE loc_BB00; cycles=3/7 nt/t */
goto loc_BB56; /* BAFE; BRA loc_BB56; cycles=7 */
loc_BB00:
- MEM8[0xFAA2] |= BIT(3); /* BB00; BSET.B #3, @H'FAA2; cycles=9 */
+ MEM8[0xFAA2] |= BIT(3); /* BB00; BSET.B #3, @H'FAA2; refs ram_FAA2; cycles=9 */
R0 = (uint16_t)(R1); /* BB04; MOV:G.W R1, R0; cycles=3 */
R0 <<= 1; /* BB06; SHLL.W R0; cycles=3 */
R0 = (uint16_t)(MEM16[R0 - 0x0790]); /* BB08; MOV:G.W @(-H'0790,R0), R0; cycles=7 */
@@ -2632,22 +2921,22 @@ loc_BB00:
R1 >>= 1; /* BB15; SHLR.B R1; cycles=2 */
R2 = (uint8_t)(R1); /* BB17; MOV:G.B R1, R2; cycles=2 */
R1 &= (uint8_t)(0x07); /* BB19; AND.B #H'07, R1; cycles=3 */
- MEM8[0xF850] = (uint8_t)(R1); /* BB1C; MOV:G.B R1, @H'F850; cycles=7 */
- MEM8[0xF852] = (uint8_t)(R5); /* BB20; MOV:G.B R5, @H'F852; cycles=7 */
+ MEM8[0xF850] = (uint8_t)(R1); /* BB1C; MOV:G.B R1, @H'F850; refs ram_F850; cycles=7 */
+ MEM8[0xF852] = (uint8_t)(R5); /* BB20; MOV:G.B R5, @H'F852; refs ram_F852; cycles=7 */
R5 = swap_bytes(R5); /* BB24; SWAP.B R5; cycles=3 */
R2 &= (uint8_t)(0x78); /* BB26; AND.B #H'78, R2; cycles=3 */
R5 |= (uint8_t)(R2); /* BB29; OR.B R2, R5; cycles=2 */
- MEM8[0xF851] = (uint8_t)(R5); /* BB2B; MOV:G.B R5, @H'F851; cycles=6 */
+ MEM8[0xF851] = (uint8_t)(R5); /* BB2B; MOV:G.B R5, @H'F851; refs ram_F851; cycles=6 */
R0 &= (uint16_t)(0x01FF); /* BB2F; AND.W #H'01FF, R0; cycles=4 */
R0 <<= 1; /* BB33; SHLL.W R0; cycles=3 */
R4 = (uint16_t)(MEM16[R0 - 0x1800]); /* BB35; MOV:G.W @(-H'1800,R0), R4; cycles=6 */
- MEM8[0xF854] = (uint8_t)(R4); /* BB39; MOV:G.B R4, @H'F854; cycles=6 */
+ MEM8[0xF854] = (uint8_t)(R4); /* BB39; MOV:G.B R4, @H'F854; refs ram_F854; cycles=6 */
R4 = swap_bytes(R4); /* BB3D; SWAP.B R4; cycles=3 */
- MEM8[0xF853] = (uint8_t)(R4); /* BB3F; MOV:G.B R4, @H'F853; cycles=6 */
+ MEM8[0xF853] = (uint8_t)(R4); /* BB3F; MOV:G.B R4, @H'F853; refs ram_F853; cycles=6 */
loc_BA26(); /* BB43; BSR loc_BA26; cycles=14 */
- MEM16[0xF9C6] = (uint16_t)(0x01F4); /* BB46; MOV:G.W #H'01F4, @H'F9C6; cycles=11 */
- MEM8[0xF9C8] = (uint8_t)(0x14); /* BB4C; MOV:G.B #H'14, @H'F9C8; cycles=9 */
- MEM8[0xFAA3] = (uint8_t)(0x80); /* BB51; MOV:G.B #H'80, @H'FAA3; cycles=9 */
+ MEM16[0xF9C6] = (uint16_t)(0x01F4); /* BB46; MOV:G.W #H'01F4, @H'F9C6; refs ram_F9C6; cycles=11 */
+ MEM8[0xF9C8] = (uint8_t)(0x14); /* BB4C; MOV:G.B #H'14, @H'F9C8; refs ram_F9C8; cycles=9 */
+ MEM8[0xFAA3] = (uint8_t)(0x80); /* BB51; MOV:G.B #H'80, @H'FAA3; refs ram_FAA3; cycles=9 */
loc_BB56:
return; /* BB56; RTS; cycles=12 */
}
@@ -2655,77 +2944,77 @@ loc_BB56:
void vec_sci1_eri_BB57(void)
{
/* vector sources: sci1_eri */
- MEM8[0xFAA4] |= BIT(7); /* BB57; BSET.B #7, @H'FAA4; cycles=8 */
- SCI1_SSR &= ~BIT(5); /* BB5B; BCLR.B #5, @SCI1_SSR; clear ORER (bit 5) of SCI1_SSR; cycles=8 */
- SCI1_SSR &= ~BIT(4); /* BB5F; BCLR.B #4, @SCI1_SSR; clear FER (bit 4) of SCI1_SSR; cycles=8 */
- SCI1_SSR &= ~BIT(3); /* BB63; BCLR.B #3, @SCI1_SSR; clear PER (bit 3) of SCI1_SSR; cycles=8 */
+ MEM8[0xFAA4] |= BIT(7); /* BB57; BSET.B #7, @H'FAA4; refs ram_FAA4; cycles=8 */
+ SCI1_SSR &= ~BIT(5); /* BB5B; BCLR.B #5, @SCI1_SSR; clear ORER (bit 5) of SCI1_SSR; refs SCI1_SSR; cycles=8 */
+ SCI1_SSR &= ~BIT(4); /* BB5F; BCLR.B #4, @SCI1_SSR; clear FER (bit 4) of SCI1_SSR; refs SCI1_SSR; cycles=8 */
+ SCI1_SSR &= ~BIT(3); /* BB63; BCLR.B #3, @SCI1_SSR; clear PER (bit 3) of SCI1_SSR; refs SCI1_SSR; cycles=8 */
}
void vec_sci1_rxi_BB67(void)
{
/* vector sources: sci1_rxi */
push_registers(R0, R1); /* BB67; STM.W {R0,R1}, @-SP; cycles=12 */
- SCI1_SSR &= ~BIT(6); /* BB69; BCLR.B #6, @SCI1_SSR; clear RDRF (bit 6) of SCI1_SSR; cycles=8 */
- R0 = (uint8_t)(SCI1_RDR); /* BB6D; MOV:G.B @SCI1_RDR, R0; cycles=6 */
- set_flags_tst8(MEM8[0xF9C1]); /* BB71; TST.B @H'F9C1; cycles=6 */
+ SCI1_SSR &= ~BIT(6); /* BB69; BCLR.B #6, @SCI1_SSR; clear RDRF (bit 6) of SCI1_SSR; refs SCI1_SSR; cycles=8 */
+ R0 = (uint8_t)(SCI1_RDR); /* BB6D; MOV:G.B @SCI1_RDR, R0; refs SCI1_RDR; cycles=6 */
+ set_flags_tst8(MEM8[0xF9C1]); /* BB71; TST.B @H'F9C1; refs ram_F9C1; cycles=6 */
if (!Z) goto loc_BB7D; /* BB75; BNE loc_BB7D; cycles=3/8 nt/t */
- MEM8[0xF9C3] = 0; /* BB77; CLR.B @H'F9C3; cycles=8 */
+ MEM8[0xF9C3] = 0; /* BB77; CLR.B @H'F9C3; refs ram_F9C3; cycles=8 */
goto loc_BB8A; /* BB7B; BRA loc_BB8A; cycles=8 */
loc_BB7D:
- set_flags_cmp8(MEM8[0xF9C3], 0x05); /* BB7D; CMP:G.B #H'05, @H'F9C3; cycles=6 */
+ set_flags_cmp8(MEM8[0xF9C3], 0x05); /* BB7D; CMP:G.B #H'05, @H'F9C3; refs ram_F9C3; cycles=6 */
if (C || Z) goto loc_BB8A; /* BB82; BLS loc_BB8A; cycles=3/7 nt/t */
- MEM8[0xFAA4] = 0; /* BB84; CLR.B @H'FAA4; cycles=9 */
+ MEM8[0xFAA4] = 0; /* BB84; CLR.B @H'FAA4; refs ram_FAA4; cycles=9 */
goto loc_BBA3; /* BB88; BRA loc_BBA3; cycles=7 */
loc_BB8A:
- R1 = (uint8_t)(MEM8[0xF9C3]); /* BB8A; MOV:G.B @H'F9C3, R1; cycles=7 */
+ R1 = (uint8_t)(MEM8[0xF9C3]); /* BB8A; MOV:G.B @H'F9C3, R1; refs ram_F9C3; cycles=7 */
R1 = zero_extend8(R1); /* BB8E; EXTU.B R1; cycles=3 */
MEM8[R1 - 0x0798] = (uint8_t)(R0); /* BB90; MOV:G.B R0, @(-H'0798,R1); cycles=7 */
R1 += (uint8_t)(1); /* BB94; ADD:Q.B #1, R1; cycles=4 */
- MEM8[0xF9C3] = (uint8_t)(R1); /* BB96; MOV:G.B R1, @H'F9C3; cycles=7 */
+ MEM8[0xF9C3] = (uint8_t)(R1); /* BB96; MOV:G.B R1, @H'F9C3; refs ram_F9C3; cycles=7 */
set_flags_cmp8(R1, 0x06); /* BB9A; CMP:E #H'06, R1; cycles=2 */
if (!Z) goto loc_BBA3; /* BB9C; BNE loc_BBA3; cycles=3/7 nt/t */
- MEM8[0xF9C5] = (uint8_t)(0x14); /* BB9E; MOV:G.B #H'14, @H'F9C5; cycles=9 */
+ MEM8[0xF9C5] = (uint8_t)(0x14); /* BB9E; MOV:G.B #H'14, @H'F9C5; refs ram_F9C5; cycles=9 */
loc_BBA3:
- MEM8[0xF9C1] = (uint8_t)(0x05); /* BBA3; MOV:G.B #H'05, @H'F9C1; cycles=9 */
+ MEM8[0xF9C1] = (uint8_t)(0x05); /* BBA3; MOV:G.B #H'05, @H'F9C1; refs ram_F9C1; cycles=9 */
pop_registers(R0, R1); /* BBA8; LDM.W @SP+, {R0,R1}; cycles=14 */
return_from_interrupt(); /* BBAA; RTE; cycles=13 */
}
void loc_BBAB(void)
{
- set_flags_cmp8(MEM8[0xF9C3], 0x06); /* BBAB; CMP:G.B #H'06, @H'F9C3; cycles=6 */
+ set_flags_cmp8(MEM8[0xF9C3], 0x06); /* BBAB; CMP:G.B #H'06, @H'F9C3; refs ram_F9C3; cycles=6 */
if (!Z) goto loc_BE6F; /* BBB0; BNE loc_BE6F; cycles=3/7 nt/t */
- R0 = (uint16_t)(MEM16[0xF868]); /* BBB3; MOV:G.W @H'F868, R0; cycles=6 */
- MEM16[0xF860] = (uint16_t)(R0); /* BBB7; MOV:G.W R0, @H'F860; cycles=6 */
- R0 = (uint16_t)(MEM16[0xF86A]); /* BBBB; MOV:G.W @H'F86A, R0; cycles=6 */
- MEM16[0xF862] = (uint16_t)(R0); /* BBBF; MOV:G.W R0, @H'F862; cycles=6 */
- R0 = (uint16_t)(MEM16[0xF86C]); /* BBC3; MOV:G.W @H'F86C, R0; cycles=6 */
- MEM16[0xF864] = (uint16_t)(R0); /* BBC7; MOV:G.W R0, @H'F864; cycles=6 */
- MEM8[0xF9C3] = 0; /* BBCB; CLR.B @H'F9C3; cycles=8 */
- set_flags_btst(MEM8[0xFAA4], 7); /* BBCF; BTST.B #7, @H'FAA4; cycles=6 */
+ R0 = (uint16_t)(MEM16[0xF868]); /* BBB3; MOV:G.W @H'F868, R0; refs ram_F868; cycles=6 */
+ MEM16[0xF860] = (uint16_t)(R0); /* BBB7; MOV:G.W R0, @H'F860; refs ram_F860; cycles=6 */
+ R0 = (uint16_t)(MEM16[0xF86A]); /* BBBB; MOV:G.W @H'F86A, R0; refs ram_F86A; cycles=6 */
+ MEM16[0xF862] = (uint16_t)(R0); /* BBBF; MOV:G.W R0, @H'F862; refs ram_F862; cycles=6 */
+ R0 = (uint16_t)(MEM16[0xF86C]); /* BBC3; MOV:G.W @H'F86C, R0; refs ram_F86C; cycles=6 */
+ MEM16[0xF864] = (uint16_t)(R0); /* BBC7; MOV:G.W R0, @H'F864; refs ram_F864; cycles=6 */
+ MEM8[0xF9C3] = 0; /* BBCB; CLR.B @H'F9C3; refs ram_F9C3; cycles=8 */
+ set_flags_btst(MEM8[0xFAA4], 7); /* BBCF; BTST.B #7, @H'FAA4; refs ram_FAA4; cycles=6 */
if (!Z) goto loc_BE29; /* BBD3; BNE loc_BE29; cycles=3/8 nt/t */
- R0 = (uint8_t)(0x5A); /* BBD6; MOV:E.B #H'5A, R0; cycles=2 */
- R0 ^= (uint8_t)(MEM8[0xF860]); /* BBD8; XOR.B @H'F860, R0; cycles=7 */
- R0 ^= (uint8_t)(MEM8[0xF861]); /* BBDC; XOR.B @H'F861, R0; cycles=7 */
- R0 ^= (uint8_t)(MEM8[0xF862]); /* BBE0; XOR.B @H'F862, R0; cycles=7 */
- R0 ^= (uint8_t)(MEM8[0xF863]); /* BBE4; XOR.B @H'F863, R0; cycles=7 */
- R0 ^= (uint8_t)(MEM8[0xF864]); /* BBE8; XOR.B @H'F864, R0; cycles=7 */
- set_flags_cmp8(R0, MEM8[0xF865]); /* BBEC; CMP:G.B @H'F865, R0; cycles=7 */
+ R0 = (uint8_t)(0x5A); /* BBD6; MOV:E.B #H'5A, R0; dataflow R0=0x5A; cycles=2 */
+ R0 ^= (uint8_t)(MEM8[0xF860]); /* BBD8; XOR.B @H'F860, R0; refs ram_F860; cycles=7 */
+ R0 ^= (uint8_t)(MEM8[0xF861]); /* BBDC; XOR.B @H'F861, R0; refs ram_F861; cycles=7 */
+ R0 ^= (uint8_t)(MEM8[0xF862]); /* BBE0; XOR.B @H'F862, R0; refs ram_F862; cycles=7 */
+ R0 ^= (uint8_t)(MEM8[0xF863]); /* BBE4; XOR.B @H'F863, R0; refs ram_F863; cycles=7 */
+ R0 ^= (uint8_t)(MEM8[0xF864]); /* BBE8; XOR.B @H'F864, R0; refs ram_F864; cycles=7 */
+ set_flags_cmp8(R0, MEM8[0xF865]); /* BBEC; CMP:G.B @H'F865, R0; refs ram_F865; cycles=7 */
if (!Z) goto loc_BE29; /* BBF0; BNE loc_BE29; cycles=3/7 nt/t */
- MEM8[0xFAA6] = 0; /* BBF3; CLR.B @H'FAA6; cycles=8 */
- R5 = (uint8_t)(MEM8[0xF861]); /* BBF7; MOV:G.B @H'F861, R5; cycles=6 */
+ MEM8[0xFAA6] = 0; /* BBF3; CLR.B @H'FAA6; refs ram_FAA6; cycles=8 */
+ R5 = (uint8_t)(MEM8[0xF861]); /* BBF7; MOV:G.B @H'F861, R5; refs ram_F861; cycles=6 */
R5 = swap_bytes(R5); /* BBFB; SWAP.B R5; cycles=3 */
- R5 = (uint8_t)(MEM8[0xF862]); /* BBFD; MOV:G.B @H'F862, R5; cycles=6 */
+ R5 = (uint8_t)(MEM8[0xF862]); /* BBFD; MOV:G.B @H'F862, R5; refs ram_F862; cycles=6 */
loc_622B(); /* BC01; BSR loc_622B; cycles=14 */
R4 = (uint16_t)(R5); /* BC04; MOV:G.W R5, R4; cycles=3 */
R4 <<= 1; /* BC06; SHLL.W R4; cycles=3 */
- R0 = (uint8_t)(MEM8[0xF860]); /* BC08; MOV:G.B @H'F860, R0; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF860]); /* BC08; MOV:G.B @H'F860, R0; refs ram_F860; cycles=7 */
R0 &= (uint8_t)(0x07); /* BC0C; AND.B #H'07, R0; cycles=3 */
- set_flags_tst8(MEM8[0xFAA2]); /* BC0F; TST.B @H'FAA2; cycles=6 */
+ set_flags_tst8(MEM8[0xFAA2]); /* BC0F; TST.B @H'FAA2; refs ram_FAA2; cycles=6 */
if (!Z) goto loc_BC3A; /* BC13; BNE loc_BC3A; cycles=3/8 nt/t */
loc_BC15:
- MEM8[0xFAA2] |= BIT(7); /* BC15; BSET.B #7, @H'FAA2; cycles=8 */
- set_flags_btst(MEM8[0xF861], 7); /* BC19; BTST.B #7, @H'F861; cycles=6 */
+ MEM8[0xFAA2] |= BIT(7); /* BC15; BSET.B #7, @H'FAA2; refs ram_FAA2; cycles=8 */
+ set_flags_btst(MEM8[0xF861], 7); /* BC19; BTST.B #7, @H'F861; refs ram_F861; cycles=6 */
if (!Z) goto loc_BD0B; /* BC1D; BNE loc_BD0B; cycles=3/8 nt/t */
set_flags_cmp8(R0, 0x00); /* BC20; CMP:E #H'00, R0; cycles=2 */
if (Z) goto loc_BC69; /* BC22; BEQ loc_BC69; cycles=3/7 nt/t */
@@ -2735,12 +3024,12 @@ loc_BC15:
if (Z) goto loc_BD04; /* BC2B; BEQ loc_BD04; cycles=3/8 nt/t */
set_flags_cmp8(R0, 0x07); /* BC2E; CMP:E #H'07, R0; cycles=2 */
if (Z) goto loc_BE05; /* BC30; BEQ loc_BE05; cycles=3/7 nt/t */
- MEM8[0xFAA2] = 0; /* BC33; CLR.B @H'FAA2; cycles=8 */
+ MEM8[0xFAA2] = 0; /* BC33; CLR.B @H'FAA2; refs ram_FAA2; cycles=8 */
goto loc_BE6F; /* BC37; BRA loc_BE6F; cycles=8 */
loc_BC3A:
set_flags_btst(R0, 2); /* BC3A; BTST.B #2, R0; cycles=2 */
if (Z) goto loc_BC5C; /* BC3C; BEQ loc_BC5C; cycles=3/7 nt/t */
- set_flags_btst(MEM8[0xF861], 7); /* BC3E; BTST.B #7, @H'F861; cycles=7 */
+ set_flags_btst(MEM8[0xF861], 7); /* BC3E; BTST.B #7, @H'F861; refs ram_F861; cycles=7 */
if (!Z) goto loc_BE27; /* BC42; BNE loc_BE27; cycles=3/7 nt/t */
set_flags_cmp8(R0, 0x04); /* BC45; CMP:E #H'04, R0; cycles=2 */
if (Z) goto loc_BD0E; /* BC47; BEQ loc_BD0E; cycles=3/8 nt/t */
@@ -2752,89 +3041,89 @@ loc_BC3A:
if (Z) goto loc_BE05; /* BC56; BEQ loc_BE05; cycles=3/7 nt/t */
goto loc_BE6F; /* BC59; BRA loc_BE6F; cycles=8 */
loc_BC5C:
- MEM8[0xFAA2] &= ~BIT(3); /* BC5C; BCLR.B #3, @H'FAA2; cycles=9 */
+ MEM8[0xFAA2] &= ~BIT(3); /* BC5C; BCLR.B #3, @H'FAA2; refs ram_FAA2; cycles=9 */
if (Z) goto loc_BE6F; /* BC60; BEQ loc_BE6F; cycles=3/7 nt/t */
- MEM8[0xFAA3] = 0; /* BC63; CLR.B @H'FAA3; cycles=8 */
+ MEM8[0xFAA3] = 0; /* BC63; CLR.B @H'FAA3; refs ram_FAA3; cycles=8 */
goto loc_BC15; /* BC67; BRA loc_BC15; cycles=8 */
loc_BC69:
set_flags_tst16(R5); /* BC69; TST.W R5; cycles=3 */
if (!Z) goto loc_BC8B; /* BC6B; BNE loc_BC8B; cycles=3/8 nt/t */
- R0 = (uint8_t)(MEM8[0xF863]); /* BC6D; MOV:G.B @H'F863, R0; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF863]); /* BC6D; MOV:G.B @H'F863, R0; refs ram_F863; cycles=6 */
R0 = swap_bytes(R0); /* BC71; SWAP.B R0; cycles=3 */
- R0 = (uint8_t)(0x80); /* BC73; MOV:E.B #H'80, R0; cycles=2 */
+ R0 = (uint8_t)(0x80); /* BC73; MOV:E.B #H'80, R0; dataflow R0=0x80; cycles=2 */
MEM16[R4 - 0x2000] = (uint16_t)(R0); /* BC75; MOV:G.W R0, @(-H'2000,R4); cycles=6 */
MEM16[R4 - 0x1800] = (uint16_t)(R0); /* BC79; MOV:G.W R0, @(-H'1800,R4); cycles=6 */
- MEM8[0xF864] = (uint8_t)(0x80); /* BC7D; MOV:G.B #H'80, @H'F864; cycles=9 */
+ MEM8[0xF864] = (uint8_t)(0x80); /* BC7D; MOV:G.B #H'80, @H'F864; refs ram_F864; cycles=9 */
MEM8[R5 - 0x1400] |= BIT(7); /* BC82; BSET.B #7, @(-H'1400,R5); cycles=9 */
loc_BE70(); /* BC86; BSR loc_BE70; cycles=13 */
goto loc_BCB0; /* BC89; BRA loc_BCB0; cycles=8 */
loc_BC8B:
- R0 = (uint8_t)(MEM8[0xF863]); /* BC8B; MOV:G.B @H'F863, R0; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF863]); /* BC8B; MOV:G.B @H'F863, R0; refs ram_F863; cycles=6 */
R0 = swap_bytes(R0); /* BC8F; SWAP.B R0; cycles=3 */
- R0 = (uint8_t)(MEM8[0xF864]); /* BC91; MOV:G.B @H'F864, R0; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF864]); /* BC91; MOV:G.B @H'F864, R0; refs ram_F864; cycles=6 */
MEM16[R4 - 0x2000] = (uint16_t)(R0); /* BC95; MOV:G.W R0, @(-H'2000,R4); cycles=6 */
MEM16[R4 - 0x1800] = (uint16_t)(R0); /* BC99; MOV:G.W R0, @(-H'1800,R4); cycles=6 */
MEM8[R5 - 0x1400] |= BIT(7); /* BC9D; BSET.B #7, @(-H'1400,R5); cycles=8 */
R1 = (uint16_t)(MEM16[R4 - 0x3A9C]); /* BCA1; MOV:G.W @(-H'3A9C,R4), R1; cycles=6 */
R1 = zero_extend8(R1); /* BCA5; EXTU.B R1; cycles=3 */
- if (Z) goto loc_BCAD; /* BCA7; BEQ loc_BCAD; cycles=3/8 nt/t */
- MEM16[R1 - 0x0C00] = (uint16_t)(R0); /* BCA9; MOV:G.W R0, @(-H'0C00,R1); cycles=6 */
-loc_BCAD:
+ if (!Z) { /* BCA7; BEQ loc_BCAD; cycles=3/8 nt/t */
+ MEM16[R1 - 0x0C00] = (uint16_t)(R0); /* BCA9; MOV:G.W R0, @(-H'0C00,R1); cycles=6 */
+ }
loc_BE70(); /* BCAD; BSR loc_BE70; cycles=14 */
loc_BCB0:
- MEM8[0xF850] = (uint8_t)(0x04); /* BCB0; MOV:G.B #H'04, @H'F850; cycles=9 */
- R0 = (uint8_t)(MEM8[0xF861]); /* BCB5; MOV:G.B @H'F861, R0; cycles=6 */
- MEM8[0xF851] = (uint8_t)(R0); /* BCB9; MOV:G.B R0, @H'F851; cycles=6 */
- R0 = (uint16_t)(MEM16[0xF862]); /* BCBD; MOV:G.W @H'F862, R0; cycles=6 */
- MEM16[0xF852] = (uint16_t)(R0); /* BCC1; MOV:G.W R0, @H'F852; cycles=6 */
- R0 = (uint8_t)(MEM8[0xF864]); /* BCC5; MOV:G.B @H'F864, R0; cycles=6 */
- MEM8[0xF854] = (uint8_t)(R0); /* BCC9; MOV:G.B R0, @H'F854; cycles=6 */
+ MEM8[0xF850] = (uint8_t)(0x04); /* BCB0; MOV:G.B #H'04, @H'F850; refs ram_F850; cycles=9 */
+ R0 = (uint8_t)(MEM8[0xF861]); /* BCB5; MOV:G.B @H'F861, R0; refs ram_F861; cycles=6 */
+ MEM8[0xF851] = (uint8_t)(R0); /* BCB9; MOV:G.B R0, @H'F851; refs ram_F851; cycles=6 */
+ R0 = (uint16_t)(MEM16[0xF862]); /* BCBD; MOV:G.W @H'F862, R0; refs ram_F862; cycles=6 */
+ MEM16[0xF852] = (uint16_t)(R0); /* BCC1; MOV:G.W R0, @H'F852; refs ram_F852; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF864]); /* BCC5; MOV:G.B @H'F864, R0; refs ram_F864; cycles=6 */
+ MEM8[0xF854] = (uint8_t)(R0); /* BCC9; MOV:G.B R0, @H'F854; refs ram_F854; cycles=6 */
loc_BA26(); /* BCCD; BSR loc_BA26; cycles=14 */
- MEM8[0xFAA2] &= ~BIT(7); /* BCD0; BCLR.B #7, @H'FAA2; cycles=9 */
+ MEM8[0xFAA2] &= ~BIT(7); /* BCD0; BCLR.B #7, @H'FAA2; refs ram_FAA2; cycles=9 */
goto loc_BE6F; /* BCD4; BRA loc_BE6F; cycles=7 */
loc_BCD7:
- MEM8[0xF850] = (uint8_t)(0x04); /* BCD7; MOV:G.B #H'04, @H'F850; cycles=9 */
- R0 = (uint8_t)(MEM8[0xF861]); /* BCDC; MOV:G.B @H'F861, R0; cycles=7 */
- MEM8[0xF851] = (uint8_t)(R0); /* BCE0; MOV:G.B R0, @H'F851; cycles=7 */
- R0 = (uint8_t)(MEM8[0xF862]); /* BCE4; MOV:G.B @H'F862, R0; cycles=7 */
- MEM8[0xF851] = (uint8_t)(R0); /* BCE8; MOV:G.B R0, @H'F851; cycles=7 */
+ MEM8[0xF850] = (uint8_t)(0x04); /* BCD7; MOV:G.B #H'04, @H'F850; refs ram_F850; cycles=9 */
+ R0 = (uint8_t)(MEM8[0xF861]); /* BCDC; MOV:G.B @H'F861, R0; refs ram_F861; cycles=7 */
+ MEM8[0xF851] = (uint8_t)(R0); /* BCE0; MOV:G.B R0, @H'F851; refs ram_F851; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF862]); /* BCE4; MOV:G.B @H'F862, R0; refs ram_F862; cycles=7 */
+ MEM8[0xF851] = (uint8_t)(R0); /* BCE8; MOV:G.B R0, @H'F851; refs ram_F851; cycles=7 */
R0 = (uint16_t)(MEM16[R4 - 0x2000]); /* BCEC; MOV:G.W @(-H'2000,R4), R0; cycles=7 */
- MEM8[0xF854] = (uint8_t)(R0); /* BCF0; MOV:G.B R0, @H'F854; cycles=7 */
+ MEM8[0xF854] = (uint8_t)(R0); /* BCF0; MOV:G.B R0, @H'F854; refs ram_F854; cycles=7 */
R0 = swap_bytes(R0); /* BCF4; SWAP.B R0; cycles=3 */
- MEM8[0xF853] = (uint8_t)(R0); /* BCF6; MOV:G.B R0, @H'F853; cycles=7 */
+ MEM8[0xF853] = (uint8_t)(R0); /* BCF6; MOV:G.B R0, @H'F853; refs ram_F853; cycles=7 */
loc_BA26(); /* BCFA; BSR loc_BA26; cycles=13 */
- MEM8[0xFAA2] &= ~BIT(7); /* BCFD; BCLR.B #7, @H'FAA2; cycles=8 */
+ MEM8[0xFAA2] &= ~BIT(7); /* BCFD; BCLR.B #7, @H'FAA2; refs ram_FAA2; cycles=8 */
goto loc_BE6F; /* BD01; BRA loc_BE6F; cycles=8 */
loc_BD04:
- MEM8[0xFAA2] &= ~BIT(7); /* BD04; BCLR.B #7, @H'FAA2; cycles=9 */
+ MEM8[0xFAA2] &= ~BIT(7); /* BD04; BCLR.B #7, @H'FAA2; refs ram_FAA2; cycles=9 */
goto loc_BE6F; /* BD08; BRA loc_BE6F; cycles=7 */
loc_BD0B:
goto loc_BE6F; /* BD0B; BRA loc_BE6F; cycles=8 */
loc_BD0E:
set_flags_tst16(R5); /* BD0E; TST.W R5; cycles=3 */
if (!Z) goto loc_BD2B; /* BD10; BNE loc_BD2B; cycles=3/7 nt/t */
- R0 = (uint8_t)(MEM8[0xF863]); /* BD12; MOV:G.B @H'F863, R0; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF863]); /* BD12; MOV:G.B @H'F863, R0; refs ram_F863; cycles=7 */
R0 = swap_bytes(R0); /* BD16; SWAP.B R0; cycles=3 */
- R0 = (uint8_t)(0x80); /* BD18; MOV:E.B #H'80, R0; cycles=2 */
+ R0 = (uint8_t)(0x80); /* BD18; MOV:E.B #H'80, R0; dataflow R0=0x80; cycles=2 */
MEM16[R4 - 0x2000] = (uint16_t)(R0); /* BD1A; MOV:G.W R0, @(-H'2000,R4); cycles=7 */
MEM16[R4 - 0x1800] = (uint16_t)(R0); /* BD1E; MOV:G.W R0, @(-H'1800,R4); cycles=7 */
MEM8[R5 - 0x1400] |= BIT(7); /* BD22; BSET.B #7, @(-H'1400,R5); cycles=9 */
loc_BE70(); /* BD26; BSR loc_BE70; cycles=13 */
goto loc_BD67; /* BD29; BRA loc_BD67; cycles=8 */
loc_BD2B:
- R0 = (uint8_t)(MEM8[0xF863]); /* BD2B; MOV:G.B @H'F863, R0; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF863]); /* BD2B; MOV:G.B @H'F863, R0; refs ram_F863; cycles=6 */
R0 = swap_bytes(R0); /* BD2F; SWAP.B R0; cycles=3 */
- R0 = (uint8_t)(MEM8[0xF864]); /* BD31; MOV:G.B @H'F864, R0; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF864]); /* BD31; MOV:G.B @H'F864, R0; refs ram_F864; cycles=6 */
MEM16[R4 - 0x2000] = (uint16_t)(R0); /* BD35; MOV:G.W R0, @(-H'2000,R4); cycles=6 */
MEM8[R5 - 0x1400] |= BIT(7); /* BD39; BSET.B #7, @(-H'1400,R5); cycles=8 */
R1 = (uint8_t)(MEM8[R4 - 0x3A9B]); /* BD3D; MOV:G.B @(-H'3A9B,R4), R1; cycles=6 */
R1 = zero_extend8(R1); /* BD41; EXTU.B R1; cycles=3 */
if (Z) goto loc_BD64; /* BD43; BEQ loc_BD64; cycles=3/8 nt/t */
MEM16[R1 - 0x0C00] = (uint16_t)(R0); /* BD45; MOV:G.W R0, @(-H'0C00,R1); cycles=6 */
- set_flags_btst(MEM8[0xF76E], 7); /* BD49; BTST.B #7, @H'F76E; cycles=6 */
+ set_flags_btst(MEM8[0xF76E], 7); /* BD49; BTST.B #7, @H'F76E; refs ram_F76E; cycles=6 */
if (Z) goto loc_BD64; /* BD4D; BEQ loc_BD64; cycles=3/8 nt/t */
push_registers(R0, R4, R5); /* BD4F; STM.W {R0,R4,R5}, @-SP; cycles=15 */
- R4 = (uint8_t)(MEM8[0xF76E]); /* BD51; MOV:G.B @H'F76E, R4; cycles=6 */
+ R4 = (uint8_t)(MEM8[0xF76E]); /* BD51; MOV:G.B @H'F76E, R4; refs ram_F76E; cycles=6 */
R4 = swap_bytes(R4); /* BD55; SWAP.B R4; cycles=3 */
R4 = (uint8_t)(R1); /* BD57; MOV:G.B R1, R4; cycles=2 */
R4 &= (uint16_t)(0x0FFE); /* BD59; AND.W #H'0FFE, R4; cycles=4 */
@@ -2844,13 +3133,13 @@ loc_BD2B:
loc_BD64:
loc_BE70(); /* BD64; BSR loc_BE70; cycles=13 */
loc_BD67:
- set_flags_btst(MEM8[0xFAA2], 3); /* BD67; BTST.B #3, @H'FAA2; cycles=6 */
- if (Z) goto loc_BD75; /* BD6B; BEQ loc_BD75; cycles=3/8 nt/t */
- MEM8[0xF9B5] += (uint8_t)(1); /* BD6D; ADD:Q.B #1, @H'F9B5; cycles=8 */
- MEM8[0xF9B5] &= ~BIT(7); /* BD71; BCLR.B #7, @H'F9B5; cycles=8 */
-loc_BD75:
- MEM8[0xFAA3] = 0; /* BD75; CLR.B @H'FAA3; cycles=8 */
- MEM8[0xFAA2] = 0; /* BD79; CLR.B @H'FAA2; cycles=8 */
+ set_flags_btst(MEM8[0xFAA2], 3); /* BD67; BTST.B #3, @H'FAA2; refs ram_FAA2; cycles=6 */
+ if (!Z) { /* BD6B; BEQ loc_BD75; cycles=3/8 nt/t */
+ MEM8[0xF9B5] += (uint8_t)(1); /* BD6D; ADD:Q.B #1, @H'F9B5; refs ram_F9B5; cycles=8 */
+ MEM8[0xF9B5] &= ~BIT(7); /* BD71; BCLR.B #7, @H'F9B5; refs ram_F9B5; cycles=8 */
+ }
+ MEM8[0xFAA3] = 0; /* BD75; CLR.B @H'FAA3; refs ram_FAA3; cycles=8 */
+ MEM8[0xFAA2] = 0; /* BD79; CLR.B @H'FAA2; refs ram_FAA2; cycles=8 */
goto loc_BE6F; /* BD7D; BRA loc_BE6F; cycles=8 */
loc_BD80:
set_flags_cmp16(R5, 0x006C); /* BD80; CMP:I #H'006C, R5; cycles=3 */
@@ -2861,7 +3150,7 @@ loc_BD80:
if (Z) goto loc_BDBF; /* BD8D; BEQ loc_BDBF; cycles=3/8 nt/t */
set_flags_cmp16(R5, 0x006E); /* BD8F; CMP:I #H'006E, R5; cycles=3 */
if (Z) goto loc_BDBF; /* BD92; BEQ loc_BDBF; cycles=3/7 nt/t */
- set_flags_btst(MEM8[0xF731], 7); /* BD94; BTST.B #7, @H'F731; cycles=7 */
+ set_flags_btst(MEM8[0xF731], 7); /* BD94; BTST.B #7, @H'F731; refs ram_F731; cycles=7 */
if (Z) goto loc_BDC2; /* BD98; BEQ loc_BDC2; cycles=3/7 nt/t */
set_flags_cmp16(R5, 0x006B); /* BD9A; CMP:I #H'006B, R5; cycles=3 */
if (Z) goto loc_BDB5; /* BD9D; BEQ loc_BDB5; cycles=3/8 nt/t */
@@ -2875,65 +3164,65 @@ loc_BD80:
if (Z) goto loc_BDB5; /* BDB1; BEQ loc_BDB5; cycles=3/8 nt/t */
goto loc_BDC2; /* BDB3; BRA loc_BDC2; cycles=8 */
loc_BDB5:
- MEM8[0xF731] &= ~BIT(7); /* BDB5; BCLR.B #7, @H'F731; cycles=8 */
- MEM8[0xF790] &= ~BIT(7); /* BDB9; BCLR.B #7, @H'F790; cycles=8 */
+ MEM8[0xF731] &= ~BIT(7); /* BDB5; BCLR.B #7, @H'F731; refs ram_F731; cycles=8 */
+ MEM8[0xF790] &= ~BIT(7); /* BDB9; BCLR.B #7, @H'F790; refs ram_F790; cycles=8 */
goto loc_BDC2; /* BDBD; BRA loc_BDC2; cycles=8 */
loc_BDBF:
loc_BE70(); /* BDBF; BSR loc_BE70; cycles=14 */
loc_BDC2:
- set_flags_btst(MEM8[0xFAA2], 3); /* BDC2; BTST.B #3, @H'FAA2; cycles=7 */
- if (Z) goto loc_BDD0; /* BDC6; BEQ loc_BDD0; cycles=3/7 nt/t */
- MEM8[0xF9B5] += (uint8_t)(1); /* BDC8; ADD:Q.B #1, @H'F9B5; cycles=9 */
- MEM8[0xF9B5] &= ~BIT(7); /* BDCC; BCLR.B #7, @H'F9B5; cycles=9 */
-loc_BDD0:
- MEM8[0xFAA3] = 0; /* BDD0; CLR.B @H'FAA3; cycles=9 */
- MEM8[0xFAA2] = 0; /* BDD4; CLR.B @H'FAA2; cycles=9 */
+ set_flags_btst(MEM8[0xFAA2], 3); /* BDC2; BTST.B #3, @H'FAA2; refs ram_FAA2; cycles=7 */
+ if (!Z) { /* BDC6; BEQ loc_BDD0; cycles=3/7 nt/t */
+ MEM8[0xF9B5] += (uint8_t)(1); /* BDC8; ADD:Q.B #1, @H'F9B5; refs ram_F9B5; cycles=9 */
+ MEM8[0xF9B5] &= ~BIT(7); /* BDCC; BCLR.B #7, @H'F9B5; refs ram_F9B5; cycles=9 */
+ }
+ MEM8[0xFAA3] = 0; /* BDD0; CLR.B @H'FAA3; refs ram_FAA3; cycles=9 */
+ MEM8[0xFAA2] = 0; /* BDD4; CLR.B @H'FAA2; refs ram_FAA2; cycles=9 */
goto loc_BE6F; /* BDD8; BRA loc_BE6F; cycles=7 */
loc_BDDB:
- R0 = (uint8_t)(MEM8[0xF863]); /* BDDB; MOV:G.B @H'F863, R0; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF863]); /* BDDB; MOV:G.B @H'F863, R0; refs ram_F863; cycles=6 */
R0 = swap_bytes(R0); /* BDDF; SWAP.B R0; cycles=3 */
- R0 = (uint8_t)(MEM8[0xF864]); /* BDE1; MOV:G.B @H'F864, R0; cycles=6 */
+ R0 = (uint8_t)(MEM8[0xF864]); /* BDE1; MOV:G.B @H'F864, R0; refs ram_F864; cycles=6 */
MEM16[R4 - 0x1C00] = (uint16_t)(R0); /* BDE5; MOV:G.W R0, @(-H'1C00,R4); cycles=6 */
MEM8[R5 - 0x1400] |= BIT(6); /* BDE9; BSET.B #6, @(-H'1400,R5); cycles=8 */
- set_flags_btst(MEM8[0xFAA2], 3); /* BDED; BTST.B #3, @H'FAA2; cycles=6 */
- if (Z) goto loc_BDFB; /* BDF1; BEQ loc_BDFB; cycles=3/8 nt/t */
- MEM8[0xF9B5] += (uint8_t)(1); /* BDF3; ADD:Q.B #1, @H'F9B5; cycles=8 */
- MEM8[0xF9B5] &= ~BIT(7); /* BDF7; BCLR.B #7, @H'F9B5; cycles=8 */
-loc_BDFB:
- MEM8[0xFAA3] = 0; /* BDFB; CLR.B @H'FAA3; cycles=8 */
- MEM8[0xFAA2] = 0; /* BDFF; CLR.B @H'FAA2; cycles=8 */
+ set_flags_btst(MEM8[0xFAA2], 3); /* BDED; BTST.B #3, @H'FAA2; refs ram_FAA2; cycles=6 */
+ if (!Z) { /* BDF1; BEQ loc_BDFB; cycles=3/8 nt/t */
+ MEM8[0xF9B5] += (uint8_t)(1); /* BDF3; ADD:Q.B #1, @H'F9B5; refs ram_F9B5; cycles=8 */
+ MEM8[0xF9B5] &= ~BIT(7); /* BDF7; BCLR.B #7, @H'F9B5; refs ram_F9B5; cycles=8 */
+ }
+ MEM8[0xFAA3] = 0; /* BDFB; CLR.B @H'FAA3; refs ram_FAA3; cycles=8 */
+ MEM8[0xFAA2] = 0; /* BDFF; CLR.B @H'FAA2; refs ram_FAA2; cycles=8 */
goto loc_BE6F; /* BE03; BRA loc_BE6F; cycles=8 */
loc_BE05:
- R0 = (uint16_t)(MEM16[0xF858]); /* BE05; MOV:G.W @H'F858, R0; cycles=6 */
- MEM16[0xF850] = (uint16_t)(R0); /* BE09; MOV:G.W R0, @H'F850; cycles=6 */
- R0 = (uint16_t)(MEM16[0xF85A]); /* BE0D; MOV:G.W @H'F85A, R0; cycles=6 */
- MEM16[0xF852] = (uint16_t)(R0); /* BE11; MOV:G.W R0, @H'F852; cycles=6 */
- R0 = (uint16_t)(MEM16[0xF85C]); /* BE15; MOV:G.W @H'F85C, R0; cycles=6 */
- MEM16[0xF854] = (uint16_t)(R0); /* BE19; MOV:G.W R0, @H'F854; cycles=6 */
- MEM8[0xF9C0] = (uint8_t)(0x1F); /* BE1D; MOV:G.B #H'1F, @H'F9C0; cycles=9 */
+ R0 = (uint16_t)(MEM16[0xF858]); /* BE05; MOV:G.W @H'F858, R0; refs ram_F858; cycles=6 */
+ MEM16[0xF850] = (uint16_t)(R0); /* BE09; MOV:G.W R0, @H'F850; refs ram_F850; cycles=6 */
+ R0 = (uint16_t)(MEM16[0xF85A]); /* BE0D; MOV:G.W @H'F85A, R0; refs ram_F85A; cycles=6 */
+ MEM16[0xF852] = (uint16_t)(R0); /* BE11; MOV:G.W R0, @H'F852; refs ram_F852; cycles=6 */
+ R0 = (uint16_t)(MEM16[0xF85C]); /* BE15; MOV:G.W @H'F85C, R0; refs ram_F85C; cycles=6 */
+ MEM16[0xF854] = (uint16_t)(R0); /* BE19; MOV:G.W R0, @H'F854; refs ram_F854; cycles=6 */
+ MEM8[0xF9C0] = (uint8_t)(0x1F); /* BE1D; MOV:G.B #H'1F, @H'F9C0; refs ram_F9C0; cycles=9 */
loc_BA26(); /* BE22; BSR loc_BA26; cycles=13 */
goto loc_BE6F; /* BE25; BRA loc_BE6F; cycles=8 */
loc_BE27:
goto loc_BE6F; /* BE27; BRA loc_BE6F; cycles=8 */
loc_BE29:
- MEM8[0xFAA4] &= ~BIT(7); /* BE29; BCLR.B #7, @H'FAA4; cycles=8 */
- set_flags_btst(MEM8[0xFAA5], 7); /* BE2D; BTST.B #7, @H'FAA5; cycles=6 */
+ MEM8[0xFAA4] &= ~BIT(7); /* BE29; BCLR.B #7, @H'FAA4; refs ram_FAA4; cycles=8 */
+ set_flags_btst(MEM8[0xFAA5], 7); /* BE2D; BTST.B #7, @H'FAA5; refs ram_FAA5; cycles=6 */
if (Z) goto loc_BE6D; /* BE31; BEQ loc_BE6D; cycles=3/8 nt/t */
- MEM8[0xFAA6] += (uint8_t)(1); /* BE33; ADD:Q.B #1, @H'FAA6; cycles=8 */
- set_flags_cmp8(MEM8[0xFAA6], 0x02); /* BE37; CMP:G.B #H'02, @H'FAA6; cycles=6 */
+ MEM8[0xFAA6] += (uint8_t)(1); /* BE33; ADD:Q.B #1, @H'FAA6; refs ram_FAA6; cycles=8 */
+ set_flags_cmp8(MEM8[0xFAA6], 0x02); /* BE37; CMP:G.B #H'02, @H'FAA6; refs ram_FAA6; cycles=6 */
if (C) goto loc_BE4D; /* BE3C; BCS loc_BE4D; cycles=3/7 nt/t */
- MEM8[0xF9C0] = (uint8_t)(0x1F); /* BE3E; MOV:G.B #H'1F, @H'F9C0; cycles=9 */
- MEM8[0xFAA3] = 0; /* BE43; CLR.B @H'FAA3; cycles=8 */
- MEM8[0xFAA2] = 0; /* BE47; CLR.B @H'FAA2; cycles=8 */
+ MEM8[0xF9C0] = (uint8_t)(0x1F); /* BE3E; MOV:G.B #H'1F, @H'F9C0; refs ram_F9C0; cycles=9 */
+ MEM8[0xFAA3] = 0; /* BE43; CLR.B @H'FAA3; refs ram_FAA3; cycles=8 */
+ MEM8[0xFAA2] = 0; /* BE47; CLR.B @H'FAA2; refs ram_FAA2; cycles=8 */
goto loc_BE6D; /* BE4B; BRA loc_BE6D; cycles=8 */
loc_BE4D:
- MEM8[0xF850] = (uint8_t)(0x07); /* BE4D; MOV:G.B #H'07, @H'F850; cycles=9 */
- R0 = (uint8_t)(MEM8[0xF861]); /* BE52; MOV:G.B @H'F861, R0; cycles=7 */
- MEM8[0xF851] = (uint8_t)(R0); /* BE56; MOV:G.B R0, @H'F851; cycles=7 */
- R0 = (uint16_t)(MEM16[0xF862]); /* BE5A; MOV:G.W @H'F862, R0; cycles=7 */
- MEM16[0xF852] = (uint16_t)(R0); /* BE5E; MOV:G.W R0, @H'F852; cycles=7 */
- R0 = (uint8_t)(MEM8[0xF864]); /* BE62; MOV:G.B @H'F864, R0; cycles=7 */
- MEM8[0xF854] = (uint8_t)(R0); /* BE66; MOV:G.B R0, @H'F854; cycles=7 */
+ MEM8[0xF850] = (uint8_t)(0x07); /* BE4D; MOV:G.B #H'07, @H'F850; refs ram_F850; cycles=9 */
+ R0 = (uint8_t)(MEM8[0xF861]); /* BE52; MOV:G.B @H'F861, R0; refs ram_F861; cycles=7 */
+ MEM8[0xF851] = (uint8_t)(R0); /* BE56; MOV:G.B R0, @H'F851; refs ram_F851; cycles=7 */
+ R0 = (uint16_t)(MEM16[0xF862]); /* BE5A; MOV:G.W @H'F862, R0; refs ram_F862; cycles=7 */
+ MEM16[0xF852] = (uint16_t)(R0); /* BE5E; MOV:G.W R0, @H'F852; refs ram_F852; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xF864]); /* BE62; MOV:G.B @H'F864, R0; refs ram_F864; cycles=7 */
+ MEM8[0xF854] = (uint8_t)(R0); /* BE66; MOV:G.B R0, @H'F854; refs ram_F854; cycles=7 */
loc_BA26(); /* BE6A; BSR loc_BA26; cycles=13 */
loc_BE6D:
goto loc_BE6F; /* BE6D; BRA loc_BE6F; cycles=8 */
@@ -2943,10 +3232,10 @@ loc_BE6F:
void loc_BE70(void)
{
- R3 = (uint8_t)(MEM8[0xF9B9]); /* BE70; MOV:G.B @H'F9B9, R3; cycles=7 */
+ R3 = (uint8_t)(MEM8[0xF9B9]); /* BE70; MOV:G.B @H'F9B9, R3; refs ram_F9B9; cycles=7 */
R3 = zero_extend8(R3); /* BE74; EXTU.B R3; cycles=3 */
R3 <<= 1; /* BE76; SHLL.W R3; cycles=3 */
- R1 = (uint8_t)(MEM8[0xF9B4]); /* BE78; MOV:G.B @H'F9B4, R1; cycles=7 */
+ R1 = (uint8_t)(MEM8[0xF9B4]); /* BE78; MOV:G.B @H'F9B4, R1; refs ram_F9B4; cycles=7 */
R1 = zero_extend8(R1); /* BE7C; EXTU.B R1; cycles=3 */
R1 <<= 1; /* BE7E; SHLL.W R1; cycles=3 */
loc_BE80:
@@ -2959,35 +3248,35 @@ loc_BE80:
goto loc_BE80; /* BE8F; BRA loc_BE80; cycles=8 */
loc_BE91:
MEM16[R1 - 0x0690] = (uint16_t)(R5); /* BE91; MOV:G.W R5, @(-H'0690,R1); cycles=6 */
- MEM8[0xF9B4] += (uint8_t)(1); /* BE95; ADD:Q.B #1, @H'F9B4; cycles=8 */
- MEM8[0xF9B4] &= ~BIT(5); /* BE99; BCLR.B #5, @H'F9B4; cycles=8 */
+ MEM8[0xF9B4] += (uint8_t)(1); /* BE95; ADD:Q.B #1, @H'F9B4; refs ram_F9B4; cycles=8 */
+ MEM8[0xF9B4] &= ~BIT(5); /* BE99; BCLR.B #5, @H'F9B4; refs ram_F9B4; cycles=8 */
loc_BE9D:
return; /* BE9D; RTS; cycles=13 */
}
void loc_BE9E(void)
{
- R0 = (uint8_t)(MEM8[0xFAA5]); /* BE9E; MOV:G.B @H'FAA5, R0; cycles=7 */
+ R0 = (uint8_t)(MEM8[0xFAA5]); /* BE9E; MOV:G.B @H'FAA5, R0; refs ram_FAA5; cycles=7 */
R0 &= (uint8_t)(0x80); /* BEA2; AND.B #H'80, R0; cycles=3 */
- R0 &= (uint8_t)(MEM8[0xFAA3]); /* BEA5; AND.B @H'FAA3, R0; cycles=6 */
- MEM8[0xFAA3] = (uint8_t)(R0); /* BEA9; MOV:G.B R0, @H'FAA3; cycles=6 */
+ R0 &= (uint8_t)(MEM8[0xFAA3]); /* BEA5; AND.B @H'FAA3, R0; refs ram_FAA3; cycles=6 */
+ MEM8[0xFAA3] = (uint8_t)(R0); /* BEA9; MOV:G.B R0, @H'FAA3; refs ram_FAA3; cycles=6 */
if (!Z) goto loc_BEB5; /* BEAD; BNE loc_BEB5; cycles=3/8 nt/t */
- MEM8[0xFAA2] = 0; /* BEAF; CLR.B @H'FAA2; cycles=8 */
+ MEM8[0xFAA2] = 0; /* BEAF; CLR.B @H'FAA2; refs ram_FAA2; cycles=8 */
goto loc_BEE8; /* BEB3; BRA loc_BEE8; cycles=8 */
loc_BEB5:
- set_flags_tst16(MEM16[0xF9C6]); /* BEB5; TST.W @H'F9C6; cycles=6 */
+ set_flags_tst16(MEM16[0xF9C6]); /* BEB5; TST.W @H'F9C6; refs ram_F9C6; cycles=6 */
if (!Z) goto loc_BEE8; /* BEB9; BNE loc_BEE8; cycles=3/8 nt/t */
- set_flags_tst8(MEM8[0xF9C8]); /* BEBB; TST.B @H'F9C8; cycles=6 */
+ set_flags_tst8(MEM8[0xF9C8]); /* BEBB; TST.B @H'F9C8; refs ram_F9C8; cycles=6 */
if (Z) goto loc_BEE4; /* BEBF; BEQ loc_BEE4; cycles=3/8 nt/t */
- MEM8[0xF9C8] += (uint8_t)(-1); /* BEC1; ADD:Q.B #-1, @H'F9C8; cycles=8 */
- MEM16[0xF9C6] = (uint16_t)(0x01F4); /* BEC5; MOV:G.W #H'01F4, @H'F9C6; cycles=9 */
- set_flags_btst(MEM8[0xFAA3], 7); /* BECB; BTST.B #7, @H'FAA3; cycles=6 */
+ MEM8[0xF9C8] += (uint8_t)(-1); /* BEC1; ADD:Q.B #-1, @H'F9C8; refs ram_F9C8; cycles=8 */
+ MEM16[0xF9C6] = (uint16_t)(0x01F4); /* BEC5; MOV:G.W #H'01F4, @H'F9C6; refs ram_F9C6; cycles=9 */
+ set_flags_btst(MEM8[0xFAA3], 7); /* BECB; BTST.B #7, @H'FAA3; refs ram_FAA3; cycles=6 */
if (Z) goto loc_BEE8; /* BECF; BEQ loc_BEE8; cycles=3/8 nt/t */
- MEM8[0xF9C3] = 0; /* BED1; CLR.B @H'F9C3; cycles=8 */
+ MEM8[0xF9C3] = 0; /* BED1; CLR.B @H'F9C3; refs ram_F9C3; cycles=8 */
loc_BA26(); /* BED5; BSR loc_BA26; cycles=14 */
goto loc_BEE8; /* BED8; BRA loc_BEE8; cycles=7 */
loc_BEE4:
- MEM8[0xF9C5] = 0; /* BEE4; CLR.B @H'F9C5; cycles=9 */
+ MEM8[0xF9C5] = 0; /* BEE4; CLR.B @H'F9C5; refs ram_F9C5; cycles=9 */
loc_BEE8:
return; /* BEE8; RTS; cycles=12 */
}
@@ -2995,27 +3284,27 @@ loc_BEE8:
void vec_frt1_ocia_BEEA(void)
{
/* vector sources: frt1_ocia */
- FRT1_TCSR &= ~BIT(5); /* BEEA; BCLR.B #5, @FRT1_TCSR; clear OCFA (bit 5) of FRT1_TCSR; cycles=9 */
- set_flags_tst8(MEM8[0xF9C0]); /* BEEE; TST.B @H'F9C0; cycles=7 */
- if (Z) goto loc_BEF8; /* BEF2; BEQ loc_BEF8; cycles=3/7 nt/t */
- MEM8[0xF9C0] += (uint8_t)(-1); /* BEF4; ADD:Q.B #-1, @H'F9C0; cycles=9 */
-loc_BEF8:
- set_flags_tst8(MEM8[0xF9C1]); /* BEF8; TST.B @H'F9C1; cycles=7 */
- if (Z) goto loc_BF02; /* BEFC; BEQ loc_BF02; cycles=3/7 nt/t */
- MEM8[0xF9C1] += (uint8_t)(-1); /* BEFE; ADD:Q.B #-1, @H'F9C1; cycles=9 */
-loc_BF02:
- set_flags_tst16(MEM16[0xF9C6]); /* BF02; TST.W @H'F9C6; cycles=7 */
- if (Z) goto loc_BF0C; /* BF06; BEQ loc_BF0C; cycles=3/7 nt/t */
- MEM16[0xF9C6] += (uint16_t)(-1); /* BF08; ADD:Q.W #-1, @H'F9C6; cycles=9 */
-loc_BF0C:
- set_flags_btst(MEM8[0xF6F6], 7); /* BF0C; BTST.B #7, @H'F6F6; cycles=7 */
+ FRT1_TCSR &= ~BIT(5); /* BEEA; BCLR.B #5, @FRT1_TCSR; clear OCFA (bit 5) of FRT1_TCSR; refs FRT1_TCSR; cycles=9 */
+ set_flags_tst8(MEM8[0xF9C0]); /* BEEE; TST.B @H'F9C0; refs ram_F9C0; cycles=7 */
+ if (!Z) { /* BEF2; BEQ loc_BEF8; cycles=3/7 nt/t */
+ MEM8[0xF9C0] += (uint8_t)(-1); /* BEF4; ADD:Q.B #-1, @H'F9C0; refs ram_F9C0; cycles=9 */
+ }
+ set_flags_tst8(MEM8[0xF9C1]); /* BEF8; TST.B @H'F9C1; refs ram_F9C1; cycles=7 */
+ if (!Z) { /* BEFC; BEQ loc_BF02; cycles=3/7 nt/t */
+ MEM8[0xF9C1] += (uint8_t)(-1); /* BEFE; ADD:Q.B #-1, @H'F9C1; refs ram_F9C1; cycles=9 */
+ }
+ set_flags_tst16(MEM16[0xF9C6]); /* BF02; TST.W @H'F9C6; refs ram_F9C6; cycles=7 */
+ if (!Z) { /* BF06; BEQ loc_BF0C; cycles=3/7 nt/t */
+ MEM16[0xF9C6] += (uint16_t)(-1); /* BF08; ADD:Q.W #-1, @H'F9C6; refs ram_F9C6; cycles=9 */
+ }
+ set_flags_btst(MEM8[0xF6F6], 7); /* BF0C; BTST.B #7, @H'F6F6; refs ram_F6F6; cycles=7 */
if (Z) goto loc_BF22; /* BF10; BEQ loc_BF22; cycles=3/7 nt/t */
- set_flags_tst16(MEM16[0xF6F4]); /* BF12; TST.W @H'F6F4; cycles=7 */
+ set_flags_tst16(MEM16[0xF6F4]); /* BF12; TST.W @H'F6F4; refs ram_F6F4; cycles=7 */
if (!Z) goto loc_BF1E; /* BF16; BNE loc_BF1E; cycles=3/7 nt/t */
- MEM8[0xF6F6] |= BIT(5); /* BF18; BSET.B #5, @H'F6F6; cycles=9 */
+ MEM8[0xF6F6] |= BIT(5); /* BF18; BSET.B #5, @H'F6F6; refs ram_F6F6; cycles=9 */
goto loc_BF22; /* BF1C; BRA loc_BF22; cycles=7 */
loc_BF1E:
- MEM16[0xF6F4] += (uint16_t)(-1); /* BF1E; ADD:Q.W #-1, @H'F6F4; cycles=9 */
+ MEM16[0xF6F4] += (uint16_t)(-1); /* BF1E; ADD:Q.W #-1, @H'F6F4; refs ram_F6F4; cycles=9 */
loc_BF22:
return_from_interrupt(); /* BF22; RTE; cycles=13 */
}
@@ -3023,65 +3312,65 @@ loc_BF22:
void vec_frt2_ocia_BF23(void)
{
/* vector sources: frt2_ocia */
- FRT2_TCSR &= ~BIT(5); /* BF23; BCLR.B #5, @FRT2_TCSR; clear OCFA (bit 5) of FRT2_TCSR; cycles=8 */
- set_flags_tst8(MEM8[0xF9C4]); /* BF27; TST.B @H'F9C4; cycles=6 */
- if (Z) goto loc_BF31; /* BF2B; BEQ loc_BF31; cycles=3/8 nt/t */
- MEM8[0xF9C4] += (uint8_t)(-1); /* BF2D; ADD:Q.B #-1, @H'F9C4; cycles=8 */
-loc_BF31:
- set_flags_tst8(MEM8[0xF9C5]); /* BF31; TST.B @H'F9C5; cycles=6 */
- if (Z) goto loc_BF3B; /* BF35; BEQ loc_BF3B; cycles=3/8 nt/t */
- MEM8[0xF9C5] += (uint8_t)(-1); /* BF37; ADD:Q.B #-1, @H'F9C5; cycles=8 */
-loc_BF3B:
- set_flags_tst8(MEM8[0xF724]); /* BF3B; TST.B @H'F724; cycles=6 */
+ FRT2_TCSR &= ~BIT(5); /* BF23; BCLR.B #5, @FRT2_TCSR; clear OCFA (bit 5) of FRT2_TCSR; refs FRT2_TCSR; cycles=8 */
+ set_flags_tst8(MEM8[0xF9C4]); /* BF27; TST.B @H'F9C4; refs ram_F9C4; cycles=6 */
+ if (!Z) { /* BF2B; BEQ loc_BF31; cycles=3/8 nt/t */
+ MEM8[0xF9C4] += (uint8_t)(-1); /* BF2D; ADD:Q.B #-1, @H'F9C4; refs ram_F9C4; cycles=8 */
+ }
+ set_flags_tst8(MEM8[0xF9C5]); /* BF31; TST.B @H'F9C5; refs ram_F9C5; cycles=6 */
+ if (!Z) { /* BF35; BEQ loc_BF3B; cycles=3/8 nt/t */
+ MEM8[0xF9C5] += (uint8_t)(-1); /* BF37; ADD:Q.B #-1, @H'F9C5; refs ram_F9C5; cycles=8 */
+ }
+ set_flags_tst8(MEM8[0xF724]); /* BF3B; TST.B @H'F724; refs ram_F724; cycles=6 */
if (Z) goto loc_BF47; /* BF3F; BEQ loc_BF47; cycles=3/8 nt/t */
- MEM8[0xF724] += (uint8_t)(-1); /* BF41; ADD:Q.B #-1, @H'F724; cycles=8 */
+ MEM8[0xF724] += (uint8_t)(-1); /* BF41; ADD:Q.B #-1, @H'F724; refs ram_F724; cycles=8 */
goto loc_BF50; /* BF45; BRA loc_BF50; cycles=8 */
loc_BF47:
- MEM8[0xF724] = (uint8_t)(0x03); /* BF47; MOV:G.B #H'03, @H'F724; cycles=9 */
- MEM8[0xF723] = ~MEM8[0xF723]; /* BF4C; NOT.B @H'F723; cycles=9 */
+ MEM8[0xF724] = (uint8_t)(0x03); /* BF47; MOV:G.B #H'03, @H'F724; refs ram_F724; cycles=9 */
+ MEM8[0xF723] = ~MEM8[0xF723]; /* BF4C; NOT.B @H'F723; refs ram_F723; cycles=9 */
loc_BF50:
- set_flags_btst(MEM8[0xFB03], 7); /* BF50; BTST.B #7, @H'FB03; cycles=7 */
+ set_flags_btst(MEM8[0xFB03], 7); /* BF50; BTST.B #7, @H'FB03; refs ram_FB03; cycles=7 */
if (Z) goto loc_BF6D; /* BF54; BEQ loc_BF6D; cycles=3/7 nt/t */
- set_flags_tst8(MEM8[0xFB02]); /* BF56; TST.B @H'FB02; cycles=7 */
+ set_flags_tst8(MEM8[0xFB02]); /* BF56; TST.B @H'FB02; refs ram_FB02; cycles=7 */
if (Z) goto loc_BF62; /* BF5A; BEQ loc_BF62; cycles=3/7 nt/t */
- MEM8[0xFB02] += (uint8_t)(-1); /* BF5C; ADD:Q.B #-1, @H'FB02; cycles=9 */
+ MEM8[0xFB02] += (uint8_t)(-1); /* BF5C; ADD:Q.B #-1, @H'FB02; refs ram_FB02; cycles=9 */
goto loc_BF6D; /* BF60; BRA loc_BF6D; cycles=7 */
loc_BF62:
- MEM8[0xFB03] &= ~BIT(7); /* BF62; BCLR.B #7, @H'FB03; cycles=9 */
+ MEM8[0xFB03] &= ~BIT(7); /* BF62; BCLR.B #7, @H'FB03; refs ram_FB03; cycles=9 */
push_registers(R0, R1, R2, R3, R4, R5); /* BF66; STM.W {R0,R1,R2,R3,R4,R5}, @-SP; cycles=24 */
loc_48EF(); /* BF68; BSR loc_48EF; cycles=13 */
pop_registers(R0, R1, R2, R3, R4, R5); /* BF6B; LDM.W @SP+, {R0,R1,R2,R3,R4,R5}; cycles=30 */
loc_BF6D:
- set_flags_tst8(MEM8[0xF76C]); /* BF6D; TST.B @H'F76C; cycles=6 */
- if (Z) goto loc_BF77; /* BF71; BEQ loc_BF77; cycles=3/8 nt/t */
- MEM8[0xF76C] += (uint8_t)(-1); /* BF73; ADD:Q.B #-1, @H'F76C; cycles=8 */
-loc_BF77:
- set_flags_tst8(MEM8[0xF840]); /* BF77; TST.B @H'F840; cycles=6 */
- if (Z) goto loc_BF81; /* BF7B; BEQ loc_BF81; cycles=3/8 nt/t */
- MEM8[0xF840] += (uint8_t)(-1); /* BF7D; ADD:Q.B #-1, @H'F840; cycles=8 */
-loc_BF81:
- set_flags_tst8(MEM8[0xF726]); /* BF81; TST.B @H'F726; cycles=6 */
+ set_flags_tst8(MEM8[0xF76C]); /* BF6D; TST.B @H'F76C; refs ram_F76C; cycles=6 */
+ if (!Z) { /* BF71; BEQ loc_BF77; cycles=3/8 nt/t */
+ MEM8[0xF76C] += (uint8_t)(-1); /* BF73; ADD:Q.B #-1, @H'F76C; refs ram_F76C; cycles=8 */
+ }
+ set_flags_tst8(MEM8[0xF840]); /* BF77; TST.B @H'F840; refs ram_F840; cycles=6 */
+ if (!Z) { /* BF7B; BEQ loc_BF81; cycles=3/8 nt/t */
+ MEM8[0xF840] += (uint8_t)(-1); /* BF7D; ADD:Q.B #-1, @H'F840; refs ram_F840; cycles=8 */
+ }
+ set_flags_tst8(MEM8[0xF726]); /* BF81; TST.B @H'F726; refs ram_F726; cycles=6 */
if (Z) goto loc_BFA3; /* BF85; BEQ loc_BFA3; cycles=3/8 nt/t */
- MEM8[0xF726] += (uint8_t)(-1); /* BF87; ADD:Q.B #-1, @H'F726; cycles=8 */
+ MEM8[0xF726] += (uint8_t)(-1); /* BF87; ADD:Q.B #-1, @H'F726; refs ram_F726; cycles=8 */
if (!Z) goto loc_BFA3; /* BF8B; BNE loc_BFA3; cycles=3/8 nt/t */
- MEM8[0xF713] &= ~BIT(6); /* BF8D; BCLR.B #6, @H'F713; cycles=8 */
+ MEM8[0xF713] &= ~BIT(6); /* BF8D; BCLR.B #6, @H'F713; refs ram_F713; cycles=8 */
if (!Z) goto loc_BFA3; /* BF91; BNE loc_BFA3; cycles=3/8 nt/t */
- MEM8[0xF711] &= ~BIT(7); /* BF93; BCLR.B #7, @H'F711; cycles=8 */
- MEM8[0xF711] &= ~BIT(6); /* BF97; BCLR.B #6, @H'F711; cycles=8 */
- MEM8[0xF711] &= ~BIT(5); /* BF9B; BCLR.B #5, @H'F711; cycles=8 */
- MEM8[0xF711] &= ~BIT(4); /* BF9F; BCLR.B #4, @H'F711; cycles=8 */
+ MEM8[0xF711] &= ~BIT(7); /* BF93; BCLR.B #7, @H'F711; refs ram_F711; cycles=8 */
+ MEM8[0xF711] &= ~BIT(6); /* BF97; BCLR.B #6, @H'F711; refs ram_F711; cycles=8 */
+ MEM8[0xF711] &= ~BIT(5); /* BF9B; BCLR.B #5, @H'F711; refs ram_F711; cycles=8 */
+ MEM8[0xF711] &= ~BIT(4); /* BF9F; BCLR.B #4, @H'F711; refs ram_F711; cycles=8 */
loc_BFA3:
- set_flags_tst8(MEM8[0xF797]); /* BFA3; TST.B @H'F797; cycles=6 */
+ set_flags_tst8(MEM8[0xF797]); /* BFA3; TST.B @H'F797; refs ram_F797; cycles=6 */
if (Z) goto loc_BFB3; /* BFA7; BEQ loc_BFB3; cycles=3/8 nt/t */
- MEM8[0xF797] += (uint8_t)(-1); /* BFA9; ADD:Q.B #-1, @H'F797; cycles=8 */
+ MEM8[0xF797] += (uint8_t)(-1); /* BFA9; ADD:Q.B #-1, @H'F797; refs ram_F797; cycles=8 */
if (!Z) goto loc_BFB3; /* BFAD; BNE loc_BFB3; cycles=3/8 nt/t */
- MEM8[0xF731] &= ~BIT(7); /* BFAF; BCLR.B #7, @H'F731; cycles=8 */
+ MEM8[0xF731] &= ~BIT(7); /* BFAF; BCLR.B #7, @H'F731; refs ram_F731; cycles=8 */
loc_BFB3:
- set_flags_tst8(MEM8[0xF798]); /* BFB3; TST.B @H'F798; cycles=6 */
+ set_flags_tst8(MEM8[0xF798]); /* BFB3; TST.B @H'F798; refs ram_F798; cycles=6 */
if (Z) goto loc_BFC3; /* BFB7; BEQ loc_BFC3; cycles=3/8 nt/t */
- MEM8[0xF798] += (uint8_t)(-1); /* BFB9; ADD:Q.B #-1, @H'F798; cycles=8 */
+ MEM8[0xF798] += (uint8_t)(-1); /* BFB9; ADD:Q.B #-1, @H'F798; refs ram_F798; cycles=8 */
if (!Z) goto loc_BFC3; /* BFBD; BNE loc_BFC3; cycles=3/8 nt/t */
- MEM8[0xF731] &= ~BIT(7); /* BFBF; BCLR.B #7, @H'F731; cycles=8 */
+ MEM8[0xF731] &= ~BIT(7); /* BFBF; BCLR.B #7, @H'F731; refs ram_F731; cycles=8 */
loc_BFC3:
return_from_interrupt(); /* BFC3; RTE; cycles=14 */
}
@@ -3089,43 +3378,43 @@ loc_BFC3:
void vec_interval_timer_BFC4(void)
{
/* vector sources: interval_timer */
- set_flags_btst(WDT_TCSR_R, 7); /* BFC4; BTST.B #7, @WDT_TCSR_R; cycles=7 */
- WDT_TCSR_R = (uint16_t)(0xA53F); /* BFC8; MOV:G.W #H'A53F, @WDT_TCSR_R; WDT_TCSR_R = H'A53F (OVF=0 WT/IT=0 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, interval IRQ0, clock phi/4096); cycles=11 */
- MEM8[0xF794] += (uint8_t)(1); /* BFCE; ADD:Q.B #1, @H'F794; cycles=9 */
- set_flags_cmp8(MEM8[0xF794], 0x0A); /* BFD2; CMP:G.B #H'0A, @H'F794; cycles=7 */
- if (!Z) goto loc_BFDF; /* BFD7; BNE loc_BFDF; cycles=3/8 nt/t */
- WDT_TCSR_R = (uint16_t)(0xA57F); /* BFD9; MOV:G.W #H'A57F, @WDT_TCSR_R; WDT_TCSR_R = H'A57F (OVF=0 WT/IT=1 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, watchdog NMI, clock phi/4096); cycles=9 */
-loc_BFDF:
+ set_flags_btst(WDT_TCSR_R, 7); /* BFC4; BTST.B #7, @WDT_TCSR_R; refs WDT_TCSR_R; cycles=7 */
+ WDT_TCSR_R = (uint16_t)(0xA53F); /* BFC8; MOV:G.W #H'A53F, @WDT_TCSR_R; WDT_TCSR_R = H'A53F (OVF=0 WT/IT=0 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, interval IRQ0, clock phi/4096); refs WDT_TCSR_R; cycles=11 */
+ MEM8[0xF794] += (uint8_t)(1); /* BFCE; ADD:Q.B #1, @H'F794; refs ram_F794; cycles=9 */
+ set_flags_cmp8(MEM8[0xF794], 0x0A); /* BFD2; CMP:G.B #H'0A, @H'F794; refs ram_F794; cycles=7 */
+ if (Z) { /* BFD7; BNE loc_BFDF; cycles=3/8 nt/t */
+ WDT_TCSR_R = (uint16_t)(0xA57F); /* BFD9; MOV:G.W #H'A57F, @WDT_TCSR_R; WDT_TCSR_R = H'A57F (OVF=0 WT/IT=1 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, watchdog NMI, clock phi/4096); refs WDT_TCSR_R; cycles=9 */
+ }
return_from_interrupt(); /* BFDF; RTE; cycles=14 */
}
void loc_BFE0(void)
{
- MEM8[0xF840] = (uint8_t)(0x0A); /* BFE0; MOV:G.B #H'0A, @H'F840; cycles=9 */
+ MEM8[0xF840] = (uint8_t)(0x0A); /* BFE0; MOV:G.B #H'0A, @H'F840; refs ram_F840; cycles=9 */
loc_BFE5:
R2 = (uint16_t)(R5); /* BFE5; MOV:G.W R5, R2; cycles=3 */
loc_C010(); /* BFE7; BSR loc_C010; cycles=14 */
loc_C039(); /* BFE9; BSR loc_C039; cycles=14 */
set_flags_cmp16(R5, R2); /* BFEB; CMP:G.W R2, R5; cycles=3 */
if (Z) goto loc_BFFD; /* BFED; BEQ loc_BFFD; cycles=3/8 nt/t */
- set_flags_tst8(MEM8[0xF840]); /* BFEF; TST.B @H'F840; cycles=6 */
+ set_flags_tst8(MEM8[0xF840]); /* BFEF; TST.B @H'F840; refs ram_F840; cycles=6 */
if (Z) goto loc_BFF9; /* BFF3; BEQ loc_BFF9; cycles=3/8 nt/t */
R5 = (uint16_t)(R2); /* BFF5; MOV:G.W R2, R5; cycles=3 */
goto loc_BFE5; /* BFF7; BRA loc_BFE5; cycles=8 */
loc_BFF9:
- MEM8[0xF841] |= BIT(7); /* BFF9; BSET.B #7, @H'F841; cycles=8 */
+ MEM8[0xF841] |= BIT(7); /* BFF9; BSET.B #7, @H'F841; refs ram_F841; cycles=8 */
loc_BFFD:
return; /* BFFD; RTS; cycles=13 */
}
void loc_BFFE(void)
{
- MEM8[0xF840] = (uint8_t)(0x0A); /* BFFE; MOV:G.B #H'0A, @H'F840; cycles=9 */
+ MEM8[0xF840] = (uint8_t)(0x0A); /* BFFE; MOV:G.B #H'0A, @H'F840; refs ram_F840; cycles=9 */
loc_C039(); /* C003; BSR loc_C039; cycles=14 */
- set_flags_tst8(MEM8[0xF840]); /* C005; TST.B @H'F840; cycles=6 */
- if (!Z) goto loc_C00F; /* C009; BNE loc_C00F; cycles=3/8 nt/t */
- MEM8[0xF841] |= BIT(6); /* C00B; BSET.B #6, @H'F841; cycles=8 */
-loc_C00F:
+ set_flags_tst8(MEM8[0xF840]); /* C005; TST.B @H'F840; refs ram_F840; cycles=6 */
+ if (Z) { /* C009; BNE loc_C00F; cycles=3/8 nt/t */
+ MEM8[0xF841] |= BIT(6); /* C00B; BSET.B #6, @H'F841; refs ram_F841; cycles=8 */
+ }
return; /* C00F; RTS; cycles=13 */
}
@@ -3133,7 +3422,7 @@ void loc_C010(void)
{
loc_C06A(); /* C010; BSR loc_C06A; cycles=13 */
loc_C012:
- set_flags_tst8(MEM8[0xF840]); /* C012; TST.B @H'F840; cycles=7 */
+ set_flags_tst8(MEM8[0xF840]); /* C012; TST.B @H'F840; refs ram_F840; cycles=7 */
if (Z) goto loc_C038; /* C016; BEQ loc_C038; cycles=3/7 nt/t */
loc_C121(); /* C018; BSR loc_C121; cycles=13 */
R0 = (uint8_t)(R3); /* C01B; MOV:G.B R3, R0; cycles=2 */
@@ -3158,7 +3447,7 @@ void loc_C039(void)
{
loc_C06A(); /* C039; BSR loc_C06A; cycles=14 */
loc_C03B:
- set_flags_tst8(MEM8[0xF840]); /* C03B; TST.B @H'F840; cycles=6 */
+ set_flags_tst8(MEM8[0xF840]); /* C03B; TST.B @H'F840; refs ram_F840; cycles=6 */
if (Z) goto loc_C069; /* C03F; BEQ loc_C069; cycles=3/8 nt/t */
loc_C121(); /* C041; BSR loc_C121; cycles=14 */
R0 = (uint8_t)(R3); /* C044; MOV:G.B R3, R0; cycles=2 */
@@ -3203,147 +3492,147 @@ loc_C08A:
void loc_C08B(void)
{
- R1 = (uint16_t)(0x0007); /* C08B; MOV:I.W #H'0007, R1; cycles=3 */
+ R1 = (uint16_t)(0x0007); /* C08B; MOV:I.W #H'0007, R1; dataflow R1=0x0007; cycles=3 */
loc_C08E:
R0 <<= 1; /* C08E; SHLL.B R0; cycles=2 */
if (!C) goto loc_C098; /* C090; BCC loc_C098; cycles=3/7 nt/t */
- P9DR |= BIT(7); /* C092; BSET.B #7, @P9DR; set bit 7 of P9DR; cycles=9 */
+ P9DR |= BIT(7); /* C092; BSET.B #7, @P9DR; set bit 7 of P9DR; refs P9DR; cycles=9 */
goto loc_C09C; /* C096; BRA loc_C09C; cycles=7 */
loc_C098:
- P9DR &= ~BIT(7); /* C098; BCLR.B #7, @P9DR; clear bit 7 of P9DR; cycles=9 */
+ P9DR &= ~BIT(7); /* C098; BCLR.B #7, @P9DR; clear bit 7 of P9DR; refs P9DR; cycles=9 */
loc_C09C:
- P9DR |= BIT(1); /* C09C; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=9 */
- P9DR |= BIT(1); /* C0A0; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=9 */
- P9DR |= BIT(1); /* C0A4; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=9 */
- P9DR &= ~BIT(1); /* C0A8; BCLR.B #1, @P9DR; clear bit 1 of P9DR; cycles=9 */
+ P9DR |= BIT(1); /* C09C; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
+ P9DR |= BIT(1); /* C0A0; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
+ P9DR |= BIT(1); /* C0A4; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
+ P9DR &= ~BIT(1); /* C0A8; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=9 */
if (scb_f(R1)) goto loc_C08E; /* C0AC; SCB/F R1, loc_C08E; cycles=? */
- P9DDR = (uint8_t)(0x13); /* C0AF; MOV:G.B #H'13, @P9DDR; P9DDR = H'13; cycles=9 */
- P9DR |= BIT(1); /* C0B4; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=9 */
- P9DR |= BIT(1); /* C0B8; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=9 */
- set_flags_btst(P9DR, 7); /* C0BC; BTST.B #7, @P9DR; cycles=7 */
+ P9DDR = (uint8_t)(0x13); /* C0AF; MOV:G.B #H'13, @P9DDR; P9DDR = H'13; refs P9DDR; cycles=9 */
+ P9DR |= BIT(1); /* C0B4; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
+ P9DR |= BIT(1); /* C0B8; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
+ set_flags_btst(P9DR, 7); /* C0BC; BTST.B #7, @P9DR; refs P9DR; cycles=7 */
if (Z) goto loc_C0CF; /* C0C0; BEQ loc_C0CF; cycles=3/7 nt/t */
- P9DR &= ~BIT(1); /* C0C2; BCLR.B #1, @P9DR; clear bit 1 of P9DR; cycles=9 */
- P9DDR = (uint8_t)(0x93); /* C0C6; MOV:G.B #H'93, @P9DDR; P9DDR = H'93; cycles=9 */
- R0 = (uint8_t)(0x00); /* C0CB; MOV:E.B #H'00, R0; cycles=2 */
+ P9DR &= ~BIT(1); /* C0C2; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=9 */
+ P9DDR = (uint8_t)(0x93); /* C0C6; MOV:G.B #H'93, @P9DDR; P9DDR = H'93; refs P9DDR; cycles=9 */
+ R0 = (uint8_t)(0x00); /* C0CB; MOV:E.B #H'00, R0; dataflow R0=0x00; cycles=2 */
goto loc_C0DA; /* C0CD; BRA loc_C0DA; cycles=8 */
loc_C0CF:
- P9DR &= ~BIT(1); /* C0CF; BCLR.B #1, @P9DR; clear bit 1 of P9DR; cycles=8 */
- P9DDR = (uint8_t)(0x93); /* C0D3; MOV:G.B #H'93, @P9DDR; P9DDR = H'93; cycles=9 */
- R0 = (uint8_t)(0x01); /* C0D8; MOV:E.B #H'01, R0; cycles=2 */
+ P9DR &= ~BIT(1); /* C0CF; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=8 */
+ P9DDR = (uint8_t)(0x93); /* C0D3; MOV:G.B #H'93, @P9DDR; P9DDR = H'93; refs P9DDR; cycles=9 */
+ R0 = (uint8_t)(0x01); /* C0D8; MOV:E.B #H'01, R0; dataflow R0=0x01; cycles=2 */
loc_C0DA:
return; /* C0DA; RTS; cycles=12 */
}
void loc_C0DB(void)
{
- P9DDR = (uint8_t)(0x13); /* C0DB; MOV:G.B #H'13, @P9DDR; P9DDR = H'13; cycles=9 */
- R1 = (uint16_t)(0x0007); /* C0E0; MOV:I.W #H'0007, R1; cycles=3 */
+ P9DDR = (uint8_t)(0x13); /* C0DB; MOV:G.B #H'13, @P9DDR; P9DDR = H'13; refs P9DDR; cycles=9 */
+ R1 = (uint16_t)(0x0007); /* C0E0; MOV:I.W #H'0007, R1; dataflow R1=0x0007; cycles=3 */
loc_C0E3:
- P9DR |= BIT(1); /* C0E3; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=8 */
- P9DR |= BIT(1); /* C0E7; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=8 */
- set_flags_btst(P9DR, 7); /* C0EB; BTST.B #7, @P9DR; cycles=6 */
+ P9DR |= BIT(1); /* C0E3; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=8 */
+ P9DR |= BIT(1); /* C0E7; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=8 */
+ set_flags_btst(P9DR, 7); /* C0EB; BTST.B #7, @P9DR; refs P9DR; cycles=6 */
if (Z) goto loc_C0F5; /* C0EF; BEQ loc_C0F5; cycles=3/8 nt/t */
R5 |= BIT(R1); /* C0F1; BSET.B R1, R5; cycles=2 */
goto loc_C0F7; /* C0F3; BRA loc_C0F7; cycles=8 */
loc_C0F5:
R5 &= ~BIT(R1); /* C0F5; BCLR.B R1, R5; cycles=2 */
loc_C0F7:
- P9DR &= ~BIT(1); /* C0F7; BCLR.B #1, @P9DR; clear bit 1 of P9DR; cycles=8 */
- P9DR &= ~BIT(1); /* C0FB; BCLR.B #1, @P9DR; clear bit 1 of P9DR; cycles=8 */
- P9DR &= ~BIT(1); /* C0FF; BCLR.B #1, @P9DR; clear bit 1 of P9DR; cycles=8 */
+ P9DR &= ~BIT(1); /* C0F7; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=8 */
+ P9DR &= ~BIT(1); /* C0FB; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=8 */
+ P9DR &= ~BIT(1); /* C0FF; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=8 */
if (scb_f(R1)) goto loc_C0E3; /* C103; SCB/F R1, loc_C0E3; cycles=? */
- P9DDR = (uint8_t)(0x93); /* C106; MOV:G.B #H'93, @P9DDR; P9DDR = H'93; cycles=9 */
+ P9DDR = (uint8_t)(0x93); /* C106; MOV:G.B #H'93, @P9DDR; P9DDR = H'93; refs P9DDR; cycles=9 */
return; /* C10B; RTS; cycles=13 */
}
void loc_C10C(void)
{
- P9DR &= ~BIT(7); /* C10C; BCLR.B #7, @P9DR; clear bit 7 of P9DR; cycles=9 */
- P9DR |= BIT(1); /* C110; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=9 */
- P9DR |= BIT(1); /* C114; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=9 */
- P9DR |= BIT(1); /* C118; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=9 */
- P9DR &= ~BIT(1); /* C11C; BCLR.B #1, @P9DR; clear bit 1 of P9DR; cycles=9 */
+ P9DR &= ~BIT(7); /* C10C; BCLR.B #7, @P9DR; clear bit 7 of P9DR; refs P9DR; cycles=9 */
+ P9DR |= BIT(1); /* C110; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
+ P9DR |= BIT(1); /* C114; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
+ P9DR |= BIT(1); /* C118; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
+ P9DR &= ~BIT(1); /* C11C; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=9 */
return; /* C120; RTS; cycles=12 */
}
void loc_C121(void)
{
- P9DR |= BIT(7); /* C121; BSET.B #7, @P9DR; set bit 7 of P9DR; cycles=8 */
- P9DR |= BIT(1); /* C125; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=8 */
- P9DR |= BIT(1); /* C129; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=8 */
- P9DR |= BIT(1); /* C12D; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=8 */
- P9DR &= ~BIT(7); /* C131; BCLR.B #7, @P9DR; clear bit 7 of P9DR; cycles=8 */
- P9DR |= BIT(1); /* C135; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=8 */
- P9DR |= BIT(1); /* C139; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=8 */
- P9DR &= ~BIT(1); /* C13D; BCLR.B #1, @P9DR; clear bit 1 of P9DR; cycles=8 */
+ P9DR |= BIT(7); /* C121; BSET.B #7, @P9DR; set bit 7 of P9DR; refs P9DR; cycles=8 */
+ P9DR |= BIT(1); /* C125; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=8 */
+ P9DR |= BIT(1); /* C129; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=8 */
+ P9DR |= BIT(1); /* C12D; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=8 */
+ P9DR &= ~BIT(7); /* C131; BCLR.B #7, @P9DR; clear bit 7 of P9DR; refs P9DR; cycles=8 */
+ P9DR |= BIT(1); /* C135; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=8 */
+ P9DR |= BIT(1); /* C139; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=8 */
+ P9DR &= ~BIT(1); /* C13D; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=8 */
return; /* C141; RTS; cycles=13 */
}
void loc_C142(void)
{
- P9DR &= ~BIT(7); /* C142; BCLR.B #7, @P9DR; clear bit 7 of P9DR; cycles=9 */
- P9DR |= BIT(1); /* C146; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=9 */
- P9DR |= BIT(1); /* C14A; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=9 */
- P9DR |= BIT(1); /* C14E; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=9 */
- P9DR |= BIT(7); /* C152; BSET.B #7, @P9DR; set bit 7 of P9DR; cycles=9 */
- P9DR |= BIT(1); /* C156; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=9 */
- P9DR |= BIT(1); /* C15A; BSET.B #1, @P9DR; set bit 1 of P9DR; cycles=9 */
- P9DR &= ~BIT(1); /* C15E; BCLR.B #1, @P9DR; clear bit 1 of P9DR; cycles=9 */
+ P9DR &= ~BIT(7); /* C142; BCLR.B #7, @P9DR; clear bit 7 of P9DR; refs P9DR; cycles=9 */
+ P9DR |= BIT(1); /* C146; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
+ P9DR |= BIT(1); /* C14A; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
+ P9DR |= BIT(1); /* C14E; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
+ P9DR |= BIT(7); /* C152; BSET.B #7, @P9DR; set bit 7 of P9DR; refs P9DR; cycles=9 */
+ P9DR |= BIT(1); /* C156; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
+ P9DR |= BIT(1); /* C15A; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
+ P9DR &= ~BIT(1); /* C15E; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=9 */
return; /* C162; RTS; cycles=12 */
}
void unreached_or_unowned_code(void)
{
loc_1865:
- set_flags_cmp8(MEM8[0xF731], 0x02); /* 1865; CMP:G.B #H'02, @H'F731; cycles=6 */
+ set_flags_cmp8(MEM8[0xF731], 0x02); /* 1865; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
if (!C && !Z) goto loc_1888; /* 186A; BHI loc_1888; cycles=3/7 nt/t */
- R4 = (uint16_t)(MEM16[0xF6AA]); /* 186C; MOV:G.W @H'F6AA, R4; cycles=7 */
- R4 -= (uint16_t)(MEM16[0xF6CA]); /* 1870; SUB.W @H'F6CA, R4; cycles=7 */
- R3 = (uint16_t)(0x00D8); /* 1874; MOV:I.W #H'00D8, R3; cycles=3 */
- set_flags_btst(MEM8[0xF791], 7); /* 1877; BTST.B #7, @H'F791; cycles=6 */
+ R4 = (uint16_t)(MEM16[0xF6AA]); /* 186C; MOV:G.W @H'F6AA, R4; refs ram_F6AA; cycles=7 */
+ R4 -= (uint16_t)(MEM16[0xF6CA]); /* 1870; SUB.W @H'F6CA, R4; refs ram_F6CA; cycles=7 */
+ R3 = (uint16_t)(0x00D8); /* 1874; MOV:I.W #H'00D8, R3; dataflow R3=0x00D8; cycles=3 */
+ set_flags_btst(MEM8[0xF791], 7); /* 1877; BTST.B #7, @H'F791; refs ram_F791; cycles=6 */
if (Z) goto loc_1885; /* 187B; BEQ loc_1885; cycles=3/8 nt/t */
- set_flags_btst(MEM8[0xF404], 1); /* 187D; BTST.B #1, @H'F404; cycles=6 */
+ set_flags_btst(MEM8[0xF404], 1); /* 187D; BTST.B #1, @H'F404; refs mem_F404; cycles=6 */
if (Z) goto loc_1885; /* 1881; BEQ loc_1885; cycles=3/8 nt/t */
R3 |= BIT(14); /* 1883; BSET.W #14, R3; cycles=3 */
loc_1885:
loc_19A2(); /* 1885; BSR loc_19A2; cycles=14 */
loc_1888:
- R4 = (uint16_t)(MEM16[0xF6AA]); /* 1888; MOV:G.W @H'F6AA, R4; cycles=7 */
- MEM16[0xF6CA] = (uint16_t)(R4); /* 188C; MOV:G.W R4, @H'F6CA; cycles=7 */
+ R4 = (uint16_t)(MEM16[0xF6AA]); /* 1888; MOV:G.W @H'F6AA, R4; refs ram_F6AA; cycles=7 */
+ MEM16[0xF6CA] = (uint16_t)(R4); /* 188C; MOV:G.W R4, @H'F6CA; refs ram_F6CA; cycles=7 */
return; /* 1890; RTS; cycles=12 */
loc_18BB:
- set_flags_cmp8(MEM8[0xF731], 0x02); /* 18BB; CMP:G.B #H'02, @H'F731; cycles=6 */
+ set_flags_cmp8(MEM8[0xF731], 0x02); /* 18BB; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
if (!C && !Z) goto loc_18DE; /* 18C0; BHI loc_18DE; cycles=3/7 nt/t */
- R4 = (uint16_t)(MEM16[0xF6A8]); /* 18C2; MOV:G.W @H'F6A8, R4; cycles=7 */
- R4 -= (uint16_t)(MEM16[0xF6C8]); /* 18C6; SUB.W @H'F6C8, R4; cycles=7 */
- R3 = (uint16_t)(0x00D9); /* 18CA; MOV:I.W #H'00D9, R3; cycles=3 */
- set_flags_btst(MEM8[0xF791], 7); /* 18CD; BTST.B #7, @H'F791; cycles=6 */
+ R4 = (uint16_t)(MEM16[0xF6A8]); /* 18C2; MOV:G.W @H'F6A8, R4; refs ram_F6A8; cycles=7 */
+ R4 -= (uint16_t)(MEM16[0xF6C8]); /* 18C6; SUB.W @H'F6C8, R4; refs ram_F6C8; cycles=7 */
+ R3 = (uint16_t)(0x00D9); /* 18CA; MOV:I.W #H'00D9, R3; dataflow R3=0x00D9; cycles=3 */
+ set_flags_btst(MEM8[0xF791], 7); /* 18CD; BTST.B #7, @H'F791; refs ram_F791; cycles=6 */
if (Z) goto loc_18DB; /* 18D1; BEQ loc_18DB; cycles=3/8 nt/t */
- set_flags_btst(MEM8[0xF404], 1); /* 18D3; BTST.B #1, @H'F404; cycles=6 */
+ set_flags_btst(MEM8[0xF404], 1); /* 18D3; BTST.B #1, @H'F404; refs mem_F404; cycles=6 */
if (Z) goto loc_18DB; /* 18D7; BEQ loc_18DB; cycles=3/8 nt/t */
R3 |= BIT(14); /* 18D9; BSET.W #14, R3; cycles=3 */
loc_18DB:
loc_19A2(); /* 18DB; BSR loc_19A2; cycles=14 */
loc_18DE:
- R4 = (uint16_t)(MEM16[0xF6A8]); /* 18DE; MOV:G.W @H'F6A8, R4; cycles=7 */
- MEM16[0xF6C8] = (uint16_t)(R4); /* 18E2; MOV:G.W R4, @H'F6C8; cycles=7 */
+ R4 = (uint16_t)(MEM16[0xF6A8]); /* 18DE; MOV:G.W @H'F6A8, R4; refs ram_F6A8; cycles=7 */
+ MEM16[0xF6C8] = (uint16_t)(R4); /* 18E2; MOV:G.W R4, @H'F6C8; refs ram_F6C8; cycles=7 */
return; /* 18E6; RTS; cycles=12 */
loc_191F:
- set_flags_cmp8(MEM8[0xF731], 0x02); /* 191F; CMP:G.B #H'02, @H'F731; cycles=6 */
+ set_flags_cmp8(MEM8[0xF731], 0x02); /* 191F; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
if (!C && !Z) goto loc_1941; /* 1924; BHI loc_1941; cycles=3/7 nt/t */
- R4 = (uint16_t)(MEM16[0xF6A6]); /* 1926; MOV:G.W @H'F6A6, R4; cycles=7 */
- R4 -= (uint16_t)(MEM16[0xF6C6]); /* 192A; SUB.W @H'F6C6, R4; cycles=7 */
- R3 = (uint16_t)(0x00DA); /* 192E; MOV:I.W #H'00DA, R3; cycles=3 */
- set_flags_btst(MEM8[0xF791], 7); /* 1931; BTST.B #7, @H'F791; cycles=6 */
+ R4 = (uint16_t)(MEM16[0xF6A6]); /* 1926; MOV:G.W @H'F6A6, R4; refs ram_F6A6; cycles=7 */
+ R4 -= (uint16_t)(MEM16[0xF6C6]); /* 192A; SUB.W @H'F6C6, R4; refs ram_F6C6; cycles=7 */
+ R3 = (uint16_t)(0x00DA); /* 192E; MOV:I.W #H'00DA, R3; dataflow R3=0x00DA; cycles=3 */
+ set_flags_btst(MEM8[0xF791], 7); /* 1931; BTST.B #7, @H'F791; refs ram_F791; cycles=6 */
if (Z) goto loc_193F; /* 1935; BEQ loc_193F; cycles=3/8 nt/t */
- set_flags_btst(MEM8[0xF404], 1); /* 1937; BTST.B #1, @H'F404; cycles=6 */
+ set_flags_btst(MEM8[0xF404], 1); /* 1937; BTST.B #1, @H'F404; refs mem_F404; cycles=6 */
if (Z) goto loc_193F; /* 193B; BEQ loc_193F; cycles=3/8 nt/t */
R3 |= BIT(14); /* 193D; BSET.W #14, R3; cycles=3 */
loc_193F:
loc_19A2(); /* 193F; BSR loc_19A2; cycles=14 */
loc_1941:
- R4 = (uint16_t)(MEM16[0xF6A6]); /* 1941; MOV:G.W @H'F6A6, R4; cycles=6 */
- MEM16[0xF6C6] = (uint16_t)(R4); /* 1945; MOV:G.W R4, @H'F6C6; cycles=6 */
+ R4 = (uint16_t)(MEM16[0xF6A6]); /* 1941; MOV:G.W @H'F6A6, R4; refs ram_F6A6; cycles=6 */
+ MEM16[0xF6C6] = (uint16_t)(R4); /* 1945; MOV:G.W R4, @H'F6C6; refs ram_F6C6; cycles=6 */
return; /* 1949; RTS; cycles=13 */
loc_1A7D:
R0 |= BIT(15); /* 1A7D; BSET.W #15, R0; cycles=3 */
@@ -3359,7 +3648,7 @@ loc_2CAB:
push_registers(R0, R4, R5); /* 2CAB; STM.W {R0,R4,R5}, @-SP; cycles=15 */
loc_48FA(); /* 2CAD; BSR loc_48FA; cycles=14 */
pop_registers(R0, R4, R5); /* 2CB0; LDM.W @SP+, {R0,R4,R5}; cycles=18 */
- MEM8[0xF769] |= BIT(7); /* 2CB2; BSET.B #7, @H'F769; cycles=9 */
+ MEM8[0xF769] |= BIT(7); /* 2CB2; BSET.B #7, @H'F769; refs ram_F769; cycles=9 */
goto loc_289F; /* 2CB6; BRA loc_289F; cycles=7 */
loc_397C:
loc_3995(); /* 397C; BSR loc_3995; cycles=13 */
@@ -3369,25 +3658,25 @@ loc_397F:
return; /* 3982; RTS; cycles=12 */
loc_3983:
loc_398A(); /* 3983; BSR loc_398A; cycles=14 */
- MEM8[0xF722] = 0; /* 3985; CLR.B @H'F722; cycles=8 */
+ MEM8[0xF722] = 0; /* 3985; CLR.B @H'F722; refs ram_F722; cycles=8 */
return; /* 3989; RTS; cycles=13 */
loc_3F76:
- R0 = (uint16_t)(0x2710); /* 3F76; MOV:I.W #H'2710, R0; cycles=3 */
- R1 = (uint16_t)(0xC350); /* 3F79; MOV:I.W #H'C350, R1; cycles=3 */
+ R0 = (uint16_t)(0x2710); /* 3F76; MOV:I.W #H'2710, R0; dataflow R0=0x2710; cycles=3 */
+ R1 = (uint16_t)(0xC350); /* 3F79; MOV:I.W #H'C350, R1; dataflow R1=0xC350; cycles=3 */
loc_3F7C:
- P1DR &= ~BIT(7); /* 3F7C; BCLR.B #7, @P1DR; clear bit 7 of P1DR; cycles=9 */
+ P1DR &= ~BIT(7); /* 3F7C; BCLR.B #7, @P1DR; clear bit 7 of P1DR; refs P1DR; cycles=9 */
if (scb_f(R0)) goto loc_3F7C; /* 3F80; SCB/F R0, loc_3F7C; cycles=? */
loc_3F83:
- P1DR |= BIT(7); /* 3F83; BSET.B #7, @P1DR; set bit 7 of P1DR; cycles=8 */
+ P1DR |= BIT(7); /* 3F83; BSET.B #7, @P1DR; set bit 7 of P1DR; refs P1DR; cycles=8 */
if (scb_f(R1)) goto loc_3F83; /* 3F87; SCB/F R1, loc_3F83; cycles=? */
- R0 = 0; /* 3F8A; CLR.W R0; cycles=3 */
-loc_3F8C:
- MEM16[R0 - 0x2000] = 0; /* 3F8C; CLR.W @(-H'2000,R0); cycles=9 */
- MEM16[R0 - 0x1800] = 0; /* 3F90; CLR.W @(-H'1800,R0); cycles=9 */
- MEM16[R0 - 0x0980] = 0; /* 3F94; CLR.W @(-H'0980,R0); cycles=9 */
- R0 += (uint16_t)(2); /* 3F98; ADD:Q.W #2, R0; cycles=4 */
- set_flags_cmp16(R0, 0x0800); /* 3F9A; CMP:I #H'0800, R0; cycles=3 */
- if (!Z) goto loc_3F8C; /* 3F9D; BNE loc_3F8C; cycles=3/8 nt/t */
+ R0 = 0; /* 3F8A; CLR.W R0; dataflow R0=0x0000; cycles=3 */
+ do {
+ MEM16[R0 - 0x2000] = 0; /* 3F8C; CLR.W @(-H'2000,R0); cycles=9 */
+ MEM16[R0 - 0x1800] = 0; /* 3F90; CLR.W @(-H'1800,R0); cycles=9 */
+ MEM16[R0 - 0x0980] = 0; /* 3F94; CLR.W @(-H'0980,R0); cycles=9 */
+ R0 += (uint16_t)(2); /* 3F98; ADD:Q.W #2, R0; cycles=4 */
+ set_flags_cmp16(R0, 0x0800); /* 3F9A; CMP:I #H'0800, R0; cycles=3 */
+ } while (!Z); /* 3F9D; BNE loc_3F8C; cycles=3/8 nt/t */
loc_430C(); /* 3F9F; BSR loc_430C; cycles=14 */
loc_4324(); /* 3FA2; BSR loc_4324; cycles=13 */
loc_4096(); /* 3FA5; BSR loc_4096; cycles=14 */
@@ -3395,8 +3684,8 @@ loc_3F8C:
loc_4217(); /* 3FAB; BSR loc_4217; cycles=14 */
loc_434C(); /* 3FAE; BSR loc_434C; cycles=13 */
loc_3FB1:
- WDT_TCSR_R = (uint16_t)(0x5A00); /* 3FB1; MOV:G.W #H'5A00, @WDT_TCSR_R; WDT_TCSR_R = H'5A00 (OVF=0 WT/IT=0 TME=0 CKS2=0 CKS1=0 CKS0=0; TCNT password H'5A, counter write H'00); cycles=9 */
- MEM8[0xF794] = 0; /* 3FB7; CLR.B @H'F794; cycles=8 */
+ WDT_TCSR_R = (uint16_t)(0x5A00); /* 3FB1; MOV:G.W #H'5A00, @WDT_TCSR_R; WDT_TCSR_R = H'5A00 (OVF=0 WT/IT=0 TME=0 CKS2=0 CKS1=0 CKS0=0; TCNT password H'5A, counter write H'00); refs WDT_TCSR_R; cycles=9 */
+ MEM8[0xF794] = 0; /* 3FB7; CLR.B @H'F794; refs ram_F794; cycles=8 */
loc_3FD3(); /* 3FBB; BSR loc_3FD3; cycles=14 */
loc_BBAB(); /* 3FBD; BSR loc_BBAB; cycles=14 */
loc_3FEF(); /* 3FC0; BSR loc_3FEF; cycles=13 */
@@ -3407,14 +3696,14 @@ loc_3FB1:
loc_15E0(); /* 3FCE; BSR loc_15E0; cycles=13 */
goto loc_3FB1; /* 3FD1; BRA loc_3FB1; cycles=8 */
loc_4059:
- R2 = (uint8_t)(MEM8[0xF9B0]); /* 4059; MOV:G.B @H'F9B0, R2; cycles=6 */
+ R2 = (uint8_t)(MEM8[0xF9B0]); /* 4059; MOV:G.B @H'F9B0, R2; refs ram_F9B0; cycles=6 */
R2 = zero_extend8(R2); /* 405D; EXTU.B R2; cycles=3 */
- set_flags_cmp8(R2, MEM8[0xF9B5]); /* 405F; CMP:G.B @H'F9B5, R2; cycles=6 */
- if (!Z) goto loc_4074; /* 4063; BNE loc_4074; cycles=3/8 nt/t */
- R2 <<= 1; /* 4065; SHLL.B R2; cycles=2 */
- MEM16[R2 - 0x0790] = (uint16_t)(0x00); /* 4067; MOV:G.W #H'00, @(-H'0790,R2); cycles=11 */
- MEM8[0xF9B0] += (uint8_t)(1); /* 406C; ADD:Q.B #1, @H'F9B0; cycles=9 */
- MEM8[0xF9B0] &= ~BIT(7); /* 4070; BCLR.B #7, @H'F9B0; cycles=9 */
-loc_4074:
+ set_flags_cmp8(R2, MEM8[0xF9B5]); /* 405F; CMP:G.B @H'F9B5, R2; refs ram_F9B5; cycles=6 */
+ if (Z) { /* 4063; BNE loc_4074; cycles=3/8 nt/t */
+ R2 <<= 1; /* 4065; SHLL.B R2; cycles=2 */
+ MEM16[R2 - 0x0790] = (uint16_t)(0x00); /* 4067; MOV:G.W #H'00, @(-H'0790,R2); cycles=11 */
+ MEM8[0xF9B0] += (uint8_t)(1); /* 406C; ADD:Q.B #1, @H'F9B0; refs ram_F9B0; cycles=9 */
+ MEM8[0xF9B0] &= ~BIT(7); /* 4070; BCLR.B #7, @H'F9B0; refs ram_F9B0; cycles=9 */
+ }
return; /* 4074; RTS; cycles=12 */
}
diff --git a/h8536/cli.py b/h8536/cli.py
index a524ec6..0d1de56 100644
--- a/h8536/cli.py
+++ b/h8536/cli.py
@@ -6,12 +6,15 @@ from pathlib import Path
from .analysis import build_call_graph, collect_labels, linear_sweep, trace
from .cycles import annotate_cycles
from .data_analysis import analyze_unreached_data
+from .dataflow import analyze_dataflow
from .decoder import H8536Decoder
from .formatting import parse_int
+from .indirect import analyze_indirect_flow
from .peripheral_access import analyze_peripheral_access
from .render import format_callgraph_dot, format_listing, write_json
from .rom import Rom
from .sci import analyze_sci
+from .symbols import discover_symbols
from .timing import summarize_timing
from .vectors import read_dtc_vectors_max, read_dtc_vectors_min, read_vectors_max, read_vectors_min
@@ -72,9 +75,12 @@ def main() -> int:
annotate_cycles(instructions, args.mode)
data_candidates = analyze_unreached_data(rom, instructions, args.start, end)
call_graph = build_call_graph(instructions, vectors, labels)
+ dataflow = analyze_dataflow(instructions, labels, call_graph)
+ symbols = discover_symbols(instructions, data_candidates=data_candidates)
timing_summary = summarize_timing(instructions, labels, call_graph) if args.timing else None
sci_analysis = analyze_sci(instructions, clock_hz=args.clock_hz)
peripheral_access = analyze_peripheral_access(instructions)
+ indirect_flow = analyze_indirect_flow(rom, instructions, labels)
args.out.parent.mkdir(parents=True, exist_ok=True)
args.out.write_text(
@@ -92,6 +98,9 @@ def main() -> int:
show_cycles=args.cycles,
sci_analysis=sci_analysis,
peripheral_access=peripheral_access,
+ indirect_flow=indirect_flow,
+ dataflow=dataflow,
+ symbols=symbols,
),
encoding="utf-8",
)
@@ -108,6 +117,9 @@ def main() -> int:
timing_summary=timing_summary,
sci_analysis=sci_analysis,
peripheral_access=peripheral_access,
+ indirect_flow=indirect_flow,
+ dataflow=dataflow,
+ symbols=symbols,
)
if args.callgraph_dot:
args.callgraph_dot.parent.mkdir(parents=True, exist_ok=True)
diff --git a/h8536/dataflow.py b/h8536/dataflow.py
new file mode 100644
index 0000000..76d0ad6
--- /dev/null
+++ b/h8536/dataflow.py
@@ -0,0 +1,637 @@
+from __future__ import annotations
+
+import re
+from collections.abc import Iterable, Mapping
+from dataclasses import dataclass
+
+from .formatting import parse_int
+from .model import Instruction
+
+
+REGISTER_NAMES = tuple(f"R{idx}" for idx in range(8))
+CONTROL_REGISTER_NAMES = ("CCR", "BR", "EP", "DP", "TP", "SR")
+
+
+@dataclass(frozen=True)
+class TrackedValue:
+ value: int | None = None
+ width: int | None = None
+ source: str = ""
+ reason: str = ""
+
+ @property
+ def known(self) -> bool:
+ return self.value is not None and self.width is not None
+
+
+State = dict[str, dict[str, TrackedValue]]
+
+
+def analyze_dataflow(
+ instructions: Mapping[int, Instruction],
+ labels: Mapping[int, str] | None = None,
+ functions: object | None = None,
+) -> dict[str, object]:
+ """Track simple register values through conservative linear basic blocks.
+
+ The pass intentionally avoids merging states at branch targets. Each basic
+ block starts with unknown register state, then instructions are interpreted
+ linearly until a branch, jump, return, label, function entry, or address gap.
+ """
+
+ ordered = sorted(instructions)
+ block_starts = _find_block_starts(instructions, labels, functions)
+ instruction_records: dict[int, dict[str, object]] = {}
+ blocks: list[dict[str, object]] = []
+
+ state: State | None = None
+ current_block: dict[str, object] | None = None
+
+ for index, address in enumerate(ordered):
+ ins = instructions[address]
+ next_address = ordered[index + 1] if index + 1 < len(ordered) else None
+ starts_new_block = state is None or current_block is None or address in block_starts
+ if index > 0:
+ previous = instructions[ordered[index - 1]]
+ starts_new_block = starts_new_block or not _is_contiguous(previous, address)
+
+ if starts_new_block:
+ if current_block is not None:
+ blocks.append(current_block)
+ state = _initial_state()
+ current_block = {"start": address, "instructions": []}
+
+ assert state is not None
+ assert current_block is not None
+
+ before = _copy_state(state)
+ after, notes = _transfer(ins, before)
+ changes = _state_changes(before, after)
+ block_start = int(current_block["start"])
+ record = {
+ "address": address,
+ "text": ins.text,
+ "mnemonic": ins.mnemonic,
+ "operands": ins.operands,
+ "kind": ins.kind,
+ "block": block_start,
+ "before": _public_state(before),
+ "after": _public_state(after),
+ "changes": changes,
+ "notes": notes,
+ }
+ instruction_records[address] = record
+ cast_instructions = current_block["instructions"]
+ assert isinstance(cast_instructions, list)
+ cast_instructions.append(address)
+ current_block["end"] = address
+ current_block["end_exclusive"] = address + max(ins.size, 1)
+
+ state = after
+ if _ends_basic_block(ins, next_address):
+ blocks.append(current_block)
+ current_block = None
+ state = None
+
+ if current_block is not None:
+ blocks.append(current_block)
+
+ return {
+ "instructions": instruction_records,
+ "blocks": blocks,
+ "registers": REGISTER_NAMES,
+ "control_registers": CONTROL_REGISTER_NAMES,
+ }
+
+
+track_registers = analyze_dataflow
+
+
+def state_for_instruction(analysis: Mapping[str, object] | None, address: int) -> dict[str, object]:
+ if not analysis:
+ return {}
+ instructions = analysis.get("instructions")
+ if not isinstance(instructions, Mapping):
+ return {}
+ record = instructions.get(address)
+ return record if isinstance(record, dict) else {}
+
+
+def _find_block_starts(
+ instructions: Mapping[int, Instruction],
+ labels: Mapping[int, str] | None,
+ functions: object | None,
+) -> set[int]:
+ addresses = set(instructions)
+ starts: set[int] = set()
+ if addresses:
+ starts.add(min(addresses))
+
+ if labels:
+ starts.update(address for address in labels if address in addresses)
+
+ starts.update(address for address in _function_entries(functions) if address in addresses)
+
+ for address, ins in instructions.items():
+ starts.update(target for target in ins.targets if target in addresses)
+ if ins.kind == "branch" and ins.fallthrough:
+ fallthrough = address + max(ins.size, 1)
+ if fallthrough in addresses:
+ starts.add(fallthrough)
+ return starts
+
+
+def _function_entries(functions: object | None) -> set[int]:
+ if functions is None:
+ return set()
+ if isinstance(functions, Mapping):
+ if "nodes" in functions:
+ return _function_entries(functions.get("nodes"))
+ if "start" in functions:
+ value = functions.get("start")
+ return {int(value)} if value is not None else set()
+ entries: set[int] = set()
+ for key, value in functions.items():
+ if isinstance(key, int):
+ entries.add(key)
+ if isinstance(value, Mapping) and "start" in value:
+ entries.add(int(value["start"]))
+ return entries
+ if isinstance(functions, Iterable) and not isinstance(functions, (str, bytes)):
+ entries = set()
+ for item in functions:
+ if isinstance(item, int):
+ entries.add(item)
+ elif isinstance(item, Mapping) and "start" in item:
+ entries.add(int(item["start"]))
+ return entries
+ return set()
+
+
+def _initial_state(reason: str = "block_entry") -> State:
+ return {
+ "registers": {name: _unknown(reason) for name in REGISTER_NAMES},
+ "control": {name: _unknown(reason) for name in CONTROL_REGISTER_NAMES},
+ }
+
+
+def _copy_state(state: State) -> State:
+ return {
+ "registers": dict(state["registers"]),
+ "control": dict(state["control"]),
+ }
+
+
+def _public_state(state: State) -> dict[str, dict[str, dict[str, object]]]:
+ return {
+ "registers": {name: _public_value(value) for name, value in state["registers"].items()},
+ "control": {name: _public_value(value) for name, value in state["control"].items()},
+ }
+
+
+def _public_value(value: TrackedValue) -> dict[str, object]:
+ if not value.known:
+ result: dict[str, object] = {"known": False}
+ if value.reason:
+ result["reason"] = value.reason
+ return result
+ assert value.value is not None
+ assert value.width is not None
+ digits = 2 if value.width <= 8 else 4
+ result = {
+ "known": True,
+ "value": value.value,
+ "hex": f"0x{value.value:0{digits}X}",
+ "width": value.width,
+ }
+ if value.source:
+ result["source"] = value.source
+ return result
+
+
+def _unknown(reason: str = "") -> TrackedValue:
+ return TrackedValue(reason=reason)
+
+
+def _known(value: int, width: int, source: str) -> TrackedValue:
+ return TrackedValue(value=value & _mask(width), width=width, source=source)
+
+
+def _transfer(ins: Instruction, state: State) -> tuple[State, list[str]]:
+ after = _copy_state(state)
+ notes: list[str] = []
+ mnemonic = ins.mnemonic
+ base = _mnemonic_base(mnemonic)
+ width = _mnemonic_width(mnemonic)
+ ops = split_operands(ins.operands)
+
+ if ins.kind == "call":
+ _unknown_all(after, "call")
+ notes.append("call clobbers tracked register state")
+ return after, notes
+
+ if ins.kind == "jump" and not ins.targets:
+ _unknown_all(after, "indirect_jump")
+ notes.append("indirect jump ends known register state")
+ return after, notes
+
+ if ins.writes_br:
+ if ins.br_value is None:
+ _set_control_unknown(after, "BR", "control_load")
+ else:
+ _set_control_known(after, "BR", ins.br_value, 8, ins.text)
+ notes.append("tracked BR write")
+
+ if base == "NOP":
+ return after, notes
+
+ if base in {"CMP:E", "CMP:I", "CMP:G", "TST", "BTST"}:
+ _unknown_ccr(after, "flags")
+ return after, notes
+
+ if base in {"MOV:I", "MOV:E", "MOV:G"} and len(ops) == 2:
+ _apply_mov(after, ops[0], ops[1], width, ins, notes)
+ _unknown_ccr(after, "flags")
+ return after, notes
+
+ if base in {"MOV:L", "MOV:F", "MOVFPE"} and len(ops) == 2:
+ if _is_register(ops[1]):
+ _set_register_unknown(after, ops[1], "memory_load")
+ notes.append(f"{ops[1]} unknown after memory load")
+ _apply_addressing_side_effects(after, ops, width)
+ _unknown_ccr(after, "flags")
+ return after, notes
+
+ if base in {"MOV:S", "MOVTPE"}:
+ _apply_addressing_side_effects(after, ops, width)
+ _unknown_ccr(after, "flags")
+ return after, notes
+
+ if base == "CLR" and len(ops) == 1:
+ if _is_register(ops[0]):
+ _set_register_known(after, ops[0], 0, width or 16, ins.text)
+ notes.append(f"{ops[0]} cleared")
+ else:
+ _apply_addressing_side_effects(after, ops, width)
+ _unknown_ccr(after, "flags")
+ return after, notes
+
+ if base in {"ADD", "ADD:G", "ADD:Q", "ADDS", "SUB", "SUBS"} and len(ops) == 2:
+ _apply_add_sub(after, base, ops[0], ops[1], width, ins, notes)
+ _unknown_ccr(after, "flags")
+ return after, notes
+
+ if base == "LDC" and len(ops) == 2:
+ _apply_ldc(after, ops[0], ops[1], width, ins, notes)
+ return after, notes
+
+ if base == "STC" and len(ops) == 2:
+ _apply_stc(after, ops[0], ops[1], width, ins, notes)
+ return after, notes
+
+ if base in {"ORC", "ANDC", "XORC"} and len(ops) == 2:
+ _apply_control_binary(after, base, ops[0], ops[1], width, ins, notes)
+ return after, notes
+
+ _apply_unsupported(after, base, ops, width, ins, notes)
+ return after, notes
+
+
+def split_operands(operands: str) -> list[str]:
+ if not operands:
+ return []
+ parts: list[str] = []
+ start = 0
+ depth = 0
+ for idx, char in enumerate(operands):
+ if char in "({":
+ depth += 1
+ elif char in ")}" and depth:
+ depth -= 1
+ elif char == "," and depth == 0:
+ parts.append(operands[start:idx].strip())
+ start = idx + 1
+ parts.append(operands[start:].strip())
+ return [part for part in parts if part]
+
+
+def _apply_mov(
+ state: State,
+ source: str,
+ dest: str,
+ width: int | None,
+ ins: Instruction,
+ notes: list[str],
+) -> None:
+ effective_width = width or 16
+ _apply_addressing_side_effects(state, (source, dest), effective_width)
+
+ if not _is_register(dest):
+ return
+
+ if source.startswith("@"):
+ _set_register_unknown(state, dest, "memory_load")
+ notes.append(f"{dest} unknown after memory load")
+ return
+
+ operand = _operand_value(state, source, effective_width)
+ if operand is None:
+ _set_register_unknown(state, dest, "unknown_operand")
+ notes.append(f"{dest} unknown after MOV source")
+ return
+ _set_register_known(state, dest, operand, effective_width, ins.text)
+ notes.append(f"{dest} = {_format_known(operand, effective_width)}")
+
+
+def _apply_add_sub(
+ state: State,
+ base: str,
+ source: str,
+ dest: str,
+ width: int | None,
+ ins: Instruction,
+ notes: list[str],
+) -> None:
+ effective_width = width or 16
+ _apply_addressing_side_effects(state, (source, dest), effective_width)
+ if not _is_register(dest):
+ return
+ if source.startswith("@"):
+ _set_register_unknown(state, dest, "memory_load")
+ notes.append(f"{dest} unknown after arithmetic memory source")
+ return
+
+ left = _operand_value(state, dest, effective_width)
+ right = _operand_value(state, source, effective_width)
+ if left is None or right is None:
+ _set_register_unknown(state, dest, "unknown_operand")
+ notes.append(f"{dest} unknown after arithmetic")
+ return
+
+ if base.startswith("SUB"):
+ result = left - right
+ else:
+ result = left + right
+ _set_register_known(state, dest, result, effective_width, ins.text)
+ notes.append(f"{dest} = {_format_known(result, effective_width)}")
+
+
+def _apply_ldc(
+ state: State,
+ source: str,
+ dest: str,
+ width: int | None,
+ ins: Instruction,
+ notes: list[str],
+) -> None:
+ control = _control_name(dest)
+ if control is None:
+ return
+ effective_width = _control_width(control, width)
+ if source.startswith("@"):
+ _set_control_unknown(state, control, "memory_load")
+ notes.append(f"{control} unknown after memory load")
+ return
+ value = _operand_value(state, source, effective_width)
+ if value is None:
+ _set_control_unknown(state, control, "unknown_operand")
+ notes.append(f"{control} unknown after LDC source")
+ return
+ _set_control_known(state, control, value, effective_width, ins.text)
+ notes.append(f"{control} = {_format_known(value, effective_width)}")
+
+
+def _apply_stc(
+ state: State,
+ source: str,
+ dest: str,
+ width: int | None,
+ ins: Instruction,
+ notes: list[str],
+) -> None:
+ control = _control_name(source)
+ if control is None:
+ return
+ effective_width = _control_width(control, width)
+ value = _control_value(state, control, effective_width)
+ if _is_register(dest):
+ if value is None:
+ _set_register_unknown(state, dest, "unknown_operand")
+ notes.append(f"{dest} unknown after STC source")
+ else:
+ _set_register_known(state, dest, value, effective_width, ins.text)
+ notes.append(f"{dest} = {_format_known(value, effective_width)}")
+ else:
+ _apply_addressing_side_effects(state, (dest,), effective_width)
+
+
+def _apply_control_binary(
+ state: State,
+ base: str,
+ source: str,
+ dest: str,
+ width: int | None,
+ ins: Instruction,
+ notes: list[str],
+) -> None:
+ control = _control_name(dest)
+ if control is None:
+ return
+ effective_width = _control_width(control, width)
+ left = _control_value(state, control, effective_width)
+ right = _operand_value(state, source, effective_width)
+ if left is None or right is None:
+ _set_control_unknown(state, control, "unknown_operand")
+ notes.append(f"{control} unknown after {base}")
+ return
+ if base == "ORC":
+ result = left | right
+ elif base == "ANDC":
+ result = left & right
+ else:
+ result = left ^ right
+ _set_control_known(state, control, result, effective_width, ins.text)
+ notes.append(f"{control} = {_format_known(result, effective_width)}")
+
+
+def _apply_unsupported(
+ state: State,
+ base: str,
+ ops: list[str],
+ width: int | None,
+ ins: Instruction,
+ notes: list[str],
+) -> None:
+ if base in {"RTE", "RTS", "RTD", "PRTS", "PRTD", "SLEEP", "BRA", "BHI", "BLS", "BCC", "BCS", "BNE", "BEQ", "BVC", "BVS", "BPL", "BMI", "BGE", "BLT", "BGT", "BLE", "BRN", "SCB/F", "SCB/NE", "SCB/EQ", "JMP", "PJMP", "BSR", "JSR", "PJSR"}:
+ return
+
+ affected = _written_registers(base, ops)
+ for register in affected:
+ _set_register_unknown(state, register, f"unsupported:{ins.mnemonic}")
+ _apply_addressing_side_effects(state, ops, width)
+ if affected:
+ notes.append(f"unsupported operation invalidated {', '.join(affected)}")
+ if _may_update_ccr(base):
+ _unknown_ccr(state, "flags")
+
+
+def _operand_value(state: State, operand: str, width: int) -> int | None:
+ operand = operand.strip()
+ immediate = _parse_immediate(operand)
+ if immediate is not None:
+ return immediate & _mask(width)
+ if _is_register(operand):
+ value = state["registers"][operand]
+ return _narrow(value, width)
+ control = _control_name(operand)
+ if control is not None:
+ return _control_value(state, control, width)
+ return None
+
+
+def _control_value(state: State, control: str, width: int) -> int | None:
+ return _narrow(state["control"][control], width)
+
+
+def _narrow(value: TrackedValue, width: int) -> int | None:
+ if not value.known or value.value is None or value.width is None:
+ return None
+ if width <= value.width:
+ return value.value & _mask(width)
+ return None
+
+
+def _parse_immediate(operand: str) -> int | None:
+ if not operand.startswith("#"):
+ return None
+ text = operand[1:].strip()
+ if not text:
+ return None
+ if text.startswith("-"):
+ return -parse_int(text[1:])
+ try:
+ return parse_int(text)
+ except ValueError:
+ return None
+
+
+def _set_register_known(state: State, register: str, value: int, width: int, source: str) -> None:
+ state["registers"][register] = _known(value, width, source)
+
+
+def _set_register_unknown(state: State, register: str, reason: str) -> None:
+ state["registers"][register] = _unknown(reason)
+
+
+def _set_control_known(state: State, control: str, value: int, width: int, source: str) -> None:
+ state["control"][control] = _known(value, width, source)
+
+
+def _set_control_unknown(state: State, control: str, reason: str) -> None:
+ state["control"][control] = _unknown(reason)
+
+
+def _unknown_all(state: State, reason: str) -> None:
+ for register in REGISTER_NAMES:
+ _set_register_unknown(state, register, reason)
+ for control in CONTROL_REGISTER_NAMES:
+ _set_control_unknown(state, control, reason)
+
+
+def _unknown_ccr(state: State, reason: str) -> None:
+ _set_control_unknown(state, "CCR", reason)
+
+
+def _apply_addressing_side_effects(state: State, operands: Iterable[str], width: int | None) -> None:
+ _ = width
+ for operand in operands:
+ match = re.fullmatch(r"@-(R[0-7])", operand) or re.fullmatch(r"@(R[0-7])\+", operand)
+ if match:
+ _set_register_unknown(state, match.group(1), "addressing_side_effect")
+
+
+def _written_registers(base: str, ops: list[str]) -> list[str]:
+ if base == "LDM" and len(ops) == 2:
+ return [reg for reg in REGISTER_NAMES if re.search(rf"\b{reg}\b", ops[1])]
+ if base in {"SWAP", "EXTS", "EXTU", "NEG", "NOT", "SHAL", "SHAR", "SHLL", "SHLR", "ROTL", "ROTR", "ROTXL", "ROTXR", "TAS"} and ops:
+ return [ops[0]] if _is_register(ops[0]) else []
+ if len(ops) >= 2 and base not in {"CMP", "CMP:E", "CMP:I", "CMP:G", "BTST", "TST", "STM"}:
+ dest = ops[-1]
+ return [dest] if _is_register(dest) else []
+ return []
+
+
+def _may_update_ccr(base: str) -> bool:
+ return base not in {"NOP", "MOV:S", "MOVTPE", "STC", "LDC", "STM", "LDM", "LINK", "UNLK"}
+
+
+def _state_changes(before: State, after: State) -> list[dict[str, object]]:
+ changes: list[dict[str, object]] = []
+ for group_name, public_name in (("registers", "register"), ("control", "control")):
+ for name in before[group_name]:
+ if before[group_name][name] == after[group_name][name]:
+ continue
+ changes.append(
+ {
+ "kind": public_name,
+ "name": name,
+ "before": _public_value(before[group_name][name]),
+ "after": _public_value(after[group_name][name]),
+ }
+ )
+ return changes
+
+
+def _ends_basic_block(ins: Instruction, next_address: int | None) -> bool:
+ if next_address is None:
+ return True
+ if ins.kind in {"branch", "jump", "return", "rte", "sleep"}:
+ return True
+ if not ins.fallthrough:
+ return True
+ return not _is_contiguous(previous_instruction=ins, address=next_address)
+
+
+def _is_contiguous(previous_instruction: Instruction, address: int) -> bool:
+ return previous_instruction.address + max(previous_instruction.size, 1) == address
+
+
+def _mnemonic_base(mnemonic: str) -> str:
+ return mnemonic.rsplit(".", 1)[0] if "." in mnemonic else mnemonic
+
+
+def _mnemonic_width(mnemonic: str) -> int | None:
+ suffix = mnemonic.rsplit(".", 1)[-1] if "." in mnemonic else ""
+ if suffix == "B":
+ return 8
+ if suffix == "W":
+ return 16
+ if mnemonic.endswith(":I"):
+ return 16
+ if mnemonic.endswith(":E"):
+ return 8
+ return None
+
+
+def _control_width(control: str, mnemonic_width: int | None) -> int:
+ if control == "SR":
+ return 16
+ return mnemonic_width or 8
+
+
+def _mask(width: int) -> int:
+ return (1 << width) - 1
+
+
+def _format_known(value: int, width: int) -> str:
+ digits = 2 if width <= 8 else 4
+ return f"0x{value & _mask(width):0{digits}X}"
+
+
+def _is_register(operand: str) -> bool:
+ return operand in REGISTER_NAMES
+
+
+def _control_name(operand: str) -> str | None:
+ operand = operand.strip()
+ return operand if operand in CONTROL_REGISTER_NAMES else None
diff --git a/h8536/indirect.py b/h8536/indirect.py
new file mode 100644
index 0000000..1e56176
--- /dev/null
+++ b/h8536/indirect.py
@@ -0,0 +1,148 @@
+from __future__ import annotations
+
+import re
+from collections.abc import Mapping
+
+from .formatting import h16, parse_int
+from .memory import region_for
+from .model import Instruction
+from .rom import Rom
+
+
+INDEXED_WORD_LOAD_RE = re.compile(r"^@\((?P[^,]+),\s*(?PR[0-7])\),\s*(?PR[0-7])$")
+INDIRECT_FLOW_RE = re.compile(r"^@(?PR[0-7])$")
+
+
+def analyze_indirect_flow(
+ rom: Rom,
+ instructions: Mapping[int, Instruction],
+ labels: Mapping[int, str] | None = None,
+ *,
+ max_entries: int = 128,
+) -> dict[str, object]:
+ labels = labels or {}
+ ordered = [instructions[address] for address in sorted(instructions)]
+ by_address = {ins.address: ins for ins in ordered}
+ known_code = set(by_address)
+ sites: list[dict[str, object]] = []
+
+ for index, ins in enumerate(ordered):
+ if ins.kind not in {"call", "jump"} or ins.targets:
+ continue
+ target_reg = _indirect_target_register(ins.operands)
+ if target_reg is None:
+ continue
+ previous = ordered[index - 1] if index else None
+ table = _table_from_previous_load(rom, previous, target_reg, known_code, labels, max_entries)
+ site: dict[str, object] = {
+ "address": ins.address,
+ "instruction": ins.text,
+ "kind": ins.kind,
+ "target_register": target_reg,
+ "confidence": "table_load" if table else "unknown",
+ }
+ if table:
+ site["table"] = table
+ site["summary"] = _site_summary(ins, target_reg, table)
+ else:
+ site["summary"] = f"{ins.text} uses {target_reg}; target not resolved"
+ sites.append(site)
+
+ return {"sites": sites}
+
+
+def indirect_comment_for_instruction(analysis: Mapping[str, object] | None, address: int) -> str:
+ if not analysis:
+ return ""
+ for site in analysis.get("sites", []):
+ if isinstance(site, Mapping) and int(site.get("address", -1)) == address:
+ return str(site.get("summary", ""))
+ return ""
+
+
+def indirect_metadata_for_instruction(
+ analysis: Mapping[str, object] | None,
+ address: int,
+) -> dict[str, object] | None:
+ if not analysis:
+ return None
+ for site in analysis.get("sites", []):
+ if isinstance(site, dict) and int(site.get("address", -1)) == address:
+ return site
+ return None
+
+
+def _indirect_target_register(operands: str) -> str | None:
+ match = INDIRECT_FLOW_RE.match(operands.strip())
+ return match.group("reg") if match else None
+
+
+def _table_from_previous_load(
+ rom: Rom,
+ previous: Instruction | None,
+ target_reg: str,
+ known_code: set[int],
+ labels: Mapping[int, str],
+ max_entries: int,
+) -> dict[str, object] | None:
+ if previous is None or not previous.mnemonic.startswith("MOV:G.W"):
+ return None
+ match = INDEXED_WORD_LOAD_RE.match(previous.operands.strip())
+ if not match or match.group("dest") != target_reg:
+ return None
+ try:
+ base = parse_int(match.group("base"))
+ except ValueError:
+ return None
+ if not rom.contains(base, 2):
+ return None
+
+ entries: list[dict[str, object]] = []
+ for entry_index in range(max_entries):
+ address = base + entry_index * 2
+ if not rom.contains(address, 2):
+ break
+ target = rom.u16(address)
+ if target in (0x0000, 0xFFFF):
+ break
+ region = region_for(target)
+ is_code = target in known_code
+ plausible = is_code or region.kind == "program"
+ if not plausible and entries:
+ break
+ entries.append(
+ {
+ "index": entry_index,
+ "entry_address": address,
+ "target": target,
+ "target_label": labels.get(target),
+ "target_region": region.name,
+ "decoded_code": is_code,
+ },
+ )
+ if not plausible:
+ break
+
+ if not entries:
+ return None
+ decoded = sum(1 for entry in entries if entry["decoded_code"])
+ return {
+ "base": base,
+ "index_register": match.group("index"),
+ "target_register": target_reg,
+ "load_address": previous.address,
+ "load_instruction": previous.text,
+ "entry_size": 2,
+ "entry_count": len(entries),
+ "decoded_target_count": decoded,
+ "entries": entries,
+ }
+
+
+def _site_summary(ins: Instruction, target_reg: str, table: Mapping[str, object]) -> str:
+ decoded = int(table["decoded_target_count"])
+ total = int(table["entry_count"])
+ return (
+ f"{ins.text} uses {target_reg} loaded from pointer table {h16(int(table['base']))} "
+ f"via {table['index_register']} ({decoded}/{total} decoded targets)"
+ )
diff --git a/h8536/pseudocode.py b/h8536/pseudocode.py
index 37b99f1..6263cbc 100644
--- a/h8536/pseudocode.py
+++ b/h8536/pseudocode.py
@@ -29,6 +29,27 @@ BRANCH_CONDITIONS = {
"BLE": "Z || (N != V)",
}
+NEGATED_BRANCH_CONDITIONS = {
+ "BRN": "1",
+ "BHI": "C || Z",
+ "BLS": "!C && !Z",
+ "BCC": "C",
+ "BCS": "!C",
+ "BNE": "Z",
+ "BEQ": "!Z",
+ "BVC": "V",
+ "BVS": "!V",
+ "BPL": "N",
+ "BMI": "!N",
+ "BGE": "N != V",
+ "BLT": "N == V",
+ "BGT": "Z || (N != V)",
+ "BLE": "!Z && (N == V)",
+}
+
+_MAX_STRUCTURED_IF_BODY = 8
+_MAX_STRUCTURED_LOOP_BODY = 24
+
@dataclass(frozen=True)
class PseudocodeOptions:
@@ -37,6 +58,22 @@ class PseudocodeOptions:
include_cycles: bool = False
emit_declarations: bool = True
max_functions: int | None = None
+ structured: bool = True
+
+
+@dataclass(frozen=True)
+class _IfCandidate:
+ target_index: int
+ target_address: int
+ condition: str
+ instruction: JsonObject
+
+
+@dataclass(frozen=True)
+class _LoopCandidate:
+ end_index: int
+ condition: str
+ instruction: JsonObject
def generate_pseudocode(
@@ -55,7 +92,7 @@ def generate_pseudocode(
lines: list[str] = []
lines.extend(_file_header(source_name, payload))
if opts.emit_declarations:
- lines.extend(_declarations(instructions, functions, label_names))
+ lines.extend(_declarations(payload, instructions, functions, label_names))
by_address = {int(ins["address"]): ins for ins in instructions}
all_addresses = sorted(by_address)
@@ -111,6 +148,7 @@ def main(argv: list[str] | None = None) -> int:
parser.add_argument("--no-addresses", action="store_true", help="omit instruction addresses from line comments")
parser.add_argument("--cycles", action="store_true", help="include cycle estimates when present in JSON")
parser.add_argument("--no-declarations", action="store_true", help="omit register/function declarations")
+ parser.add_argument("--no-structure", action="store_true", help="preserve label/goto output without if/loop structuring")
parser.add_argument("--max-functions", type=int, default=None, help="emit only the first N functions")
args = parser.parse_args(argv)
@@ -120,6 +158,7 @@ def main(argv: list[str] | None = None) -> int:
include_cycles=args.cycles,
emit_declarations=not args.no_declarations,
max_functions=args.max_functions,
+ structured=not args.no_structure,
)
write_pseudocode(args.input, args.out, options)
print(f"wrote {args.out}")
@@ -159,7 +198,12 @@ def _file_header(source_name: str, payload: JsonObject) -> list[str]:
]
-def _declarations(instructions: list[JsonObject], functions: list[JsonObject], labels: dict[int, str]) -> list[str]:
+def _declarations(
+ payload: JsonObject,
+ instructions: list[JsonObject],
+ functions: list[JsonObject],
+ labels: dict[int, str],
+) -> list[str]:
lines: list[str] = []
registers = _referenced_io_registers(instructions)
if registers:
@@ -169,6 +213,18 @@ def _declarations(instructions: list[JsonObject], functions: list[JsonObject], l
lines.append(f"extern volatile {c_type} {c_identifier(name)}; /* 0x{address:04X} */")
lines.append("")
+ memory_symbols = _referenced_memory_symbols(payload)
+ if memory_symbols:
+ lines.append("/* RAM/external symbols inferred from instruction references and data tables. */")
+ for symbol in memory_symbols:
+ c_type = "u16" if symbol.get("width") == "word" else "u8"
+ width = symbol.get("width") or "unknown"
+ lines.append(
+ f"extern volatile {c_type} {c_identifier(str(symbol['name']))}; "
+ f"/* 0x{int(symbol['address']):04X} {symbol['kind']} {width} */"
+ )
+ lines.append("")
+
if functions:
lines.append("/* Function entry points discovered from vectors and call targets. */")
for function in functions:
@@ -193,6 +249,20 @@ def _referenced_io_registers(instructions: list[JsonObject]) -> dict[str, tuple[
return registers
+def _referenced_memory_symbols(payload: JsonObject) -> list[JsonObject]:
+ symbols = payload.get("symbols", {}).get("symbols", [])
+ if not isinstance(symbols, list):
+ return []
+ memory_symbols: list[JsonObject] = []
+ for symbol in symbols:
+ if not isinstance(symbol, dict) or symbol.get("kind") == "register":
+ continue
+ if not symbol.get("name") or symbol.get("address") is None:
+ continue
+ memory_symbols.append(symbol)
+ return sorted(memory_symbols, key=lambda symbol: int(symbol["address"]))
+
+
def _collect_label_names(payload: JsonObject) -> dict[int, str]:
labels: dict[int, str] = {}
for vector in payload.get("vectors", []):
@@ -258,13 +328,7 @@ def _render_function(
if sources:
lines.append(f" /* vector sources: {', '.join(str(source) for source in sources)} */")
- for address in addresses:
- if address in local_targets and address != start:
- lines.append(f"{labels.get(address, _label_for(address))}:")
- ins = by_address[address]
- statement = _translate_instruction(ins, labels)
- comment = _line_comment(ins, opts)
- lines.append(f" {statement}{comment}")
+ lines.extend(_render_instruction_block(addresses, by_address, labels, opts, local_targets, function_entry=start))
lines.append("}")
lines.append("")
@@ -281,16 +345,271 @@ def _render_orphan_block(
local_targets = _local_target_addresses(addresses, by_address) | {
address for address in addresses if address in labels
}
- for address in addresses:
- if address in local_targets:
- lines.append(f"{labels.get(address, _label_for(address))}:")
- ins = by_address[address]
- lines.append(f" {_translate_instruction(ins, labels)}{_line_comment(ins, opts)}")
+ lines.extend(_render_instruction_block(addresses, by_address, labels, opts, local_targets, function_entry=None))
lines.append("}")
lines.append("")
return lines
+def _render_instruction_block(
+ addresses: list[int],
+ by_address: dict[int, JsonObject],
+ labels: dict[int, str],
+ opts: PseudocodeOptions,
+ local_targets: set[int],
+ *,
+ function_entry: int | None,
+) -> list[str]:
+ if not opts.structured:
+ return _render_linear_block(
+ addresses,
+ by_address,
+ labels,
+ opts,
+ local_targets,
+ function_entry=function_entry,
+ suppressed_labels=set(),
+ indent=1,
+ )
+
+ incoming = _incoming_local_targets(addresses, by_address)
+ suppressed_labels: set[int] = set()
+ return _render_structured_block(
+ addresses,
+ by_address,
+ labels,
+ opts,
+ local_targets,
+ incoming,
+ function_entry=function_entry,
+ suppressed_labels=suppressed_labels,
+ indent=1,
+ )
+
+
+def _render_structured_block(
+ addresses: list[int],
+ by_address: dict[int, JsonObject],
+ labels: dict[int, str],
+ opts: PseudocodeOptions,
+ local_targets: set[int],
+ incoming: dict[int, set[int]],
+ *,
+ function_entry: int | None,
+ suppressed_labels: set[int],
+ indent: int,
+) -> list[str]:
+ lines: list[str] = []
+ address_to_index = {address: index for index, address in enumerate(addresses)}
+ index = 0
+ while index < len(addresses):
+ loop = _loop_candidate_at(index, addresses, address_to_index, by_address, local_targets, incoming)
+ if loop:
+ start_address = addresses[index]
+ suppressed_labels.add(start_address)
+ lines.append(f"{_indent(indent)}do {{")
+ lines.extend(
+ _render_structured_block(
+ addresses[index : loop.end_index],
+ by_address,
+ labels,
+ opts,
+ local_targets,
+ incoming,
+ function_entry=function_entry,
+ suppressed_labels=suppressed_labels,
+ indent=indent + 1,
+ )
+ )
+ lines.append(f"{_indent(indent)}}} while ({loop.condition});{_line_comment(loop.instruction, opts)}")
+ index = loop.end_index + 1
+ continue
+
+ if_candidate = _if_candidate_at(index, addresses, address_to_index, by_address, local_targets, incoming)
+ if if_candidate:
+ suppressed_labels.add(if_candidate.target_address)
+ lines.append(f"{_indent(indent)}if ({if_candidate.condition}) {{{_line_comment(if_candidate.instruction, opts)}")
+ lines.extend(
+ _render_structured_block(
+ addresses[index + 1 : if_candidate.target_index],
+ by_address,
+ labels,
+ opts,
+ local_targets,
+ incoming,
+ function_entry=function_entry,
+ suppressed_labels=suppressed_labels,
+ indent=indent + 1,
+ )
+ )
+ lines.append(f"{_indent(indent)}}}")
+ index = if_candidate.target_index
+ continue
+
+ address = addresses[index]
+ lines.extend(
+ _render_linear_block(
+ [address],
+ by_address,
+ labels,
+ opts,
+ local_targets,
+ function_entry=function_entry,
+ suppressed_labels=suppressed_labels,
+ indent=indent,
+ )
+ )
+ index += 1
+ return lines
+
+
+def _render_linear_block(
+ addresses: list[int],
+ by_address: dict[int, JsonObject],
+ labels: dict[int, str],
+ opts: PseudocodeOptions,
+ local_targets: set[int],
+ *,
+ function_entry: int | None,
+ suppressed_labels: set[int],
+ indent: int,
+) -> list[str]:
+ lines: list[str] = []
+ for address in addresses:
+ if _should_emit_label(address, local_targets, function_entry, suppressed_labels):
+ lines.append(f"{_indent(max(indent - 1, 0))}{labels.get(address, _label_for(address))}:")
+ ins = by_address[address]
+ lines.append(f"{_indent(indent)}{_translate_instruction(ins, labels)}{_line_comment(ins, opts)}")
+ return lines
+
+
+def _if_candidate_at(
+ index: int,
+ addresses: list[int],
+ address_to_index: dict[int, int],
+ by_address: dict[int, JsonObject],
+ local_targets: set[int],
+ incoming: dict[int, set[int]],
+) -> _IfCandidate | None:
+ address = addresses[index]
+ ins = by_address[address]
+ base = _conditional_branch_base(ins)
+ if not base:
+ return None
+
+ target = _single_target_address(ins)
+ if target is None or target <= address or target not in address_to_index:
+ return None
+
+ target_index = address_to_index[target]
+ body_addresses = addresses[index + 1 : target_index]
+ if not body_addresses or len(body_addresses) > _MAX_STRUCTURED_IF_BODY:
+ return None
+ if not _is_straight_line_span(body_addresses, by_address):
+ return None
+ if any(body_address in local_targets for body_address in body_addresses):
+ return None
+ if any(incoming.get(body_address) for body_address in body_addresses):
+ return None
+ if incoming.get(target, set()) != {address}:
+ return None
+
+ return _IfCandidate(
+ target_index=target_index,
+ target_address=target,
+ condition=NEGATED_BRANCH_CONDITIONS[base],
+ instruction=ins,
+ )
+
+
+def _loop_candidate_at(
+ index: int,
+ addresses: list[int],
+ address_to_index: dict[int, int],
+ by_address: dict[int, JsonObject],
+ local_targets: set[int],
+ incoming: dict[int, set[int]],
+) -> _LoopCandidate | None:
+ start_address = addresses[index]
+ max_end = min(len(addresses), index + _MAX_STRUCTURED_LOOP_BODY + 1)
+ for end_index in range(index + 1, max_end):
+ branch_address = addresses[end_index]
+ branch = by_address[branch_address]
+ base = _conditional_branch_base(branch)
+ if not base:
+ continue
+
+ target = _single_target_address(branch)
+ if target != start_address or target not in address_to_index:
+ continue
+
+ body_addresses = addresses[index:end_index]
+ interior_addresses = addresses[index + 1 : end_index + 1]
+ if not body_addresses or not _is_straight_line_span(body_addresses, by_address):
+ return None
+ if any(address in local_targets for address in interior_addresses):
+ return None
+ if incoming.get(start_address, set()) != {branch_address}:
+ return None
+ if any(incoming.get(address) for address in interior_addresses):
+ return None
+
+ return _LoopCandidate(
+ end_index=end_index,
+ condition=BRANCH_CONDITIONS[base],
+ instruction=branch,
+ )
+ return None
+
+
+def _incoming_local_targets(addresses: list[int], by_address: dict[int, JsonObject]) -> dict[int, set[int]]:
+ address_set = set(addresses)
+ incoming: dict[int, set[int]] = {address: set() for address in addresses}
+ for source in addresses:
+ for target in by_address[source].get("targets", []):
+ target_address = int(target)
+ if target_address in address_set:
+ incoming[target_address].add(source)
+ return incoming
+
+
+def _conditional_branch_base(ins: JsonObject) -> str | None:
+ if str(ins.get("kind", "normal")) != "branch":
+ return None
+ base = _mnemonic_base(str(ins.get("mnemonic", "")))
+ if base == "BRN" or base not in BRANCH_CONDITIONS:
+ return None
+ return base
+
+
+def _single_target_address(ins: JsonObject) -> int | None:
+ targets = ins.get("targets", [])
+ if len(targets) != 1:
+ return None
+ return int(targets[0])
+
+
+def _is_straight_line_span(addresses: list[int], by_address: dict[int, JsonObject]) -> bool:
+ for address in addresses:
+ kind = str(by_address[address].get("kind", "normal"))
+ if kind in {"branch", "jump", "return", "rte"}:
+ return False
+ return True
+
+
+def _should_emit_label(
+ address: int,
+ local_targets: set[int],
+ function_entry: int | None,
+ suppressed_labels: set[int],
+) -> bool:
+ return address in local_targets and address != function_entry and address not in suppressed_labels
+
+
+def _indent(level: int) -> str:
+ return " " * level
+
+
def _local_target_addresses(addresses: list[int], by_address: dict[int, JsonObject]) -> set[int]:
address_set = set(addresses)
targets: set[int] = set()
@@ -433,6 +752,9 @@ def _branch_or_jump_statement(ins: JsonObject, labels: dict[int, str], ops: list
if base in {"BRA", "JMP", "PJMP"}:
if target:
return f"goto {target};"
+ table_expr = _indirect_table_call_args(ins)
+ if table_expr:
+ return f"goto_indirect_table({table_expr});"
expr = _format_operand(ops[0], "") if ops else "unknown_target"
return f"goto_indirect({expr});"
if base.startswith("SCB/"):
@@ -447,10 +769,26 @@ def _call_statement(ins: JsonObject, labels: dict[int, str], ops: list[str]) ->
target = _target_label(ins, labels)
if target:
return f"{target}();"
+ table_expr = _indirect_table_call_args(ins)
+ if table_expr:
+ return f"call_indirect_table({table_expr});"
expr = _format_operand(ops[0], "") if ops else "unknown_target"
return f"call_indirect({expr});"
+def _indirect_table_call_args(ins: JsonObject) -> str:
+ indirect = ins.get("indirect_flow")
+ if not isinstance(indirect, dict):
+ return ""
+ table = indirect.get("table")
+ if not isinstance(table, dict) or table.get("base") is None:
+ return ""
+ base = int(table["base"])
+ index_register = c_identifier(str(table.get("index_register") or "index"))
+ target_register = c_identifier(str(table.get("target_register") or indirect.get("target_register") or "target"))
+ return f"0x{base:04X}, {index_register}, {target_register}"
+
+
def _target_label(ins: JsonObject, labels: dict[int, str]) -> str:
targets = ins.get("targets", [])
if targets:
@@ -562,6 +900,30 @@ def _metadata_comments(ins: JsonObject) -> list[str]:
if isinstance(inference, dict) and inference.get("comment"):
comments.append(str(inference["comment"]))
+ indirect = ins.get("indirect_flow")
+ if isinstance(indirect, dict) and indirect.get("summary"):
+ comments.append(str(indirect["summary"]))
+
+ dataflow = ins.get("dataflow")
+ if isinstance(dataflow, dict):
+ changes = dataflow.get("changes")
+ if isinstance(changes, list):
+ known_changes = [_dataflow_change_comment(change) for change in changes if isinstance(change, dict)]
+ known_changes = [change for change in known_changes if change]
+ if known_changes:
+ suffix = " ..." if len(known_changes) > 4 else ""
+ comments.append("dataflow " + ", ".join(known_changes[:4]) + suffix)
+
+ refs = []
+ for ref in ins.get("references", []):
+ if not isinstance(ref, dict):
+ continue
+ symbol = ref.get("symbol") or ref.get("name")
+ if symbol:
+ refs.append(str(symbol))
+ if refs:
+ comments.append("refs " + ", ".join(refs))
+
for access in ins.get("peripheral_access", []):
if not isinstance(access, dict):
continue
@@ -574,6 +936,16 @@ def _metadata_comments(ins: JsonObject) -> list[str]:
return comments
+def _dataflow_change_comment(change: JsonObject) -> str:
+ after = change.get("after")
+ if not isinstance(after, dict) or not after.get("known"):
+ return ""
+ width = int(after.get("width", 16))
+ value = int(after["value"])
+ digits = 2 if width <= 8 else 4
+ return f"{change['name']}=0x{value:0{digits}X}"
+
+
def _instruction_text(ins: JsonObject) -> str:
mnemonic = str(ins.get("mnemonic", ""))
operands = str(ins.get("operands", ""))
diff --git a/h8536/render.py b/h8536/render.py
index 056ce76..c660615 100644
--- a/h8536/render.py
+++ b/h8536/render.py
@@ -4,8 +4,10 @@ import json
from pathlib import Path
from .cycles import cycle_comment
+from .dataflow import state_for_instruction
from .dtc import DtcEndpointInfo, DtcRegisterInfo
from .formatting import h16, label_for
+from .indirect import indirect_comment_for_instruction, indirect_metadata_for_instruction
from .memory import MEMORY_REGIONS, region_for
from .model import Instruction
from .peripheral_access import (
@@ -15,6 +17,7 @@ from .peripheral_access import (
)
from .rom import Rom
from .sci import sci_comment_for_instruction, sci_json_payload, sci_metadata_for_instruction
+from .symbols import symbol_for_address
from .tables import IO_REGISTERS
from .timing import format_timing_summary
from .vectors import DtcVectorEntry
@@ -55,15 +58,66 @@ def _dtc_register_lines(vector_addr: int, entry: DtcVectorEntry, info: DtcRegist
return lines
-def _reference_comment(ins: Instruction) -> str:
+def _reference_comment(ins: Instruction, symbols: dict[str, object] | None = None) -> str:
parts: list[str] = []
for address in ins.references:
region = region_for(address)
- name = IO_REGISTERS.get(address, h16(address))
+ name = symbol_for_address(symbols, address) or IO_REGISTERS.get(address, h16(address))
parts.append(f"{name} in {region.name}")
return "refs " + ", ".join(parts) if parts else ""
+def _symbol_lines(symbols: dict[str, object] | None) -> list[str]:
+ if not symbols:
+ return []
+ entries = symbols.get("symbols", [])
+ if not isinstance(entries, list) or not entries:
+ return []
+
+ lines = ["; Symbols"]
+ for item in entries[:80]:
+ if not isinstance(item, dict):
+ continue
+ address = int(item["address"])
+ width = item.get("width") or "unknown"
+ line = (
+ f"; {item['name']:<16} {h16(address)} {item['region']:<18} {item['kind']:<8} "
+ f"r={item['read_count']} w={item['write_count']} width={width}"
+ )
+ if item.get("xref_count"):
+ line += f" xrefs={item['xref_count']}"
+ lines.append(line)
+ if len(entries) > 80:
+ lines.append(f"; ... {len(entries) - 80} more symbols omitted from listing header")
+ lines.append("")
+ return lines
+
+
+def _known_change_text(change: dict[str, object]) -> str:
+ after = change.get("after")
+ if not isinstance(after, dict) or not after.get("known"):
+ return ""
+ value = int(after["value"])
+ width = int(after.get("width", 16))
+ digits = 2 if width <= 8 else 4
+ return f"{change['name']}=H'{value:0{digits}X}"
+
+
+def _dataflow_comment(analysis: dict[str, object] | None, address: int) -> str:
+ record = state_for_instruction(analysis, address)
+ if not record:
+ return ""
+ changes = record.get("changes")
+ if not isinstance(changes, list):
+ return ""
+ parts = [_known_change_text(change) for change in changes if isinstance(change, dict)]
+ parts = [part for part in parts if part]
+ if not parts:
+ return ""
+ suffix = " ..." if len(parts) > 4 else ""
+ return "dataflow " + ", ".join(parts[:4]) + suffix
+
+
def format_listing(
rom_path: Path,
rom: Rom,
@@ -78,6 +132,9 @@ def format_listing(
show_cycles: bool = False,
sci_analysis: dict[str, object] | None = None,
peripheral_access: dict[str, object] | None = None,
+ indirect_flow: dict[str, object] | None = None,
+ dataflow: dict[str, object] | None = None,
+ symbols: dict[str, object] | None = None,
) -> str:
lines: list[str] = []
lines.append("; H8/536 ROM disassembly")
@@ -134,6 +191,8 @@ def format_listing(
)
lines.append("")
+ lines.extend(_symbol_lines(symbols))
+
if timing_summary:
lines.extend(format_timing_summary(timing_summary))
@@ -150,7 +209,9 @@ def format_listing(
ins.comment,
sci_comment_for_instruction(sci_analysis, address),
peripheral_comment_for_instruction(peripheral_access, address),
- _reference_comment(ins) if not ins.comment else "",
+ indirect_comment_for_instruction(indirect_flow, address),
+ _dataflow_comment(dataflow, address),
+ _reference_comment(ins, symbols) if not ins.comment else "",
cycle_comment(ins.cycles) if show_cycles else "",
)
if part
@@ -172,6 +233,9 @@ def write_json(
timing_summary: dict[str, list[dict[str, object]]] | None = None,
sci_analysis: dict[str, object] | None = None,
peripheral_access: dict[str, object] | None = None,
+ indirect_flow: dict[str, object] | None = None,
+ dataflow: dict[str, object] | None = None,
+ symbols: dict[str, object] | None = None,
) -> None:
payload = {
"vectors": [
@@ -194,18 +258,67 @@ def write_json(
"timing_summary": timing_summary or {"blocks": [], "loops": []},
"sci": sci_json_payload(sci_analysis),
"peripheral_access": peripheral_json_payload(peripheral_access),
+ "indirect_flow": indirect_flow or {"sites": []},
+ "dataflow": _dataflow_json_payload(dataflow),
+ "symbols": symbols or {"symbols": [], "by_address": {}},
"instructions": [
- _instruction_payload(ins, sci_analysis, peripheral_access)
+ _instruction_payload(ins, sci_analysis, peripheral_access, indirect_flow, dataflow, symbols)
for ins in (instructions[addr] for addr in sorted(instructions))
],
}
path.write_text(json.dumps(payload, indent=2), encoding="utf-8")
+def _dataflow_json_payload(dataflow: dict[str, object] | None) -> dict[str, object]:
+ if not dataflow:
+ return {"blocks": [], "registers": [], "control_registers": []}
+ return {
+ "blocks": dataflow.get("blocks", []),
+ "registers": dataflow.get("registers", []),
+ "control_registers": dataflow.get("control_registers", []),
+ }
+
+
+def _compact_known_values(state: object) -> dict[str, dict[str, object]]:
+ if not isinstance(state, dict):
+ return {}
+ compact: dict[str, dict[str, object]] = {}
+ for group_name in ("registers", "control"):
+ group = state.get(group_name)
+ if not isinstance(group, dict):
+ continue
+ values = {
+ name: value
+ for name, value in group.items()
+ if isinstance(value, dict) and value.get("known")
+ }
+ if values:
+ compact[group_name] = values
+ return compact
+
+
+def _dataflow_instruction_payload(dataflow: dict[str, object] | None, address: int) -> dict[str, object]:
+ record = state_for_instruction(dataflow, address)
+ if not record:
+ return {}
+ payload: dict[str, object] = {
+ "block": record.get("block"),
+ "changes": record.get("changes", []),
+ "notes": record.get("notes", []),
+ }
+ known_after = _compact_known_values(record.get("after"))
+ if known_after:
+ payload["known_after"] = known_after
+ return payload
+
+
def _instruction_payload(
ins: Instruction,
sci_analysis: dict[str, object] | None = None,
peripheral_access: dict[str, object] | None = None,
+ indirect_flow: dict[str, object] | None = None,
+ dataflow: dict[str, object] | None = None,
+ symbols: dict[str, object] | None = None,
) -> dict[str, object]:
payload: dict[str, object] = {
"address": ins.address,
@@ -221,6 +334,7 @@ def _instruction_payload(
{
"address": address,
"name": IO_REGISTERS.get(address),
+ "symbol": symbol_for_address(symbols, address),
"region": region_for(address).name,
"kind": region_for(address).kind,
}
@@ -235,6 +349,12 @@ def _instruction_payload(
peripheral_metadata = peripheral_metadata_for_instruction(peripheral_access, ins.address)
if peripheral_metadata:
payload["peripheral_access"] = peripheral_metadata
+ indirect_metadata = indirect_metadata_for_instruction(indirect_flow, ins.address)
+ if indirect_metadata:
+ payload["indirect_flow"] = indirect_metadata
+ dataflow_metadata = _dataflow_instruction_payload(dataflow, ins.address)
+ if dataflow_metadata:
+ payload["dataflow"] = dataflow_metadata
return payload
diff --git a/h8536/symbols.py b/h8536/symbols.py
new file mode 100644
index 0000000..da61a37
--- /dev/null
+++ b/h8536/symbols.py
@@ -0,0 +1,380 @@
+from __future__ import annotations
+
+from collections.abc import Iterable, Mapping, Sequence
+from dataclasses import dataclass, field
+
+from .memory import MEMORY_REGIONS, MemoryRegion, region_for
+from .model import Instruction
+from .tables import IO_REGISTERS
+
+
+READ_ONLY_ROOTS = {"BTST", "CMP:E", "CMP:G", "CMP:I", "MOVFPE", "TST"}
+WRITE_ONLY_ROOTS = {"CLR", "MOVTPE", "STC"}
+READ_MODIFY_WRITE_ROOTS = {"ADD:Q", "BCLR", "BNOT", "BSET", "NEG", "NOT", "TAS"}
+DESTINATION_UPDATE_ROOTS = {
+ "ADD:G",
+ "ADDS",
+ "ADDX",
+ "AND",
+ "OR",
+ "ROTL",
+ "ROTR",
+ "ROTXL",
+ "ROTXR",
+ "SHAL",
+ "SHAR",
+ "SHLL",
+ "SHLR",
+ "SUB",
+ "SUBS",
+ "SUBX",
+ "XOR",
+}
+MOV_ROOTS = {"MOV:E", "MOV:F", "MOV:G", "MOV:I", "MOV:L", "MOV:S"}
+
+
+@dataclass
+class _Symbol:
+ address: int
+ name: str
+ region: str
+ kind: str
+ access_count: int = 0
+ read_count: int = 0
+ write_count: int = 0
+ unknown_count: int = 0
+ widths: set[str] = field(default_factory=set)
+ first_access: int | None = None
+ last_access: int | None = None
+ accesses: list[dict[str, object]] = field(default_factory=list)
+ xrefs: list[dict[str, object]] = field(default_factory=list)
+
+ def record_access(self, access: Mapping[str, object]) -> None:
+ instruction_address = int(access["instruction_address"])
+ direction = str(access["direction"])
+ width = access.get("width")
+
+ self.access_count += 1
+ if direction == "read":
+ self.read_count += 1
+ elif direction == "write":
+ self.write_count += 1
+ elif direction == "read_write":
+ self.read_count += 1
+ self.write_count += 1
+ else:
+ self.unknown_count += 1
+
+ if isinstance(width, str):
+ self.widths.add(width)
+ if self.first_access is None or instruction_address < self.first_access:
+ self.first_access = instruction_address
+ if self.last_access is None or instruction_address > self.last_access:
+ self.last_access = instruction_address
+ self.accesses.append(dict(access))
+
+ def record_xref(self, xref: Mapping[str, object]) -> None:
+ self.xrefs.append(dict(xref))
+
+
+def discover_symbols(
+ instructions: Mapping[int, Instruction] | Iterable[Instruction],
+ regions: Sequence[MemoryRegion | Mapping[str, object]] | None = None,
+ *,
+ include_registers: bool = False,
+ data_candidates: Mapping[str, object] | None = None,
+) -> dict[str, object]:
+ """Discover conservative memory symbols from decoded instruction references.
+
+ The analyzer is intentionally standalone: it consumes decoded instructions and
+ region metadata, then returns a JSON-friendly payload that later renderers can
+ use without changing decode semantics.
+ """
+
+ active_regions = tuple(regions or MEMORY_REGIONS)
+ symbols: dict[int, _Symbol] = {}
+
+ for ins in _instruction_sequence(instructions):
+ for access in instruction_accesses(ins):
+ address = int(access["address"])
+ region = _region_for(address, active_regions)
+ if _skip_region(region, include_registers):
+ continue
+ symbol = symbols.setdefault(address, _new_symbol(address, region))
+ symbol.record_access(access)
+
+ _record_data_candidate_xrefs(symbols, data_candidates, active_regions, include_registers)
+
+ public_symbols = [_public_symbol(symbols[address]) for address in sorted(symbols)]
+ return {
+ "symbols": public_symbols,
+ "by_address": {address: symbols[address].name for address in sorted(symbols)},
+ }
+
+
+def instruction_accesses(ins: Instruction) -> list[dict[str, object]]:
+ """Return per-reference access metadata for one instruction."""
+
+ if not ins.references:
+ return []
+
+ refs = list(ins.references)
+ operands = _split_operands(ins.operands)
+ width = _width_hint(ins.mnemonic)
+ accesses: list[dict[str, object]] = []
+
+ for address in refs:
+ operand_index = _operand_index_for_reference(address, refs, operands)
+ direction = _direction_for_reference(ins.mnemonic, operands, operand_index, len(refs))
+ access: dict[str, object] = {
+ "address": address,
+ "instruction_address": ins.address,
+ "instruction": ins.text,
+ "mnemonic": ins.mnemonic,
+ "direction": direction,
+ }
+ if width is not None:
+ access["width"] = width
+ if operand_index is not None:
+ access["operand"] = operands[operand_index]
+ access["operand_index"] = operand_index
+ accesses.append(access)
+
+ return accesses
+
+
+def symbol_for_address(analysis: Mapping[str, object] | None, address: int) -> str | None:
+ if not analysis:
+ return None
+ by_address = analysis.get("by_address")
+ if not isinstance(by_address, Mapping):
+ return None
+ symbol = by_address.get(address)
+ return str(symbol) if symbol else None
+
+
+def _instruction_sequence(
+ instructions: Mapping[int, Instruction] | Iterable[Instruction],
+) -> list[Instruction]:
+ values = instructions.values() if isinstance(instructions, Mapping) else instructions
+ return sorted(values, key=lambda item: item.address)
+
+
+def _new_symbol(address: int, region: MemoryRegion) -> _Symbol:
+ return _Symbol(
+ address=address,
+ name=_symbol_name(address, region),
+ region=region.name,
+ kind=_symbol_kind(region),
+ )
+
+
+def _public_symbol(symbol: _Symbol) -> dict[str, object]:
+ widths = sorted(symbol.widths, key=lambda item: ("byte", "word").index(item) if item in {"byte", "word"} else 99)
+ payload: dict[str, object] = {
+ "address": symbol.address,
+ "name": symbol.name,
+ "region": symbol.region,
+ "kind": symbol.kind,
+ "access_count": symbol.access_count,
+ "read_count": symbol.read_count,
+ "write_count": symbol.write_count,
+ "unknown_count": symbol.unknown_count,
+ "width_hints": widths,
+ "width": widths[0] if len(widths) == 1 else "mixed" if widths else None,
+ "first_access": symbol.first_access,
+ "last_access": symbol.last_access,
+ "accesses": sorted(symbol.accesses, key=lambda item: int(item["instruction_address"])),
+ }
+ if symbol.xrefs:
+ payload["xref_count"] = len(symbol.xrefs)
+ payload["xrefs"] = sorted(symbol.xrefs, key=lambda item: (str(item["source"]), int(item["address"])))
+ return payload
+
+
+def _symbol_name(address: int, region: MemoryRegion) -> str:
+ if region.kind == "registers":
+ return IO_REGISTERS.get(address, f"io_{_hex_address(address)}")
+ if region.kind == "ram":
+ return f"ram_{_hex_address(address)}"
+ return f"mem_{_hex_address(address)}"
+
+
+def _symbol_kind(region: MemoryRegion) -> str:
+ if region.kind == "registers":
+ return "register"
+ if region.kind == "ram":
+ return "ram"
+ return "memory"
+
+
+def _hex_address(address: int) -> str:
+ width = 4 if address <= 0xFFFF else 6
+ return f"{address:0{width}X}"
+
+
+def _skip_region(region: MemoryRegion, include_registers: bool) -> bool:
+ return region.kind == "registers" and not include_registers
+
+
+def _region_for(address: int, regions: Sequence[MemoryRegion | Mapping[str, object]]) -> MemoryRegion:
+ for item in regions:
+ region = _coerce_region(item)
+ if region.contains(address):
+ return region
+ return region_for(address)
+
+
+def _coerce_region(item: MemoryRegion | Mapping[str, object]) -> MemoryRegion:
+ if isinstance(item, MemoryRegion):
+ return item
+ return MemoryRegion(
+ str(item["name"]),
+ int(item["start"]),
+ int(item["end"]),
+ str(item["kind"]),
+ str(item.get("manual", "")),
+ )
+
+
+def _record_data_candidate_xrefs(
+ symbols: dict[int, _Symbol],
+ data_candidates: Mapping[str, object] | None,
+ regions: Sequence[MemoryRegion | Mapping[str, object]],
+ include_registers: bool,
+) -> None:
+ if not data_candidates:
+ return
+ pointer_tables = data_candidates.get("pointer_tables")
+ if not isinstance(pointer_tables, Iterable):
+ return
+ for table in pointer_tables:
+ if not isinstance(table, Mapping):
+ continue
+ source_address = table.get("address")
+ targets = table.get("targets")
+ if not isinstance(source_address, int) or not isinstance(targets, Iterable):
+ continue
+ for target in targets:
+ if not isinstance(target, int):
+ continue
+ region = _region_for(target, regions)
+ if _skip_region(region, include_registers):
+ continue
+ symbol = symbols.setdefault(target, _new_symbol(target, region))
+ symbol.record_xref(
+ {
+ "source": "pointer_table",
+ "address": source_address,
+ "target": target,
+ },
+ )
+
+
+def _direction_for_reference(
+ mnemonic: str,
+ operands: Sequence[str],
+ operand_index: int | None,
+ reference_count: int,
+) -> str:
+ root = _mnemonic_root(mnemonic)
+ destination_index = len(operands) - 1 if operands else None
+
+ if root in READ_ONLY_ROOTS:
+ return "read"
+ if root in READ_MODIFY_WRITE_ROOTS:
+ return "read_write"
+ if root in WRITE_ONLY_ROOTS:
+ if root == "STC" and operand_index not in (None, destination_index):
+ return "unknown"
+ return "write"
+ if root == "LDC":
+ return "read" if operand_index in (None, 0) else "unknown"
+ if root in MOV_ROOTS:
+ return _source_or_destination_direction(operands, operand_index, reference_count)
+ if root in DESTINATION_UPDATE_ROOTS:
+ if operand_index is None:
+ return "unknown"
+ return "read_write" if operand_index == destination_index else "read"
+ return "unknown"
+
+
+def _source_or_destination_direction(
+ operands: Sequence[str],
+ operand_index: int | None,
+ reference_count: int,
+) -> str:
+ if not operands:
+ return "unknown"
+ destination_index = len(operands) - 1
+ if operand_index is not None:
+ return "write" if operand_index == destination_index else "read"
+
+ memory_indexes = [index for index, operand in enumerate(operands) if _is_memory_operand(operand)]
+ if reference_count == 1 and len(memory_indexes) == 1:
+ return "write" if memory_indexes[0] == destination_index else "read"
+ return "unknown"
+
+
+def _operand_index_for_reference(
+ address: int,
+ refs: Sequence[int],
+ operands: Sequence[str],
+) -> int | None:
+ matches = [index for index, operand in enumerate(operands) if _operand_mentions_address(operand, address)]
+ if len(matches) == 1:
+ return matches[0]
+
+ memory_indexes = [index for index, operand in enumerate(operands) if _is_memory_operand(operand)]
+ if len(refs) == 1 and len(memory_indexes) == 1:
+ return memory_indexes[0]
+ if len(refs) == len(memory_indexes):
+ try:
+ return memory_indexes[refs.index(address)]
+ except ValueError:
+ return None
+ return None
+
+
+def _operand_mentions_address(operand: str, address: int) -> bool:
+ normalized = operand.upper()
+ if f"H'{address & 0xFFFF:04X}" in normalized:
+ return True
+ if address in IO_REGISTERS and IO_REGISTERS[address].upper() in normalized:
+ return True
+ return False
+
+
+def _is_memory_operand(operand: str) -> bool:
+ return operand.strip().startswith("@")
+
+
+def _split_operands(operands: str) -> list[str]:
+ parts: list[str] = []
+ current: list[str] = []
+ depth = 0
+ for char in operands:
+ if char in "({":
+ depth += 1
+ elif char in ")}" and depth:
+ depth -= 1
+ if char == "," and depth == 0:
+ parts.append("".join(current).strip())
+ current = []
+ continue
+ current.append(char)
+ if current or operands:
+ parts.append("".join(current).strip())
+ return [part for part in parts if part]
+
+
+def _mnemonic_root(mnemonic: str) -> str:
+ return mnemonic.rsplit(".", 1)[0]
+
+
+def _width_hint(mnemonic: str) -> str | None:
+ if mnemonic.endswith(".B"):
+ return "byte"
+ if mnemonic.endswith(".W"):
+ return "word"
+ return None
diff --git a/tests/test_dataflow.py b/tests/test_dataflow.py
new file mode 100644
index 0000000..1d41e93
--- /dev/null
+++ b/tests/test_dataflow.py
@@ -0,0 +1,108 @@
+import unittest
+
+from h8536.dataflow import analyze_dataflow, state_for_instruction
+from h8536.model import Instruction
+
+
+def reg_after(analysis, address, register):
+ return analysis["instructions"][address]["after"]["registers"][register]
+
+
+def reg_before(analysis, address, register):
+ return analysis["instructions"][address]["before"]["registers"][register]
+
+
+def control_after(analysis, address, register):
+ return analysis["instructions"][address]["after"]["control"][register]
+
+
+class DataflowTest(unittest.TestCase):
+ def test_tracks_immediate_load_copy_and_simple_arithmetic(self):
+ instructions = {
+ 0x0100: Instruction(0x0100, b"\x58\x02\x00", "MOV:I.W", "#H'0200, R0"),
+ 0x0103: Instruction(0x0103, b"\xA0\x81", "MOV:G.W", "R0, R1"),
+ 0x0105: Instruction(0x0105, b"\xA1\x08", "ADD:Q.W", "#1, R1"),
+ 0x0107: Instruction(0x0107, b"\x0C\x00\x02\x31", "SUB.W", "#H'0002, R1"),
+ }
+
+ analysis = analyze_dataflow(instructions)
+
+ self.assertEqual(reg_after(analysis, 0x0100, "R0")["value"], 0x0200)
+ self.assertEqual(reg_after(analysis, 0x0100, "R0")["width"], 16)
+ self.assertEqual(reg_before(analysis, 0x0103, "R0")["value"], 0x0200)
+ self.assertEqual(reg_after(analysis, 0x0103, "R1")["value"], 0x0200)
+ self.assertEqual(reg_after(analysis, 0x0105, "R1")["value"], 0x0201)
+ self.assertEqual(reg_after(analysis, 0x0107, "R1")["value"], 0x01FF)
+
+ def test_tracks_byte_immediates_without_promising_word_width(self):
+ instructions = {
+ 0x0200: Instruction(0x0200, b"\x52\x7F", "MOV:E.B", "#H'7F, R2"),
+ 0x0202: Instruction(0x0202, b"\xA2\x83", "MOV:G.B", "R2, R3"),
+ 0x0204: Instruction(0x0204, b"\x58\x20\x00", "MOV:I.W", "#H'2000, R0"),
+ 0x0207: Instruction(0x0207, b"\xD0\x84", "MOV:G.W", "@R0, R4"),
+ }
+
+ analysis = analyze_dataflow(instructions)
+
+ self.assertEqual(reg_after(analysis, 0x0200, "R2")["value"], 0x7F)
+ self.assertEqual(reg_after(analysis, 0x0200, "R2")["width"], 8)
+ self.assertEqual(reg_after(analysis, 0x0202, "R3")["value"], 0x7F)
+ self.assertEqual(reg_after(analysis, 0x0202, "R3")["width"], 8)
+ self.assertEqual(reg_after(analysis, 0x0207, "R0")["value"], 0x2000)
+ self.assertFalse(reg_after(analysis, 0x0207, "R4")["known"])
+ self.assertEqual(reg_after(analysis, 0x0207, "R4")["reason"], "memory_load")
+
+ def test_calls_and_ambiguous_branches_do_not_leak_known_state(self):
+ instructions = {
+ 0x0300: Instruction(0x0300, b"\x58\x12\x34", "MOV:I.W", "#H'1234, R0"),
+ 0x0303: Instruction(0x0303, b"\x26\x03", "BNE", "loc_0308", kind="branch", targets=[0x0308]),
+ 0x0305: Instruction(0x0305, b"\xA0\x08", "ADD:Q.W", "#1, R0"),
+ 0x0308: Instruction(0x0308, b"\xA0\x08", "ADD:Q.W", "#1, R0"),
+ 0x030A: Instruction(0x030A, b"\x18\x04\x00", "JSR", "@loc_0400", kind="call", targets=[0x0400]),
+ 0x030D: Instruction(0x030D, b"\xA0\x08", "ADD:Q.W", "#1, R0"),
+ }
+
+ analysis = analyze_dataflow(instructions)
+
+ self.assertFalse(reg_before(analysis, 0x0305, "R0")["known"])
+ self.assertEqual(reg_before(analysis, 0x0305, "R0")["reason"], "block_entry")
+ self.assertFalse(reg_before(analysis, 0x0308, "R0")["known"])
+ self.assertEqual(reg_before(analysis, 0x0308, "R0")["reason"], "block_entry")
+ self.assertFalse(reg_after(analysis, 0x030A, "R0")["known"])
+ self.assertEqual(reg_after(analysis, 0x030A, "R0")["reason"], "call")
+ self.assertFalse(reg_before(analysis, 0x030D, "R0")["known"])
+
+ def test_tracks_control_register_loads_and_stc_copies(self):
+ instructions = {
+ 0x0400: Instruction(
+ 0x0400,
+ b"\x04\xFE\x89",
+ "LDC.B",
+ "#H'FE, BR",
+ writes_br=True,
+ br_value=0xFE,
+ ),
+ 0x0403: Instruction(0x0403, b"\xA0\x99", "STC.B", "BR, R1"),
+ 0x0405: Instruction(0x0405, b"\x04\x01\x48", "ORC.B", "#H'01, CCR"),
+ }
+
+ analysis = analyze_dataflow(instructions)
+
+ self.assertEqual(control_after(analysis, 0x0400, "BR")["value"], 0xFE)
+ self.assertEqual(control_after(analysis, 0x0400, "BR")["width"], 8)
+ self.assertEqual(reg_after(analysis, 0x0403, "R1")["value"], 0xFE)
+ self.assertFalse(control_after(analysis, 0x0405, "CCR")["known"])
+
+ def test_state_lookup_helper_returns_instruction_record(self):
+ instructions = {
+ 0x0500: Instruction(0x0500, b"\x58\x00\x01", "MOV:I.W", "#H'0001, R0"),
+ }
+
+ analysis = analyze_dataflow(instructions)
+
+ self.assertEqual(state_for_instruction(analysis, 0x0500)["after"]["registers"]["R0"]["value"], 1)
+ self.assertEqual(state_for_instruction(analysis, 0x9999), {})
+
+
+if __name__ == "__main__":
+ unittest.main()
diff --git a/tests/test_indirect_flow.py b/tests/test_indirect_flow.py
new file mode 100644
index 0000000..0eaac07
--- /dev/null
+++ b/tests/test_indirect_flow.py
@@ -0,0 +1,72 @@
+import unittest
+
+from h8536.indirect import analyze_indirect_flow, indirect_comment_for_instruction
+from h8536.model import Instruction
+from h8536.render import format_listing, write_json
+from h8536.rom import Rom
+import json
+import tempfile
+from pathlib import Path
+
+
+class IndirectFlowTest(unittest.TestCase):
+ def test_detects_indexed_pointer_table_before_indirect_jump(self):
+ data = bytearray([0xFF] * 0x240)
+ data[0x0200:0x0206] = bytes.fromhex("01200300FFFF")
+ instructions = {
+ 0x0100: Instruction(0x0100, b"", "MOV:G.W", "@(H'0200,R4), R1"),
+ 0x0104: Instruction(0x0104, b"", "JMP", "@R1", kind="jump", fallthrough=False),
+ 0x0120: Instruction(0x0120, b"\x19", "RTS", kind="return", fallthrough=False),
+ 0x0300: Instruction(0x0300, b"\x19", "RTS", kind="return", fallthrough=False),
+ }
+
+ analysis = analyze_indirect_flow(Rom(bytes(data)), instructions, {0x0120: "loc_0120"})
+ site = analysis["sites"][0]
+
+ self.assertEqual(site["address"], 0x0104)
+ self.assertEqual(site["target_register"], "R1")
+ self.assertEqual(site["table"]["base"], 0x0200)
+ self.assertEqual(site["table"]["entry_count"], 2)
+ self.assertEqual(site["table"]["decoded_target_count"], 2)
+ self.assertIn("pointer table H'0200", indirect_comment_for_instruction(analysis, 0x0104))
+
+ def test_records_unknown_indirect_call_without_prior_table_load(self):
+ instructions = {
+ 0x0100: Instruction(0x0100, b"", "JSR", "@R0", kind="call"),
+ }
+
+ analysis = analyze_indirect_flow(Rom(bytes([0xFF] * 0x200)), instructions)
+
+ self.assertEqual(analysis["sites"][0]["confidence"], "unknown")
+ self.assertIn("target not resolved", analysis["sites"][0]["summary"])
+
+ def test_listing_and_json_include_indirect_flow_metadata(self):
+ instructions = {
+ 0x0100: Instruction(0x0100, b"", "JSR", "@R0", kind="call"),
+ }
+ analysis = analyze_indirect_flow(Rom(bytes([0xFF] * 0x200)), instructions)
+
+ listing = format_listing(
+ Path("rom.bin"),
+ Rom(bytes([0xFF] * 0x200)),
+ instructions,
+ {},
+ {},
+ "min",
+ traced=True,
+ indirect_flow=analysis,
+ )
+
+ self.assertIn("target not resolved", listing)
+
+ with tempfile.TemporaryDirectory() as tmp:
+ path = Path(tmp) / "out.json"
+ write_json(path, instructions, {}, {}, indirect_flow=analysis)
+ payload = json.loads(path.read_text(encoding="utf-8"))
+
+ self.assertEqual(payload["indirect_flow"]["sites"][0]["address"], 0x0100)
+ self.assertEqual(payload["instructions"][0]["indirect_flow"]["confidence"], "unknown")
+
+
+if __name__ == "__main__":
+ unittest.main()
diff --git a/tests/test_pseudocode.py b/tests/test_pseudocode.py
index 6dd0131..3a19fc1 100644
--- a/tests/test_pseudocode.py
+++ b/tests/test_pseudocode.py
@@ -109,7 +109,7 @@ class PseudocodeTest(unittest.TestCase):
],
}
- text = generate_pseudocode(payload, options=PseudocodeOptions())
+ text = generate_pseudocode(payload, options=PseudocodeOptions(structured=False))
self.assertIn("void vec_reset_0100(void)", text)
self.assertIn("P1DDR = (uint8_t)(0xFF);", text)
diff --git a/tests/test_pseudocode_structuring.py b/tests/test_pseudocode_structuring.py
new file mode 100644
index 0000000..4453ef7
--- /dev/null
+++ b/tests/test_pseudocode_structuring.py
@@ -0,0 +1,132 @@
+import unittest
+
+from h8536.pseudocode import PseudocodeOptions, generate_pseudocode
+
+
+def _instruction(
+ address,
+ mnemonic,
+ operands="",
+ *,
+ kind="normal",
+ targets=None,
+ text=None,
+):
+ return {
+ "address": address,
+ "text": text or f"{mnemonic} {operands}".strip(),
+ "mnemonic": mnemonic,
+ "operands": operands,
+ "kind": kind,
+ "targets": list(targets or []),
+ "references": [],
+ "comment": "",
+ }
+
+
+def _payload(instructions):
+ start = min(ins["address"] for ins in instructions)
+ end = max(ins["address"] for ins in instructions)
+ return {
+ "vectors": [],
+ "call_graph": {
+ "nodes": [
+ {
+ "start": start,
+ "end": end,
+ "label": f"loc_{start:04X}",
+ "sources": [],
+ "instruction_count": len(instructions),
+ "calls": [],
+ }
+ ],
+ "edges": [],
+ },
+ "instructions": instructions,
+ }
+
+
+def _options(**overrides):
+ values = {
+ "include_asm": False,
+ "include_addresses": False,
+ "emit_declarations": False,
+ }
+ values.update(overrides)
+ return PseudocodeOptions(**values)
+
+
+class PseudocodeStructuringTest(unittest.TestCase):
+ def test_backward_conditional_branch_becomes_do_while(self):
+ payload = _payload(
+ [
+ _instruction(0x0100, "MOV.B", "#H'00, R0"),
+ _instruction(0x0102, "ADD.B", "#H'01, R0"),
+ _instruction(0x0104, "CMP.B", "#H'03, R0"),
+ _instruction(0x0106, "BNE", "loc_0102", kind="branch", targets=[0x0102]),
+ _instruction(0x0108, "RTS", kind="return"),
+ ]
+ )
+
+ text = generate_pseudocode(payload, options=_options())
+
+ self.assertIn("do {", text)
+ self.assertIn("} while (!Z);", text)
+ self.assertNotIn("goto loc_0102;", text)
+ self.assertNotIn("loc_0102:", text)
+
+ def test_forward_conditional_branch_over_small_span_becomes_if(self):
+ payload = _payload(
+ [
+ _instruction(0x0100, "CMP.B", "#H'00, R0"),
+ _instruction(0x0102, "BEQ", "loc_0108", kind="branch", targets=[0x0108]),
+ _instruction(0x0104, "MOV.B", "#H'01, R1"),
+ _instruction(0x0106, "ADD.B", "#H'02, R1"),
+ _instruction(0x0108, "RTS", kind="return"),
+ ]
+ )
+
+ text = generate_pseudocode(payload, options=_options())
+
+ self.assertIn("if (!Z) {", text)
+ self.assertIn("R1 = (uint8_t)(0x01);", text)
+ self.assertIn("R1 += (uint8_t)(0x02);", text)
+ self.assertNotIn("goto loc_0108;", text)
+ self.assertNotIn("loc_0108:", text)
+
+ def test_structuring_can_be_disabled(self):
+ payload = _payload(
+ [
+ _instruction(0x0100, "CMP.B", "#H'00, R0"),
+ _instruction(0x0102, "BEQ", "loc_0108", kind="branch", targets=[0x0108]),
+ _instruction(0x0104, "MOV.B", "#H'01, R1"),
+ _instruction(0x0108, "RTS", kind="return"),
+ ]
+ )
+
+ text = generate_pseudocode(payload, options=_options(structured=False))
+
+ self.assertIn("if (Z) goto loc_0108;", text)
+ self.assertIn("loc_0108:", text)
+ self.assertNotIn("if (!Z) {", text)
+
+ def test_ambiguous_forward_branch_keeps_goto_fallback(self):
+ payload = _payload(
+ [
+ _instruction(0x0100, "BEQ", "loc_0108", kind="branch", targets=[0x0108]),
+ _instruction(0x0102, "MOV.B", "#H'01, R1"),
+ _instruction(0x0104, "BRA", "loc_0108", kind="jump", targets=[0x0108]),
+ _instruction(0x0108, "RTS", kind="return"),
+ ]
+ )
+
+ text = generate_pseudocode(payload, options=_options())
+
+ self.assertIn("if (Z) goto loc_0108;", text)
+ self.assertIn("goto loc_0108;", text)
+ self.assertIn("loc_0108:", text)
+ self.assertNotIn("if (!Z) {", text)
+
+
+if __name__ == "__main__":
+ unittest.main()
diff --git a/tests/test_render_analysis.py b/tests/test_render_analysis.py
new file mode 100644
index 0000000..e55f43a
--- /dev/null
+++ b/tests/test_render_analysis.py
@@ -0,0 +1,59 @@
+import json
+import tempfile
+import unittest
+from pathlib import Path
+
+from h8536.dataflow import analyze_dataflow
+from h8536.model import Instruction
+from h8536.render import format_listing, write_json
+from h8536.rom import Rom
+from h8536.symbols import discover_symbols
+
+
+class RenderAnalysisIntegrationTest(unittest.TestCase):
+ def test_listing_and_json_include_symbols_and_compact_dataflow(self):
+ instructions = {
+ 0x0100: Instruction(0x0100, b"\x58\x12\x34", "MOV:I.W", "#H'1234, R0"),
+ 0x0103: Instruction(
+ 0x0103,
+ b"\x1D\xF6\x80\x90",
+ "MOV:G.W",
+ "R0, @H'F680",
+ references=[0xF680],
+ ),
+ }
+ dataflow = analyze_dataflow(instructions)
+ symbols = discover_symbols(instructions)
+ rom = Rom(bytes([0xFF] * 0x200))
+
+ listing = format_listing(
+ Path("rom.bin"),
+ rom,
+ instructions,
+ {},
+ {},
+ "min",
+ traced=True,
+ dataflow=dataflow,
+ symbols=symbols,
+ )
+
+ self.assertIn("; Symbols", listing)
+ self.assertIn("ram_F680", listing)
+ self.assertIn("dataflow R0=H'1234", listing)
+
+ with tempfile.TemporaryDirectory() as tmp:
+ path = Path(tmp) / "out.json"
+ write_json(path, instructions, {}, {}, dataflow=dataflow, symbols=symbols)
+ payload = json.loads(path.read_text(encoding="utf-8"))
+
+ self.assertEqual(payload["symbols"]["symbols"][0]["name"], "ram_F680")
+ self.assertEqual(payload["instructions"][1]["references"][0]["symbol"], "ram_F680")
+ dataflow_payload = payload["instructions"][0]["dataflow"]
+ self.assertEqual(dataflow_payload["changes"][0]["name"], "R0")
+ self.assertEqual(dataflow_payload["known_after"]["registers"]["R0"]["value"], 0x1234)
+ self.assertNotIn("before", dataflow_payload)
+
+
+if __name__ == "__main__":
+ unittest.main()
diff --git a/tests/test_symbols.py b/tests/test_symbols.py
new file mode 100644
index 0000000..fdc4788
--- /dev/null
+++ b/tests/test_symbols.py
@@ -0,0 +1,123 @@
+import unittest
+
+from h8536.model import Instruction
+from h8536.symbols import discover_symbols, instruction_accesses, symbol_for_address
+
+
+def ins(address, mnemonic, operands="", references=None):
+ return Instruction(
+ address,
+ b"\x00",
+ mnemonic,
+ operands,
+ references=list(references or []),
+ )
+
+
+class SymbolDiscoveryTest(unittest.TestCase):
+ def test_discovers_ram_symbol_counts_direction_and_widths(self):
+ instructions = {
+ 0x1000: ins(0x1000, "MOV:G.B", "#H'12, @H'F680", [0xF680]),
+ 0x1004: ins(0x1004, "CMP:G.B", "#H'01, @H'F680", [0xF680]),
+ 0x1008: ins(0x1008, "ADD:Q.W", "#1, @H'F680", [0xF680]),
+ }
+
+ analysis = discover_symbols(instructions)
+ symbols = analysis["symbols"]
+
+ self.assertEqual(len(symbols), 1)
+ symbol = symbols[0]
+ self.assertEqual(symbol["address"], 0xF680)
+ self.assertEqual(symbol["name"], "ram_F680")
+ self.assertEqual(symbol["region"], "on_chip_ram")
+ self.assertEqual(symbol["kind"], "ram")
+ self.assertEqual(symbol["access_count"], 3)
+ self.assertEqual(symbol["read_count"], 2)
+ self.assertEqual(symbol["write_count"], 2)
+ self.assertEqual(symbol["unknown_count"], 0)
+ self.assertEqual(symbol["width_hints"], ["byte", "word"])
+ self.assertEqual(symbol["width"], "mixed")
+ self.assertEqual(symbol["first_access"], 0x1000)
+ self.assertEqual(symbol["last_access"], 0x1008)
+ self.assertEqual(symbol_for_address(analysis, 0xF680), "ram_F680")
+
+ def test_names_program_or_external_memory_and_excludes_registers_by_default(self):
+ instructions = [
+ ins(0x2000, "MOV:G.W", "@H'1234, R1", [0x1234]),
+ ins(0x2004, "MOV:G.B", "#H'80, @RAMCR", [0xFF11]),
+ ]
+
+ analysis = discover_symbols(instructions)
+
+ self.assertEqual([symbol["name"] for symbol in analysis["symbols"]], ["mem_1234"])
+ symbol = analysis["symbols"][0]
+ self.assertEqual(symbol["region"], "program_or_external")
+ self.assertEqual(symbol["kind"], "memory")
+ self.assertEqual(symbol["read_count"], 1)
+ self.assertIsNone(symbol_for_address(analysis, 0xFF11))
+
+ def test_can_include_io_register_symbols_when_requested(self):
+ instructions = [
+ ins(0x2004, "MOV:G.B", "#H'80, @RAMCR", [0xFF11]),
+ ]
+
+ analysis = discover_symbols(instructions, include_registers=True)
+
+ self.assertEqual(len(analysis["symbols"]), 1)
+ symbol = analysis["symbols"][0]
+ self.assertEqual(symbol["address"], 0xFF11)
+ self.assertEqual(symbol["name"], "RAMCR")
+ self.assertEqual(symbol["region"], "register_field")
+ self.assertEqual(symbol["kind"], "register")
+ self.assertEqual(symbol["write_count"], 1)
+
+ def test_bit_and_clear_operations_use_conservative_directions(self):
+ instructions = [
+ ins(0x3000, "BSET.B", "#4, @H'F690", [0xF690]),
+ ins(0x3002, "BCLR.B", "#4, @H'F690", [0xF690]),
+ ins(0x3004, "TST.B", "@H'F690", [0xF690]),
+ ins(0x3006, "CLR.B", "@H'F690", [0xF690]),
+ ]
+
+ analysis = discover_symbols(instructions)
+ symbol = analysis["symbols"][0]
+
+ self.assertEqual(symbol["read_count"], 3)
+ self.assertEqual(symbol["write_count"], 3)
+ self.assertEqual(
+ [access["direction"] for access in symbol["accesses"]],
+ ["read_write", "read_write", "read", "write"],
+ )
+
+ def test_optional_pointer_table_candidates_add_xrefs_without_io_pollution(self):
+ instructions = [
+ ins(0x4000, "MOV:G.B", "@H'F680, R0", [0xF680]),
+ ]
+ data_candidates = {
+ "pointer_tables": [
+ {
+ "address": 0x0200,
+ "targets": [0xF680, 0x1234, 0xFF11],
+ },
+ ],
+ }
+
+ analysis = discover_symbols(instructions, data_candidates=data_candidates)
+ by_name = {symbol["name"]: symbol for symbol in analysis["symbols"]}
+
+ self.assertEqual(by_name["ram_F680"]["xref_count"], 1)
+ self.assertEqual(by_name["mem_1234"]["access_count"], 0)
+ self.assertEqual(by_name["mem_1234"]["xref_count"], 1)
+ self.assertNotIn("RAMCR", by_name)
+
+ def test_instruction_accesses_handles_comma_inside_displacement_operand(self):
+ access = instruction_accesses(
+ ins(0x5000, "MOV:G.B", "@(H'0010,R1), @H'F682", [0xF682]),
+ )
+
+ self.assertEqual(access[0]["direction"], "write")
+ self.assertEqual(access[0]["operand"], "@H'F682")
+
+
+if __name__ == "__main__":
+ unittest.main()