/*
 * H8/536 C-like pseudocode from build\rom_decompiled.json
 *
 * This is a conservative structural translation of the decompiler JSON.
 * Helpers such as set_flags_cmp8(), MEM8[], BIT(), C/Z/N/V, and
 * return_from_interrupt() are pseudocode placeholders, not a runtime ABI.
 *
 * vectors: 36, functions: 88, instructions: 2552
 */

#include <stdint.h>

typedef uint8_t u8;
typedef uint16_t u16;

#define BIT(n) (1u << (n))
extern volatile u8 MEM8[0x10000];
extern volatile u16 MEM16[0x10000];

u16 R0, R1, R2, R3, R4, R5, R6, R7;
u16 SR;
u8 CCR, BR, EP, DP, TP;
int C, Z, N, V;

static inline u16 zero_extend8_to16(u8 value) { return (u16)value; }

/* H8/536 register field symbols used by this ROM. */
extern volatile u8 P1DDR; /* 0xFE80 */
extern volatile u8 P1DR; /* 0xFE82 */
extern volatile u8 P6DDR; /* 0xFE89 */
extern volatile u8 P6DR; /* 0xFE8B */
extern volatile u8 P7DDR; /* 0xFE8C */
extern volatile u8 P7DR; /* 0xFE8E */
extern volatile u8 FRT1_TCR; /* 0xFE90 */
extern volatile u8 FRT1_TCSR; /* 0xFE91 */
extern volatile u16 FRT1_FRC_H; /* 0xFE92 */
extern volatile u16 FRT1_OCRA_H; /* 0xFE94 */
extern volatile u8 FRT2_TCR; /* 0xFEA0 */
extern volatile u8 FRT2_TCSR; /* 0xFEA1 */
extern volatile u16 FRT2_FRC_H; /* 0xFEA2 */
extern volatile u16 FRT2_OCRA_H; /* 0xFEA4 */
extern volatile u8 FRT3_TCR; /* 0xFEB0 */
extern volatile u8 FRT3_TCSR; /* 0xFEB1 */
extern volatile u8 PWM1_TCR; /* 0xFEC0 */
extern volatile u8 PWM1_DTR; /* 0xFEC1 */
extern volatile u8 PWM2_TCR; /* 0xFEC4 */
extern volatile u8 PWM2_DTR; /* 0xFEC5 */
extern volatile u8 PWM3_TCR; /* 0xFEC8 */
extern volatile u8 PWM3_DTR; /* 0xFEC9 */
extern volatile u8 TMR_TCR; /* 0xFED0 */
extern volatile u8 TMR_TCSR; /* 0xFED1 */
extern volatile u8 SCI1_SMR; /* 0xFED8 */
extern volatile u8 SCI1_BRR; /* 0xFED9 */
extern volatile u8 SCI1_SCR; /* 0xFEDA */
extern volatile u8 SCI1_TDR; /* 0xFEDB */
extern volatile u8 SCI1_SSR; /* 0xFEDC */
extern volatile u8 SCI1_RDR; /* 0xFEDD */
extern volatile u16 ADDRA_H; /* 0xFEE0 */
extern volatile u16 ADDRB_H; /* 0xFEE2 */
extern volatile u8 ADCSR; /* 0xFEE8 */
extern volatile u16 WDT_TCSR_R; /* 0xFEEC */
extern volatile u8 SCI2_SMR; /* 0xFEF0 */
extern volatile u8 SCI2_BRR; /* 0xFEF1 */
extern volatile u8 SCI2_SCR; /* 0xFEF2 */
extern volatile u8 SYSCR1; /* 0xFEFC */
extern volatile u8 SYSCR2; /* 0xFEFD */
extern volatile u8 P9DDR; /* 0xFEFE */
extern volatile u8 P9DR; /* 0xFEFF */
extern volatile u8 IPRA; /* 0xFF00 */
extern volatile u8 IPRB; /* 0xFF01 */
extern volatile u8 IPRC; /* 0xFF02 */
extern volatile u8 IPRD; /* 0xFF03 */
extern volatile u8 IPRE; /* 0xFF04 */
extern volatile u8 IPRF; /* 0xFF05 */
extern volatile u8 WCR; /* 0xFF10 */
extern volatile u8 RAMCR; /* 0xFF11 */

/* RAM/external symbols inferred from instruction references and data tables. */
extern volatile u8 mem_1011; /* 0x1011 memory unknown */
extern volatile u8 mem_10FB; /* 0x10FB memory unknown */
extern volatile u8 mem_1161; /* 0x1161 memory unknown */
extern volatile u8 mem_1170; /* 0x1170 memory unknown */
extern volatile u8 mem_1179; /* 0x1179 memory unknown */
extern volatile u8 mem_1188; /* 0x1188 memory unknown */
extern volatile u8 mem_1197; /* 0x1197 memory unknown */
extern volatile u8 mem_11A0; /* 0x11A0 memory unknown */
extern volatile u8 mem_11A9; /* 0x11A9 memory unknown */
extern volatile u8 mem_11DC; /* 0x11DC memory unknown */
extern volatile u8 mem_1206; /* 0x1206 memory unknown */
extern volatile u8 mem_1215; /* 0x1215 memory unknown */
extern volatile u8 mem_12A8; /* 0x12A8 memory unknown */
extern volatile u8 mem_1314; /* 0x1314 memory unknown */
extern volatile u8 mem_1617; /* 0x1617 memory unknown */
extern volatile u8 mem_1627; /* 0x1627 memory unknown */
extern volatile u8 mem_1630; /* 0x1630 memory unknown */
extern volatile u8 mem_1647; /* 0x1647 memory unknown */
extern volatile u8 mem_1664; /* 0x1664 memory unknown */
extern volatile u8 mem_1682; /* 0x1682 memory unknown */
extern volatile u8 mem_1700; /* 0x1700 memory unknown */
extern volatile u8 mem_1819; /* 0x1819 memory unknown */
extern volatile u8 mem_1A00; /* 0x1A00 memory unknown */
extern volatile u8 mem_1AF8; /* 0x1AF8 memory unknown */
extern volatile u8 mem_2815; /* 0x2815 memory unknown */
extern volatile u8 mem_2CA6; /* 0x2CA6 memory unknown */
extern volatile u8 mem_441D; /* 0x441D memory unknown */
extern volatile u8 mem_449C; /* 0x449C memory unknown */
extern volatile u8 mem_449E; /* 0x449E memory unknown */
extern volatile u8 mem_44A0; /* 0x44A0 memory unknown */
extern volatile u16 mem_E000; /* 0xE000 memory word */
extern volatile u16 mem_E004; /* 0xE004 memory word */
extern volatile u16 mem_E006; /* 0xE006 memory word */
extern volatile u16 mem_E046; /* 0xE046 memory word */
extern volatile u16 mem_E080; /* 0xE080 memory word */
extern volatile u16 mem_E102; /* 0xE102 memory word */
extern volatile u16 mem_E124; /* 0xE124 memory word */
extern volatile u16 mem_E126; /* 0xE126 memory word */
extern volatile u16 mem_E14E; /* 0xE14E memory word */
extern volatile u16 mem_E16E; /* 0xE16E memory word */
extern volatile u16 mem_E172; /* 0xE172 memory word */
extern volatile u16 mem_E1EC; /* 0xE1EC memory word */
extern volatile u16 mem_E220; /* 0xE220 memory word */
extern volatile u16 mem_E800; /* 0xE800 memory word */
extern volatile u16 mem_E806; /* 0xE806 memory word */
extern volatile u16 mem_E880; /* 0xE880 memory word */
extern volatile u16 mem_E902; /* 0xE902 memory word */
extern volatile u16 mem_E924; /* 0xE924 memory word */
extern volatile u16 mem_E9EC; /* 0xE9EC memory word */
extern volatile u8 mem_F000; /* 0xF000 memory byte */
extern volatile u8 mem_F001; /* 0xF001 memory byte */
extern volatile u8 mem_F002; /* 0xF002 memory mixed */
extern volatile u8 mem_F003; /* 0xF003 memory byte */
extern volatile u8 mem_F004; /* 0xF004 memory mixed */
extern volatile u8 mem_F005; /* 0xF005 memory byte */
extern volatile u8 mem_F006; /* 0xF006 memory mixed */
extern volatile u8 mem_F007; /* 0xF007 memory byte */
extern volatile u8 mem_F008; /* 0xF008 memory mixed */
extern volatile u8 mem_F009; /* 0xF009 memory byte */
extern volatile u8 mem_F00A; /* 0xF00A memory mixed */
extern volatile u8 mem_F00B; /* 0xF00B memory byte */
extern volatile u8 mem_F00C; /* 0xF00C memory mixed */
extern volatile u8 mem_F00D; /* 0xF00D memory byte */
extern volatile u8 mem_F00E; /* 0xF00E memory byte */
extern volatile u8 mem_F00F; /* 0xF00F memory byte */
extern volatile u8 mem_F100; /* 0xF100 memory byte */
extern volatile u8 mem_F101; /* 0xF101 memory byte */
extern volatile u8 mem_F102; /* 0xF102 memory mixed */
extern volatile u8 mem_F103; /* 0xF103 memory byte */
extern volatile u8 mem_F104; /* 0xF104 memory mixed */
extern volatile u8 mem_F105; /* 0xF105 memory byte */
extern volatile u8 mem_F106; /* 0xF106 memory mixed */
extern volatile u8 mem_F107; /* 0xF107 memory byte */
extern volatile u8 mem_F108; /* 0xF108 memory mixed */
extern volatile u8 mem_F109; /* 0xF109 memory byte */
extern volatile u8 mem_F10A; /* 0xF10A memory mixed */
extern volatile u8 mem_F10B; /* 0xF10B memory byte */
extern volatile u8 mem_F10C; /* 0xF10C memory mixed */
extern volatile u8 mem_F10D; /* 0xF10D memory byte */
extern volatile u8 mem_F10E; /* 0xF10E memory byte */
extern volatile u8 mem_F10F; /* 0xF10F memory byte */
extern volatile u8 mem_F200; /* 0xF200 memory byte */
extern volatile u8 mem_F201; /* 0xF201 memory byte */
extern volatile u16 mem_F402; /* 0xF402 memory word */
extern volatile u8 mem_F404; /* 0xF404 memory byte */
extern volatile u8 mem_F4AA; /* 0xF4AA memory byte */
extern volatile u8 mem_F555; /* 0xF555 memory byte */
extern volatile u8 ram_F688; /* 0xF688 ram byte */
extern volatile u8 ram_F689; /* 0xF689 ram byte */
extern volatile u8 ram_F68A; /* 0xF68A ram byte */
extern volatile u8 ram_F68B; /* 0xF68B ram byte */
extern volatile u16 ram_F68C; /* 0xF68C ram word */
extern volatile u16 ram_F68E; /* 0xF68E ram word */
extern volatile u16 ram_F690; /* 0xF690 ram word */
extern volatile u16 ram_F692; /* 0xF692 ram word */
extern volatile u16 ram_F694; /* 0xF694 ram word */
extern volatile u16 ram_F696; /* 0xF696 ram word */
extern volatile u16 ram_F698; /* 0xF698 ram word */
extern volatile u16 ram_F69A; /* 0xF69A ram word */
extern volatile u16 ram_F69C; /* 0xF69C ram word */
extern volatile u16 ram_F69E; /* 0xF69E ram word */
extern volatile u16 ram_F6A0; /* 0xF6A0 ram word */
extern volatile u16 ram_F6A2; /* 0xF6A2 ram word */
extern volatile u16 ram_F6A4; /* 0xF6A4 ram word */
extern volatile u16 ram_F6A6; /* 0xF6A6 ram word */
extern volatile u16 ram_F6A8; /* 0xF6A8 ram word */
extern volatile u16 ram_F6AA; /* 0xF6AA ram word */
extern volatile u16 ram_F6AC; /* 0xF6AC ram word */
extern volatile u16 ram_F6AE; /* 0xF6AE ram word */
extern volatile u16 ram_F6B2; /* 0xF6B2 ram word */
extern volatile u16 ram_F6B4; /* 0xF6B4 ram word */
extern volatile u16 ram_F6B6; /* 0xF6B6 ram word */
extern volatile u16 ram_F6BA; /* 0xF6BA ram word */
extern volatile u16 ram_F6BC; /* 0xF6BC ram word */
extern volatile u16 ram_F6BE; /* 0xF6BE ram word */
extern volatile u16 ram_F6C2; /* 0xF6C2 ram word */
extern volatile u16 ram_F6C4; /* 0xF6C4 ram word */
extern volatile u16 ram_F6C6; /* 0xF6C6 ram word */
extern volatile u16 ram_F6C8; /* 0xF6C8 ram word */
extern volatile u16 ram_F6CA; /* 0xF6CA ram word */
extern volatile u16 ram_F6CC; /* 0xF6CC ram word */
extern volatile u16 ram_F6CE; /* 0xF6CE ram word */
extern volatile u8 ram_F6D0; /* 0xF6D0 ram byte */
extern volatile u8 ram_F6D1; /* 0xF6D1 ram byte */
extern volatile u8 ram_F6D2; /* 0xF6D2 ram byte */
extern volatile u8 ram_F6D3; /* 0xF6D3 ram byte */
extern volatile u8 ram_F6D4; /* 0xF6D4 ram byte */
extern volatile u8 ram_F6D5; /* 0xF6D5 ram byte */
extern volatile u8 ram_F6D6; /* 0xF6D6 ram byte */
extern volatile u8 ram_F6D7; /* 0xF6D7 ram byte */
extern volatile u8 ram_F6D8; /* 0xF6D8 ram byte */
extern volatile u8 ram_F6D9; /* 0xF6D9 ram byte */
extern volatile u8 ram_F6DA; /* 0xF6DA ram byte */
extern volatile u8 ram_F6DB; /* 0xF6DB ram byte */
extern volatile u8 ram_F6DC; /* 0xF6DC ram byte */
extern volatile u8 ram_F6DD; /* 0xF6DD ram byte */
extern volatile u8 ram_F6DE; /* 0xF6DE ram byte */
extern volatile u8 ram_F6DF; /* 0xF6DF ram byte */
extern volatile u8 ram_F6E0; /* 0xF6E0 ram byte */
extern volatile u8 ram_F6E1; /* 0xF6E1 ram byte */
extern volatile u8 ram_F6E2; /* 0xF6E2 ram byte */
extern volatile u8 ram_F6E3; /* 0xF6E3 ram byte */
extern volatile u8 ram_F6E4; /* 0xF6E4 ram byte */
extern volatile u8 ram_F6E5; /* 0xF6E5 ram byte */
extern volatile u8 ram_F6E6; /* 0xF6E6 ram byte */
extern volatile u8 ram_F6E7; /* 0xF6E7 ram byte */
extern volatile u8 ram_F6EB; /* 0xF6EB ram byte */
extern volatile u8 ram_F6EC; /* 0xF6EC ram byte */
extern volatile u8 ram_F6F0; /* 0xF6F0 ram byte */
extern volatile u8 ram_F6F1; /* 0xF6F1 ram byte */
extern volatile u8 ram_F6F2; /* 0xF6F2 ram byte */
extern volatile u8 ram_F6F3; /* 0xF6F3 ram byte */
extern volatile u16 ram_F6F4; /* 0xF6F4 ram word */
extern volatile u8 ram_F6F6; /* 0xF6F6 ram byte */
extern volatile u8 ram_F6F7; /* 0xF6F7 ram byte */
extern volatile u8 ram_F6F8; /* 0xF6F8 ram byte */
extern volatile u8 ram_F6F9; /* 0xF6F9 ram byte */
extern volatile u8 ram_F700; /* 0xF700 ram mixed */
extern volatile u8 ram_F701; /* 0xF701 ram byte */
extern volatile u8 ram_F702; /* 0xF702 ram mixed */
extern volatile u8 ram_F703; /* 0xF703 ram byte */
extern volatile u8 ram_F704; /* 0xF704 ram mixed */
extern volatile u8 ram_F705; /* 0xF705 ram byte */
extern volatile u8 ram_F706; /* 0xF706 ram mixed */
extern volatile u8 ram_F707; /* 0xF707 ram byte */
extern volatile u8 ram_F708; /* 0xF708 ram byte */
extern volatile u8 ram_F709; /* 0xF709 ram byte */
extern volatile u8 ram_F70A; /* 0xF70A ram mixed */
extern volatile u8 ram_F70B; /* 0xF70B ram byte */
extern volatile u8 ram_F710; /* 0xF710 ram byte */
extern volatile u8 ram_F711; /* 0xF711 ram byte */
extern volatile u8 ram_F712; /* 0xF712 ram byte */
extern volatile u8 ram_F713; /* 0xF713 ram byte */
extern volatile u8 ram_F714; /* 0xF714 ram byte */
extern volatile u8 ram_F715; /* 0xF715 ram byte */
extern volatile u8 ram_F716; /* 0xF716 ram byte */
extern volatile u8 ram_F717; /* 0xF717 ram byte */
extern volatile u8 ram_F718; /* 0xF718 ram byte */
extern volatile u8 ram_F719; /* 0xF719 ram byte */
extern volatile u8 ram_F71A; /* 0xF71A ram byte */
extern volatile u8 ram_F71B; /* 0xF71B ram byte */
extern volatile u8 ram_F71C; /* 0xF71C ram byte */
extern volatile u8 ram_F71D; /* 0xF71D ram byte */
extern volatile u8 ram_F71E; /* 0xF71E ram byte */
extern volatile u8 ram_F71F; /* 0xF71F ram byte */
extern volatile u8 ram_F720; /* 0xF720 ram byte */
extern volatile u8 ram_F721; /* 0xF721 ram byte */
extern volatile u8 ram_F722; /* 0xF722 ram byte */
extern volatile u8 ram_F723; /* 0xF723 ram byte */
extern volatile u8 ram_F724; /* 0xF724 ram byte */
extern volatile u8 ram_F726; /* 0xF726 ram byte */
extern volatile u8 ram_F727; /* 0xF727 ram unknown */
extern volatile u8 ram_F730; /* 0xF730 ram byte */
extern volatile u8 ram_F731; /* 0xF731 ram byte */
extern volatile u8 ram_F732; /* 0xF732 ram mixed */
extern volatile u8 ram_F733; /* 0xF733 ram byte */
extern volatile u16 ram_F734; /* 0xF734 ram word */
extern volatile u16 ram_F736; /* 0xF736 ram word */
extern volatile u16 ram_F738; /* 0xF738 ram word */
extern volatile u16 ram_F73A; /* 0xF73A ram word */
extern volatile u16 ram_F73C; /* 0xF73C ram word */
extern volatile u16 ram_F73E; /* 0xF73E ram word */
extern volatile u16 ram_F740; /* 0xF740 ram word */
extern volatile u16 ram_F742; /* 0xF742 ram word */
extern volatile u8 ram_F74C; /* 0xF74C ram unknown */
extern volatile u8 ram_F750; /* 0xF750 ram unknown */
extern volatile u8 ram_F752; /* 0xF752 ram unknown */
extern volatile u16 ram_F754; /* 0xF754 ram word */
extern volatile u8 ram_F756; /* 0xF756 ram byte */
extern volatile u8 ram_F757; /* 0xF757 ram byte */
extern volatile u8 ram_F758; /* 0xF758 ram byte */
extern volatile u8 ram_F759; /* 0xF759 ram byte */
extern volatile u8 ram_F75B; /* 0xF75B ram byte */
extern volatile u16 ram_F75C; /* 0xF75C ram word */
extern volatile u8 ram_F769; /* 0xF769 ram byte */
extern volatile u16 ram_F76A; /* 0xF76A ram word */
extern volatile u8 ram_F76C; /* 0xF76C ram byte */
extern volatile u8 ram_F76D; /* 0xF76D ram byte */
extern volatile u8 ram_F76E; /* 0xF76E ram byte */
extern volatile u8 ram_F770; /* 0xF770 ram byte */
extern volatile u16 ram_F772; /* 0xF772 ram word */
extern volatile u8 ram_F790; /* 0xF790 ram byte */
extern volatile u8 ram_F791; /* 0xF791 ram byte */
extern volatile u8 ram_F794; /* 0xF794 ram byte */
extern volatile u8 ram_F795; /* 0xF795 ram byte */
extern volatile u8 ram_F797; /* 0xF797 ram byte */
extern volatile u8 ram_F798; /* 0xF798 ram byte */
extern volatile u8 ram_F840; /* 0xF840 ram byte */
extern volatile u8 ram_F841; /* 0xF841 ram byte */
extern volatile u8 ram_F850; /* 0xF850 ram mixed */
extern volatile u8 ram_F851; /* 0xF851 ram byte */
extern volatile u8 ram_F852; /* 0xF852 ram mixed */
extern volatile u8 ram_F853; /* 0xF853 ram byte */
extern volatile u8 ram_F854; /* 0xF854 ram mixed */
extern volatile u8 ram_F858; /* 0xF858 ram mixed */
extern volatile u8 ram_F859; /* 0xF859 ram byte */
extern volatile u8 ram_F85A; /* 0xF85A ram mixed */
extern volatile u8 ram_F85B; /* 0xF85B ram byte */
extern volatile u8 ram_F85C; /* 0xF85C ram mixed */
extern volatile u8 ram_F85D; /* 0xF85D ram byte */
extern volatile u8 ram_F860; /* 0xF860 ram mixed */
extern volatile u8 ram_F861; /* 0xF861 ram byte */
extern volatile u8 ram_F862; /* 0xF862 ram mixed */
extern volatile u8 ram_F863; /* 0xF863 ram byte */
extern volatile u8 ram_F864; /* 0xF864 ram mixed */
extern volatile u8 ram_F865; /* 0xF865 ram byte */
extern volatile u16 ram_F868; /* 0xF868 ram word */
extern volatile u16 ram_F86A; /* 0xF86A ram word */
extern volatile u16 ram_F86C; /* 0xF86C ram word */
extern volatile u8 ram_F9B0; /* 0xF9B0 ram byte */
extern volatile u8 ram_F9B4; /* 0xF9B4 ram byte */
extern volatile u8 ram_F9B5; /* 0xF9B5 ram byte */
extern volatile u8 ram_F9B9; /* 0xF9B9 ram byte */
extern volatile u8 ram_F9C0; /* 0xF9C0 ram byte */
extern volatile u8 ram_F9C1; /* 0xF9C1 ram byte */
extern volatile u8 ram_F9C2; /* 0xF9C2 ram byte */
extern volatile u8 ram_F9C3; /* 0xF9C3 ram byte */
extern volatile u8 ram_F9C4; /* 0xF9C4 ram byte */
extern volatile u8 ram_F9C5; /* 0xF9C5 ram byte */
extern volatile u16 ram_F9C6; /* 0xF9C6 ram word */
extern volatile u8 ram_F9C8; /* 0xF9C8 ram byte */
extern volatile u8 ram_F9FB; /* 0xF9FB ram unknown */
extern volatile u8 ram_FA84; /* 0xFA84 ram unknown */
extern volatile u8 ram_FAA2; /* 0xFAA2 ram byte */
extern volatile u8 ram_FAA3; /* 0xFAA3 ram byte */
extern volatile u8 ram_FAA4; /* 0xFAA4 ram byte */
extern volatile u8 ram_FAA5; /* 0xFAA5 ram byte */
extern volatile u8 ram_FAA6; /* 0xFAA6 ram byte */
extern volatile u16 ram_FAF0; /* 0xFAF0 ram word */
extern volatile u16 ram_FAF2; /* 0xFAF2 ram word */
extern volatile u16 ram_FAF4; /* 0xFAF4 ram word */
extern volatile u16 ram_FAF6; /* 0xFAF6 ram word */
extern volatile u16 ram_FAF8; /* 0xFAF8 ram word */
extern volatile u16 ram_FAFA; /* 0xFAFA ram word */
extern volatile u16 ram_FAFC; /* 0xFAFC ram word */
extern volatile u16 ram_FAFE; /* 0xFAFE ram word */
extern volatile u16 ram_FB00; /* 0xFB00 ram word */
extern volatile u8 ram_FB02; /* 0xFB02 ram byte */
extern volatile u8 ram_FB03; /* 0xFB03 ram byte */
extern volatile u8 ram_FC62; /* 0xFC62 ram unknown */
extern volatile u8 ram_FC80; /* 0xFC80 ram unknown */
extern volatile u8 ram_FC84; /* 0xFC84 ram unknown */
extern volatile u8 ram_FCE2; /* 0xFCE2 ram unknown */
extern volatile u8 ram_FCFE; /* 0xFCFE ram unknown */
extern volatile u8 ram_FDFE; /* 0xFDFE ram unknown */
extern volatile u8 ram_FE27; /* 0xFE27 ram unknown */

/* Function entry points discovered from vectors and call targets. */
void vec_reset_1000(void);
void loc_10CE(void);
void loc_15E0(void);
void loc_1705(void);
void loc_174D(void);
void loc_1795(void);
void loc_17C9(void);
void loc_17FB(void);
void loc_182D(void);
void loc_1891(void);
void loc_18E7(void);
void loc_194A(void);
void loc_1979(void);
void loc_19A2(void);
void loc_19DB(void);
void loc_1A35(void);
void loc_1A8D(void);
void loc_1A9C(void);
void loc_1AE4(void);
void loc_1B0B(void);
void loc_1B2D(void);
void loc_1B44(void);
void loc_1B5B(void);
void loc_1B72(void);
void loc_1B89(void);
void loc_1BA0(void);
void loc_1BB6(void);
void loc_1BCC(void);
void loc_1BE2(void);
void loc_1BF8(void);
void loc_1C0E(void);
void loc_2127(void);
void loc_2650(void);
void loc_2806(void);
void loc_3930(void);
void loc_398A(void);
void loc_3995(void);
void loc_3A2E(void);
void vec_irq4_3AC7(void);
void vec_irq3_3C30(void);
void vec_ad_adi_3D99(void);
void loc_3E54(void);
void loc_3ECC(void);
void loc_3F28(void);
void loc_3F40(void);
void loc_3FD3(void);
void loc_3FEF(void);
void loc_400C(void);
void loc_4046(void);
void loc_4075(void);
void loc_4096(void);
void loc_40BB(void);
void loc_4217(void);
void loc_430C(void);
void loc_4324(void);
void loc_434C(void);
void vec_nmi_4393(void);
void loc_4394(void);
void loc_442F(void);
void loc_4457(void);
void loc_44F2(void);
void loc_451A(void);
void loc_45B5(void);
void loc_48EF(void);
void loc_48FA(void);
void loc_6206(void);
void loc_622B(void);
void loc_BA26(void);
void vec_sci1_txi_BA84(void);
void loc_BAF2(void);
void vec_sci1_eri_BB57(void);
void vec_sci1_rxi_BB67(void);
void loc_BBAB(void);
void loc_BE70(void);
void loc_BE9E(void);
void vec_frt1_ocia_BEEA(void);
void vec_frt2_ocia_BF23(void);
void vec_interval_timer_BFC4(void);
void loc_BFE0(void);
void loc_BFFE(void);
void loc_C010(void);
void loc_C039(void);
void loc_C06A(void);
void loc_C08B(void);
void loc_C0DB(void);
void loc_C10C(void);
void loc_C121(void);
void loc_C142(void);

void vec_reset_1000(void)
{
    /* vector sources: reset, invalid_instruction, zero_divide, trap_vs, address_error, trace, trapa_0, trapa_1, trapa_2, trapa_3, trapa_4, trapa_5, trapa_6, trapa_7, trapa_8, trapa_9, trapa_a, trapa_b, trapa_c, trapa_d, trapa_e, trapa_f, irq0, irq1, irq2, irq5 */
    R7 = (uint16_t)(0xFE80); /* 1000; MOV:I.W #H'FE80, R7; dataflow R7=0xFE80; cycles=3 */
    SR = (uint16_t)(0x0700); /* 1003; LDC.W #H'0700, SR; dataflow SR=0x0700; cycles=6 */
    P1DDR = (uint8_t)(0xFF); /* 1007; MOV:G.B #H'FF, @P1DDR; P1DDR = H'FF; refs P1DDR; cycles=9 */
    P1DR = (uint8_t)(0x00); /* 100C; MOV:G.B #H'00, @P1DR; P1DR = H'00; refs P1DR; cycles=9 */
    P6DDR = (uint8_t)(0xF9); /* 1011; MOV:G.B #H'F9, @P6DDR; P6DDR = H'F9; refs P6DDR; cycles=9 */
    P6DR = (uint8_t)(0xF1); /* 1016; MOV:G.B #H'F1, @P6DR; P6DR = H'F1; refs P6DR; cycles=9 */
    P7DDR = (uint8_t)(0x00); /* 101B; MOV:G.B #H'00, @P7DDR; P7DDR = H'00; refs P7DDR; cycles=9 */
    P7DR = (uint8_t)(0x00); /* 1020; MOV:G.B #H'00, @P7DR; P7DR = H'00; refs P7DR; cycles=9 */
    P9DDR = (uint8_t)(0x93); /* 1025; MOV:G.B #H'93, @P9DDR; P9DDR = H'93; refs P9DDR; cycles=9 */
    P9DR = (uint8_t)(0x00); /* 102A; MOV:G.B #H'00, @P9DR; P9DR = H'00; refs P9DR; cycles=9 */
    SYSCR1 = (uint8_t)(0x87); /* 102F; MOV:G.B #H'87, @SYSCR1; SYSCR1 = H'87 (IRQ1E=0 IRQ0E=0 NMIEG=0 BRLE=0; P12/P13 are I/O, IRQ0 disabled, IRQ1 disabled); refs SYSCR1; cycles=9 */
    SYSCR2 = (uint8_t)(0x84); /* 1034; MOV:G.B #H'84, @SYSCR2; SYSCR2 = H'84 (IRQ5E=0 IRQ4E=0 IRQ3E=0 IRQ2E=0 P6PWME=1 P9PWME=0 P9SCI2E=0; enabled P6 PWM); SYSCR2 write leaves P9SCI2E=0; SCI2 pins are disabled, so SCI2 is not the traced MAX202 path; traced RS232/MAX202 remains SCI1 P95/P96; refs SYSCR2; cycles=9 */
    FRT1_TCR = (uint8_t)(0x02); /* 1039; MOV:G.B #H'02, @FRT1_TCR; FRT1_TCR = H'02 (ICIE=0 OCIEB=0 OCIEA=0 OVIE=0 OEB=0 OEA=0 CKS1=1 CKS0=0); refs FRT1_TCR; cycles=9 */
    FRT1_TCSR = (uint8_t)(0x01); /* 103E; MOV:G.B #H'01, @FRT1_TCSR; FRT1_TCSR = H'01 (ICF=0 OCFB=0 OCFA=0 OVF=0 OLVLB=0 OLVLA=0 IEDG=0 CCLRA=1); refs FRT1_TCSR; cycles=9 */
    FRT1_FRC_H = zero_extend8_to16(0x00); /* 1043; MOV:G.W #H'00, @FRT1_FRC_H; FRT1_FRC_H = H'00; byte immediate zero-extended into word destination; refs FRT1_FRC_H; FRT1_FRC W write high TEMP access; cycles=9 */
    FRT1_OCRA_H = (uint16_t)(0x009C); /* 1048; MOV:G.W #H'009C, @FRT1_OCRA_H; FRT1_OCRA_H = H'9C; refs FRT1_OCRA_H; FRT1_OCRA W write high TEMP access; cycles=11 */
    FRT2_TCR = (uint8_t)(0x02); /* 104E; MOV:G.B #H'02, @FRT2_TCR; FRT2_TCR = H'02 (ICIE=0 OCIEB=0 OCIEA=0 OVIE=0 OEB=0 OEA=0 CKS1=1 CKS0=0); refs FRT2_TCR; cycles=9 */
    FRT2_TCSR = (uint8_t)(0x01); /* 1053; MOV:G.B #H'01, @FRT2_TCSR; FRT2_TCSR = H'01 (ICF=0 OCFB=0 OCFA=0 OVF=0 OLVLB=0 OLVLA=0 IEDG=0 CCLRA=1); refs FRT2_TCSR; cycles=9 */
    FRT2_FRC_H = zero_extend8_to16(0x00); /* 1058; MOV:G.W #H'00, @FRT2_FRC_H; FRT2_FRC_H = H'00; byte immediate zero-extended into word destination; refs FRT2_FRC_H; FRT2_FRC W write high TEMP access; cycles=11 */
    FRT2_OCRA_H = (uint16_t)(0x7A12); /* 105D; MOV:G.W #H'7A12, @FRT2_OCRA_H; FRT2_OCRA_H = H'7A12; refs FRT2_OCRA_H; FRT2_OCRA W write high TEMP access; cycles=9 */
    FRT3_TCR = (uint8_t)(0x00); /* 1063; MOV:G.B #H'00, @FRT3_TCR; FRT3_TCR = H'00 (ICIE=0 OCIEB=0 OCIEA=0 OVIE=0 OEB=0 OEA=0 CKS1=0 CKS0=0); refs FRT3_TCR; cycles=9 */
    FRT3_TCSR = (uint8_t)(0x00); /* 1068; MOV:G.B #H'00, @FRT3_TCSR; FRT3_TCSR = H'00 (ICF=0 OCFB=0 OCFA=0 OVF=0 OLVLB=0 OLVLA=0 IEDG=0 CCLRA=0); refs FRT3_TCSR; cycles=9 */
    TMR_TCR = (uint8_t)(0x00); /* 106D; MOV:G.B #H'00, @TMR_TCR; TMR_TCR = H'00 (CMIEB=0 CMIEA=0 OVIE=0 CCLR1=0 CCLR0=0 CKS2=0 CKS1=0 CKS0=0); refs TMR_TCR; cycles=9 */
    TMR_TCSR = (uint8_t)(0x10); /* 1072; MOV:G.B #H'10, @TMR_TCSR; TMR_TCSR = H'10 (CMFB=0 CMFA=0 OVF=0 OS3=0 OS2=0 OS1=0 OS0=0); refs TMR_TCSR; cycles=9 */
    PWM1_TCR = (uint8_t)(0x38); /* 1077; MOV:G.B #H'38, @PWM1_TCR; PWM1_TCR = H'38 (OE=0 OS=0 CKS2=0 CKS1=0 CKS0=0); refs PWM1_TCR; cycles=9 */
    PWM1_DTR = (uint8_t)(0xFF); /* 107C; MOV:G.B #H'FF, @PWM1_DTR; PWM1_DTR = H'FF; refs PWM1_DTR; cycles=9 */
    PWM2_TCR = (uint8_t)(0x38); /* 1081; MOV:G.B #H'38, @PWM2_TCR; PWM2_TCR = H'38 (OE=0 OS=0 CKS2=0 CKS1=0 CKS0=0); refs PWM2_TCR; cycles=9 */
    PWM2_DTR = (uint8_t)(0xFF); /* 1086; MOV:G.B #H'FF, @PWM2_DTR; PWM2_DTR = H'FF; refs PWM2_DTR; cycles=9 */
    PWM3_TCR = (uint8_t)(0x3B); /* 108B; MOV:G.B #H'3B, @PWM3_TCR; PWM3_TCR = H'3B (OE=0 OS=0 CKS2=0 CKS1=1 CKS0=1); refs PWM3_TCR; cycles=9 */
    PWM3_DTR = (uint8_t)(0x7D); /* 1090; MOV:G.B #H'7D, @PWM3_DTR; PWM3_DTR = H'7D; refs PWM3_DTR; cycles=9 */
    SCI1_SMR = (uint8_t)(0x24); /* 1095; MOV:G.B #H'24, @SCI1_SMR; SCI1_SMR = H'24 (C/A=0 CHR=0 PE=1 O/E=0 STOP=0 CKS1=0 CKS0=0; SCI async, 8-bit, even parity, 1 stop, clock phi); SCI1 SMR serial init for traced RS232/MAX202 path (H8 pin 66 P95/TXD to MAX202 pin 11; MAX202 pin 12 to H8 pin 67 P96/RXD); refs SCI1_SMR; cycles=9 */
    SCI1_SCR = (uint8_t)(0x3C); /* 109A; MOV:G.B #H'3C, @SCI1_SCR; SCI1_SCR = H'3C (TIE=0 RIE=0 TE=1 RE=1 CKE1=0 CKE0=0; SCI enables TX,RX, internal clock); disable SCI1 TX interrupt (TIE); gates TXI when hardware sets TDRE; disable SCI1 receive and receive-error interrupts (RIE); enable SCI1 transmitter (TE); enable SCI1 receiver (RE); SCI1 SCR write TE=1 RE=1; TE/RE select the traced RS232/MAX202 pins (P95/TXD pin 66 to MAX202 pin 11, P96/RXD pin 67 to MAX202 pin 12); refs SCI1_SCR; cycles=9 */
    SCI1_BRR = (uint8_t)(0x07); /* 109F; MOV:G.B #H'07, @SCI1_BRR; SCI1_BRR = H'07; SCI1 async 8-bit even parity 1 stop BRR N=7 CKS n=0; baud needs --clock-hz; SCI1 BRR serial init for traced RS232/MAX202 path (H8 pin 66 P95/TXD to MAX202 pin 11; MAX202 pin 12 to H8 pin 67 P96/RXD); refs SCI1_BRR; cycles=9 */
    SCI2_SMR = (uint8_t)(0x24); /* 10A4; MOV:G.B #H'24, @SCI2_SMR; SCI2_SMR = H'24 (C/A=0 CHR=0 PE=1 O/E=0 STOP=0 CKS1=0 CKS0=0; SCI async, 8-bit, even parity, 1 stop, clock phi); SCI2 SMR write; not the traced MAX202 path; P9SCI2E=0 disables SCI2 pins P92/P93/P94, while the board trace is SCI1 P95/P96; refs SCI2_SMR; cycles=9 */
    SCI2_SCR = (uint8_t)(0x0C); /* 10A9; MOV:G.B #H'0C, @SCI2_SCR; SCI2_SCR = H'0C (TIE=0 RIE=0 TE=0 RE=0 CKE1=0 CKE0=0; SCI enables none, internal clock); disable SCI2 TX interrupt (TIE); gates TXI when hardware sets TDRE; disable SCI2 receive and receive-error interrupts (RIE); disable SCI2 transmitter (TE); disable SCI2 receiver (RE); SCI2 SCR write; not the traced MAX202 path; P9SCI2E=0 disables SCI2 pins P92/P93/P94, while the board trace is SCI1 P95/P96; refs SCI2_SCR; cycles=9 */
    SCI2_BRR = (uint8_t)(0x07); /* 10AE; MOV:G.B #H'07, @SCI2_BRR; SCI2_BRR = H'07; SCI2 async 8-bit even parity 1 stop BRR N=7 CKS n=0; baud needs --clock-hz; SCI2 BRR write; not the traced MAX202 path; P9SCI2E=0 disables SCI2 pins P92/P93/P94, while the board trace is SCI1 P95/P96; refs SCI2_BRR; cycles=9 */
    ADCSR = (uint8_t)(0x19); /* 10B3; MOV:G.B #H'19, @ADCSR; ADCSR = H'19 (ADF=0 ADIE=0 ADST=0 SCAN=1 CKS=1 CH2=0 CH1=0 CH0=1; A/D halt, scan AN0-AN1, 138-state max, ADI disabled); refs ADCSR; cycles=9 */
    MEM8[0xFEE9] = (uint8_t)(0x7F); /* 10B8; MOV:G.B #H'7F, @H'FEE9; cycles=9 */
    WCR = (uint8_t)(0xF0); /* 10BD; MOV:G.B #H'F0, @WCR; WCR = H'F0 (WMS1=0 WMS0=0 WC1=0 WC0=0; programmable wait, 0 waits); refs WCR; cycles=9 */
    RAMCR = (uint8_t)(0xFF); /* 10C2; MOV:G.B #H'FF, @RAMCR; RAMCR = H'FF (RAME=1; on-chip RAM enabled); refs RAMCR; cycles=9 */
    P1DR &= ~BIT(7); /* 10C7; BCLR.B #7, @P1DR; clear bit 7 of P1DR; refs P1DR; cycles=8 */
    goto loc_3F76; /* 10CB; BRA loc_3F76; cycles=8 */
}

void loc_10CE(void)
{
    R4 = (uint16_t)(0x0040); /* 10CE; MOV:I.W #H'0040, R4; dataflow R4=0x0040; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 10D1; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 10D4; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 10D7; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 10DA; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 10DD; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 10E0; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 10E3; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 10E6; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 10E9; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 10EC; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 10EF; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0207); /* 10F2; MOV:I.W #H'0207, R4; dataflow R4=0x0207; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 10F5; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 10F8; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0204); /* 10FB; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 10FE; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1101; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0204); /* 1104; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1107; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 110A; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0204); /* 110D; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1110; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1113; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0204); /* 1116; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1119; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 111C; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0048); /* 111F; MOV:I.W #H'0048, R4; dataflow R4=0x0048; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1122; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1125; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 1128; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 112B; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 112E; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 1131; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1134; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1137; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 113A; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 113D; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1140; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x021B); /* 1143; MOV:I.W #H'021B, R4; dataflow R4=0x021B; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1146; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1149; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 114C; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 114F; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1152; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 1155; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1158; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 115B; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 115E; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1161; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1164; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 1167; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 116A; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 116D; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0050); /* 1170; MOV:I.W #H'0050, R4; dataflow R4=0x0050; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1173; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1176; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 1179; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 117C; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 117F; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 1182; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1185; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1188; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 118B; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 118E; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1191; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x021C); /* 1194; MOV:I.W #H'021C, R4; dataflow R4=0x021C; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1197; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 119A; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0204); /* 119D; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 11A0; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 11A3; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0204); /* 11A6; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 11A9; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 11AC; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0204); /* 11AF; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 11B2; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 11B5; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0204); /* 11B8; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 11BB; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 11BE; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0058); /* 11C1; MOV:I.W #H'0058, R4; dataflow R4=0x0058; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 11C4; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 11C7; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0204); /* 11CA; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 11CD; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 11D0; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0204); /* 11D3; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 11D6; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 11D9; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0204); /* 11DC; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 11DF; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 11E2; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0207); /* 11E5; MOV:I.W #H'0207, R4; dataflow R4=0x0207; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 11E8; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 11EB; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 11EE; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 11F1; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 11F4; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 11F7; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 11FA; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 11FD; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 1200; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1203; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1206; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 1209; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 120C; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 120F; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0060); /* 1212; MOV:I.W #H'0060, R4; dataflow R4=0x0060; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1215; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1218; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 121B; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 121E; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1221; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 1224; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1227; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 122A; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 122D; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1230; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1233; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x021B); /* 1236; MOV:I.W #H'021B, R4; dataflow R4=0x021B; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1239; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 123C; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 123F; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1242; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1245; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 1248; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 124B; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 124E; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 1251; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1254; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1257; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 125A; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 125D; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1260; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0068); /* 1263; MOV:I.W #H'0068, R4; dataflow R4=0x0068; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1266; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1269; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0204); /* 126C; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 126F; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1272; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0204); /* 1275; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1278; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 127B; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0204); /* 127E; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1281; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1284; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x021C); /* 1287; MOV:I.W #H'021C, R4; dataflow R4=0x021C; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 128A; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 128D; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 1290; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1293; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1296; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 1299; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 129C; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 129F; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 12A2; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 12A5; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 12A8; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 12AB; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 12AE; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 12B1; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0070); /* 12B4; MOV:I.W #H'0070, R4; dataflow R4=0x0070; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 12B7; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 12BA; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0204); /* 12BD; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 12C0; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 12C3; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0204); /* 12C6; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 12C9; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 12CC; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 12CF; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 12D2; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 12D5; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0204); /* 12D8; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 12DB; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 12DE; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0204); /* 12E1; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 12E4; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 12E7; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 12EA; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 12ED; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 12F0; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0204); /* 12F3; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 12F6; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 12F9; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0204); /* 12FC; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 12FF; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1302; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0078); /* 1305; MOV:I.W #H'0078, R4; dataflow R4=0x0078; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1308; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 130B; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0204); /* 130E; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1311; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1314; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0204); /* 1317; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 131A; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 131D; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0200); /* 1320; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1323; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1326; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0204); /* 1329; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 132C; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 132F; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0204); /* 1332; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1335; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1338; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0200); /* 133B; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 133E; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1341; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x0204); /* 1344; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1347; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 134A; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0204); /* 134D; MOV:I.W #H'0204, R4; dataflow R4=0x0204; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 1350; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 1353; BSR loc_3ECC; cycles=14 */
    return; /* 1356; RTS; cycles=12 */
}

void loc_15E0(void)
{
    loc_2650(); /* 15E0; BSR loc_2650; cycles=13 */
    MEM8[0xF689] &= ~BIT(7); /* 15E3; BCLR.B #7, @H'F689; refs ram_F689; cycles=8 */
    if (!Z) { /* 15E7; BEQ loc_15F9; cycles=3/8 nt/t */
        R1 = (uint16_t)(MEM16[0xF68E]); /* 15E9; MOV:G.W @H'F68E, R1; refs ram_F68E; cycles=6 */
        MEM16[0xE902] = (uint16_t)(R1); /* 15ED; MOV:G.W R1, @H'E902; refs mem_E902; cycles=6 */
        R2 = (uint8_t)(0x80); /* 15F1; MOV:E.B #H'80, R2; dataflow R2=0x80; cycles=2 */
        R3 = (uint16_t)(0x0081); /* 15F3; MOV:I.W #H'0081, R3; dataflow R3=0x0081; cycles=3 */
        loc_3E54(); /* 15F6; BSR loc_3E54; cycles=13 */
    }
    set_flags_tst8(MEM8[0xF6F0]); /* 15F9; TST.B @H'F6F0; refs ram_F6F0; cycles=6 */
    if (Z) goto loc_163D; /* 15FD; BEQ loc_163D; cycles=3/8 nt/t */
    MEM8[0xF6F0] &= ~BIT(7); /* 15FF; BCLR.B #7, @H'F6F0; refs ram_F6F0; cycles=8 */
    if (!Z) { /* 1603; BEQ loc_1608; cycles=3/8 nt/t */
        loc_4394(); /* 1605; JSR @loc_4394; cycles=14 */
    }
    MEM8[0xF6F0] &= ~BIT(6); /* 1608; BCLR.B #6, @H'F6F0; refs ram_F6F0; cycles=9 */
    if (!Z) { /* 160C; BEQ loc_1611; cycles=3/7 nt/t */
        loc_4457(); /* 160E; JSR @loc_4457; cycles=13 */
    }
    MEM8[0xF6F0] &= ~BIT(5); /* 1611; BCLR.B #5, @H'F6F0; refs ram_F6F0; cycles=8 */
    if (!Z) { /* 1615; BEQ loc_161A; cycles=3/8 nt/t */
        loc_451A(); /* 1617; JSR @loc_451A; cycles=14 */
    }
    MEM8[0xF6F0] &= ~BIT(4); /* 161A; BCLR.B #4, @H'F6F0; refs ram_F6F0; cycles=9 */
    MEM8[0xF6F0] &= ~BIT(3); /* 161E; BCLR.B #3, @H'F6F0; refs ram_F6F0; cycles=9 */
    if (!Z) { /* 1622; BEQ loc_1627; cycles=3/7 nt/t */
        loc_1705(); /* 1624; JSR @loc_1705; cycles=13 */
    }
    MEM8[0xF6F0] &= ~BIT(2); /* 1627; BCLR.B #2, @H'F6F0; refs ram_F6F0; cycles=8 */
    if (!Z) { /* 162B; BEQ loc_1630; cycles=3/8 nt/t */
        loc_174D(); /* 162D; JSR @loc_174D; cycles=14 */
    }
    MEM8[0xF6F0] &= ~BIT(1); /* 1630; BCLR.B #1, @H'F6F0; refs ram_F6F0; cycles=9 */
    if (!Z) { /* 1634; BEQ loc_1639; cycles=3/7 nt/t */
        loc_1795(); /* 1636; JSR @loc_1795; cycles=13 */
    }
    MEM8[0xF6F0] &= ~BIT(0); /* 1639; BCLR.B #0, @H'F6F0; refs ram_F6F0; cycles=8 */
loc_163D:
    set_flags_tst8(MEM8[0xF6F1]); /* 163D; TST.B @H'F6F1; refs ram_F6F1; cycles=6 */
    if (Z) goto loc_1686; /* 1641; BEQ loc_1686; cycles=3/8 nt/t */
    MEM8[0xF6F1] &= ~BIT(7); /* 1643; BCLR.B #7, @H'F6F1; refs ram_F6F1; cycles=8 */
    if (!Z) { /* 1647; BEQ loc_164C; cycles=3/8 nt/t */
        loc_17C9(); /* 1649; JSR @loc_17C9; cycles=14 */
    }
    MEM8[0xF6F1] &= ~BIT(6); /* 164C; BCLR.B #6, @H'F6F1; refs ram_F6F1; cycles=9 */
    if (!Z) { /* 1650; BEQ loc_1655; cycles=3/7 nt/t */
        loc_17FB(); /* 1652; JSR @loc_17FB; cycles=13 */
    }
    MEM8[0xF6F1] &= ~BIT(5); /* 1655; BCLR.B #5, @H'F6F1; refs ram_F6F1; cycles=8 */
    if (!Z) { /* 1659; BEQ loc_165E; cycles=3/8 nt/t */
        loc_182D(); /* 165B; JSR @loc_182D; cycles=14 */
    }
    MEM8[0xF6F1] &= ~BIT(4); /* 165E; BCLR.B #4, @H'F6F1; refs ram_F6F1; cycles=9 */
    if (!Z) { /* 1662; BEQ loc_1667; cycles=3/7 nt/t */
        loc_1891(); /* 1664; JSR @loc_1891; cycles=13 */
    }
    MEM8[0xF6F1] &= ~BIT(3); /* 1667; BCLR.B #3, @H'F6F1; refs ram_F6F1; cycles=8 */
    if (!Z) { /* 166B; BEQ loc_1670; cycles=3/8 nt/t */
        loc_18E7(); /* 166D; JSR @loc_18E7; cycles=14 */
    }
    MEM8[0xF6F1] &= ~BIT(2); /* 1670; BCLR.B #2, @H'F6F1; refs ram_F6F1; cycles=9 */
    if (!Z) { /* 1674; BEQ loc_1679; cycles=3/7 nt/t */
        loc_194A(); /* 1676; JSR @loc_194A; cycles=13 */
    }
    MEM8[0xF6F1] &= ~BIT(1); /* 1679; BCLR.B #1, @H'F6F1; refs ram_F6F1; cycles=8 */
    if (!Z) { /* 167D; BEQ loc_1682; cycles=3/8 nt/t */
        loc_1979(); /* 167F; JSR @loc_1979; cycles=14 */
    }
    MEM8[0xF6F1] &= ~BIT(0); /* 1682; BCLR.B #0, @H'F6F1; refs ram_F6F1; cycles=9 */
loc_1686:
    set_flags_tst8(MEM8[0xF6F2]); /* 1686; TST.B @H'F6F2; refs ram_F6F2; cycles=7 */
    if (Z) goto loc_16D4; /* 168A; BEQ loc_16D4; cycles=3/7 nt/t */
    MEM8[0xF6F2] &= ~BIT(7); /* 168C; BCLR.B #7, @H'F6F2; refs ram_F6F2; cycles=9 */
    if (!Z) { /* 1690; BEQ loc_1695; cycles=3/7 nt/t */
        loc_1B2D(); /* 1692; JSR @loc_1B2D; cycles=13 */
    }
    MEM8[0xF6F2] &= ~BIT(6); /* 1695; BCLR.B #6, @H'F6F2; refs ram_F6F2; cycles=8 */
    if (!Z) { /* 1699; BEQ loc_169E; cycles=3/8 nt/t */
        loc_1B44(); /* 169B; JSR @loc_1B44; cycles=14 */
    }
    MEM8[0xF6F2] &= ~BIT(5); /* 169E; BCLR.B #5, @H'F6F2; refs ram_F6F2; cycles=9 */
    if (!Z) { /* 16A2; BEQ loc_16A7; cycles=3/7 nt/t */
        loc_1B5B(); /* 16A4; JSR @loc_1B5B; cycles=13 */
    }
    MEM8[0xF6F2] &= ~BIT(4); /* 16A7; BCLR.B #4, @H'F6F2; refs ram_F6F2; cycles=8 */
    if (!Z) { /* 16AB; BEQ loc_16B0; cycles=3/8 nt/t */
        loc_1BA0(); /* 16AD; JSR @loc_1BA0; cycles=14 */
    }
    MEM8[0xF6F2] &= ~BIT(3); /* 16B0; BCLR.B #3, @H'F6F2; refs ram_F6F2; cycles=9 */
    if (!Z) { /* 16B4; BEQ loc_16B9; cycles=3/7 nt/t */
        loc_1BB6(); /* 16B6; JSR @loc_1BB6; cycles=13 */
    }
    MEM8[0xF6F2] &= ~BIT(2); /* 16B9; BCLR.B #2, @H'F6F2; refs ram_F6F2; cycles=8 */
    if (!Z) { /* 16BD; BEQ loc_16C2; cycles=3/8 nt/t */
        loc_1BCC(); /* 16BF; JSR @loc_1BCC; cycles=14 */
    }
    MEM8[0xF6F2] &= ~BIT(1); /* 16C2; BCLR.B #1, @H'F6F2; refs ram_F6F2; cycles=9 */
    if (!Z) { /* 16C6; BEQ loc_16CB; cycles=3/7 nt/t */
        loc_1B72(); /* 16C8; JSR @loc_1B72; cycles=13 */
    }
    MEM8[0xF6F2] &= ~BIT(0); /* 16CB; BCLR.B #0, @H'F6F2; refs ram_F6F2; cycles=8 */
    if (Z) goto loc_16D4; /* 16CF; BEQ loc_16D4; cycles=3/8 nt/t */
    loc_1B89(); /* 16D1; JSR @loc_1B89; cycles=14 */
loc_16D4:
    set_flags_tst8(MEM8[0xF6F3]); /* 16D4; TST.B @H'F6F3; refs ram_F6F3; cycles=7 */
    if (Z) goto loc_1704; /* 16D8; BEQ loc_1704; cycles=3/7 nt/t */
    MEM8[0xF6F3] &= ~BIT(7); /* 16DA; BCLR.B #7, @H'F6F3; refs ram_F6F3; cycles=9 */
    MEM8[0xF6F3] &= ~BIT(6); /* 16DE; BCLR.B #6, @H'F6F3; refs ram_F6F3; cycles=9 */
    MEM8[0xF6F3] &= ~BIT(5); /* 16E2; BCLR.B #5, @H'F6F3; refs ram_F6F3; cycles=9 */
    MEM8[0xF6F3] &= ~BIT(4); /* 16E6; BCLR.B #4, @H'F6F3; refs ram_F6F3; cycles=9 */
    if (!Z) { /* 16EA; BEQ loc_16EF; cycles=3/7 nt/t */
        loc_1BE2(); /* 16EC; JSR @loc_1BE2; cycles=13 */
    }
    MEM8[0xF6F3] &= ~BIT(3); /* 16EF; BCLR.B #3, @H'F6F3; refs ram_F6F3; cycles=8 */
    if (!Z) { /* 16F3; BEQ loc_16F8; cycles=3/8 nt/t */
        loc_1BF8(); /* 16F5; JSR @loc_1BF8; cycles=14 */
    }
    MEM8[0xF6F3] &= ~BIT(2); /* 16F8; BCLR.B #2, @H'F6F3; refs ram_F6F3; cycles=9 */
    MEM8[0xF6F3] &= ~BIT(1); /* 16FC; BCLR.B #1, @H'F6F3; refs ram_F6F3; cycles=9 */
    MEM8[0xF6F3] &= ~BIT(0); /* 1700; BCLR.B #0, @H'F6F3; refs ram_F6F3; cycles=9 */
loc_1704:
    return; /* 1704; RTS; cycles=12 */
}

void loc_1705(void)
{
    set_flags_cmp8(MEM8[0xF731], 0x02); /* 1705; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
    if (!C && !Z) goto loc_1744; /* 170A; BHI loc_1744; cycles=3/7 nt/t */
    set_flags_btst(MEM16[0xE14E], 15); /* 170C; BTST.W #15, @H'E14E; refs mem_E14E; cycles=7 */
    if (!Z) goto loc_1736; /* 1710; BNE loc_1736; cycles=3/7 nt/t */
    set_flags_btst(MEM8[0xF730], 6); /* 1712; BTST.B #6, @H'F730; refs ram_F730; cycles=7 */
    if (!Z) goto loc_1736; /* 1716; BNE loc_1736; cycles=3/7 nt/t */
    MEM8[0xFB03] |= BIT(7); /* 1718; BSET.B #7, @H'FB03; refs ram_FB03; cycles=9 */
    if (Z) { /* 171C; BNE loc_1726; cycles=3/7 nt/t */
        R1 = (uint16_t)(MEM16[0xF732]); /* 171E; MOV:G.W @H'F732, R1; refs ram_F732; cycles=7 */
        MEM16[0xF734] = (uint16_t)(R1); /* 1722; MOV:G.W R1, @H'F734; refs ram_F734; cycles=7 */
    }
    MEM16[0xF732] = (uint16_t)(0x1C07); /* 1726; MOV:G.W #H'1C07, @H'F732; refs ram_F732; cycles=11 */
    MEM8[0xFB02] = (uint8_t)(0x14); /* 172C; MOV:G.B #H'14, @H'FB02; refs ram_FB02; cycles=9 */
    loc_48FA(); /* 1731; BSR loc_48FA; cycles=14 */
    goto loc_1744; /* 1734; BRA loc_1744; cycles=7 */
loc_1736:
    R4 = (uint16_t)(MEM16[0xF696]); /* 1736; MOV:G.W @H'F696, R4; refs ram_F696; cycles=7 */
    R4 -= (uint16_t)(MEM16[0xF6B6]); /* 173A; SUB.W @H'F6B6, R4; refs ram_F6B6; cycles=7 */
    R3 = (uint16_t)(0x00A9); /* 173E; MOV:I.W #H'00A9, R3; dataflow R3=0x00A9; cycles=3 */
    loc_19A2(); /* 1741; BSR loc_19A2; cycles=14 */
loc_1744:
    R4 = (uint16_t)(MEM16[0xF696]); /* 1744; MOV:G.W @H'F696, R4; refs ram_F696; cycles=7 */
    MEM16[0xF6B6] = (uint16_t)(R4); /* 1748; MOV:G.W R4, @H'F6B6; refs ram_F6B6; cycles=7 */
    return; /* 174C; RTS; cycles=12 */
}

void loc_174D(void)
{
    set_flags_cmp8(MEM8[0xF731], 0x02); /* 174D; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
    if (!C && !Z) goto loc_178C; /* 1752; BHI loc_178C; cycles=3/7 nt/t */
    set_flags_btst(MEM8[0xF730], 7); /* 1754; BTST.B #7, @H'F730; refs ram_F730; cycles=7 */
    if (Z) goto loc_178C; /* 1758; BEQ loc_178C; cycles=3/7 nt/t */
    set_flags_btst(MEM16[0xE16E], 13); /* 175A; BTST.W #13, @H'E16E; refs mem_E16E; cycles=7 */
    if (!Z) goto loc_177E; /* 175E; BNE loc_177E; cycles=3/7 nt/t */
    MEM8[0xFB03] |= BIT(7); /* 1760; BSET.B #7, @H'FB03; refs ram_FB03; cycles=9 */
    if (Z) { /* 1764; BNE loc_176E; cycles=3/7 nt/t */
        R1 = (uint16_t)(MEM16[0xF732]); /* 1766; MOV:G.W @H'F732, R1; refs ram_F732; cycles=7 */
        MEM16[0xF734] = (uint16_t)(R1); /* 176A; MOV:G.W R1, @H'F734; refs ram_F734; cycles=7 */
    }
    MEM16[0xF732] = (uint16_t)(0x1C06); /* 176E; MOV:G.W #H'1C06, @H'F732; refs ram_F732; cycles=11 */
    MEM8[0xFB02] = (uint8_t)(0x14); /* 1774; MOV:G.B #H'14, @H'FB02; refs ram_FB02; cycles=9 */
    loc_48FA(); /* 1779; BSR loc_48FA; cycles=14 */
    goto loc_178C; /* 177C; BRA loc_178C; cycles=7 */
loc_177E:
    R4 = (uint16_t)(MEM16[0xF694]); /* 177E; MOV:G.W @H'F694, R4; refs ram_F694; cycles=7 */
    R4 -= (uint16_t)(MEM16[0xF6B4]); /* 1782; SUB.W @H'F6B4, R4; refs ram_F6B4; cycles=7 */
    R3 = (uint16_t)(0x00C5); /* 1786; MOV:I.W #H'00C5, R3; dataflow R3=0x00C5; cycles=3 */
    loc_19A2(); /* 1789; BSR loc_19A2; cycles=14 */
loc_178C:
    R4 = (uint16_t)(MEM16[0xF694]); /* 178C; MOV:G.W @H'F694, R4; refs ram_F694; cycles=7 */
    MEM16[0xF6B4] = (uint16_t)(R4); /* 1790; MOV:G.W R4, @H'F6B4; refs ram_F6B4; cycles=7 */
    return; /* 1794; RTS; cycles=12 */
}

void loc_1795(void)
{
    set_flags_cmp8(MEM8[0xF731], 0x02); /* 1795; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
    if (!C && !Z) goto loc_17C0; /* 179A; BHI loc_17C0; cycles=3/7 nt/t */
    set_flags_btst(MEM16[0xE172], 13); /* 179C; BTST.W #13, @H'E172; refs mem_E172; cycles=7 */
    if (!Z) goto loc_17A7; /* 17A0; BNE loc_17A7; cycles=3/7 nt/t */
    loc_2127(); /* 17A2; BSR loc_2127; cycles=13 */
    goto loc_17C0; /* 17A5; BRA loc_17C0; cycles=8 */
loc_17A7:
    set_flags_btst(MEM16[0xE220], 15); /* 17A7; BTST.W #15, @H'E220; refs mem_E220; cycles=6 */
    if (Z) goto loc_17B2; /* 17AB; BEQ loc_17B2; cycles=3/8 nt/t */
    loc_2127(); /* 17AD; BSR loc_2127; cycles=14 */
    goto loc_17C0; /* 17B0; BRA loc_17C0; cycles=7 */
loc_17B2:
    R4 = (uint16_t)(MEM16[0xF692]); /* 17B2; MOV:G.W @H'F692, R4; refs ram_F692; cycles=7 */
    R4 -= (uint16_t)(MEM16[0xF6B2]); /* 17B6; SUB.W @H'F6B2, R4; refs ram_F6B2; cycles=7 */
    R3 = (uint16_t)(0x00BC); /* 17BA; MOV:I.W #H'00BC, R3; dataflow R3=0x00BC; cycles=3 */
    loc_19A2(); /* 17BD; BSR loc_19A2; cycles=14 */
loc_17C0:
    R4 = (uint16_t)(MEM16[0xF692]); /* 17C0; MOV:G.W @H'F692, R4; refs ram_F692; cycles=7 */
    MEM16[0xF6B2] = (uint16_t)(R4); /* 17C4; MOV:G.W R4, @H'F6B2; refs ram_F6B2; cycles=7 */
    return; /* 17C8; RTS; cycles=12 */
}

void loc_17C9(void)
{
    set_flags_cmp8(MEM8[0xF731], 0x02); /* 17C9; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
    if (!C && !Z) goto loc_17F2; /* 17CE; BHI loc_17F2; cycles=3/7 nt/t */
    set_flags_btst(MEM16[0xE126], 12); /* 17D0; BTST.W #12, @H'E126; refs mem_E126; cycles=7 */
    if (Z) goto loc_17F2; /* 17D4; BEQ loc_17F2; cycles=3/7 nt/t */
    R4 = (uint16_t)(MEM16[0xF6AE]); /* 17D6; MOV:G.W @H'F6AE, R4; refs ram_F6AE; cycles=7 */
    R4 -= (uint16_t)(MEM16[0xF6CE]); /* 17DA; SUB.W @H'F6CE, R4; refs ram_F6CE; cycles=7 */
    R3 = (uint16_t)(0x00A3); /* 17DE; MOV:I.W #H'00A3, R3; dataflow R3=0x00A3; cycles=3 */
    set_flags_btst(MEM8[0xF791], 7); /* 17E1; BTST.B #7, @H'F791; refs ram_F791; cycles=6 */
    if (Z) goto loc_17EF; /* 17E5; BEQ loc_17EF; cycles=3/8 nt/t */
    set_flags_btst(MEM8[0xF404], 3); /* 17E7; BTST.B #3, @H'F404; refs mem_F404; cycles=6 */
    if (Z) goto loc_17EF; /* 17EB; BEQ loc_17EF; cycles=3/8 nt/t */
    R3 |= BIT(14); /* 17ED; BSET.W #14, R3; cycles=3 */
loc_17EF:
    loc_19A2(); /* 17EF; BSR loc_19A2; cycles=14 */
loc_17F2:
    R4 = (uint16_t)(MEM16[0xF6AE]); /* 17F2; MOV:G.W @H'F6AE, R4; refs ram_F6AE; cycles=7 */
    MEM16[0xF6CE] = (uint16_t)(R4); /* 17F6; MOV:G.W R4, @H'F6CE; refs ram_F6CE; cycles=7 */
    return; /* 17FA; RTS; cycles=12 */
}

void loc_17FB(void)
{
    set_flags_cmp8(MEM8[0xF731], 0x02); /* 17FB; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
    if (!C && !Z) goto loc_1824; /* 1800; BHI loc_1824; cycles=3/7 nt/t */
    set_flags_btst(MEM16[0xE126], 12); /* 1802; BTST.W #12, @H'E126; refs mem_E126; cycles=7 */
    if (Z) goto loc_1824; /* 1806; BEQ loc_1824; cycles=3/7 nt/t */
    R4 = (uint16_t)(MEM16[0xF6AC]); /* 1808; MOV:G.W @H'F6AC, R4; refs ram_F6AC; cycles=7 */
    R4 -= (uint16_t)(MEM16[0xF6CC]); /* 180C; SUB.W @H'F6CC, R4; refs ram_F6CC; cycles=7 */
    R3 = (uint16_t)(0x00A4); /* 1810; MOV:I.W #H'00A4, R3; dataflow R3=0x00A4; cycles=3 */
    set_flags_btst(MEM8[0xF791], 7); /* 1813; BTST.B #7, @H'F791; refs ram_F791; cycles=6 */
    if (Z) goto loc_1821; /* 1817; BEQ loc_1821; cycles=3/8 nt/t */
    set_flags_btst(MEM8[0xF404], 3); /* 1819; BTST.B #3, @H'F404; refs mem_F404; cycles=6 */
    if (Z) goto loc_1821; /* 181D; BEQ loc_1821; cycles=3/8 nt/t */
    R3 |= BIT(14); /* 181F; BSET.W #14, R3; cycles=3 */
loc_1821:
    loc_19A2(); /* 1821; BSR loc_19A2; cycles=14 */
loc_1824:
    R4 = (uint16_t)(MEM16[0xF6AC]); /* 1824; MOV:G.W @H'F6AC, R4; refs ram_F6AC; cycles=7 */
    MEM16[0xF6CC] = (uint16_t)(R4); /* 1828; MOV:G.W R4, @H'F6CC; refs ram_F6CC; cycles=7 */
    return; /* 182C; RTS; cycles=12 */
}

void loc_182D(void)
{
    set_flags_btst(MEM8[0xF717], 2); /* 182D; BTST.B #2, @H'F717; refs ram_F717; cycles=6 */
    if (!Z) goto loc_1865; /* 1831; BNE loc_1865; cycles=3/8 nt/t */
    set_flags_cmp8(MEM8[0xF731], 0x02); /* 1833; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
    if (!C && !Z) goto loc_185C; /* 1838; BHI loc_185C; cycles=3/7 nt/t */
    set_flags_btst(MEM16[0xE126], 5); /* 183A; BTST.W #5, @H'E126; refs mem_E126; cycles=7 */
    if (Z) goto loc_185C; /* 183E; BEQ loc_185C; cycles=3/7 nt/t */
    R4 = (uint16_t)(MEM16[0xF6AA]); /* 1840; MOV:G.W @H'F6AA, R4; refs ram_F6AA; cycles=7 */
    R4 -= (uint16_t)(MEM16[0xF6CA]); /* 1844; SUB.W @H'F6CA, R4; refs ram_F6CA; cycles=7 */
    R3 = (uint16_t)(0x00A5); /* 1848; MOV:I.W #H'00A5, R3; dataflow R3=0x00A5; cycles=3 */
    set_flags_btst(MEM8[0xF791], 7); /* 184B; BTST.B #7, @H'F791; refs ram_F791; cycles=6 */
    if (Z) goto loc_1859; /* 184F; BEQ loc_1859; cycles=3/8 nt/t */
    set_flags_btst(MEM8[0xF404], 2); /* 1851; BTST.B #2, @H'F404; refs mem_F404; cycles=6 */
    if (Z) goto loc_1859; /* 1855; BEQ loc_1859; cycles=3/8 nt/t */
    R3 |= BIT(14); /* 1857; BSET.W #14, R3; cycles=3 */
loc_1859:
    loc_19A2(); /* 1859; BSR loc_19A2; cycles=14 */
loc_185C:
    R4 = (uint16_t)(MEM16[0xF6AA]); /* 185C; MOV:G.W @H'F6AA, R4; refs ram_F6AA; cycles=7 */
    MEM16[0xF6CA] = (uint16_t)(R4); /* 1860; MOV:G.W R4, @H'F6CA; refs ram_F6CA; cycles=7 */
    return; /* 1864; RTS; cycles=12 */
}

void loc_1891(void)
{
    set_flags_btst(MEM8[0xF717], 2); /* 1891; BTST.B #2, @H'F717; refs ram_F717; cycles=6 */
    if (!Z) goto loc_18BB; /* 1895; BNE loc_18BB; cycles=3/8 nt/t */
    set_flags_cmp8(MEM8[0xF731], 0x02); /* 1897; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
    if (!C && !Z) goto loc_18B2; /* 189C; BHI loc_18B2; cycles=3/7 nt/t */
    set_flags_btst(MEM16[0xE126], 5); /* 189E; BTST.W #5, @H'E126; refs mem_E126; cycles=7 */
    if (Z) goto loc_18B2; /* 18A2; BEQ loc_18B2; cycles=3/7 nt/t */
    R4 = (uint16_t)(MEM16[0xF6A8]); /* 18A4; MOV:G.W @H'F6A8, R4; refs ram_F6A8; cycles=7 */
    R4 -= (uint16_t)(MEM16[0xF6C8]); /* 18A8; SUB.W @H'F6C8, R4; refs ram_F6C8; cycles=7 */
    R3 = (uint16_t)(0x0080); /* 18AC; MOV:I.W #H'0080, R3; dataflow R3=0x0080; cycles=3 */
    loc_19A2(); /* 18AF; BSR loc_19A2; cycles=14 */
loc_18B2:
    R4 = (uint16_t)(MEM16[0xF6A8]); /* 18B2; MOV:G.W @H'F6A8, R4; refs ram_F6A8; cycles=7 */
    MEM16[0xF6C8] = (uint16_t)(R4); /* 18B6; MOV:G.W R4, @H'F6C8; refs ram_F6C8; cycles=7 */
    return; /* 18BA; RTS; cycles=12 */
}

void loc_18E7(void)
{
    set_flags_btst(MEM8[0xF717], 2); /* 18E7; BTST.B #2, @H'F717; refs ram_F717; cycles=6 */
    if (!Z) goto loc_191F; /* 18EB; BNE loc_191F; cycles=3/8 nt/t */
    set_flags_cmp8(MEM8[0xF731], 0x02); /* 18ED; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
    if (!C && !Z) goto loc_1916; /* 18F2; BHI loc_1916; cycles=3/7 nt/t */
    set_flags_btst(MEM16[0xE126], 5); /* 18F4; BTST.W #5, @H'E126; refs mem_E126; cycles=7 */
    if (Z) goto loc_1916; /* 18F8; BEQ loc_1916; cycles=3/7 nt/t */
    R4 = (uint16_t)(MEM16[0xF6A6]); /* 18FA; MOV:G.W @H'F6A6, R4; refs ram_F6A6; cycles=7 */
    R4 -= (uint16_t)(MEM16[0xF6C6]); /* 18FE; SUB.W @H'F6C6, R4; refs ram_F6C6; cycles=7 */
    R3 = (uint16_t)(0x00A6); /* 1902; MOV:I.W #H'00A6, R3; dataflow R3=0x00A6; cycles=3 */
    set_flags_btst(MEM8[0xF791], 7); /* 1905; BTST.B #7, @H'F791; refs ram_F791; cycles=6 */
    if (Z) goto loc_1913; /* 1909; BEQ loc_1913; cycles=3/8 nt/t */
    set_flags_btst(MEM8[0xF404], 2); /* 190B; BTST.B #2, @H'F404; refs mem_F404; cycles=6 */
    if (Z) goto loc_1913; /* 190F; BEQ loc_1913; cycles=3/8 nt/t */
    R3 |= BIT(14); /* 1911; BSET.W #14, R3; cycles=3 */
loc_1913:
    loc_19A2(); /* 1913; BSR loc_19A2; cycles=14 */
loc_1916:
    R4 = (uint16_t)(MEM16[0xF6A6]); /* 1916; MOV:G.W @H'F6A6, R4; refs ram_F6A6; cycles=7 */
    MEM16[0xF6C6] = (uint16_t)(R4); /* 191A; MOV:G.W R4, @H'F6C6; refs ram_F6C6; cycles=7 */
    return; /* 191E; RTS; cycles=12 */
}

void loc_194A(void)
{
    set_flags_cmp8(MEM8[0xF731], 0x03); /* 194A; CMP:G.B #H'03, @H'F731; refs ram_F731; cycles=7 */
    if (!C && !Z) goto loc_1970; /* 194F; BHI loc_1970; cycles=3/8 nt/t */
    R4 = (uint16_t)(MEM16[0xF6A4]); /* 1951; MOV:G.W @H'F6A4, R4; refs ram_F6A4; cycles=6 */
    R4 -= (uint16_t)(MEM16[0xF6C4]); /* 1955; SUB.W @H'F6C4, R4; refs ram_F6C4; cycles=6 */
    set_flags_btst(P7DR, 4); /* 1959; BTST.B #4, @P7DR; refs P7DR; cycles=6 */
    if (!Z) goto loc_195F; /* 195D; BNE loc_195F; cycles=3/8 nt/t */
loc_195F:
    R3 = (uint16_t)(0x0080); /* 195F; MOV:I.W #H'0080, R3; dataflow R3=0x0080; cycles=3 */
    set_flags_btst(MEM8[0xF791], 5); /* 1962; BTST.B #5, @H'F791; refs ram_F791; cycles=7 */
    if (!Z) { /* 1966; BEQ loc_196A; cycles=3/7 nt/t */
        R3 |= BIT(14); /* 1968; BSET.W #14, R3; cycles=3 */
    }
    loc_19A2(); /* 196A; BSR loc_19A2; cycles=13 */
    MEM8[0xF76D] |= BIT(7); /* 196C; BSET.B #7, @H'F76D; refs ram_F76D; cycles=9 */
loc_1970:
    R4 = (uint16_t)(MEM16[0xF6A4]); /* 1970; MOV:G.W @H'F6A4, R4; refs ram_F6A4; cycles=7 */
    MEM16[0xF6C4] = (uint16_t)(R4); /* 1974; MOV:G.W R4, @H'F6C4; refs ram_F6C4; cycles=7 */
    return; /* 1978; RTS; cycles=12 */
}

void loc_1979(void)
{
    set_flags_cmp8(MEM8[0xF731], 0x03); /* 1979; CMP:G.B #H'03, @H'F731; refs ram_F731; cycles=6 */
    if (!C && !Z) goto loc_1999; /* 197E; BHI loc_1999; cycles=3/7 nt/t */
    R0 = (uint16_t)(MEM16[0xF6A2]); /* 1980; MOV:G.W @H'F6A2, R0; refs ram_F6A2; cycles=7 */
    R0 -= (uint16_t)(MEM16[0xF6C2]); /* 1984; SUB.W @H'F6C2, R0; refs ram_F6C2; cycles=7 */
    R0 = mulxu16(R0, MEM16[0xF68C]); /* 1988; MULXU.W @H'F68C, R0; refs ram_F68C; cycles=26 */
    R3 = (uint16_t)(0x0081); /* 198C; MOV:I.W #H'0081, R3; dataflow R3=0x0081; cycles=3 */
    set_flags_btst(MEM8[0xF791], 5); /* 198F; BTST.B #5, @H'F791; refs ram_F791; cycles=6 */
    if (!Z) { /* 1993; BEQ loc_1997; cycles=3/8 nt/t */
        R3 |= BIT(14); /* 1995; BSET.W #14, R3; cycles=3 */
    }
    loc_19DB(); /* 1997; BSR loc_19DB; cycles=14 */
loc_1999:
    R4 = (uint16_t)(MEM16[0xF6A2]); /* 1999; MOV:G.W @H'F6A2, R4; refs ram_F6A2; cycles=6 */
    MEM16[0xF6C2] = (uint16_t)(R4); /* 199D; MOV:G.W R4, @H'F6C2; refs ram_F6C2; cycles=6 */
    return; /* 19A1; RTS; cycles=13 */
}

void loc_19A2(void)
{
    R5 = (uint16_t)(R3); /* 19A2; MOV:G.W R3, R5; cycles=3 */
    R3 &= (uint16_t)(0x01FF); /* 19A4; AND.W #H'01FF, R3; cycles=4 */
    R3 <<= 1; /* 19A8; SHLL.W R3; cycles=3 */
    R0 = (uint16_t)(MEM16[R3 - 0x1C00]); /* 19AA; MOV:G.W @(-H'1C00,R3), R0; cycles=7 */
    set_flags_cmp16(R0, 0xFC00); /* 19AE; CMP:I #H'FC00, R0; cycles=3 */
    if (C || Z) { /* 19B1; BHI loc_19B6; cycles=3/8 nt/t */
        R0 = (uint16_t)(0xFE00); /* 19B3; MOV:I.W #H'FE00, R0; dataflow R0=0xFE00; cycles=3 */
    }
    R0 = ~R0; /* 19B6; NOT.W R0; cycles=3 */
    R0 += (uint16_t)(1); /* 19B8; ADD:Q.W #1, R0; cycles=4 */
    set_flags_cmp16(R4, 0x000F); /* 19BA; CMP:I #H'000F, R4; cycles=3 */
    if (C || Z) goto loc_19D3; /* 19BD; BLS loc_19D3; cycles=3/8 nt/t */
    set_flags_cmp16(R4, 0xFFF0); /* 19BF; CMP:I #H'FFF0, R4; cycles=3 */
    if (!C) goto loc_19D3; /* 19C2; BCC loc_19D3; cycles=3/7 nt/t */
    set_flags_cmp16(R4, 0x8000); /* 19C4; CMP:I #H'8000, R4; cycles=3 */
    if (!C) goto loc_19CE; /* 19C7; BCC loc_19CE; cycles=3/8 nt/t */
    R4 = (uint16_t)(0x001A); /* 19C9; MOV:I.W #H'001A, R4; dataflow R4=0x001A; cycles=3 */
    goto loc_19D7; /* 19CC; BRA loc_19D7; cycles=7 */
loc_19CE:
    R4 = (uint16_t)(0xFF1C); /* 19CE; MOV:I.W #H'FF1C, R4; dataflow R4=0xFF1C; cycles=3 */
    goto loc_19D7; /* 19D1; BRA loc_19D7; cycles=8 */
loc_19D3:
    R4 = (uint8_t)(MEM8[R4 + 0x1A25]); /* 19D3; MOV:G.B @(H'1A25,R4), R4; cycles=6 */
loc_19D7:
    R0 = mulxu16(R0, R4); /* 19D7; MULXU.W R4, R0; cycles=25 */
    goto loc_19E3; /* 19D9; BRA loc_19E3; cycles=8 */
}

void loc_19DB(void)
{
    R5 = (uint16_t)(R3); /* 19DB; MOV:G.W R3, R5; cycles=3 */
    R3 &= (uint16_t)(0x01FF); /* 19DD; AND.W #H'01FF, R3; cycles=4 */
    R3 <<= 1; /* 19E1; SHLL.W R3; cycles=3 */
loc_19E3:
    R0 = (uint16_t)(MEM16[R3 - 0x2000]); /* 19E3; MOV:G.W @(-H'2000,R3), R0; cycles=6 */
    R1 += (uint16_t)(R0); /* 19E7; ADD:G.W R0, R1; cycles=3 */
    R2 = (uint16_t)(R1); /* 19E9; MOV:G.W R1, R2; cycles=3 */
    if (C) goto loc_19F9; /* 19EB; BCS loc_19F9; cycles=3/8 nt/t */
    R2 -= (uint16_t)(R0); /* 19ED; SUB.W R0, R2; cycles=3 */
    set_flags_cmp16(R2, 0x8000); /* 19EF; CMP:I #H'8000, R2; cycles=3 */
    if (C || Z) goto loc_1A03; /* 19F2; BLS loc_1A03; cycles=3/7 nt/t */
    R1 = (uint16_t)(0x0000); /* 19F4; MOV:I.W #H'0000, R1; dataflow R1=0x0000; cycles=3 */
    goto loc_1A03; /* 19F7; BRA loc_1A03; cycles=8 */
loc_19F9:
    R0 -= (uint16_t)(R2); /* 19F9; SUB.W R2, R0; cycles=3 */
    set_flags_cmp16(R0, 0x8000); /* 19FB; CMP:I #H'8000, R0; cycles=3 */
    if (C || Z) goto loc_1A03; /* 19FE; BLS loc_1A03; cycles=3/7 nt/t */
    R1 = (uint16_t)(0xFFFF); /* 1A00; MOV:I.W #H'FFFF, R1; dataflow R1=0xFFFF; cycles=3 */
loc_1A03:
    set_flags_cmp16(R1, MEM16[R3 - 0x2000]); /* 1A03; CMP:G.W @(-H'2000,R3), R1; cycles=6 */
    if (!Z) { /* 1A07; BEQ loc_1A14; cycles=3/8 nt/t */
        MEM16[R3 - 0x1800] = (uint16_t)(R1); /* 1A09; MOV:G.W R1, @(-H'1800,R3); cycles=6 */
        R2 = (uint8_t)(0x80); /* 1A0D; MOV:E.B #H'80, R2; dataflow R2=0x80; cycles=2 */
        R3 = (uint16_t)(R5); /* 1A0F; MOV:G.W R5, R3; cycles=3 */
        loc_3E54(); /* 1A11; BSR loc_3E54; cycles=14 */
    }
    return; /* 1A14; RTS; cycles=12 */
}

void loc_1A35(void)
{
    R5 = (uint16_t)(R3); /* 1A35; MOV:G.W R3, R5; cycles=3 */
    R3 &= (uint16_t)(0x01FF); /* 1A37; AND.W #H'01FF, R3; cycles=4 */
    R3 <<= 1; /* 1A3B; SHLL.W R3; cycles=3 */
    R0 = (uint16_t)(MEM16[R3 - 0x2000]); /* 1A3D; MOV:G.W @(-H'2000,R3), R0; cycles=6 */
    if (Z) goto loc_1A7D; /* 1A41; BEQ loc_1A7D; cycles=3/8 nt/t */
    loc_1A8D(); /* 1A43; BSR loc_1A8D; cycles=14 */
loc_1A45:
    set_flags_tst16(R4); /* 1A45; TST.W R4; cycles=3 */
    if (!Z) goto loc_1A59; /* 1A47; BNE loc_1A59; cycles=3/8 nt/t */
    R2 = (uint16_t)(R0); /* 1A49; MOV:G.W R0, R2; cycles=3 */
loc_1A4B:
    R1 = (uint16_t)(MEM16[R3 - 0x1C00]); /* 1A4B; MOV:G.W @(-H'1C00,R3), R1; cycles=6 */
    R0 >>= 1; /* 1A4F; SHLR.W R0; cycles=3 */
    if (Z) goto loc_1A69; /* 1A51; BEQ loc_1A69; cycles=3/8 nt/t */
    R1 &= (uint16_t)(R0); /* 1A53; AND.W R0, R1; cycles=3 */
    if (Z) goto loc_1A4B; /* 1A55; BEQ loc_1A4B; cycles=3/8 nt/t */
    goto loc_1A6B; /* 1A57; BRA loc_1A6B; cycles=8 */
loc_1A59:
    R2 = (uint16_t)(R0); /* 1A59; MOV:G.W R0, R2; cycles=3 */
loc_1A5B:
    R1 = (uint16_t)(MEM16[R3 - 0x1C00]); /* 1A5B; MOV:G.W @(-H'1C00,R3), R1; cycles=6 */
    R0 <<= 1; /* 1A5F; SHLL.W R0; cycles=3 */
    if (Z) goto loc_1A69; /* 1A61; BEQ loc_1A69; cycles=3/8 nt/t */
    R1 &= (uint16_t)(R0); /* 1A63; AND.W R0, R1; cycles=3 */
    if (Z) goto loc_1A5B; /* 1A65; BEQ loc_1A5B; cycles=3/8 nt/t */
    goto loc_1A6B; /* 1A67; BRA loc_1A6B; cycles=8 */
loc_1A69:
    R0 = (uint16_t)(R2); /* 1A69; MOV:G.W R2, R0; cycles=3 */
loc_1A6B:
    set_flags_cmp16(R0, MEM16[R3 - 0x2000]); /* 1A6B; CMP:G.W @(-H'2000,R3), R0; cycles=6 */
    if (!Z) { /* 1A6F; BEQ loc_1A7C; cycles=3/8 nt/t */
        MEM16[R3 - 0x1800] = (uint16_t)(R0); /* 1A71; MOV:G.W R0, @(-H'1800,R3); cycles=6 */
        R2 = (uint8_t)(0x80); /* 1A75; MOV:E.B #H'80, R2; dataflow R2=0x80; cycles=2 */
        R3 = (uint16_t)(R5); /* 1A77; MOV:G.W R5, R3; cycles=3 */
        loc_3E54(); /* 1A79; BSR loc_3E54; cycles=14 */
    }
    return; /* 1A7C; RTS; cycles=12 */
}

void loc_1A8D(void)
{
    R1 = (uint16_t)(0x000F); /* 1A8D; MOV:I.W #H'000F, R1; dataflow R1=0x000F; cycles=3 */
loc_1A90:
    set_flags_btst(R0, R1); /* 1A90; BTST.W R1, R0; cycles=3 */
    if (!Z) goto loc_1A97; /* 1A92; BNE loc_1A97; cycles=3/7 nt/t */
    if (scb_f(R1)) goto loc_1A90; /* 1A94; SCB/F R1, loc_1A90; cycles=? */
loc_1A97:
    R0 = 0; /* 1A97; CLR.W R0; dataflow R0=0x0000; cycles=3 */
    R0 |= BIT(R1); /* 1A99; BSET.W R1, R0; cycles=3 */
    return; /* 1A9B; RTS; cycles=13 */
}

void loc_1A9C(void)
{
    set_flags_tst16(R3); /* 1A9C; TST.W R3; cycles=3 */
    if (Z) goto loc_1AD2; /* 1A9E; BEQ loc_1AD2; cycles=3/7 nt/t */
    R3 <<= 1; /* 1AA0; SHLL.W R3; cycles=3 */
    R0 = (uint8_t)(MEM8[0xF733]); /* 1AA2; MOV:G.B @H'F733, R0; refs ram_F733; cycles=7 */
    R0 = ~R0; /* 1AA6; NOT.B R0; cycles=2 */
    R0 &= (uint8_t)(0x0F); /* 1AA8; AND.B #H'0F, R0; cycles=3 */
    set_flags_tst16(R4); /* 1AAB; TST.W R4; cycles=3 */
    if (!Z) goto loc_1ABC; /* 1AAD; BNE loc_1ABC; cycles=3/8 nt/t */
    do {
        R0 += (uint8_t)(-1); /* 1AAF; ADD:Q.B #-1, R0; cycles=4 */
        R0 &= (uint8_t)(0x0F); /* 1AB1; AND.B #H'0F, R0; cycles=3 */
        set_flags_btst(MEM16[R3 - 0x1C00], R0); /* 1AB4; BTST.W R0, @(-H'1C00,R3); cycles=7 */
    } while (Z); /* 1AB8; BEQ loc_1AAF; cycles=3/7 nt/t */
    goto loc_1AC7; /* 1ABA; BRA loc_1AC7; cycles=7 */
loc_1ABC:
    R0 += (uint8_t)(1); /* 1ABC; ADD:Q.B #1, R0; cycles=4 */
    R0 &= (uint8_t)(0x0F); /* 1ABE; AND.B #H'0F, R0; cycles=3 */
    set_flags_btst(MEM16[R3 - 0x1C00], R0); /* 1AC1; BTST.W R0, @(-H'1C00,R3); cycles=6 */
    if (Z) goto loc_1ABC; /* 1AC5; BEQ loc_1ABC; cycles=3/8 nt/t */
loc_1AC7:
    R0 = ~R0; /* 1AC7; NOT.B R0; cycles=2 */
    R0 &= (uint8_t)(0x0F); /* 1AC9; AND.B #H'0F, R0; cycles=3 */
    MEM8[0xF733] = (uint8_t)(R0); /* 1ACC; MOV:G.B R0, @H'F733; refs ram_F733; cycles=7 */
    goto loc_1AE0; /* 1AD0; BRA loc_1AE0; cycles=7 */
loc_1AD2:
    set_flags_tst16(R4); /* 1AD2; TST.W R4; cycles=3 */
    if (!Z) goto loc_1ADC; /* 1AD4; BNE loc_1ADC; cycles=3/7 nt/t */
    MEM8[0xF733] += (uint8_t)(1); /* 1AD6; ADD:Q.B #1, @H'F733; refs ram_F733; cycles=9 */
    goto loc_1AE0; /* 1ADA; BRA loc_1AE0; cycles=7 */
loc_1ADC:
    MEM8[0xF733] += (uint8_t)(-1); /* 1ADC; ADD:Q.B #-1, @H'F733; refs ram_F733; cycles=9 */
loc_1AE0:
    loc_48FA(); /* 1AE0; BSR loc_48FA; cycles=13 */
    return; /* 1AE3; RTS; cycles=13 */
}

void loc_1AE4(void)
{
    R0 = (uint8_t)(MEM8[0xF75B]); /* 1AE4; MOV:G.B @H'F75B, R0; refs ram_F75B; cycles=7 */
    R0 = zero_extend8(R0); /* 1AE8; EXTU.B R0; cycles=3 */
    R1 = (uint8_t)(MEM8[R0 - 0x08A3]); /* 1AEA; MOV:G.B @(-H'08A3,R0), R1; cycles=7 */
    set_flags_tst16(R4); /* 1AEE; TST.W R4; cycles=3 */
    if (!Z) goto loc_1AFC; /* 1AF0; BNE loc_1AFC; cycles=3/7 nt/t */
    R1 += (uint8_t)(1); /* 1AF2; ADD:Q.B #1, R1; cycles=4 */
    set_flags_cmp8(R1, 0x2E); /* 1AF4; CMP:E #H'2E, R1; cycles=2 */
    if (C || Z) goto loc_1B03; /* 1AF6; BLS loc_1B03; cycles=3/7 nt/t */
    R1 = (uint8_t)(0x00); /* 1AF8; MOV:E.B #H'00, R1; dataflow R1=0x00; cycles=2 */
    goto loc_1B03; /* 1AFA; BRA loc_1B03; cycles=7 */
loc_1AFC:
    R1 -= (uint8_t)(0x01); /* 1AFC; SUB.B #H'01, R1; cycles=3 */
    if (!C) goto loc_1B03; /* 1AFF; BCC loc_1B03; cycles=3/8 nt/t */
    R1 = (uint8_t)(0x2E); /* 1B01; MOV:E.B #H'2E, R1; dataflow R1=0x2E; cycles=2 */
loc_1B03:
    MEM8[R0 - 0x08A3] = (uint8_t)(R1); /* 1B03; MOV:G.B R1, @(-H'08A3,R0); cycles=6 */
    loc_48FA(); /* 1B07; BSR loc_48FA; cycles=14 */
    return; /* 1B0A; RTS; cycles=12 */
}

void loc_1B0B(void)
{
    R0 = (uint8_t)(MEM8[0xF75B]); /* 1B0B; MOV:G.B @H'F75B, R0; refs ram_F75B; cycles=6 */
    set_flags_tst16(R4); /* 1B0F; TST.W R4; cycles=3 */
    if (!Z) goto loc_1B1D; /* 1B11; BNE loc_1B1D; cycles=3/8 nt/t */
    R0 += (uint8_t)(1); /* 1B13; ADD:Q.B #1, R0; cycles=4 */
    set_flags_cmp8(R0, 0x08); /* 1B15; CMP:E #H'08, R0; cycles=2 */
    if (C || Z) goto loc_1B25; /* 1B17; BLS loc_1B25; cycles=3/8 nt/t */
    R0 = (uint8_t)(0x08); /* 1B19; MOV:E.B #H'08, R0; dataflow R0=0x08; cycles=2 */
    goto loc_1B25; /* 1B1B; BRA loc_1B25; cycles=8 */
loc_1B1D:
    R0 += (uint8_t)(-1); /* 1B1D; ADD:Q.B #-1, R0; cycles=4 */
    set_flags_cmp8(R0, 0x01); /* 1B1F; CMP:E #H'01, R0; cycles=2 */
    if (!C) goto loc_1B25; /* 1B21; BCC loc_1B25; cycles=3/8 nt/t */
    R0 = (uint8_t)(0x01); /* 1B23; MOV:E.B #H'01, R0; dataflow R0=0x01; cycles=2 */
loc_1B25:
    MEM8[0xF75B] = (uint8_t)(R0); /* 1B25; MOV:G.B R0, @H'F75B; refs ram_F75B; cycles=6 */
    loc_48FA(); /* 1B29; BSR loc_48FA; cycles=14 */
    return; /* 1B2C; RTS; cycles=12 */
}

void loc_1B2D(void)
{
    R4 = (uint8_t)(MEM8[0xF6D7]); /* 1B2D; MOV:G.B @H'F6D7, R4; refs ram_F6D7; cycles=6 */
    R4 ^= (uint8_t)(MEM8[0xF6E7]); /* 1B31; XOR.B @H'F6E7, R4; refs ram_F6E7; cycles=6 */
    R5 = (uint16_t)(0x007E); /* 1B35; MOV:I.W #H'007E, R5; dataflow R5=0x007E; cycles=3 */
    loc_1C0E(); /* 1B38; BSR loc_1C0E; cycles=13 */
    R4 = (uint8_t)(MEM8[0xF6D7]); /* 1B3B; MOV:G.B @H'F6D7, R4; refs ram_F6D7; cycles=6 */
    MEM8[0xF6E7] = (uint8_t)(R4); /* 1B3F; MOV:G.B R4, @H'F6E7; refs ram_F6E7; cycles=6 */
    return; /* 1B43; RTS; cycles=13 */
}

void loc_1B44(void)
{
    R4 = (uint8_t)(MEM8[0xF6D6]); /* 1B44; MOV:G.B @H'F6D6, R4; refs ram_F6D6; cycles=7 */
    R4 ^= (uint8_t)(MEM8[0xF6E6]); /* 1B48; XOR.B @H'F6E6, R4; refs ram_F6E6; cycles=7 */
    R5 = (uint16_t)(0x006E); /* 1B4C; MOV:I.W #H'006E, R5; dataflow R5=0x006E; cycles=3 */
    loc_1C0E(); /* 1B4F; BSR loc_1C0E; cycles=14 */
    R4 = (uint8_t)(MEM8[0xF6D6]); /* 1B52; MOV:G.B @H'F6D6, R4; refs ram_F6D6; cycles=7 */
    MEM8[0xF6E6] = (uint8_t)(R4); /* 1B56; MOV:G.B R4, @H'F6E6; refs ram_F6E6; cycles=7 */
    return; /* 1B5A; RTS; cycles=12 */
}

void loc_1B5B(void)
{
    R4 = (uint8_t)(MEM8[0xF6D5]); /* 1B5B; MOV:G.B @H'F6D5, R4; refs ram_F6D5; cycles=6 */
    R4 ^= (uint8_t)(MEM8[0xF6E5]); /* 1B5F; XOR.B @H'F6E5, R4; refs ram_F6E5; cycles=6 */
    R5 = (uint16_t)(0x005E); /* 1B63; MOV:I.W #H'005E, R5; dataflow R5=0x005E; cycles=3 */
    loc_1C0E(); /* 1B66; BSR loc_1C0E; cycles=13 */
    R4 = (uint8_t)(MEM8[0xF6D5]); /* 1B69; MOV:G.B @H'F6D5, R4; refs ram_F6D5; cycles=6 */
    MEM8[0xF6E5] = (uint8_t)(R4); /* 1B6D; MOV:G.B R4, @H'F6E5; refs ram_F6E5; cycles=6 */
    return; /* 1B71; RTS; cycles=13 */
}

void loc_1B72(void)
{
    R4 = (uint8_t)(MEM8[0xF6D1]); /* 1B72; MOV:G.B @H'F6D1, R4; refs ram_F6D1; cycles=7 */
    R4 ^= (uint8_t)(MEM8[0xF6E1]); /* 1B76; XOR.B @H'F6E1, R4; refs ram_F6E1; cycles=7 */
    R5 = (uint16_t)(0x001E); /* 1B7A; MOV:I.W #H'001E, R5; dataflow R5=0x001E; cycles=3 */
    loc_1C0E(); /* 1B7D; BSR loc_1C0E; cycles=14 */
    R4 = (uint8_t)(MEM8[0xF6D1]); /* 1B80; MOV:G.B @H'F6D1, R4; refs ram_F6D1; cycles=7 */
    MEM8[0xF6E1] = (uint8_t)(R4); /* 1B84; MOV:G.B R4, @H'F6E1; refs ram_F6E1; cycles=7 */
    return; /* 1B88; RTS; cycles=12 */
}

void loc_1B89(void)
{
    R4 = (uint8_t)(MEM8[0xF6D0]); /* 1B89; MOV:G.B @H'F6D0, R4; refs ram_F6D0; cycles=6 */
    R4 ^= (uint8_t)(MEM8[0xF6E0]); /* 1B8D; XOR.B @H'F6E0, R4; refs ram_F6E0; cycles=6 */
    R5 = (uint16_t)(0x000E); /* 1B91; MOV:I.W #H'000E, R5; dataflow R5=0x000E; cycles=3 */
    loc_1C0E(); /* 1B94; BSR loc_1C0E; cycles=13 */
    R4 = (uint8_t)(MEM8[0xF6D0]); /* 1B97; MOV:G.B @H'F6D0, R4; refs ram_F6D0; cycles=6 */
    MEM8[0xF6E0] = (uint8_t)(R4); /* 1B9B; MOV:G.B R4, @H'F6E0; refs ram_F6E0; cycles=6 */
    return; /* 1B9F; RTS; cycles=13 */
}

void loc_1BA0(void)
{
    R4 = (uint8_t)(MEM8[0xF6D4]); /* 1BA0; MOV:G.B @H'F6D4, R4; refs ram_F6D4; cycles=7 */
    R4 ^= (uint8_t)(MEM8[0xF6E4]); /* 1BA4; XOR.B @H'F6E4, R4; refs ram_F6E4; cycles=7 */
    R5 = (uint16_t)(0x004E); /* 1BA8; MOV:I.W #H'004E, R5; dataflow R5=0x004E; cycles=3 */
    loc_1C0E(); /* 1BAB; BSR loc_1C0E; cycles=14 */
    R4 = (uint8_t)(MEM8[0xF6D4]); /* 1BAD; MOV:G.B @H'F6D4, R4; refs ram_F6D4; cycles=6 */
    MEM8[0xF6E4] = (uint8_t)(R4); /* 1BB1; MOV:G.B R4, @H'F6E4; refs ram_F6E4; cycles=6 */
    return; /* 1BB5; RTS; cycles=13 */
}

void loc_1BB6(void)
{
    R4 = (uint8_t)(MEM8[0xF6D3]); /* 1BB6; MOV:G.B @H'F6D3, R4; refs ram_F6D3; cycles=7 */
    R4 ^= (uint8_t)(MEM8[0xF6E3]); /* 1BBA; XOR.B @H'F6E3, R4; refs ram_F6E3; cycles=7 */
    R5 = (uint16_t)(0x003E); /* 1BBE; MOV:I.W #H'003E, R5; dataflow R5=0x003E; cycles=3 */
    loc_1C0E(); /* 1BC1; BSR loc_1C0E; cycles=14 */
    R4 = (uint8_t)(MEM8[0xF6D3]); /* 1BC3; MOV:G.B @H'F6D3, R4; refs ram_F6D3; cycles=6 */
    MEM8[0xF6E3] = (uint8_t)(R4); /* 1BC7; MOV:G.B R4, @H'F6E3; refs ram_F6E3; cycles=6 */
    return; /* 1BCB; RTS; cycles=13 */
}

void loc_1BCC(void)
{
    R4 = (uint8_t)(MEM8[0xF6D2]); /* 1BCC; MOV:G.B @H'F6D2, R4; refs ram_F6D2; cycles=7 */
    R4 ^= (uint8_t)(MEM8[0xF6E2]); /* 1BD0; XOR.B @H'F6E2, R4; refs ram_F6E2; cycles=7 */
    R5 = (uint16_t)(0x002E); /* 1BD4; MOV:I.W #H'002E, R5; dataflow R5=0x002E; cycles=3 */
    loc_1C0E(); /* 1BD7; BSR loc_1C0E; cycles=14 */
    R4 = (uint8_t)(MEM8[0xF6D2]); /* 1BD9; MOV:G.B @H'F6D2, R4; refs ram_F6D2; cycles=6 */
    MEM8[0xF6E2] = (uint8_t)(R4); /* 1BDD; MOV:G.B R4, @H'F6E2; refs ram_F6E2; cycles=6 */
    return; /* 1BE1; RTS; cycles=13 */
}

void loc_1BE2(void)
{
    R4 = (uint8_t)(MEM8[0xF6DC]); /* 1BE2; MOV:G.B @H'F6DC, R4; refs ram_F6DC; cycles=7 */
    R4 ^= (uint8_t)(MEM8[0xF6EC]); /* 1BE6; XOR.B @H'F6EC, R4; refs ram_F6EC; cycles=7 */
    R5 = (uint16_t)(0x00CE); /* 1BEA; MOV:I.W #H'00CE, R5; dataflow R5=0x00CE; cycles=3 */
    loc_1C0E(); /* 1BED; BSR loc_1C0E; cycles=14 */
    R4 = (uint8_t)(MEM8[0xF6DC]); /* 1BEF; MOV:G.B @H'F6DC, R4; refs ram_F6DC; cycles=6 */
    MEM8[0xF6EC] = (uint8_t)(R4); /* 1BF3; MOV:G.B R4, @H'F6EC; refs ram_F6EC; cycles=6 */
    return; /* 1BF7; RTS; cycles=13 */
}

void loc_1BF8(void)
{
    R4 = (uint8_t)(MEM8[0xF6DB]); /* 1BF8; MOV:G.B @H'F6DB, R4; refs ram_F6DB; cycles=7 */
    R4 ^= (uint8_t)(MEM8[0xF6EB]); /* 1BFC; XOR.B @H'F6EB, R4; refs ram_F6EB; cycles=7 */
    R5 = (uint16_t)(0x00BE); /* 1C00; MOV:I.W #H'00BE, R5; dataflow R5=0x00BE; cycles=3 */
    loc_1C0E(); /* 1C03; BSR loc_1C0E; cycles=14 */
    R4 = (uint8_t)(MEM8[0xF6DB]); /* 1C05; MOV:G.B @H'F6DB, R4; refs ram_F6DB; cycles=6 */
    MEM8[0xF6EB] = (uint8_t)(R4); /* 1C09; MOV:G.B R4, @H'F6EB; refs ram_F6EB; cycles=6 */
    return; /* 1C0D; RTS; cycles=13 */
}

void loc_1C0E(void)
{
    R4 <<= 1; /* 1C0E; SHLL.B R4; cycles=2 */
    if (C) { /* 1C10; BCC loc_1C1C; cycles=3/7 nt/t */
        R0 = (uint16_t)(MEM16[R5 + 0x2706]); /* 1C12; MOV:G.W @(H'2706,R5), R0; cycles=7 */
        push_registers(R4, R5); /* 1C16; STM.W {R4,R5}, @-SP; cycles=12 */
        call_indirect(MEM8[R0]); /* 1C18; JSR @R0; JSR @R0 uses R0; target not resolved; cycles=13 */
        pop_registers(R4, R5); /* 1C1A; LDM.W @SP+, {R4,R5}; cycles=14 */
    }
    set_flags_tst8(R4); /* 1C1C; TST.B R4; cycles=2 */
    if (Z) goto loc_1C24; /* 1C1E; BEQ loc_1C24; cycles=3/7 nt/t */
    R5 += (uint16_t)(-2); /* 1C20; ADD:Q.W #-2, R5; cycles=4 */
    goto loc_1C0E; /* 1C22; BRA loc_1C0E; cycles=7 */
loc_1C24:
    return; /* 1C24; RTS; cycles=12 */
}

void loc_2127(void)
{
    MEM8[0xFB03] |= BIT(7); /* 2127; BSET.B #7, @H'FB03; refs ram_FB03; cycles=8 */
    if (Z) { /* 212B; BNE loc_2135; cycles=3/8 nt/t */
        R1 = (uint16_t)(MEM16[0xF732]); /* 212D; MOV:G.W @H'F732, R1; refs ram_F732; cycles=6 */
        MEM16[0xF734] = (uint16_t)(R1); /* 2131; MOV:G.W R1, @H'F734; refs ram_F734; cycles=6 */
    }
    MEM16[0xF732] = (uint16_t)(0x1C03); /* 2135; MOV:G.W #H'1C03, @H'F732; refs ram_F732; cycles=9 */
    MEM8[0xFB02] = (uint8_t)(0x14); /* 213B; MOV:G.B #H'14, @H'FB02; refs ram_FB02; cycles=9 */
    loc_48FA(); /* 2140; BSR loc_48FA; cycles=13 */
    return; /* 2143; RTS; cycles=13 */
}

void loc_2650(void)
{
    MEM8[0xF6F6] &= ~BIT(5); /* 2650; BCLR.B #5, @H'F6F6; refs ram_F6F6; cycles=9 */
    if (Z) goto loc_26BF; /* 2654; BEQ loc_26BF; cycles=3/7 nt/t */
    R0 = (uint16_t)(MEM16[0xE124]); /* 2657; MOV:G.W @H'E124, R0; refs mem_E124; cycles=6 */
    R0 <<= 1; /* 265B; SHLL.W R0; cycles=3 */
    R0 = swap_bytes(R0); /* 265D; SWAP.B R0; cycles=3 */
    set_flags_btst(MEM8[0xF6F6], 6); /* 265F; BTST.B #6, @H'F6F6; refs ram_F6F6; cycles=6 */
    if (!Z) goto loc_266D; /* 2663; BNE loc_266D; cycles=3/8 nt/t */
    R0 += (uint8_t)(1); /* 2665; ADD:Q.B #1, R0; cycles=4 */
    if (!C) goto loc_2683; /* 2667; BCC loc_2683; cycles=3/8 nt/t */
    R0 = (uint8_t)(0xFF); /* 2669; MOV:E.B #H'FF, R0; dataflow R0=0xFF; cycles=2 */
    goto loc_2683; /* 266B; BRA loc_2683; cycles=8 */
loc_266D:
    R0 += (uint8_t)(-1); /* 266D; ADD:Q.B #-1, R0; cycles=4 */
    set_flags_btst(MEM16[0xE004], 13); /* 266F; BTST.W #13, @H'E004; refs mem_E004; cycles=6 */
    if (!Z) goto loc_267D; /* 2673; BNE loc_267D; cycles=3/8 nt/t */
    set_flags_cmp8(R0, 0x49); /* 2675; CMP:E #H'49, R0; cycles=2 */
    if (!C) goto loc_2683; /* 2677; BCC loc_2683; cycles=3/8 nt/t */
    R0 = (uint8_t)(0x49); /* 2679; MOV:E.B #H'49, R0; dataflow R0=0x49; cycles=2 */
    goto loc_2683; /* 267B; BRA loc_2683; cycles=8 */
loc_267D:
    set_flags_cmp8(R0, 0x16); /* 267D; CMP:E #H'16, R0; cycles=2 */
    if (!C) goto loc_2683; /* 267F; BCC loc_2683; cycles=3/8 nt/t */
    R0 = (uint8_t)(0x16); /* 2681; MOV:E.B #H'16, R0; dataflow R0=0x16; cycles=2 */
loc_2683:
    R0 = zero_extend8(R0); /* 2683; EXTU.B R0; cycles=3 */
    R0 = swap_bytes(R0); /* 2685; SWAP.B R0; cycles=3 */
    R0 >>= 1; /* 2687; SHLR.W R0; cycles=3 */
    R0 |= BIT(15); /* 2689; BSET.W #15, R0; cycles=3 */
    set_flags_cmp16(R0, MEM16[0xE124]); /* 268B; CMP:G.W @H'E124, R0; refs mem_E124; cycles=6 */
    if (Z) goto loc_26BF; /* 268F; BEQ loc_26BF; cycles=3/8 nt/t */
    MEM16[0xE924] = (uint16_t)(R0); /* 2691; MOV:G.W R0, @H'E924; refs mem_E924; cycles=6 */
    R2 = (uint8_t)(0x80); /* 2695; MOV:E.B #H'80, R2; dataflow R2=0x80; cycles=2 */
    R3 = (uint16_t)(0x0092); /* 2697; MOV:I.W #H'0092, R3; dataflow R3=0x0092; cycles=3 */
    set_flags_btst(MEM8[0xF791], 7); /* 269A; BTST.B #7, @H'F791; refs ram_F791; cycles=7 */
    if (Z) goto loc_26A8; /* 269E; BEQ loc_26A8; cycles=3/7 nt/t */
    set_flags_btst(MEM8[0xF404], 4); /* 26A0; BTST.B #4, @H'F404; refs mem_F404; cycles=7 */
    if (Z) goto loc_26A8; /* 26A4; BEQ loc_26A8; cycles=3/7 nt/t */
    R3 |= BIT(14); /* 26A6; BSET.W #14, R3; cycles=3 */
loc_26A8:
    loc_3E54(); /* 26A8; BSR loc_3E54; cycles=13 */
    MEM8[0xF6F6] |= BIT(0); /* 26AB; BSET.B #0, @H'F6F6; refs ram_F6F6; cycles=8 */
    if (!Z) goto loc_26B9; /* 26AF; BNE loc_26B9; cycles=3/8 nt/t */
    MEM16[0xF6F4] = (uint16_t)(0x07D0); /* 26B1; MOV:G.W #H'07D0, @H'F6F4; refs ram_F6F4; cycles=9 */
    goto loc_26BF; /* 26B7; BRA loc_26BF; cycles=8 */
loc_26B9:
    MEM16[0xF6F4] = (uint16_t)(0x00C8); /* 26B9; MOV:G.W #H'00C8, @H'F6F4; refs ram_F6F4; cycles=9 */
loc_26BF:
    return; /* 26BF; RTS; cycles=13 */
}

void loc_2806(void)
{
    R1 = (uint8_t)(MEM8[0xF9B9]); /* 2806; MOV:G.B @H'F9B9, R1; refs ram_F9B9; cycles=7 */
    R1 = zero_extend8(R1); /* 280A; EXTU.B R1; cycles=3 */
    set_flags_cmp8(R1, MEM8[0xF9B4]); /* 280C; CMP:G.B @H'F9B4, R1; refs ram_F9B4; cycles=7 */
    if (!Z) goto loc_2815; /* 2810; BNE loc_2815; cycles=3/7 nt/t */
    goto loc_2CA6; /* 2812; BRA loc_2CA6; cycles=7 */
loc_2815:
    R0 = (uint16_t)(R1); /* 2815; MOV:G.W R1, R0; cycles=3 */
    R0 <<= 1; /* 2817; SHLL.W R0; cycles=3 */
    R0 = (uint16_t)(MEM16[R0 - 0x0690]); /* 2819; MOV:G.W @(-H'0690,R0), R0; cycles=6 */
    R1 += (uint8_t)(1); /* 281D; ADD:Q.B #1, R1; cycles=4 */
    R1 &= (uint8_t)(0x1F); /* 281F; AND.B #H'1F, R1; cycles=3 */
    MEM8[0xF9B9] = (uint8_t)(R1); /* 2822; MOV:G.B R1, @H'F9B9; refs ram_F9B9; cycles=7 */
    R0 &= (uint16_t)(0x01FF); /* 2826; AND.W #H'01FF, R0; cycles=4 */
    R5 = (uint16_t)(R0); /* 282A; MOV:G.W R0, R5; cycles=3 */
    loc_6206(); /* 282C; BSR loc_6206; cycles=13 */
    R4 = (uint16_t)(R0); /* 282F; MOV:G.W R0, R4; cycles=3 */
    R4 <<= 1; /* 2831; SHLL.W R4; cycles=3 */
    set_flags_tst16(R0); /* 2833; TST.W R0; cycles=3 */
    if (Z) goto loc_289F; /* 2835; BEQ loc_289F; cycles=3/8 nt/t */
    R1 = (uint16_t)(MEM16[0xF736]); /* 2837; MOV:G.W @H'F736, R1; refs ram_F736; cycles=6 */
    R1 &= (uint16_t)(0x01FF); /* 283B; AND.W #H'01FF, R1; cycles=4 */
    set_flags_cmp16(R0, R1); /* 283F; CMP:G.W R1, R0; cycles=3 */
    if (Z) goto loc_2CAB; /* 2841; BEQ loc_2CAB; cycles=3/8 nt/t */
    R1 = (uint16_t)(MEM16[0xF738]); /* 2844; MOV:G.W @H'F738, R1; refs ram_F738; cycles=7 */
    R1 &= (uint16_t)(0x01FF); /* 2848; AND.W #H'01FF, R1; cycles=4 */
    set_flags_cmp16(R0, R1); /* 284C; CMP:G.W R1, R0; cycles=3 */
    if (Z) goto loc_2CAB; /* 284E; BEQ loc_2CAB; cycles=3/7 nt/t */
    R1 = (uint16_t)(MEM16[0xF73A]); /* 2851; MOV:G.W @H'F73A, R1; refs ram_F73A; cycles=6 */
    R1 &= (uint16_t)(0x01FF); /* 2855; AND.W #H'01FF, R1; cycles=4 */
    set_flags_cmp16(R0, R1); /* 2859; CMP:G.W R1, R0; cycles=3 */
    if (Z) goto loc_2CAB; /* 285B; BEQ loc_2CAB; cycles=3/8 nt/t */
    R1 = (uint16_t)(MEM16[0xF73C]); /* 285E; MOV:G.W @H'F73C, R1; refs ram_F73C; cycles=7 */
    R1 &= (uint16_t)(0x01FF); /* 2862; AND.W #H'01FF, R1; cycles=4 */
    set_flags_cmp16(R0, R1); /* 2866; CMP:G.W R1, R0; cycles=3 */
    if (Z) goto loc_2CAB; /* 2868; BEQ loc_2CAB; cycles=3/7 nt/t */
    R1 = (uint16_t)(MEM16[0xF73E]); /* 286B; MOV:G.W @H'F73E, R1; refs ram_F73E; cycles=6 */
    R1 &= (uint16_t)(0x01FF); /* 286F; AND.W #H'01FF, R1; cycles=4 */
    set_flags_cmp16(R0, R1); /* 2873; CMP:G.W R1, R0; cycles=3 */
    if (Z) goto loc_2CAB; /* 2875; BEQ loc_2CAB; cycles=3/8 nt/t */
    R1 = (uint16_t)(MEM16[0xF740]); /* 2878; MOV:G.W @H'F740, R1; refs ram_F740; cycles=7 */
    R1 &= (uint16_t)(0x01FF); /* 287C; AND.W #H'01FF, R1; cycles=4 */
    set_flags_cmp16(R0, R1); /* 2880; CMP:G.W R1, R0; cycles=3 */
    if (Z) goto loc_2CAB; /* 2882; BEQ loc_2CAB; cycles=3/7 nt/t */
    R1 = (uint16_t)(MEM16[0xF742]); /* 2885; MOV:G.W @H'F742, R1; refs ram_F742; cycles=6 */
    R1 &= (uint16_t)(0x01FF); /* 2889; AND.W #H'01FF, R1; cycles=4 */
    set_flags_cmp16(R0, R1); /* 288D; CMP:G.W R1, R0; cycles=3 */
    if (Z) goto loc_2CAB; /* 288F; BEQ loc_2CAB; cycles=3/8 nt/t */
    R1 = (uint16_t)(MEM16[0xF754]); /* 2892; MOV:G.W @H'F754, R1; refs ram_F754; cycles=7 */
    R1 &= (uint16_t)(0x01FF); /* 2896; AND.W #H'01FF, R1; cycles=4 */
    set_flags_cmp16(R0, R1); /* 289A; CMP:G.W R1, R0; cycles=3 */
    if (Z) goto loc_2CAB; /* 289C; BEQ loc_2CAB; cycles=3/7 nt/t */
loc_289F:
    R1 = (uint16_t)(MEM16[R4 + 0x28A6]); /* 289F; MOV:G.W @(H'28A6,R4), R1; cycles=6 */
    goto_indirect_table(0x28A6, R4, R1); /* 28A3; JMP @R1; JMP @R1 uses R1 loaded from pointer table H'28A6 via R4 (103/128 decoded targets); cycles=7 */
loc_2CA6:
    MEM8[0xF769] &= ~BIT(7); /* 2CA6; BCLR.B #7, @H'F769; refs ram_F769; cycles=9 */
    return; /* 2CAA; RTS; cycles=12 */
}

void loc_3930(void)
{
    R0 = (uint16_t)(0x0007); /* 3930; MOV:I.W #H'0007, R0; dataflow R0=0x0007; cycles=3 */
loc_3933:
    set_flags_btst(P7DR, R0); /* 3933; BTST.B R0, @P7DR; refs P7DR; cycles=6 */
    if (Z) goto loc_3943; /* 3937; BEQ loc_3943; cycles=3/8 nt/t */
    MEM8[R0 - 0x0980] <<= 1; /* 3939; SHLL.B @(-H'0980,R0); cycles=8 */
    MEM8[R0 - 0x0980] |= BIT(0); /* 393D; BSET.B #0, @(-H'0980,R0); cycles=8 */
    goto loc_3947; /* 3941; BRA loc_3947; cycles=8 */
loc_3943:
    MEM8[R0 - 0x0980] <<= 1; /* 3943; SHLL.B @(-H'0980,R0); cycles=8 */
loc_3947:
    set_flags_cmp8(MEM8[R0 - 0x0980], 0xFF); /* 3947; CMP:G.B #H'FF, @(-H'0980,R0); cycles=6 */
    if (!Z) goto loc_3954; /* 394C; BNE loc_3954; cycles=3/7 nt/t */
    MEM8[0xF688] |= BIT(R0); /* 394E; BSET.B R0, @H'F688; refs ram_F688; cycles=9 */
    goto loc_395F; /* 3952; BRA loc_395F; cycles=7 */
loc_3954:
    set_flags_cmp8(MEM8[R0 - 0x0980], 0x00); /* 3954; CMP:G.B #H'00, @(-H'0980,R0); cycles=7 */
    if (!Z) goto loc_395F; /* 3959; BNE loc_395F; cycles=3/8 nt/t */
    MEM8[0xF688] &= ~BIT(R0); /* 395B; BCLR.B R0, @H'F688; refs ram_F688; cycles=8 */
loc_395F:
    if (scb_f(R0)) goto loc_3933; /* 395F; SCB/F R0, loc_3933; cycles=? */
    MEM8[0xF722] += (uint8_t)(1); /* 3962; ADD:Q.B #1, @H'F722; refs ram_F722; cycles=9 */
    set_flags_cmp8(MEM8[0xF722], 0x3C); /* 3966; CMP:G.B #H'3C, @H'F722; refs ram_F722; cycles=7 */
    if (Z) goto loc_397C; /* 396B; BEQ loc_397C; cycles=3/8 nt/t */
    set_flags_cmp8(MEM8[0xF722], 0x78); /* 396D; CMP:G.B #H'78, @H'F722; refs ram_F722; cycles=6 */
    if (Z) goto loc_397F; /* 3972; BEQ loc_397F; cycles=3/7 nt/t */
    set_flags_cmp8(MEM8[0xF722], 0xB4); /* 3974; CMP:G.B #H'B4, @H'F722; refs ram_F722; cycles=7 */
    if (Z) goto loc_3983; /* 3979; BEQ loc_3983; cycles=3/8 nt/t */
    return; /* 397B; RTS; cycles=13 */
}

void loc_398A(void)
{
    set_flags_btst(ADCSR, 7); /* 398A; BTST.B #7, @ADCSR; refs ADCSR; cycles=7 */
    if (Z) { /* 398E; BNE loc_3994; cycles=3/7 nt/t */
        ADCSR |= BIT(5); /* 3990; BSET.B #5, @ADCSR; set ADST (bit 5) of ADCSR; refs ADCSR; cycles=9 */
    }
    return; /* 3994; RTS; cycles=12 */
}

void loc_3995(void)
{
    set_flags_tst8(MEM8[0xF720]); /* 3995; TST.B @H'F720; refs ram_F720; cycles=6 */
    if (!Z) goto loc_3A2D; /* 3999; BNE loc_3A2D; cycles=3/8 nt/t */
    MEM8[0xF101] = (uint8_t)(0xA0); /* 399C; MOV:G.B #H'A0, @H'F101; refs mem_F101; cycles=9 */
    set_flags_btst(MEM8[0xF100], 1); /* 39A1; BTST.B #1, @H'F100; refs mem_F100; cycles=6 */
    if (Z) goto loc_3A2D; /* 39A5; BEQ loc_3A2D; cycles=3/8 nt/t */
    R0 = (uint8_t)(MEM8[0xF71B]); /* 39A8; MOV:G.B @H'F71B, R0; refs ram_F71B; cycles=7 */
    R0 |= (uint8_t)(MEM8[0xF723]); /* 39AC; OR.B @H'F723, R0; refs ram_F723; cycles=7 */
    R0 &= (uint8_t)(MEM8[0xF713]); /* 39B0; AND.B @H'F713, R0; refs ram_F713; cycles=7 */
    MEM8[0xF102] = (uint8_t)(R0); /* 39B4; MOV:G.B R0, @H'F102; refs mem_F102; cycles=7 */
    R0 = (uint8_t)(MEM8[0xF71A]); /* 39B8; MOV:G.B @H'F71A, R0; refs ram_F71A; cycles=7 */
    R0 |= (uint8_t)(MEM8[0xF723]); /* 39BC; OR.B @H'F723, R0; refs ram_F723; cycles=7 */
    R0 &= (uint8_t)(MEM8[0xF712]); /* 39C0; AND.B @H'F712, R0; refs ram_F712; cycles=7 */
    MEM8[0xF103] = (uint8_t)(R0); /* 39C4; MOV:G.B R0, @H'F103; refs mem_F103; cycles=7 */
    R0 = (uint8_t)(MEM8[0xF719]); /* 39C8; MOV:G.B @H'F719, R0; refs ram_F719; cycles=7 */
    R0 |= (uint8_t)(MEM8[0xF723]); /* 39CC; OR.B @H'F723, R0; refs ram_F723; cycles=7 */
    R0 &= (uint8_t)(MEM8[0xF711]); /* 39D0; AND.B @H'F711, R0; refs ram_F711; cycles=7 */
    MEM8[0xF104] = (uint8_t)(R0); /* 39D4; MOV:G.B R0, @H'F104; refs mem_F104; cycles=7 */
    R0 = (uint8_t)(MEM8[0xF718]); /* 39D8; MOV:G.B @H'F718, R0; refs ram_F718; cycles=7 */
    R0 |= (uint8_t)(MEM8[0xF723]); /* 39DC; OR.B @H'F723, R0; refs ram_F723; cycles=7 */
    R0 &= (uint8_t)(MEM8[0xF710]); /* 39E0; AND.B @H'F710, R0; refs ram_F710; cycles=7 */
    MEM8[0xF105] = (uint8_t)(R0); /* 39E4; MOV:G.B R0, @H'F105; refs mem_F105; cycles=7 */
    R0 = (uint8_t)(MEM8[0xF702]); /* 39E8; MOV:G.B @H'F702, R0; refs ram_F702; cycles=7 */
    MEM8[0xF109] = (uint8_t)(R0); /* 39EC; MOV:G.B R0, @H'F109; refs mem_F109; cycles=7 */
    R0 = (uint8_t)(MEM8[0xF703]); /* 39F0; MOV:G.B @H'F703, R0; refs ram_F703; cycles=7 */
    MEM8[0xF10A] = (uint8_t)(R0); /* 39F4; MOV:G.B R0, @H'F10A; refs mem_F10A; cycles=7 */
    R0 = (uint8_t)(MEM8[0xF704]); /* 39F8; MOV:G.B @H'F704, R0; refs ram_F704; cycles=7 */
    MEM8[0xF10B] = (uint8_t)(R0); /* 39FC; MOV:G.B R0, @H'F10B; refs mem_F10B; cycles=7 */
    R0 = (uint8_t)(MEM8[0xF705]); /* 3A00; MOV:G.B @H'F705, R0; refs ram_F705; cycles=7 */
    MEM8[0xF10C] = (uint8_t)(R0); /* 3A04; MOV:G.B R0, @H'F10C; refs mem_F10C; cycles=7 */
    R0 = (uint8_t)(MEM8[0xF700]); /* 3A08; MOV:G.B @H'F700, R0; refs ram_F700; cycles=7 */
    MEM8[0xF10D] = (uint8_t)(R0); /* 3A0C; MOV:G.B R0, @H'F10D; refs mem_F10D; cycles=7 */
    R0 = (uint8_t)(MEM8[0xF701]); /* 3A10; MOV:G.B @H'F701, R0; refs ram_F701; cycles=7 */
    MEM8[0xF10E] = (uint8_t)(R0); /* 3A14; MOV:G.B R0, @H'F10E; refs mem_F10E; cycles=7 */
    R0 = (uint8_t)(P7DR); /* 3A18; MOV:G.B @P7DR, R0; refs P7DR; cycles=7 */
    R0 = ~R0; /* 3A1C; NOT.B R0; cycles=2 */
    R0 &= (uint8_t)(0x03); /* 3A1E; AND.B #H'03, R0; cycles=3 */
    R0 |= (uint8_t)(0xA0); /* 3A21; OR.B #H'A0, R0; cycles=3 */
    MEM8[0xF10F] = (uint8_t)(R0); /* 3A24; MOV:G.B R0, @H'F10F; refs mem_F10F; cycles=7 */
    MEM8[0xF720] = (uint8_t)(0x03); /* 3A28; MOV:G.B #H'03, @H'F720; refs ram_F720; cycles=9 */
loc_3A2D:
    return; /* 3A2D; RTS; cycles=13 */
}

void loc_3A2E(void)
{
    set_flags_tst8(MEM8[0xF721]); /* 3A2E; TST.B @H'F721; refs ram_F721; cycles=7 */
    if (!Z) goto loc_3AC6; /* 3A32; BNE loc_3AC6; cycles=3/7 nt/t */
    MEM8[0xF001] = (uint8_t)(0xA0); /* 3A35; MOV:G.B #H'A0, @H'F001; refs mem_F001; cycles=9 */
    set_flags_btst(MEM8[0xF000], 1); /* 3A3A; BTST.B #1, @H'F000; refs mem_F000; cycles=7 */
    if (Z) goto loc_3AC6; /* 3A3E; BEQ loc_3AC6; cycles=3/7 nt/t */
    R0 = (uint8_t)(MEM8[0xF71F]); /* 3A41; MOV:G.B @H'F71F, R0; refs ram_F71F; cycles=6 */
    R0 |= (uint8_t)(MEM8[0xF723]); /* 3A45; OR.B @H'F723, R0; refs ram_F723; cycles=6 */
    R0 &= (uint8_t)(MEM8[0xF717]); /* 3A49; AND.B @H'F717, R0; refs ram_F717; cycles=6 */
    MEM8[0xF002] = (uint8_t)(R0); /* 3A4D; MOV:G.B R0, @H'F002; refs mem_F002; cycles=6 */
    R0 = (uint8_t)(MEM8[0xF71E]); /* 3A51; MOV:G.B @H'F71E, R0; refs ram_F71E; cycles=6 */
    R0 |= (uint8_t)(MEM8[0xF723]); /* 3A55; OR.B @H'F723, R0; refs ram_F723; cycles=6 */
    R0 &= (uint8_t)(MEM8[0xF716]); /* 3A59; AND.B @H'F716, R0; refs ram_F716; cycles=6 */
    MEM8[0xF003] = (uint8_t)(R0); /* 3A5D; MOV:G.B R0, @H'F003; refs mem_F003; cycles=6 */
    R0 = (uint8_t)(MEM8[0xF71D]); /* 3A61; MOV:G.B @H'F71D, R0; refs ram_F71D; cycles=6 */
    R0 |= (uint8_t)(MEM8[0xF723]); /* 3A65; OR.B @H'F723, R0; refs ram_F723; cycles=6 */
    R0 &= (uint8_t)(MEM8[0xF715]); /* 3A69; AND.B @H'F715, R0; refs ram_F715; cycles=6 */
    MEM8[0xF004] = (uint8_t)(R0); /* 3A6D; MOV:G.B R0, @H'F004; refs mem_F004; cycles=6 */
    R0 = (uint8_t)(MEM8[0xF71C]); /* 3A71; MOV:G.B @H'F71C, R0; refs ram_F71C; cycles=6 */
    R0 |= (uint8_t)(MEM8[0xF723]); /* 3A75; OR.B @H'F723, R0; refs ram_F723; cycles=6 */
    R0 &= (uint8_t)(MEM8[0xF714]); /* 3A79; AND.B @H'F714, R0; refs ram_F714; cycles=6 */
    MEM8[0xF005] = (uint8_t)(R0); /* 3A7D; MOV:G.B R0, @H'F005; refs mem_F005; cycles=6 */
    R0 = (uint8_t)(MEM8[0xF708]); /* 3A81; MOV:G.B @H'F708, R0; refs ram_F708; cycles=6 */
    MEM8[0xF009] = (uint8_t)(R0); /* 3A85; MOV:G.B R0, @H'F009; refs mem_F009; cycles=6 */
    R0 = (uint8_t)(MEM8[0xF709]); /* 3A89; MOV:G.B @H'F709, R0; refs ram_F709; cycles=6 */
    MEM8[0xF00A] = (uint8_t)(R0); /* 3A8D; MOV:G.B R0, @H'F00A; refs mem_F00A; cycles=6 */
    R0 = (uint8_t)(MEM8[0xF70A]); /* 3A91; MOV:G.B @H'F70A, R0; refs ram_F70A; cycles=6 */
    MEM8[0xF00B] = (uint8_t)(R0); /* 3A95; MOV:G.B R0, @H'F00B; refs mem_F00B; cycles=6 */
    R0 = (uint8_t)(MEM8[0xF70B]); /* 3A99; MOV:G.B @H'F70B, R0; refs ram_F70B; cycles=6 */
    MEM8[0xF00C] = (uint8_t)(R0); /* 3A9D; MOV:G.B R0, @H'F00C; refs mem_F00C; cycles=6 */
    R0 = (uint8_t)(MEM8[0xF706]); /* 3AA1; MOV:G.B @H'F706, R0; refs ram_F706; cycles=6 */
    MEM8[0xF00D] = (uint8_t)(R0); /* 3AA5; MOV:G.B R0, @H'F00D; refs mem_F00D; cycles=6 */
    R0 = (uint8_t)(MEM8[0xF707]); /* 3AA9; MOV:G.B @H'F707, R0; refs ram_F707; cycles=6 */
    MEM8[0xF00E] = (uint8_t)(R0); /* 3AAD; MOV:G.B R0, @H'F00E; refs mem_F00E; cycles=6 */
    R0 = (uint8_t)(P7DR); /* 3AB1; MOV:G.B @P7DR, R0; refs P7DR; cycles=6 */
    R0 = ~R0; /* 3AB5; NOT.B R0; cycles=2 */
    R0 &= (uint8_t)(0x03); /* 3AB7; AND.B #H'03, R0; cycles=3 */
    R0 |= (uint8_t)(0xA0); /* 3ABA; OR.B #H'A0, R0; cycles=3 */
    MEM8[0xF00F] = (uint8_t)(R0); /* 3ABD; MOV:G.B R0, @H'F00F; refs mem_F00F; cycles=6 */
    MEM8[0xF721] = (uint8_t)(0x03); /* 3AC1; MOV:G.B #H'03, @H'F721; refs ram_F721; cycles=9 */
loc_3AC6:
    return; /* 3AC6; RTS; cycles=12 */
}

void vec_irq4_3AC7(void)
{
    /* vector sources: irq4 */
    MEM16[--R7] = (uint16_t)(R0); /* 3AC7; MOV:G.W R0, @-R7; cycles=5 */
    set_flags_btst(MEM8[0xF100], 1); /* 3AC9; BTST.B #1, @H'F100; refs mem_F100; cycles=6 */
    if (!Z) goto loc_3C2D; /* 3ACD; BNE loc_3C2D; cycles=3/8 nt/t */
    R0 = (uint8_t)(MEM8[0xF10F]); /* 3AD0; MOV:G.B @H'F10F, R0; refs mem_F10F; cycles=7 */
    set_flags_cmp8(R0, 0xA9); /* 3AD4; CMP:E #H'A9, R0; cycles=2 */
    if (Z) goto loc_3AE0; /* 3AD6; BEQ loc_3AE0; cycles=3/7 nt/t */
    set_flags_cmp8(R0, 0xA8); /* 3AD8; CMP:E #H'A8, R0; cycles=2 */
    if (Z) goto loc_3B62; /* 3ADA; BEQ loc_3B62; cycles=3/7 nt/t */
    goto loc_3C2D; /* 3ADD; BRA loc_3C2D; cycles=8 */
loc_3AE0:
    R0 = (uint8_t)(MEM8[0xF6F0]); /* 3AE0; MOV:G.B @H'F6F0, R0; refs ram_F6F0; cycles=7 */
    R0 &= (uint8_t)(0xC0); /* 3AE4; AND.B #H'C0, R0; cycles=3 */
    MEM8[0xF6F0] = (uint8_t)(R0); /* 3AE7; MOV:G.B R0, @H'F6F0; refs ram_F6F0; cycles=6 */
    R0 = (uint16_t)(MEM16[0xF10C]); /* 3AEB; MOV:G.W @H'F10C, R0; refs mem_F10C; cycles=6 */
    set_flags_cmp16(R0, MEM16[0xF69A]); /* 3AEF; CMP:G.W @H'F69A, R0; refs ram_F69A; cycles=6 */
    if (!Z) { /* 3AF3; BEQ loc_3AFD; cycles=3/8 nt/t */
        MEM8[0xF6F0] |= BIT(5); /* 3AF5; BSET.B #5, @H'F6F0; refs ram_F6F0; cycles=8 */
        MEM16[0xF69A] = (uint16_t)(R0); /* 3AF9; MOV:G.W R0, @H'F69A; refs ram_F69A; cycles=6 */
    }
    R0 = (uint16_t)(MEM16[0xF10A]); /* 3AFD; MOV:G.W @H'F10A, R0; refs mem_F10A; cycles=6 */
    set_flags_cmp16(R0, MEM16[0xF698]); /* 3B01; CMP:G.W @H'F698, R0; refs ram_F698; cycles=6 */
    if (!Z) { /* 3B05; BEQ loc_3B0F; cycles=3/8 nt/t */
        MEM8[0xF6F0] |= BIT(4); /* 3B07; BSET.B #4, @H'F6F0; refs ram_F6F0; cycles=8 */
        MEM16[0xF698] = (uint16_t)(R0); /* 3B0B; MOV:G.W R0, @H'F698; refs ram_F698; cycles=6 */
    }
    R0 = (uint16_t)(MEM16[0xF108]); /* 3B0F; MOV:G.W @H'F108, R0; refs mem_F108; cycles=6 */
    set_flags_cmp16(R0, MEM16[0xF696]); /* 3B13; CMP:G.W @H'F696, R0; refs ram_F696; cycles=6 */
    if (!Z) { /* 3B17; BEQ loc_3B21; cycles=3/8 nt/t */
        MEM8[0xF6F0] |= BIT(3); /* 3B19; BSET.B #3, @H'F6F0; refs ram_F6F0; cycles=8 */
        MEM16[0xF696] = (uint16_t)(R0); /* 3B1D; MOV:G.W R0, @H'F696; refs ram_F696; cycles=6 */
    }
    R0 = (uint16_t)(MEM16[0xF106]); /* 3B21; MOV:G.W @H'F106, R0; refs mem_F106; cycles=6 */
    set_flags_cmp16(R0, MEM16[0xF694]); /* 3B25; CMP:G.W @H'F694, R0; refs ram_F694; cycles=6 */
    if (!Z) { /* 3B29; BEQ loc_3B33; cycles=3/8 nt/t */
        MEM8[0xF6F0] |= BIT(2); /* 3B2B; BSET.B #2, @H'F6F0; refs ram_F6F0; cycles=8 */
        MEM16[0xF694] = (uint16_t)(R0); /* 3B2F; MOV:G.W R0, @H'F694; refs ram_F694; cycles=6 */
    }
    R0 = (uint16_t)(MEM16[0xF104]); /* 3B33; MOV:G.W @H'F104, R0; refs mem_F104; cycles=6 */
    set_flags_cmp16(R0, MEM16[0xF692]); /* 3B37; CMP:G.W @H'F692, R0; refs ram_F692; cycles=6 */
    if (!Z) { /* 3B3B; BEQ loc_3B45; cycles=3/8 nt/t */
        MEM8[0xF6F0] |= BIT(1); /* 3B3D; BSET.B #1, @H'F6F0; refs ram_F6F0; cycles=8 */
        MEM16[0xF692] = (uint16_t)(R0); /* 3B41; MOV:G.W R0, @H'F692; refs ram_F692; cycles=6 */
    }
    R0 = (uint16_t)(MEM16[0xF102]); /* 3B45; MOV:G.W @H'F102, R0; refs mem_F102; cycles=6 */
    set_flags_cmp16(R0, MEM16[0xF690]); /* 3B49; CMP:G.W @H'F690, R0; refs ram_F690; cycles=6 */
    if (!Z) { /* 3B4D; BEQ loc_3B57; cycles=3/8 nt/t */
        MEM8[0xF6F0] |= BIT(0); /* 3B4F; BSET.B #0, @H'F6F0; refs ram_F6F0; cycles=8 */
        MEM16[0xF690] = (uint16_t)(R0); /* 3B53; MOV:G.W R0, @H'F690; refs ram_F690; cycles=6 */
    }
    R0 = (uint8_t)(MEM8[0xF101]); /* 3B57; MOV:G.B @H'F101, R0; refs mem_F101; cycles=6 */
    MEM8[0xF720] &= ~BIT(0); /* 3B5B; BCLR.B #0, @H'F720; refs ram_F720; cycles=8 */
    goto loc_3C2D; /* 3B5F; BRA loc_3C2D; cycles=8 */
loc_3B62:
    R0 = (uint8_t)(MEM8[0xF6F0]); /* 3B62; MOV:G.B @H'F6F0, R0; refs ram_F6F0; cycles=7 */
    R0 &= (uint8_t)(0x3F); /* 3B66; AND.B #H'3F, R0; cycles=3 */
    MEM8[0xF6F0] = (uint8_t)(R0); /* 3B69; MOV:G.B R0, @H'F6F0; refs ram_F6F0; cycles=6 */
    MEM8[0xF6F2] = 0; /* 3B6D; CLR.B @H'F6F2; refs ram_F6F2; cycles=8 */
    R0 = (uint16_t)(MEM16[0xF10C]); /* 3B71; MOV:G.W @H'F10C, R0; refs mem_F10C; cycles=6 */
    set_flags_cmp16(R0, MEM16[0xF69E]); /* 3B75; CMP:G.W @H'F69E, R0; refs ram_F69E; cycles=6 */
    if (!Z) { /* 3B79; BEQ loc_3B83; cycles=3/8 nt/t */
        MEM8[0xF6F0] |= BIT(7); /* 3B7B; BSET.B #7, @H'F6F0; refs ram_F6F0; cycles=8 */
        MEM16[0xF69E] = (uint16_t)(R0); /* 3B7F; MOV:G.W R0, @H'F69E; refs ram_F69E; cycles=6 */
    }
    R0 = (uint16_t)(MEM16[0xF10A]); /* 3B83; MOV:G.W @H'F10A, R0; refs mem_F10A; cycles=6 */
    set_flags_cmp16(R0, MEM16[0xF69C]); /* 3B87; CMP:G.W @H'F69C, R0; refs ram_F69C; cycles=6 */
    if (!Z) { /* 3B8B; BEQ loc_3B95; cycles=3/8 nt/t */
        MEM8[0xF6F0] |= BIT(6); /* 3B8D; BSET.B #6, @H'F6F0; refs ram_F6F0; cycles=8 */
        MEM16[0xF69C] = (uint16_t)(R0); /* 3B91; MOV:G.W R0, @H'F69C; refs ram_F69C; cycles=6 */
    }
    R0 = (uint8_t)(MEM8[0xF109]); /* 3B95; MOV:G.B @H'F109, R0; refs mem_F109; cycles=6 */
    set_flags_cmp8(R0, MEM8[0xF6D0]); /* 3B99; CMP:G.B @H'F6D0, R0; refs ram_F6D0; cycles=6 */
    if (!Z) { /* 3B9D; BEQ loc_3BA7; cycles=3/8 nt/t */
        MEM8[0xF6F2] |= BIT(0); /* 3B9F; BSET.B #0, @H'F6F2; refs ram_F6F2; cycles=8 */
        MEM8[0xF6D0] = (uint8_t)(R0); /* 3BA3; MOV:G.B R0, @H'F6D0; refs ram_F6D0; cycles=6 */
    }
    R0 = (uint8_t)(MEM8[0xF108]); /* 3BA7; MOV:G.B @H'F108, R0; refs mem_F108; cycles=6 */
    set_flags_cmp8(R0, MEM8[0xF6D1]); /* 3BAB; CMP:G.B @H'F6D1, R0; refs ram_F6D1; cycles=6 */
    if (!Z) { /* 3BAF; BEQ loc_3BB9; cycles=3/8 nt/t */
        MEM8[0xF6F2] |= BIT(1); /* 3BB1; BSET.B #1, @H'F6F2; refs ram_F6F2; cycles=8 */
        MEM8[0xF6D1] = (uint8_t)(R0); /* 3BB5; MOV:G.B R0, @H'F6D1; refs ram_F6D1; cycles=6 */
    }
    R0 = (uint8_t)(MEM8[0xF107]); /* 3BB9; MOV:G.B @H'F107, R0; refs mem_F107; cycles=6 */
    set_flags_cmp8(R0, MEM8[0xF6D2]); /* 3BBD; CMP:G.B @H'F6D2, R0; refs ram_F6D2; cycles=6 */
    if (!Z) { /* 3BC1; BEQ loc_3BCB; cycles=3/8 nt/t */
        MEM8[0xF6F2] |= BIT(2); /* 3BC3; BSET.B #2, @H'F6F2; refs ram_F6F2; cycles=8 */
        MEM8[0xF6D2] = (uint8_t)(R0); /* 3BC7; MOV:G.B R0, @H'F6D2; refs ram_F6D2; cycles=6 */
    }
    R0 = (uint8_t)(MEM8[0xF106]); /* 3BCB; MOV:G.B @H'F106, R0; refs mem_F106; cycles=6 */
    set_flags_cmp8(R0, MEM8[0xF6D3]); /* 3BCF; CMP:G.B @H'F6D3, R0; refs ram_F6D3; cycles=6 */
    if (!Z) { /* 3BD3; BEQ loc_3BDD; cycles=3/8 nt/t */
        MEM8[0xF6F2] |= BIT(3); /* 3BD5; BSET.B #3, @H'F6F2; refs ram_F6F2; cycles=8 */
        MEM8[0xF6D3] = (uint8_t)(R0); /* 3BD9; MOV:G.B R0, @H'F6D3; refs ram_F6D3; cycles=6 */
    }
    R0 = (uint8_t)(MEM8[0xF105]); /* 3BDD; MOV:G.B @H'F105, R0; refs mem_F105; cycles=6 */
    set_flags_cmp8(R0, MEM8[0xF6D4]); /* 3BE1; CMP:G.B @H'F6D4, R0; refs ram_F6D4; cycles=6 */
    if (!Z) { /* 3BE5; BEQ loc_3BEF; cycles=3/8 nt/t */
        MEM8[0xF6F2] |= BIT(4); /* 3BE7; BSET.B #4, @H'F6F2; refs ram_F6F2; cycles=8 */
        MEM8[0xF6D4] = (uint8_t)(R0); /* 3BEB; MOV:G.B R0, @H'F6D4; refs ram_F6D4; cycles=6 */
    }
    R0 = (uint8_t)(MEM8[0xF104]); /* 3BEF; MOV:G.B @H'F104, R0; refs mem_F104; cycles=6 */
    set_flags_cmp8(R0, MEM8[0xF6D5]); /* 3BF3; CMP:G.B @H'F6D5, R0; refs ram_F6D5; cycles=6 */
    if (!Z) { /* 3BF7; BEQ loc_3C01; cycles=3/8 nt/t */
        MEM8[0xF6F2] |= BIT(5); /* 3BF9; BSET.B #5, @H'F6F2; refs ram_F6F2; cycles=8 */
        MEM8[0xF6D5] = (uint8_t)(R0); /* 3BFD; MOV:G.B R0, @H'F6D5; refs ram_F6D5; cycles=6 */
    }
    R0 = (uint8_t)(MEM8[0xF103]); /* 3C01; MOV:G.B @H'F103, R0; refs mem_F103; cycles=6 */
    set_flags_cmp8(R0, MEM8[0xF6D6]); /* 3C05; CMP:G.B @H'F6D6, R0; refs ram_F6D6; cycles=6 */
    if (!Z) { /* 3C09; BEQ loc_3C13; cycles=3/8 nt/t */
        MEM8[0xF6F2] |= BIT(6); /* 3C0B; BSET.B #6, @H'F6F2; refs ram_F6F2; cycles=8 */
        MEM8[0xF6D6] = (uint8_t)(R0); /* 3C0F; MOV:G.B R0, @H'F6D6; refs ram_F6D6; cycles=6 */
    }
    R0 = (uint8_t)(MEM8[0xF102]); /* 3C13; MOV:G.B @H'F102, R0; refs mem_F102; cycles=6 */
    set_flags_cmp8(R0, MEM8[0xF6D7]); /* 3C17; CMP:G.B @H'F6D7, R0; refs ram_F6D7; cycles=6 */
    if (!Z) { /* 3C1B; BEQ loc_3C25; cycles=3/8 nt/t */
        MEM8[0xF6F2] |= BIT(7); /* 3C1D; BSET.B #7, @H'F6F2; refs ram_F6F2; cycles=8 */
        MEM8[0xF6D7] = (uint8_t)(R0); /* 3C21; MOV:G.B R0, @H'F6D7; refs ram_F6D7; cycles=6 */
    }
    R0 = (uint8_t)(MEM8[0xF101]); /* 3C25; MOV:G.B @H'F101, R0; refs mem_F101; cycles=6 */
    MEM8[0xF720] &= ~BIT(1); /* 3C29; BCLR.B #1, @H'F720; refs ram_F720; cycles=8 */
loc_3C2D:
    R0 = (uint16_t)(MEM16[R7++]); /* 3C2D; MOV:G.W @R7+, R0; cycles=6 */
    return_from_interrupt(); /* 3C2F; RTE; cycles=14 */
}

void vec_irq3_3C30(void)
{
    /* vector sources: irq3 */
    MEM16[--R7] = (uint16_t)(R0); /* 3C30; MOV:G.W R0, @-R7; cycles=6 */
    set_flags_btst(MEM8[0xF000], 1); /* 3C32; BTST.B #1, @H'F000; refs mem_F000; cycles=7 */
    if (!Z) goto loc_3D96; /* 3C36; BNE loc_3D96; cycles=3/7 nt/t */
    R0 = (uint8_t)(MEM8[0xF00F]); /* 3C39; MOV:G.B @H'F00F, R0; refs mem_F00F; cycles=6 */
    set_flags_cmp8(R0, 0xA9); /* 3C3D; CMP:E #H'A9, R0; cycles=2 */
    if (Z) goto loc_3C49; /* 3C3F; BEQ loc_3C49; cycles=3/8 nt/t */
    set_flags_cmp8(R0, 0xA8); /* 3C41; CMP:E #H'A8, R0; cycles=2 */
    if (Z) goto loc_3CCB; /* 3C43; BEQ loc_3CCB; cycles=3/8 nt/t */
    goto loc_3D96; /* 3C46; BRA loc_3D96; cycles=7 */
loc_3C49:
    R0 = (uint8_t)(MEM8[0xF6F1]); /* 3C49; MOV:G.B @H'F6F1, R0; refs ram_F6F1; cycles=6 */
    R0 &= (uint8_t)(0xC0); /* 3C4D; AND.B #H'C0, R0; cycles=3 */
    MEM8[0xF6F1] = (uint8_t)(R0); /* 3C50; MOV:G.B R0, @H'F6F1; refs ram_F6F1; cycles=7 */
    R0 = (uint16_t)(MEM16[0xF00C]); /* 3C54; MOV:G.W @H'F00C, R0; refs mem_F00C; cycles=7 */
    set_flags_cmp16(R0, MEM16[0xF6AA]); /* 3C58; CMP:G.W @H'F6AA, R0; refs ram_F6AA; cycles=7 */
    if (!Z) { /* 3C5C; BEQ loc_3C66; cycles=3/7 nt/t */
        MEM8[0xF6F1] |= BIT(5); /* 3C5E; BSET.B #5, @H'F6F1; refs ram_F6F1; cycles=9 */
        MEM16[0xF6AA] = (uint16_t)(R0); /* 3C62; MOV:G.W R0, @H'F6AA; refs ram_F6AA; cycles=7 */
    }
    R0 = (uint16_t)(MEM16[0xF00A]); /* 3C66; MOV:G.W @H'F00A, R0; refs mem_F00A; cycles=7 */
    set_flags_cmp16(R0, MEM16[0xF6A8]); /* 3C6A; CMP:G.W @H'F6A8, R0; refs ram_F6A8; cycles=7 */
    if (!Z) { /* 3C6E; BEQ loc_3C78; cycles=3/7 nt/t */
        MEM8[0xF6F1] |= BIT(4); /* 3C70; BSET.B #4, @H'F6F1; refs ram_F6F1; cycles=9 */
        MEM16[0xF6A8] = (uint16_t)(R0); /* 3C74; MOV:G.W R0, @H'F6A8; refs ram_F6A8; cycles=7 */
    }
    R0 = (uint16_t)(MEM16[0xF008]); /* 3C78; MOV:G.W @H'F008, R0; refs mem_F008; cycles=7 */
    set_flags_cmp16(R0, MEM16[0xF6A6]); /* 3C7C; CMP:G.W @H'F6A6, R0; refs ram_F6A6; cycles=7 */
    if (!Z) { /* 3C80; BEQ loc_3C8A; cycles=3/7 nt/t */
        MEM8[0xF6F1] |= BIT(3); /* 3C82; BSET.B #3, @H'F6F1; refs ram_F6F1; cycles=9 */
        MEM16[0xF6A6] = (uint16_t)(R0); /* 3C86; MOV:G.W R0, @H'F6A6; refs ram_F6A6; cycles=7 */
    }
    R0 = (uint16_t)(MEM16[0xF006]); /* 3C8A; MOV:G.W @H'F006, R0; refs mem_F006; cycles=7 */
    set_flags_cmp16(R0, MEM16[0xF6A4]); /* 3C8E; CMP:G.W @H'F6A4, R0; refs ram_F6A4; cycles=7 */
    if (!Z) { /* 3C92; BEQ loc_3C9C; cycles=3/7 nt/t */
        MEM8[0xF6F1] |= BIT(2); /* 3C94; BSET.B #2, @H'F6F1; refs ram_F6F1; cycles=9 */
        MEM16[0xF6A4] = (uint16_t)(R0); /* 3C98; MOV:G.W R0, @H'F6A4; refs ram_F6A4; cycles=7 */
    }
    R0 = (uint16_t)(MEM16[0xF004]); /* 3C9C; MOV:G.W @H'F004, R0; refs mem_F004; cycles=7 */
    set_flags_cmp16(R0, MEM16[0xF6A2]); /* 3CA0; CMP:G.W @H'F6A2, R0; refs ram_F6A2; cycles=7 */
    if (!Z) { /* 3CA4; BEQ loc_3CAE; cycles=3/7 nt/t */
        MEM8[0xF6F1] |= BIT(1); /* 3CA6; BSET.B #1, @H'F6F1; refs ram_F6F1; cycles=9 */
        MEM16[0xF6A2] = (uint16_t)(R0); /* 3CAA; MOV:G.W R0, @H'F6A2; refs ram_F6A2; cycles=7 */
    }
    R0 = (uint16_t)(MEM16[0xF002]); /* 3CAE; MOV:G.W @H'F002, R0; refs mem_F002; cycles=7 */
    set_flags_cmp16(R0, MEM16[0xF6A0]); /* 3CB2; CMP:G.W @H'F6A0, R0; refs ram_F6A0; cycles=7 */
    if (!Z) { /* 3CB6; BEQ loc_3CC0; cycles=3/7 nt/t */
        MEM8[0xF6F1] |= BIT(0); /* 3CB8; BSET.B #0, @H'F6F1; refs ram_F6F1; cycles=9 */
        MEM16[0xF6A0] = (uint16_t)(R0); /* 3CBC; MOV:G.W R0, @H'F6A0; refs ram_F6A0; cycles=7 */
    }
    R0 = (uint8_t)(MEM8[0xF001]); /* 3CC0; MOV:G.B @H'F001, R0; refs mem_F001; cycles=7 */
    MEM8[0xF721] &= ~BIT(0); /* 3CC4; BCLR.B #0, @H'F721; refs ram_F721; cycles=9 */
    goto loc_3D96; /* 3CC8; BRA loc_3D96; cycles=7 */
loc_3CCB:
    R0 = (uint8_t)(MEM8[0xF6F1]); /* 3CCB; MOV:G.B @H'F6F1, R0; refs ram_F6F1; cycles=6 */
    R0 &= (uint8_t)(0x3F); /* 3CCF; AND.B #H'3F, R0; cycles=3 */
    MEM8[0xF6F1] = (uint8_t)(R0); /* 3CD2; MOV:G.B R0, @H'F6F1; refs ram_F6F1; cycles=7 */
    MEM8[0xF6F3] = 0; /* 3CD6; CLR.B @H'F6F3; refs ram_F6F3; cycles=9 */
    R0 = (uint16_t)(MEM16[0xF00C]); /* 3CDA; MOV:G.W @H'F00C, R0; refs mem_F00C; cycles=7 */
    set_flags_cmp16(R0, MEM16[0xF6AE]); /* 3CDE; CMP:G.W @H'F6AE, R0; refs ram_F6AE; cycles=7 */
    if (!Z) { /* 3CE2; BEQ loc_3CEC; cycles=3/7 nt/t */
        MEM8[0xF6F1] |= BIT(7); /* 3CE4; BSET.B #7, @H'F6F1; refs ram_F6F1; cycles=9 */
        MEM16[0xF6AE] = (uint16_t)(R0); /* 3CE8; MOV:G.W R0, @H'F6AE; refs ram_F6AE; cycles=7 */
    }
    R0 = (uint16_t)(MEM16[0xF00A]); /* 3CEC; MOV:G.W @H'F00A, R0; refs mem_F00A; cycles=7 */
    set_flags_cmp16(R0, MEM16[0xF6AC]); /* 3CF0; CMP:G.W @H'F6AC, R0; refs ram_F6AC; cycles=7 */
    if (!Z) { /* 3CF4; BEQ loc_3CFE; cycles=3/7 nt/t */
        MEM8[0xF6F1] |= BIT(6); /* 3CF6; BSET.B #6, @H'F6F1; refs ram_F6F1; cycles=9 */
        MEM16[0xF6AC] = (uint16_t)(R0); /* 3CFA; MOV:G.W R0, @H'F6AC; refs ram_F6AC; cycles=7 */
    }
    R0 = (uint8_t)(MEM8[0xF009]); /* 3CFE; MOV:G.B @H'F009, R0; refs mem_F009; cycles=7 */
    set_flags_cmp8(R0, MEM8[0xF6D8]); /* 3D02; CMP:G.B @H'F6D8, R0; refs ram_F6D8; cycles=7 */
    if (!Z) { /* 3D06; BEQ loc_3D10; cycles=3/7 nt/t */
        MEM8[0xF6F3] |= BIT(0); /* 3D08; BSET.B #0, @H'F6F3; refs ram_F6F3; cycles=9 */
        MEM8[0xF6D8] = (uint8_t)(R0); /* 3D0C; MOV:G.B R0, @H'F6D8; refs ram_F6D8; cycles=7 */
    }
    R0 = (uint8_t)(MEM8[0xF008]); /* 3D10; MOV:G.B @H'F008, R0; refs mem_F008; cycles=7 */
    set_flags_cmp8(R0, MEM8[0xF6D9]); /* 3D14; CMP:G.B @H'F6D9, R0; refs ram_F6D9; cycles=7 */
    if (!Z) { /* 3D18; BEQ loc_3D22; cycles=3/7 nt/t */
        MEM8[0xF6F3] |= BIT(1); /* 3D1A; BSET.B #1, @H'F6F3; refs ram_F6F3; cycles=9 */
        MEM8[0xF6D9] = (uint8_t)(R0); /* 3D1E; MOV:G.B R0, @H'F6D9; refs ram_F6D9; cycles=7 */
    }
    R0 = (uint8_t)(MEM8[0xF007]); /* 3D22; MOV:G.B @H'F007, R0; refs mem_F007; cycles=7 */
    set_flags_cmp8(R0, MEM8[0xF6DA]); /* 3D26; CMP:G.B @H'F6DA, R0; refs ram_F6DA; cycles=7 */
    if (!Z) { /* 3D2A; BEQ loc_3D34; cycles=3/7 nt/t */
        MEM8[0xF6F3] |= BIT(2); /* 3D2C; BSET.B #2, @H'F6F3; refs ram_F6F3; cycles=9 */
        MEM8[0xF6DA] = (uint8_t)(R0); /* 3D30; MOV:G.B R0, @H'F6DA; refs ram_F6DA; cycles=7 */
    }
    R0 = (uint8_t)(MEM8[0xF006]); /* 3D34; MOV:G.B @H'F006, R0; refs mem_F006; cycles=7 */
    set_flags_cmp8(R0, MEM8[0xF6DB]); /* 3D38; CMP:G.B @H'F6DB, R0; refs ram_F6DB; cycles=7 */
    if (!Z) { /* 3D3C; BEQ loc_3D46; cycles=3/7 nt/t */
        MEM8[0xF6F3] |= BIT(3); /* 3D3E; BSET.B #3, @H'F6F3; refs ram_F6F3; cycles=9 */
        MEM8[0xF6DB] = (uint8_t)(R0); /* 3D42; MOV:G.B R0, @H'F6DB; refs ram_F6DB; cycles=7 */
    }
    R0 = (uint8_t)(MEM8[0xF005]); /* 3D46; MOV:G.B @H'F005, R0; refs mem_F005; cycles=7 */
    set_flags_cmp8(R0, MEM8[0xF6DC]); /* 3D4A; CMP:G.B @H'F6DC, R0; refs ram_F6DC; cycles=7 */
    if (!Z) { /* 3D4E; BEQ loc_3D58; cycles=3/7 nt/t */
        MEM8[0xF6F3] |= BIT(4); /* 3D50; BSET.B #4, @H'F6F3; refs ram_F6F3; cycles=9 */
        MEM8[0xF6DC] = (uint8_t)(R0); /* 3D54; MOV:G.B R0, @H'F6DC; refs ram_F6DC; cycles=7 */
    }
    R0 = (uint8_t)(MEM8[0xF004]); /* 3D58; MOV:G.B @H'F004, R0; refs mem_F004; cycles=7 */
    set_flags_cmp8(R0, MEM8[0xF6DD]); /* 3D5C; CMP:G.B @H'F6DD, R0; refs ram_F6DD; cycles=7 */
    if (!Z) { /* 3D60; BEQ loc_3D6A; cycles=3/7 nt/t */
        MEM8[0xF6F3] |= BIT(5); /* 3D62; BSET.B #5, @H'F6F3; refs ram_F6F3; cycles=9 */
        MEM8[0xF6DD] = (uint8_t)(R0); /* 3D66; MOV:G.B R0, @H'F6DD; refs ram_F6DD; cycles=7 */
    }
    R0 = (uint8_t)(MEM8[0xF003]); /* 3D6A; MOV:G.B @H'F003, R0; refs mem_F003; cycles=7 */
    set_flags_cmp8(R0, MEM8[0xF6DE]); /* 3D6E; CMP:G.B @H'F6DE, R0; refs ram_F6DE; cycles=7 */
    if (!Z) { /* 3D72; BEQ loc_3D7C; cycles=3/7 nt/t */
        MEM8[0xF6F3] |= BIT(6); /* 3D74; BSET.B #6, @H'F6F3; refs ram_F6F3; cycles=9 */
        MEM8[0xF6DE] = (uint8_t)(R0); /* 3D78; MOV:G.B R0, @H'F6DE; refs ram_F6DE; cycles=7 */
    }
    R0 = (uint8_t)(MEM8[0xF002]); /* 3D7C; MOV:G.B @H'F002, R0; refs mem_F002; cycles=7 */
    set_flags_cmp8(R0, MEM8[0xF6DF]); /* 3D80; CMP:G.B @H'F6DF, R0; refs ram_F6DF; cycles=7 */
    if (!Z) { /* 3D84; BEQ loc_3D8E; cycles=3/7 nt/t */
        MEM8[0xF6F3] |= BIT(7); /* 3D86; BSET.B #7, @H'F6F3; refs ram_F6F3; cycles=9 */
        MEM8[0xF6DF] = (uint8_t)(R0); /* 3D8A; MOV:G.B R0, @H'F6DF; refs ram_F6DF; cycles=7 */
    }
    R0 = (uint8_t)(MEM8[0xF001]); /* 3D8E; MOV:G.B @H'F001, R0; refs mem_F001; cycles=7 */
    MEM8[0xF721] &= ~BIT(1); /* 3D92; BCLR.B #1, @H'F721; refs ram_F721; cycles=9 */
loc_3D96:
    R0 = (uint16_t)(MEM16[R7++]); /* 3D96; MOV:G.W @R7+, R0; cycles=5 */
    return_from_interrupt(); /* 3D98; RTE; cycles=13 */
}

void vec_ad_adi_3D99(void)
{
    /* vector sources: ad_adi */
    ADCSR &= ~BIT(5); /* 3D99; BCLR.B #5, @ADCSR; clear ADST (bit 5) of ADCSR; refs ADCSR; cycles=8 */
    push_registers(R0, R1, R2, R3, R4, R5); /* 3D9D; STM.W {R0,R1,R2,R3,R4,R5}, @-SP; cycles=24 */
    R0 = (uint8_t)(MEM8[0xF68A]); /* 3D9F; MOV:G.B @H'F68A, R0; refs ram_F68A; cycles=6 */
    R0 = mulxu8(R0, 0x14); /* 3DA3; MULXU.B #H'14, R0; cycles=19 */
    R1 = (uint16_t)(ADDRA_H); /* 3DA6; MOV:G.W @ADDRA_H, R1; refs ADDRA_H; ADDRA W read high TEMP access; cycles=7 */
    R1 = swap_bytes(R1); /* 3DAA; SWAP.B R1; cycles=3 */
    R1 = zero_extend8(R1); /* 3DAC; EXTU.B R1; cycles=3 */
    R1 = (uint8_t)(MEM8[R1 - 0x304A]); /* 3DAE; MOV:G.B @(-H'304A,R1), R1; cycles=7 */
    R0 += (uint16_t)(R1); /* 3DB2; ADD:G.W R1, R0; cycles=3 */
    R0 = divxu8(R0, 0x15); /* 3DB4; DIVXU.B #H'15, R0; cycles=23 */
    set_flags_cmp8(R0, MEM8[0xF68A]); /* 3DB7; CMP:G.B @H'F68A, R0; refs ram_F68A; cycles=6 */
    if (Z) goto loc_3E08; /* 3DBB; BEQ loc_3E08; cycles=3/8 nt/t */
    R2 = (uint8_t)(MEM8[0xF68A]); /* 3DBD; MOV:G.B @H'F68A, R2; refs ram_F68A; cycles=6 */
    MEM8[0xF68A] = (uint8_t)(R0); /* 3DC1; MOV:G.B R0, @H'F68A; refs ram_F68A; cycles=6 */
    set_flags_cmp8(MEM8[0xF731], 0x03); /* 3DC5; CMP:G.B #H'03, @H'F731; refs ram_F731; cycles=6 */
    if (!C && !Z) goto loc_3E08; /* 3DCA; BHI loc_3E08; cycles=3/7 nt/t */
    R0 = zero_extend8(R0); /* 3DCC; EXTU.B R0; cycles=3 */
    R2 = zero_extend8(R2); /* 3DCE; EXTU.B R2; cycles=3 */
    R0 = mulxu16(R0, 0x0101); /* 3DD0; MULXU.W #H'0101, R0; cycles=25 */
    R2 = mulxu16(R2, 0x0101); /* 3DD4; MULXU.W #H'0101, R2; cycles=25 */
    R1 -= (uint16_t)(R3); /* 3DD8; SUB.W R3, R1; cycles=3 */
    R0 = (uint16_t)(MEM16[0xE102]); /* 3DDA; MOV:G.W @H'E102, R0; refs mem_E102; cycles=7 */
    R1 += (uint16_t)(R0); /* 3DDE; ADD:G.W R0, R1; cycles=3 */
    R2 = (uint16_t)(R1); /* 3DE0; MOV:G.W R1, R2; cycles=3 */
    if (C) goto loc_3DF0; /* 3DE2; BCS loc_3DF0; cycles=3/7 nt/t */
    R2 -= (uint16_t)(R0); /* 3DE4; SUB.W R0, R2; cycles=3 */
    set_flags_cmp16(R2, 0x8000); /* 3DE6; CMP:I #H'8000, R2; cycles=3 */
    if (C || Z) goto loc_3DFA; /* 3DE9; BLS loc_3DFA; cycles=3/8 nt/t */
    R1 = (uint16_t)(0x0000); /* 3DEB; MOV:I.W #H'0000, R1; dataflow R1=0x0000; cycles=3 */
    goto loc_3DFA; /* 3DEE; BRA loc_3DFA; cycles=7 */
loc_3DF0:
    R0 -= (uint16_t)(R2); /* 3DF0; SUB.W R2, R0; cycles=3 */
    set_flags_cmp16(R0, 0x8000); /* 3DF2; CMP:I #H'8000, R0; cycles=3 */
    if (C || Z) goto loc_3DFA; /* 3DF5; BLS loc_3DFA; cycles=3/8 nt/t */
    R1 = (uint16_t)(0xFFFF); /* 3DF7; MOV:I.W #H'FFFF, R1; dataflow R1=0xFFFF; cycles=3 */
loc_3DFA:
    set_flags_cmp16(R1, MEM16[0xE102]); /* 3DFA; CMP:G.W @H'E102, R1; refs mem_E102; cycles=7 */
    if (Z) goto loc_3E08; /* 3DFE; BEQ loc_3E08; cycles=3/7 nt/t */
    MEM16[0xF68E] = (uint16_t)(R1); /* 3E00; MOV:G.W R1, @H'F68E; refs ram_F68E; cycles=7 */
    MEM8[0xF689] |= BIT(7); /* 3E04; BSET.B #7, @H'F689; refs ram_F689; cycles=9 */
loc_3E08:
    R0 = (uint8_t)(MEM8[0xF68B]); /* 3E08; MOV:G.B @H'F68B, R0; refs ram_F68B; cycles=7 */
    R0 = mulxu8(R0, 0x14); /* 3E0C; MULXU.B #H'14, R0; cycles=19 */
    R1 = (uint16_t)(ADDRB_H); /* 3E0F; MOV:G.W @ADDRB_H, R1; refs ADDRB_H; ADDRB W read high TEMP access; cycles=6 */
    R1 = swap_bytes(R1); /* 3E13; SWAP.B R1; cycles=3 */
    R1 = zero_extend8(R1); /* 3E15; EXTU.B R1; cycles=3 */
    R0 += (uint16_t)(R1); /* 3E17; ADD:G.W R1, R0; cycles=3 */
    R0 = divxu8(R0, 0x15); /* 3E19; DIVXU.B #H'15, R0; cycles=23 */
    set_flags_tst16(MEM16[0xF68C]); /* 3E1C; TST.W @H'F68C; refs ram_F68C; cycles=7 */
    if (Z) goto loc_3E28; /* 3E20; BEQ loc_3E28; cycles=3/7 nt/t */
    set_flags_cmp8(R0, MEM8[0xF68B]); /* 3E22; CMP:G.B @H'F68B, R0; refs ram_F68B; cycles=7 */
    if (Z) goto loc_3E4D; /* 3E26; BEQ loc_3E4D; cycles=3/7 nt/t */
loc_3E28:
    MEM8[0xF68B] = (uint8_t)(R0); /* 3E28; MOV:G.B R0, @H'F68B; refs ram_F68B; cycles=7 */
    R0 = zero_extend8(R0); /* 3E2C; EXTU.B R0; cycles=3 */
    R3 = (uint16_t)(R0); /* 3E2E; MOV:G.W R0, R3; cycles=3 */
    R3 = mulxu8(R3, R3); /* 3E30; MULXU.B R3, R3; cycles=18 */
    R2 = 0; /* 3E32; CLR.W R2; dataflow R2=0x0000; cycles=3 */
    R2 = divxu16(R2, 0x00C8); /* 3E34; DIVXU.W #H'00C8, R2; cycles=29 */
    R0 = mulxu8(R0, 0x04); /* 3E38; MULXU.B #H'04, R0; cycles=19 */
    R0 += (uint16_t)(0x00AB); /* 3E3B; ADD:G.W #H'00AB, R0; cycles=4 */
    R0 += (uint16_t)(R3); /* 3E3F; ADD:G.W R3, R0; cycles=3 */
    set_flags_btst(P7DR, 4); /* 3E41; BTST.B #4, @P7DR; refs P7DR; cycles=6 */
    if (Z) { /* 3E45; BNE loc_3E49; cycles=3/8 nt/t */
        R0 >>= 1; /* 3E47; SHLR.W R0; cycles=3 */
    }
    MEM16[0xF68C] = (uint16_t)(R0); /* 3E49; MOV:G.W R0, @H'F68C; refs ram_F68C; cycles=6 */
loc_3E4D:
    pop_registers(R0, R1, R2, R3, R4, R5); /* 3E4D; LDM.W @SP+, {R0,R1,R2,R3,R4,R5}; cycles=30 */
    ADCSR &= ~BIT(7); /* 3E4F; BCLR.B #7, @ADCSR; clear ADF (bit 7) of ADCSR; refs ADCSR; cycles=8 */
    return_from_interrupt(); /* 3E53; RTE; cycles=14 */
}

void loc_3E54(void)
{
    set_flags_btst(R2, 7); /* 3E54; BTST.B #7, R2; cycles=2 */
    if (Z) goto loc_3E9A; /* 3E56; BEQ loc_3E9A; cycles=3/7 nt/t */
    R0 = (uint8_t)(MEM8[0xF9B5]); /* 3E58; MOV:G.B @H'F9B5, R0; refs ram_F9B5; cycles=7 */
    R0 = zero_extend8(R0); /* 3E5C; EXTU.B R0; cycles=3 */
    R0 <<= 1; /* 3E5E; SHLL.W R0; cycles=3 */
    R1 = (uint8_t)(MEM8[0xF9B0]); /* 3E60; MOV:G.B @H'F9B0, R1; refs ram_F9B0; cycles=7 */
    R1 = zero_extend8(R1); /* 3E64; EXTU.B R1; cycles=3 */
    R1 <<= 1; /* 3E66; SHLL.W R1; cycles=3 */
loc_3E68:
    set_flags_cmp8(R1, R0); /* 3E68; CMP:G.B R0, R1; cycles=2 */
    if (Z) goto loc_3E76; /* 3E6A; BEQ loc_3E76; cycles=3/7 nt/t */
    set_flags_cmp16(R3, MEM16[R0 - 0x0790]); /* 3E6C; CMP:G.W @(-H'0790,R0), R3; cycles=7 */
    if (Z) goto loc_3E9A; /* 3E70; BEQ loc_3E9A; cycles=3/7 nt/t */
    R0 += (uint8_t)(2); /* 3E72; ADD:Q.B #2, R0; cycles=4 */
    goto loc_3E68; /* 3E74; BRA loc_3E68; cycles=7 */
loc_3E76:
    MEM16[R1 - 0x0790] = (uint16_t)(R3); /* 3E76; MOV:G.W R3, @(-H'0790,R1); cycles=7 */
    MEM8[0xF9B0] += (uint8_t)(1); /* 3E7A; ADD:Q.B #1, @H'F9B0; refs ram_F9B0; cycles=9 */
    MEM8[0xF9B0] &= ~BIT(7); /* 3E7E; BCLR.B #7, @H'F9B0; refs ram_F9B0; cycles=9 */
loc_3E82:
    R0 = (uint8_t)(MEM8[0xF9B0]); /* 3E82; MOV:G.B @H'F9B0, R0; refs ram_F9B0; cycles=7 */
    R0 += (uint8_t)(1); /* 3E86; ADD:Q.B #1, R0; cycles=4 */
    R0 &= (uint8_t)(0x7F); /* 3E88; AND.B #H'7F, R0; cycles=3 */
    set_flags_cmp8(R0, MEM8[0xF9B5]); /* 3E8B; CMP:G.B @H'F9B5, R0; refs ram_F9B5; cycles=6 */
    if (!Z) goto loc_3E9A; /* 3E8F; BNE loc_3E9A; cycles=3/8 nt/t */
    push_registers(R2, R3); /* 3E91; STM.W {R2,R3}, @-SP; cycles=12 */
    loc_3FD3(); /* 3E93; BSR loc_3FD3; cycles=14 */
    pop_registers(R2, R3); /* 3E96; LDM.W @SP+, {R2,R3}; cycles=14 */
    goto loc_3E82; /* 3E98; BRA loc_3E82; cycles=7 */
loc_3E9A:
    set_flags_btst(R2, 6); /* 3E9A; BTST.B #6, R2; cycles=2 */
    if (Z) goto loc_3ECB; /* 3E9C; BEQ loc_3ECB; cycles=3/7 nt/t */
    R0 = (uint8_t)(MEM8[0xF9B9]); /* 3E9E; MOV:G.B @H'F9B9, R0; refs ram_F9B9; cycles=7 */
    R0 = zero_extend8(R0); /* 3EA2; EXTU.B R0; cycles=3 */
    R0 <<= 1; /* 3EA4; SHLL.W R0; cycles=3 */
    R1 = (uint8_t)(MEM8[0xF9B4]); /* 3EA6; MOV:G.B @H'F9B4, R1; refs ram_F9B4; cycles=7 */
    R1 = zero_extend8(R1); /* 3EAA; EXTU.B R1; cycles=3 */
    R1 <<= 1; /* 3EAC; SHLL.W R1; cycles=3 */
loc_3EAE:
    set_flags_cmp8(R1, R0); /* 3EAE; CMP:G.B R0, R1; cycles=2 */
    if (Z) goto loc_3EBF; /* 3EB0; BEQ loc_3EBF; cycles=3/7 nt/t */
    set_flags_cmp16(R3, MEM16[R0 - 0x0690]); /* 3EB2; CMP:G.W @(-H'0690,R0), R3; cycles=7 */
    if (Z) goto loc_3ECB; /* 3EB6; BEQ loc_3ECB; cycles=3/7 nt/t */
    R0 += (uint8_t)(2); /* 3EB8; ADD:Q.B #2, R0; cycles=4 */
    R0 &= (uint8_t)(0x3F); /* 3EBA; AND.B #H'3F, R0; cycles=3 */
    goto loc_3EAE; /* 3EBD; BRA loc_3EAE; cycles=8 */
loc_3EBF:
    MEM16[R1 - 0x0690] = (uint16_t)(R3); /* 3EBF; MOV:G.W R3, @(-H'0690,R1); cycles=6 */
    MEM8[0xF9B4] += (uint8_t)(1); /* 3EC3; ADD:Q.B #1, @H'F9B4; refs ram_F9B4; cycles=8 */
    MEM8[0xF9B4] &= ~BIT(5); /* 3EC7; BCLR.B #5, @H'F9B4; refs ram_F9B4; cycles=8 */
loc_3ECB:
    return; /* 3ECB; RTS; cycles=13 */
}

void loc_3ECC(void)
{
    push_registers(R0, R1, R2, R3, R4); /* 3ECC; STM.W {R0,R1,R2,R3,R4}, @-SP; cycles=21 */
    R5 = zero_extend8(R5); /* 3ECE; EXTU.B R5; cycles=3 */
    set_flags_cmp8(R5, 0x03); /* 3ED0; CMP:E #H'03, R5; cycles=2 */
    if (C || Z) goto loc_3ED9; /* 3ED2; BLS loc_3ED9; cycles=3/7 nt/t */
    loc_3F40(); /* 3ED4; BSR loc_3F40; cycles=13 */
    goto loc_3F25; /* 3ED7; BRA loc_3F25; cycles=8 */
loc_3ED9:
    R3 = (uint8_t)(R5); /* 3ED9; MOV:G.B R5, R3; cycles=2 */
    set_flags_cmp8(R5, 0x00); /* 3EDB; CMP:E #H'00, R5; cycles=2 */
    if (Z) goto loc_3EE9; /* 3EDD; BEQ loc_3EE9; cycles=3/8 nt/t */
    set_flags_cmp8(R5, 0x01); /* 3EDF; CMP:E #H'01, R5; cycles=2 */
    if (Z) goto loc_3EEE; /* 3EE1; BEQ loc_3EEE; cycles=3/8 nt/t */
    set_flags_cmp8(R5, 0x02); /* 3EE3; CMP:E #H'02, R5; cycles=2 */
    if (Z) goto loc_3EF3; /* 3EE5; BEQ loc_3EF3; cycles=3/8 nt/t */
    goto loc_3EF8; /* 3EE7; BRA loc_3EF8; cycles=8 */
loc_3EE9:
    R5 = (uint16_t)(0x0080); /* 3EE9; MOV:I.W #H'0080, R5; dataflow R5=0x0080; cycles=3 */
    goto loc_3EFB; /* 3EEC; BRA loc_3EFB; cycles=7 */
loc_3EEE:
    R5 = (uint16_t)(0x00C0); /* 3EEE; MOV:I.W #H'00C0, R5; dataflow R5=0x00C0; cycles=3 */
    goto loc_3EFB; /* 3EF1; BRA loc_3EFB; cycles=8 */
loc_3EF3:
    R5 = (uint16_t)(0x0090); /* 3EF3; MOV:I.W #H'0090, R5; dataflow R5=0x0090; cycles=3 */
    goto loc_3EFB; /* 3EF6; BRA loc_3EFB; cycles=7 */
loc_3EF8:
    R5 = (uint16_t)(0x00D0); /* 3EF8; MOV:I.W #H'00D0, R5; dataflow R5=0x00D0; cycles=3 */
loc_3EFB:
    R3 = mulxu8(R3, 0x10); /* 3EFB; MULXU.B #H'10, R3; cycles=19 */
    R3 += (uint16_t)(0xFAB0); /* 3EFE; ADD:G.W #H'FAB0, R3; cycles=4 */
    R1 = 0; /* 3F02; CLR.W R1; dataflow R1=0x0000; cycles=3 */
loc_3F04:
    R2 = (uint8_t)(MEM8[R1 - 0x0510]); /* 3F04; MOV:G.B @(-H'0510,R1), R2; cycles=7 */
    set_flags_cmp8(R2, MEM8[R3]); /* 3F08; CMP:G.B @R3, R2; cycles=6 */
    if (!Z) { /* 3F0A; BEQ loc_3F10; cycles=3/7 nt/t */
        MEM8[R3] = (uint8_t)(R2); /* 3F0C; MOV:G.B R2, @R3; cycles=6 */
        loc_3F28(); /* 3F0E; BSR loc_3F28; cycles=13 */
    }
    R1 += (uint8_t)(1); /* 3F10; ADD:Q.B #1, R1; cycles=4 */
    R3 += (uint8_t)(1); /* 3F12; ADD:Q.B #1, R3; cycles=4 */
    set_flags_cmp8(R1, 0x10); /* 3F14; CMP:E #H'10, R1; cycles=2 */
    if (Z) goto loc_3F1A; /* 3F16; BEQ loc_3F1A; cycles=3/7 nt/t */
    goto loc_3F04; /* 3F18; BRA loc_3F04; cycles=7 */
loc_3F1A:
    MEM16[0xFB00] = (uint16_t)(0x00E0); /* 3F1A; MOV:G.W #H'00E0, @H'FB00; refs ram_FB00; cycles=11 */
    R4 = (uint16_t)(0x00E0); /* 3F20; MOV:I.W #H'00E0, R4; dataflow R4=0x00E0; cycles=3 */
    loc_3F40(); /* 3F23; BSR loc_3F40; cycles=14 */
loc_3F25:
    pop_registers(R0, R1, R2, R3, R4); /* 3F25; LDM.W @SP+, {R0,R1,R2,R3,R4}; cycles=26 */
    return; /* 3F27; RTS; cycles=13 */
}

void loc_3F28(void)
{
    R4 = (uint16_t)(R5); /* 3F28; MOV:G.W R5, R4; cycles=3 */
    R4 += (uint8_t)(R1); /* 3F2A; ADD:G.B R1, R4; cycles=2 */
    set_flags_cmp16(R4, MEM16[0xFB00]); /* 3F2C; CMP:G.W @H'FB00, R4; refs ram_FB00; cycles=7 */
    if (!Z) { /* 3F30; BEQ loc_3F38; cycles=3/7 nt/t */
        MEM16[0xFB00] = (uint16_t)(R4); /* 3F32; MOV:G.W R4, @H'FB00; refs ram_FB00; cycles=7 */
        loc_3F40(); /* 3F36; BSR loc_3F40; cycles=13 */
    }
    R4 = (uint16_t)(0x0200); /* 3F38; MOV:I.W #H'0200, R4; dataflow R4=0x0200; cycles=3 */
    R4 += (uint8_t)(R2); /* 3F3B; ADD:G.B R2, R4; cycles=2 */
    loc_3F40(); /* 3F3D; BSR loc_3F40; cycles=14 */
    return; /* 3F3F; RTS; cycles=13 */
}

void loc_3F40(void)
{
    MEM16[--R7] = (uint16_t)(SR); /* 3F40; STC.W SR, @-R7; cycles=8 */
    SR &= (uint16_t)(0x00FF); /* 3F42; ANDC.W #H'00FF, SR; cycles=4 */
    SR |= (uint16_t)(0x0600); /* 3F46; ORC.W #H'0600, SR; cycles=4 */
    do {
        R0 = read_eclock(MEM8[0xF200]); /* 3F4A; MOVFPE.B @H'F200, R0; LCD status read from E-clock H'F200; LCD busy-flag poll: read H'F200, test bit 7, branch until clear; refs mem_F200; cycles=13 */
        set_flags_btst(R0, 7); /* 3F4F; BTST.B #7, R0; LCD busy-flag poll: read H'F200, test bit 7, branch until clear; cycles=2 */
    } while (!Z); /* 3F51; BNE loc_3F4A; LCD busy-flag poll: read H'F200, test bit 7, branch until clear; cycles=3/8 nt/t */
    set_flags_btst(R4, 8); /* 3F53; BTST.W #8, R4; cycles=3 */
    if (!Z) goto loc_3F6D; /* 3F55; BNE loc_3F6D; cycles=3/8 nt/t */
    set_flags_btst(R4, 9); /* 3F57; BTST.W #9, R4; cycles=3 */
    if (!Z) goto loc_3F62; /* 3F59; BNE loc_3F62; cycles=3/8 nt/t */
    write_eclock(MEM8[0xF200], R4); /* 3F5B; MOVTPE.B R4, @H'F200; LCD command/address write to E-clock H'F200; refs mem_F200; cycles=13 */
    goto loc_3F72; /* 3F60; BRA loc_3F72; cycles=7 */
loc_3F62:
    write_eclock(MEM8[0xF201], R4); /* 3F62; MOVTPE.B R4, @H'F201; LCD data write to E-clock H'F201; refs mem_F201; cycles=13 */
    MEM16[0xFB00] += (uint16_t)(1); /* 3F67; ADD:Q.W #1, @H'FB00; refs ram_FB00; cycles=8 */
    goto loc_3F72; /* 3F6B; BRA loc_3F72; cycles=8 */
loc_3F6D:
    R4 = read_eclock(MEM8[0xF201]); /* 3F6D; MOVFPE.B @H'F201, R4; LCD data read from E-clock H'F201; refs mem_F201; cycles=13 */
loc_3F72:
    SR = (uint16_t)(MEM16[R7++]); /* 3F72; LDC.W @R7+, SR; cycles=7 */
    return; /* 3F74; RTS; cycles=12 */
}

void loc_3FD3(void)
{
    set_flags_tst8(MEM8[0xFAA2]); /* 3FD3; TST.B @H'FAA2; refs ram_FAA2; cycles=6 */
    if (!Z) goto loc_3FEE; /* 3FD7; BNE loc_3FEE; cycles=3/8 nt/t */
    set_flags_btst(MEM8[0xFAA5], 7); /* 3FD9; BTST.B #7, @H'FAA5; refs ram_FAA5; cycles=6 */
    if (Z) goto loc_3FE5; /* 3FDD; BEQ loc_3FE5; cycles=3/8 nt/t */
    set_flags_tst8(MEM8[0xF9C3]); /* 3FDF; TST.B @H'F9C3; refs ram_F9C3; cycles=6 */
    if (!Z) goto loc_3FEE; /* 3FE3; BNE loc_3FEE; cycles=3/8 nt/t */
loc_3FE5:
    set_flags_tst8(MEM8[0xF9C0]); /* 3FE5; TST.B @H'F9C0; refs ram_F9C0; cycles=6 */
    if (!Z) goto loc_3FEE; /* 3FE9; BNE loc_3FEE; cycles=3/8 nt/t */
    loc_BAF2(); /* 3FEB; BSR loc_BAF2; cycles=14 */
loc_3FEE:
    return; /* 3FEE; RTS; cycles=12 */
}

void loc_3FEF(void)
{
    set_flags_tst8(MEM8[0xF9C5]); /* 3FEF; TST.B @H'F9C5; refs ram_F9C5; cycles=6 */
    if (!Z) goto loc_4007; /* 3FF3; BNE loc_4007; cycles=3/8 nt/t */
    MEM8[0xF9B5] = 0; /* 3FF5; CLR.B @H'F9B5; refs ram_F9B5; cycles=8 */
    MEM8[0xF9B0] = 0; /* 3FF9; CLR.B @H'F9B0; refs ram_F9B0; cycles=8 */
    MEM8[0xFAA5] &= ~BIT(7); /* 3FFD; BCLR.B #7, @H'FAA5; refs ram_FAA5; cycles=8 */
    if (Z) goto loc_400B; /* 4001; BEQ loc_400B; cycles=3/8 nt/t */
    loc_400C(); /* 4003; BSR loc_400C; cycles=14 */
    goto loc_400B; /* 4005; BRA loc_400B; cycles=8 */
loc_4007:
    MEM8[0xFAA5] |= BIT(7); /* 4007; BSET.B #7, @H'FAA5; refs ram_FAA5; cycles=8 */
loc_400B:
    return; /* 400B; RTS; cycles=13 */
}

void loc_400C(void)
{
    MEM8[0xF730] = 0; /* 400C; CLR.B @H'F730; refs ram_F730; cycles=9 */
    MEM8[0xF756] = 0; /* 4010; CLR.B @H'F756; refs ram_F756; cycles=9 */
    MEM8[0xF757] = 0; /* 4014; CLR.B @H'F757; refs ram_F757; cycles=9 */
    MEM8[0xF758] = 0; /* 4018; CLR.B @H'F758; refs ram_F758; cycles=9 */
    MEM8[0xF759] = 0; /* 401C; CLR.B @H'F759; refs ram_F759; cycles=9 */
    MEM16[0xF732] = 0; /* 4020; CLR.W @H'F732; refs ram_F732; cycles=9 */
    MEM16[0xF75C] = 0; /* 4024; CLR.W @H'F75C; refs ram_F75C; cycles=9 */
    MEM8[0xFB03] = 0; /* 4028; CLR.B @H'FB03; refs ram_FB03; cycles=9 */
    MEM16[0xE046] = 0; /* 402C; CLR.W @H'E046; refs mem_E046; cycles=9 */
    MEM16[0xF76A] = 0; /* 4030; CLR.W @H'F76A; refs ram_F76A; cycles=9 */
    MEM8[0xF791] = 0; /* 4034; CLR.B @H'F791; refs ram_F791; cycles=9 */
    MEM8[0xF795] = 0; /* 4038; CLR.B @H'F795; refs ram_F795; cycles=9 */
    MEM8[0xF76E] = 0; /* 403C; CLR.B @H'F76E; refs ram_F76E; cycles=9 */
    loc_4075(); /* 4040; BSR loc_4075; cycles=13 */
    loc_4217(); /* 4042; BSR loc_4217; cycles=13 */
    return; /* 4045; RTS; cycles=13 */
}

void loc_4046(void)
{
    set_flags_tst8(MEM8[0xF9C4]); /* 4046; TST.B @H'F9C4; refs ram_F9C4; cycles=7 */
    if (!Z) goto loc_4058; /* 404A; BNE loc_4058; cycles=3/7 nt/t */
    set_flags_btst(MEM8[0xFAA5], 7); /* 404C; BTST.B #7, @H'FAA5; refs ram_FAA5; cycles=7 */
    if (Z) goto loc_4059; /* 4050; BEQ loc_4059; cycles=3/7 nt/t */
    set_flags_tst8(MEM8[0xF9C3]); /* 4052; TST.B @H'F9C3; refs ram_F9C3; cycles=7 */
    if (Z) goto loc_4059; /* 4056; BEQ loc_4059; cycles=3/7 nt/t */
loc_4058:
    return; /* 4058; RTS; cycles=12 */
}

void loc_4075(void)
{
    R0 = 0; /* 4075; CLR.W R0; dataflow R0=0x0000; cycles=3 */
loc_4077:
    MEM16[R0 - 0x2000] = 0; /* 4077; CLR.W @(-H'2000,R0); cycles=8 */
    MEM16[R0 - 0x1C00] = 0; /* 407B; CLR.W @(-H'1C00,R0); cycles=8 */
    MEM16[R0 - 0x1800] = 0; /* 407F; CLR.W @(-H'1800,R0); cycles=8 */
    set_flags_cmp16(R0, 0x0200); /* 4083; CMP:I #H'0200, R0; cycles=3 */
    if (C) { /* 4086; BCC loc_408C; cycles=3/7 nt/t */
        MEM16[R0 - 0x1400] = 0; /* 4088; CLR.W @(-H'1400,R0); cycles=9 */
    }
    R0 += (uint16_t)(2); /* 408C; ADD:Q.W #2, R0; cycles=4 */
    set_flags_cmp16(R0, 0x0400); /* 408E; CMP:I #H'0400, R0; cycles=3 */
    if (!Z) goto loc_4077; /* 4091; BNE loc_4077; cycles=3/8 nt/t */
    loc_4096(); /* 4093; BSR loc_4096; cycles=14 */
    return; /* 4095; RTS; cycles=13 */
}

void loc_4096(void)
{
    MEM16[0xE000] = (uint16_t)(0x0080); /* 4096; MOV:G.W #H'0080, @H'E000; refs mem_E000; cycles=11 */
    MEM16[0xE006] = (uint16_t)(0x8000); /* 409C; MOV:G.W #H'8000, @H'E006; refs mem_E006; cycles=11 */
    MEM16[0xE080] = (uint16_t)(0xFFFF); /* 40A2; MOV:G.W #H'FFFF, @H'E080; refs mem_E080; cycles=11 */
    MEM16[0xE800] = (uint16_t)(0x0080); /* 40A8; MOV:G.W #H'0080, @H'E800; refs mem_E800; cycles=11 */
    MEM16[0xE806] = (uint16_t)(0x8000); /* 40AE; MOV:G.W #H'8000, @H'E806; refs mem_E806; cycles=11 */
    MEM16[0xE880] = (uint16_t)(0xFFFF); /* 40B4; MOV:G.W #H'FFFF, @H'E880; refs mem_E880; cycles=11 */
    return; /* 40BA; RTS; cycles=12 */
}

void loc_40BB(void)
{
    R0 = (uint16_t)(0x0040); /* 40BB; MOV:I.W #H'0040, R0; dataflow R0=0x0040; cycles=3 */
    do {
        MEM16[R0 - 0x0792] = (uint16_t)(0xFFFF); /* 40BE; MOV:G.W #H'FFFF, @(-H'0792,R0); cycles=9 */
        MEM16[R0 - 0x0752] = (uint16_t)(0xFFFF); /* 40C4; MOV:G.W #H'FFFF, @(-H'0752,R0); cycles=9 */
        MEM16[R0 - 0x0712] = (uint16_t)(0xFFFF); /* 40CA; MOV:G.W #H'FFFF, @(-H'0712,R0); cycles=9 */
        MEM16[R0 - 0x06D2] = (uint16_t)(0xFFFF); /* 40D0; MOV:G.W #H'FFFF, @(-H'06D2,R0); cycles=9 */
        MEM16[R0 - 0x0692] = (uint16_t)(0xFFFF); /* 40D6; MOV:G.W #H'FFFF, @(-H'0692,R0); cycles=9 */
        R0 += (uint16_t)(-2); /* 40DC; ADD:Q.W #-2, R0; cycles=4 */
    } while (!Z); /* 40DE; BNE loc_40BE; cycles=3/7 nt/t */
    MEM8[0xF9C4] = (uint8_t)(0x14); /* 40E0; MOV:G.B #H'14, @H'F9C4; refs ram_F9C4; cycles=9 */
    MEM8[0xF6F7] = (uint8_t)(0x80); /* 40E5; MOV:G.B #H'80, @H'F6F7; refs ram_F6F7; cycles=9 */
    MEM8[0xF6F8] = (uint8_t)(0x80); /* 40EA; MOV:G.B #H'80, @H'F6F8; refs ram_F6F8; cycles=9 */
    MEM8[0xF6F9] = (uint8_t)(0x80); /* 40EF; MOV:G.B #H'80, @H'F6F9; refs ram_F6F9; cycles=9 */
    set_flags_btst(P7DR, 7); /* 40F4; BTST.B #7, @P7DR; refs P7DR; cycles=7 */
    if (Z) goto loc_4103; /* 40F8; BEQ loc_4103; cycles=3/7 nt/t */
    set_flags_cmp16(MEM16[0xF402], 0x6B6F); /* 40FA; CMP:G.W #H'6B6F, @H'F402; refs mem_F402; cycles=7 */
    if (Z) goto loc_41B0; /* 4100; BEQ loc_41B0; cycles=3/7 nt/t */
loc_4103:
    R0 = (uint16_t)(0x0100); /* 4103; MOV:I.W #H'0100, R0; dataflow R0=0x0100; cycles=3 */
loc_4106:
    R0 += (uint16_t)(-2); /* 4106; ADD:Q.W #-2, R0; cycles=4 */
    R5 = (uint16_t)(MEM16[R0 - 0x369C]); /* 4108; MOV:G.W @(-H'369C,R0), R5; cycles=7 */
    MEM16[R0 - 0x0C00] = (uint16_t)(R5); /* 410C; MOV:G.W R5, @(-H'0C00,R0); cycles=7 */
    MEM16[--R7] = (uint16_t)(R0); /* 4110; MOV:G.W R0, @-R7; cycles=6 */
    R4 = (uint16_t)(R0); /* 4112; MOV:G.W R0, R4; cycles=3 */
    loc_BFE0(); /* 4114; JSR @loc_BFE0; cycles=13 */
    R4 += (uint16_t)(0x0100); /* 4117; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 411B; JSR @loc_BFE0; cycles=14 */
    R4 += (uint16_t)(0x0100); /* 411E; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 4122; JSR @loc_BFE0; cycles=13 */
    R4 += (uint16_t)(0x0100); /* 4125; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 4129; JSR @loc_BFE0; cycles=14 */
    R4 += (uint16_t)(0x0100); /* 412C; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 4130; JSR @loc_BFE0; cycles=13 */
    R4 += (uint16_t)(0x0100); /* 4133; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 4137; JSR @loc_BFE0; cycles=14 */
    R4 += (uint16_t)(0x0100); /* 413A; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 413E; JSR @loc_BFE0; cycles=13 */
    R4 += (uint16_t)(0x0100); /* 4141; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 4145; JSR @loc_BFE0; cycles=14 */
    R4 += (uint16_t)(0x0100); /* 4148; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 414C; JSR @loc_BFE0; cycles=13 */
    R4 += (uint16_t)(0x0100); /* 414F; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 4153; JSR @loc_BFE0; cycles=14 */
    R4 += (uint16_t)(0x0100); /* 4156; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 415A; JSR @loc_BFE0; cycles=13 */
    R4 += (uint16_t)(0x0100); /* 415D; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 4161; JSR @loc_BFE0; cycles=14 */
    R4 += (uint16_t)(0x0100); /* 4164; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 4168; JSR @loc_BFE0; cycles=13 */
    R4 += (uint16_t)(0x0100); /* 416B; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 416F; JSR @loc_BFE0; cycles=14 */
    R4 += (uint16_t)(0x0100); /* 4172; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 4176; JSR @loc_BFE0; cycles=13 */
    R4 += (uint16_t)(0x0100); /* 4179; ADD:G.W #H'0100, R4; cycles=4 */
    loc_BFE0(); /* 417D; JSR @loc_BFE0; cycles=14 */
    R0 = (uint16_t)(MEM16[R7++]); /* 4180; MOV:G.W @R7+, R0; cycles=5 */
    if (!Z) goto loc_4106; /* 4182; BNE loc_4106; cycles=3/7 nt/t */
    R0 = (uint16_t)(0x000F); /* 4184; MOV:I.W #H'000F, R0; dataflow R0=0x000F; cycles=3 */
loc_4187:
    MEM16[--R7] = (uint16_t)(R0); /* 4187; MOV:G.W R0, @-R7; cycles=5 */
    R4 = (uint16_t)(R0); /* 4189; MOV:G.W R0, R4; cycles=3 */
    R4 = swap_bytes(R4); /* 418B; SWAP.B R4; cycles=3 */
    R5 = (uint16_t)(0x2020); /* 418D; MOV:I.W #H'2020, R5; dataflow R5=0x2020; cycles=3 */
    loc_BFE0(); /* 4190; JSR @loc_BFE0; cycles=13 */
    R4 += (uint16_t)(2); /* 4193; ADD:Q.W #2, R4; cycles=4 */
    R5 = (uint16_t)(0x2020); /* 4195; MOV:I.W #H'2020, R5; dataflow R5=0x2020; cycles=3 */
    loc_BFE0(); /* 4198; JSR @loc_BFE0; cycles=13 */
    R4 += (uint16_t)(2); /* 419B; ADD:Q.W #2, R4; cycles=4 */
    R5 = (uint16_t)(0x2020); /* 419D; MOV:I.W #H'2020, R5; dataflow R5=0x2020; cycles=3 */
    loc_BFE0(); /* 41A0; JSR @loc_BFE0; cycles=13 */
    R4 += (uint16_t)(2); /* 41A3; ADD:Q.W #2, R4; cycles=4 */
    R5 = (uint16_t)(0x2020); /* 41A5; MOV:I.W #H'2020, R5; dataflow R5=0x2020; cycles=3 */
    loc_BFE0(); /* 41A8; JSR @loc_BFE0; cycles=13 */
    R0 = (uint16_t)(MEM16[R7++]); /* 41AB; MOV:G.W @R7+, R0; cycles=6 */
    if (scb_f(R0)) goto loc_4187; /* 41AD; SCB/F R0, loc_4187; cycles=? */
loc_41B0:
    goto loc_41D2; /* 41B0; BRA loc_41D2; cycles=7 */
loc_41D2:
    R0 = (uint16_t)(0x000F); /* 41D2; MOV:I.W #H'000F, R0; dataflow R0=0x000F; cycles=3 */
loc_41D5:
    R1 = (uint16_t)(R0); /* 41D5; MOV:G.W R0, R1; cycles=3 */
    R1 <<= 1; /* 41D7; SHLL.B R1; cycles=2 */
    R1 <<= 1; /* 41D9; SHLL.B R1; cycles=2 */
    R1 <<= 1; /* 41DB; SHLL.B R1; cycles=2 */
    R4 = (uint16_t)(R0); /* 41DD; MOV:G.W R0, R4; cycles=3 */
    R4 = swap_bytes(R4); /* 41DF; SWAP.B R4; cycles=3 */
    push_registers(R0, R1); /* 41E1; STM.W {R0,R1}, @-SP; cycles=12 */
    loc_BFFE(); /* 41E3; JSR @loc_BFFE; cycles=14 */
    pop_registers(R0, R1); /* 41E6; LDM.W @SP+, {R0,R1}; cycles=14 */
    MEM16[R1 - 0x0850] = (uint16_t)(R5); /* 41E8; MOV:G.W R5, @(-H'0850,R1); cycles=7 */
    R4 += (uint16_t)(2); /* 41EC; ADD:Q.W #2, R4; cycles=4 */
    push_registers(R0, R1); /* 41EE; STM.W {R0,R1}, @-SP; cycles=12 */
    loc_BFFE(); /* 41F0; JSR @loc_BFFE; cycles=13 */
    pop_registers(R0, R1); /* 41F3; LDM.W @SP+, {R0,R1}; cycles=14 */
    MEM16[R1 - 0x084E] = (uint16_t)(R5); /* 41F5; MOV:G.W R5, @(-H'084E,R1); cycles=6 */
    R4 += (uint16_t)(2); /* 41F9; ADD:Q.W #2, R4; cycles=4 */
    push_registers(R0, R1); /* 41FB; STM.W {R0,R1}, @-SP; cycles=12 */
    loc_BFFE(); /* 41FD; JSR @loc_BFFE; cycles=14 */
    pop_registers(R0, R1); /* 4200; LDM.W @SP+, {R0,R1}; cycles=14 */
    MEM16[R1 - 0x084C] = (uint16_t)(R5); /* 4202; MOV:G.W R5, @(-H'084C,R1); cycles=7 */
    R4 += (uint16_t)(2); /* 4206; ADD:Q.W #2, R4; cycles=4 */
    push_registers(R0, R1); /* 4208; STM.W {R0,R1}, @-SP; cycles=12 */
    loc_BFFE(); /* 420A; JSR @loc_BFFE; cycles=13 */
    pop_registers(R0, R1); /* 420D; LDM.W @SP+, {R0,R1}; cycles=14 */
    MEM16[R1 - 0x084A] = (uint16_t)(R5); /* 420F; MOV:G.W R5, @(-H'084A,R1); cycles=6 */
    if (scb_f(R0)) goto loc_41D5; /* 4213; SCB/F R0, loc_41D5; cycles=? */
    return; /* 4216; RTS; cycles=12 */
}

void loc_4217(void)
{
    MEM8[0xF798] = 0; /* 4217; CLR.B @H'F798; refs ram_F798; cycles=8 */
    MEM8[0xF731] |= BIT(7); /* 421B; BSET.B #7, @H'F731; refs ram_F731; cycles=8 */
    P1DR &= ~BIT(2); /* 421F; BCLR.B #2, @P1DR; clear bit 2 of P1DR; refs P1DR; cycles=8 */
    MEM16[0xF700] = (uint16_t)(0x2424); /* 4223; MOV:G.W #H'2424, @H'F700; refs ram_F700; cycles=9 */
    MEM16[0xF702] = (uint16_t)(0x2424); /* 4229; MOV:G.W #H'2424, @H'F702; refs ram_F702; cycles=9 */
    MEM16[0xF704] = (uint16_t)(0x2424); /* 422F; MOV:G.W #H'2424, @H'F704; refs ram_F704; cycles=9 */
    MEM16[0xF706] = (uint16_t)(0x2424); /* 4235; MOV:G.W #H'2424, @H'F706; refs ram_F706; cycles=9 */
    MEM8[0xF708] = (uint8_t)(0x7F); /* 423B; MOV:G.B #H'7F, @H'F708; refs ram_F708; cycles=9 */
    MEM8[0xF709] = (uint8_t)(0x24); /* 4240; MOV:G.B #H'24, @H'F709; refs ram_F709; cycles=9 */
    MEM16[0xF70A] = (uint16_t)(0x2424); /* 4245; MOV:G.W #H'2424, @H'F70A; refs ram_F70A; cycles=9 */
    MEM8[0xF710] = 0; /* 424B; CLR.B @H'F710; refs ram_F710; cycles=8 */
    MEM8[0xF711] = 0; /* 424F; CLR.B @H'F711; refs ram_F711; cycles=8 */
    MEM8[0xF712] = 0; /* 4253; CLR.B @H'F712; refs ram_F712; cycles=8 */
    MEM8[0xF713] = 0; /* 4257; CLR.B @H'F713; refs ram_F713; cycles=8 */
    MEM8[0xF714] = 0; /* 425B; CLR.B @H'F714; refs ram_F714; cycles=8 */
    MEM8[0xF715] = 0; /* 425F; CLR.B @H'F715; refs ram_F715; cycles=8 */
    MEM8[0xF716] = 0; /* 4263; CLR.B @H'F716; refs ram_F716; cycles=8 */
    MEM8[0xF717] = 0; /* 4267; CLR.B @H'F717; refs ram_F717; cycles=8 */
    MEM8[0xF718] = (uint8_t)(0xFF); /* 426B; MOV:G.B #H'FF, @H'F718; refs ram_F718; cycles=9 */
    MEM8[0xF719] = (uint8_t)(0xFF); /* 4270; MOV:G.B #H'FF, @H'F719; refs ram_F719; cycles=9 */
    MEM8[0xF71A] = (uint8_t)(0xFF); /* 4275; MOV:G.B #H'FF, @H'F71A; refs ram_F71A; cycles=9 */
    MEM8[0xF71B] = (uint8_t)(0xFF); /* 427A; MOV:G.B #H'FF, @H'F71B; refs ram_F71B; cycles=9 */
    MEM8[0xF71C] = (uint8_t)(0xFF); /* 427F; MOV:G.B #H'FF, @H'F71C; refs ram_F71C; cycles=9 */
    MEM8[0xF71D] = (uint8_t)(0xFF); /* 4284; MOV:G.B #H'FF, @H'F71D; refs ram_F71D; cycles=9 */
    MEM8[0xF71E] = (uint8_t)(0xFF); /* 4289; MOV:G.B #H'FF, @H'F71E; refs ram_F71E; cycles=9 */
    MEM8[0xF71F] = (uint8_t)(0xFF); /* 428E; MOV:G.B #H'FF, @H'F71F; refs ram_F71F; cycles=9 */
    MEM16[0xFAF0] = (uint16_t)(0x2043); /* 4293; MOV:G.W #H'2043, @H'FAF0; refs ram_FAF0; cycles=9 */
    MEM16[0xFAF2] = (uint16_t)(0x4F4E); /* 4299; MOV:G.W #H'4F4E, @H'FAF2; refs ram_FAF2; cycles=9 */
    MEM16[0xFAF4] = (uint16_t)(0x4E45); /* 429F; MOV:G.W #H'4E45, @H'FAF4; refs ram_FAF4; cycles=9 */
    MEM16[0xFAF6] = (uint16_t)(0x4354); /* 42A5; MOV:G.W #H'4354, @H'FAF6; refs ram_FAF6; cycles=9 */
    MEM16[0xFAF8] = (uint16_t)(0x3A4E); /* 42AB; MOV:G.W #H'3A4E, @H'FAF8; refs ram_FAF8; cycles=9 */
    MEM16[0xFAFA] = (uint16_t)(0x4F54); /* 42B1; MOV:G.W #H'4F54, @H'FAFA; refs ram_FAFA; cycles=9 */
    MEM16[0xFAFC] = (uint16_t)(0x2041); /* 42B7; MOV:G.W #H'2041, @H'FAFC; refs ram_FAFC; cycles=9 */
    MEM16[0xFAFE] = (uint16_t)(0x4354); /* 42BD; MOV:G.W #H'4354, @H'FAFE; refs ram_FAFE; cycles=9 */
    R5 = (uint16_t)(0x0000); /* 42C3; MOV:I.W #H'0000, R5; dataflow R5=0x0000; cycles=3 */
    loc_3ECC(); /* 42C6; BSR loc_3ECC; cycles=13 */
    MEM16[0xFAF0] = (uint16_t)(0x2020); /* 42C9; MOV:G.W #H'2020, @H'FAF0; refs ram_FAF0; cycles=9 */
    MEM16[0xFAF2] = (uint16_t)(0x2020); /* 42CF; MOV:G.W #H'2020, @H'FAF2; refs ram_FAF2; cycles=9 */
    MEM16[0xFAF4] = (uint16_t)(0x2020); /* 42D5; MOV:G.W #H'2020, @H'FAF4; refs ram_FAF4; cycles=9 */
    MEM16[0xFAF6] = (uint16_t)(0x2020); /* 42DB; MOV:G.W #H'2020, @H'FAF6; refs ram_FAF6; cycles=9 */
    MEM16[0xFAF8] = (uint16_t)(0x2020); /* 42E1; MOV:G.W #H'2020, @H'FAF8; refs ram_FAF8; cycles=9 */
    MEM16[0xFAFA] = (uint16_t)(0x2020); /* 42E7; MOV:G.W #H'2020, @H'FAFA; refs ram_FAFA; cycles=9 */
    MEM16[0xFAFC] = (uint16_t)(0x2020); /* 42ED; MOV:G.W #H'2020, @H'FAFC; refs ram_FAFC; cycles=9 */
    MEM16[0xFAFE] = (uint16_t)(0x2020); /* 42F3; MOV:G.W #H'2020, @H'FAFE; refs ram_FAFE; cycles=9 */
    R5 = (uint16_t)(0x0001); /* 42F9; MOV:I.W #H'0001, R5; dataflow R5=0x0001; cycles=3 */
    loc_3ECC(); /* 42FC; BSR loc_3ECC; cycles=13 */
    R5 = (uint16_t)(0x0002); /* 42FF; MOV:I.W #H'0002, R5; dataflow R5=0x0002; cycles=3 */
    loc_3ECC(); /* 4302; BSR loc_3ECC; cycles=13 */
    R5 = (uint16_t)(0x0003); /* 4305; MOV:I.W #H'0003, R5; dataflow R5=0x0003; cycles=3 */
    loc_3ECC(); /* 4308; BSR loc_3ECC; cycles=13 */
    return; /* 430B; RTS; cycles=13 */
}

void loc_430C(void)
{
    P6DR &= ~BIT(0); /* 430C; BCLR.B #0, @P6DR; clear bit 0 of P6DR; refs P6DR; cycles=9 */
    MEM8[0xF555] = (uint8_t)(0xAA); /* 4310; MOV:G.B #H'AA, @H'F555; refs mem_F555; cycles=9 */
    MEM8[0xF4AA] = (uint8_t)(0x55); /* 4315; MOV:G.B #H'55, @H'F4AA; refs mem_F4AA; cycles=9 */
    MEM8[0xF555] = (uint8_t)(0xCC); /* 431A; MOV:G.B #H'CC, @H'F555; refs mem_F555; cycles=9 */
    P6DR |= BIT(0); /* 431F; BSET.B #0, @P6DR; set bit 0 of P6DR; refs P6DR; cycles=8 */
    return; /* 4323; RTS; cycles=13 */
}

void loc_4324(void)
{
    R4 = (uint16_t)(0x0038); /* 4324; MOV:I.W #H'0038, R4; dataflow R4=0x0038; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 4327; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 432A; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0001); /* 432D; MOV:I.W #H'0001, R4; dataflow R4=0x0001; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 4330; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 4333; BSR loc_3ECC; cycles=14 */
    R4 = (uint16_t)(0x000E); /* 4336; MOV:I.W #H'000E, R4; dataflow R4=0x000E; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 4339; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 433C; BSR loc_3ECC; cycles=13 */
    R4 = (uint16_t)(0x0006); /* 433F; MOV:I.W #H'0006, R4; dataflow R4=0x0006; cycles=3 */
    R5 = (uint16_t)(0x0004); /* 4342; MOV:I.W #H'0004, R5; dataflow R5=0x0004; cycles=3 */
    loc_3ECC(); /* 4345; BSR loc_3ECC; cycles=14 */
    loc_10CE(); /* 4348; BSR loc_10CE; cycles=13 */
    return; /* 434B; RTS; cycles=13 */
}

void loc_434C(void)
{
    IPRA = (uint8_t)(0x70); /* 434C; MOV:G.B #H'70, @IPRA; IPRA = H'70 (irq0 priority=7; irq1 priority=0); refs IPRA; cycles=9 */
    IPRB = (uint8_t)(0x44); /* 4351; MOV:G.B #H'44, @IPRB; IPRB = H'44 (irq2/irq3 priority=4; irq4/irq5 priority=4); refs IPRB; cycles=9 */
    IPRC = (uint8_t)(0x66); /* 4356; MOV:G.B #H'66, @IPRC; IPRC = H'66 (FRT1 priority=6; FRT2 priority=6); refs IPRC; cycles=9 */
    IPRD = (uint8_t)(0x00); /* 435B; MOV:G.B #H'00, @IPRD; IPRD = H'00 (FRT3 priority=0; 8-bit timer priority=0); refs IPRD; cycles=9 */
    IPRE = (uint8_t)(0x50); /* 4360; MOV:G.B #H'50, @IPRE; IPRE = H'50 (SCI1 priority=5; SCI2 priority=0); refs IPRE; cycles=9 */
    IPRF = (uint8_t)(0x40); /* 4365; MOV:G.B #H'40, @IPRF; IPRF = H'40 (A/D priority=4); refs IPRF; cycles=9 */
    SCI1_SCR |= BIT(6); /* 436A; BSET.B #6, @SCI1_SCR; set RIE (bit 6) of SCI1_SCR; enable SCI1 receive and receive-error interrupts (RIE); SCI1 SCR write TE=1 RE=1; TE/RE select the traced RS232/MAX202 pins (P95/TXD pin 66 to MAX202 pin 11, P96/RXD pin 67 to MAX202 pin 12); refs SCI1_SCR; cycles=9 */
    FRT1_TCR |= BIT(5); /* 436E; BSET.B #5, @FRT1_TCR; set OCIEA (bit 5) of FRT1_TCR; refs FRT1_TCR; cycles=9 */
    FRT2_TCR |= BIT(5); /* 4372; BSET.B #5, @FRT2_TCR; set OCIEA (bit 5) of FRT2_TCR; refs FRT2_TCR; cycles=9 */
    ADCSR |= BIT(6); /* 4376; BSET.B #6, @ADCSR; set ADIE (bit 6) of ADCSR; refs ADCSR; cycles=9 */
    SYSCR2 |= BIT(4); /* 437A; BSET.B #4, @SYSCR2; set IRQ3E (bit 4) of SYSCR2; SYSCR2 write leaves P9SCI2E=0; SCI2 pins are disabled, so SCI2 is not the traced MAX202 path; traced RS232/MAX202 remains SCI1 P95/P96; refs SYSCR2; cycles=9 */
    SYSCR2 |= BIT(5); /* 437E; BSET.B #5, @SYSCR2; set IRQ4E (bit 5) of SYSCR2; SYSCR2 write leaves P9SCI2E=0; SCI2 pins are disabled, so SCI2 is not the traced MAX202 path; traced RS232/MAX202 remains SCI1 P95/P96; refs SYSCR2; cycles=9 */
    set_flags_btst(P7DR, 6); /* 4382; BTST.B #6, @P7DR; refs P7DR; cycles=7 */
    if (!Z) { /* 4386; BEQ loc_438E; cycles=3/7 nt/t */
        WDT_TCSR_R = (uint16_t)(0xA53F); /* 4388; MOV:G.W #H'A53F, @WDT_TCSR_R; WDT_TCSR_R = H'A53F (OVF=0 WT/IT=0 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, interval IRQ0, clock phi/4096); refs WDT_TCSR_R; cycles=11 */
    }
    SR = (uint16_t)(0x0300); /* 438E; LDC.W #H'0300, SR; dataflow SR=0x0300; cycles=6 */
    return; /* 4392; RTS; cycles=12 */
}

void vec_nmi_4393(void)
{
    /* vector sources: nmi */
    return_from_interrupt(); /* 4393; RTE; cycles=14 */
}

void loc_4394(void)
{
    set_flags_cmp8(MEM8[0xF731], 0x01); /* 4394; CMP:G.B #H'01, @H'F731; refs ram_F731; cycles=7 */
    if (!C && !Z) goto loc_4422; /* 4399; BHI loc_4422; cycles=3/8 nt/t */
    set_flags_btst(MEM8[0xFB03], 7); /* 439C; BTST.B #7, @H'FB03; refs ram_FB03; cycles=7 */
    if (!Z) goto loc_4422; /* 43A0; BNE loc_4422; cycles=3/7 nt/t */
    R3 = (uint16_t)(MEM16[0xF736]); /* 43A3; MOV:G.W @H'F736, R3; refs ram_F736; cycles=6 */
    if (Z) goto loc_4422; /* 43A7; BEQ loc_4422; cycles=3/8 nt/t */
    R4 = (uint16_t)(MEM16[0xF69E]); /* 43AA; MOV:G.W @H'F69E, R4; refs ram_F69E; cycles=7 */
    R4 -= (uint16_t)(MEM16[0xF6BE]); /* 43AE; SUB.W @H'F6BE, R4; refs ram_F6BE; cycles=7 */
    R3 &= ~BIT(15); /* 43B2; BCLR.W #15, R3; cycles=3 */
    if (!Z) goto loc_43CF; /* 43B4; BNE loc_43CF; cycles=3/7 nt/t */
    R3 &= ~BIT(14); /* 43B6; BCLR.W #14, R3; cycles=3 */
    if (!Z) goto loc_43DB; /* 43B8; BNE loc_43DB; cycles=3/7 nt/t */
    R3 &= ~BIT(13); /* 43BA; BCLR.W #13, R3; cycles=3 */
    if (!Z) goto loc_43E7; /* 43BC; BNE loc_43E7; cycles=3/7 nt/t */
    R3 &= ~BIT(12); /* 43BE; BCLR.W #12, R3; cycles=3 */
    if (!Z) goto loc_43F3; /* 43C0; BNE loc_43F3; cycles=3/7 nt/t */
    R3 &= ~BIT(11); /* 43C2; BCLR.W #11, R3; cycles=3 */
    if (!Z) goto loc_43FF; /* 43C4; BNE loc_43FF; cycles=3/7 nt/t */
    R3 &= ~BIT(10); /* 43C6; BCLR.W #10, R3; cycles=3 */
    if (!Z) goto loc_440D; /* 43C8; BNE loc_440D; cycles=3/7 nt/t */
    loc_19A2(); /* 43CA; BSR loc_19A2; cycles=13 */
    goto loc_4422; /* 43CD; BRA loc_4422; cycles=8 */
loc_43CF:
    loc_442F(); /* 43CF; BSR loc_442F; cycles=14 */
    set_flags_cmp16(R4, 0x0002); /* 43D1; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 43D4; BEQ loc_43D9; cycles=3/7 nt/t */
        loc_1A35(); /* 43D6; BSR loc_1A35; cycles=13 */
    }
    goto loc_4422; /* 43D9; BRA loc_4422; cycles=8 */
loc_43DB:
    loc_442F(); /* 43DB; BSR loc_442F; cycles=14 */
    set_flags_cmp16(R4, 0x0002); /* 43DD; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 43E0; BEQ loc_43E5; cycles=3/7 nt/t */
        loc_1A9C(); /* 43E2; BSR loc_1A9C; cycles=13 */
    }
    goto loc_4422; /* 43E5; BRA loc_4422; cycles=8 */
loc_43E7:
    loc_442F(); /* 43E7; BSR loc_442F; cycles=14 */
    set_flags_cmp16(R4, 0x0002); /* 43E9; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 43EC; BEQ loc_43F1; cycles=3/7 nt/t */
        loc_1AE4(); /* 43EE; BSR loc_1AE4; cycles=13 */
    }
    goto loc_4422; /* 43F1; BRA loc_4422; cycles=8 */
loc_43F3:
    loc_442F(); /* 43F3; BSR loc_442F; cycles=14 */
    set_flags_cmp16(R4, 0x0002); /* 43F5; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 43F8; BEQ loc_43FD; cycles=3/7 nt/t */
        loc_1B0B(); /* 43FA; BSR loc_1B0B; cycles=13 */
    }
    goto loc_4422; /* 43FD; BRA loc_4422; cycles=8 */
loc_43FF:
    MEM8[0xF770] = (uint8_t)(0x80); /* 43FF; MOV:G.B #H'80, @H'F770; refs ram_F770; cycles=9 */
    MEM16[0xF772] = (uint16_t)(R4); /* 4404; MOV:G.W R4, @H'F772; refs ram_F772; cycles=7 */
    loc_48FA(); /* 4408; BSR loc_48FA; cycles=13 */
    goto loc_4422; /* 440B; BRA loc_4422; cycles=8 */
loc_440D:
    loc_442F(); /* 440D; BSR loc_442F; cycles=14 */
    set_flags_cmp16(R4, 0x0002); /* 440F; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 4412; BEQ loc_4420; cycles=3/7 nt/t */
        MEM8[0xF770] = (uint8_t)(0x80); /* 4414; MOV:G.B #H'80, @H'F770; refs ram_F770; cycles=9 */
        MEM16[0xF772] = (uint16_t)(R4); /* 4419; MOV:G.W R4, @H'F772; refs ram_F772; cycles=6 */
        loc_48FA(); /* 441D; BSR loc_48FA; cycles=14 */
    }
    goto loc_4422; /* 4420; BRA loc_4422; cycles=7 */
loc_4422:
    R4 = (uint16_t)(MEM16[0xF69E]); /* 4422; MOV:G.W @H'F69E, R4; refs ram_F69E; cycles=7 */
    MEM16[0xF6BE] = (uint16_t)(R4); /* 4426; MOV:G.W R4, @H'F6BE; refs ram_F6BE; cycles=7 */
    MEM8[0xFB02] = 0; /* 442A; CLR.B @H'FB02; refs ram_FB02; cycles=9 */
    return; /* 442E; RTS; cycles=12 */
}

void loc_442F(void)
{
    R4 += (uint8_t)(MEM8[0xF6F7]); /* 442F; ADD:G.B @H'F6F7, R4; refs ram_F6F7; cycles=6 */
    set_flags_cmp8(R4, 0x88); /* 4433; CMP:E #H'88, R4; cycles=2 */
    if (!C) goto loc_4444; /* 4435; BCC loc_4444; cycles=3/8 nt/t */
    set_flags_cmp8(R4, 0x78); /* 4437; CMP:E #H'78, R4; cycles=2 */
    if (C || Z) goto loc_444E; /* 4439; BLS loc_444E; cycles=3/8 nt/t */
    MEM8[0xF6F7] = (uint8_t)(R4); /* 443B; MOV:G.B R4, @H'F6F7; refs ram_F6F7; cycles=6 */
    R4 = (uint16_t)(0x0002); /* 443F; MOV:I.W #H'0002, R4; dataflow R4=0x0002; cycles=3 */
    goto loc_4456; /* 4442; BRA loc_4456; cycles=7 */
loc_4444:
    MEM8[0xF6F7] = (uint8_t)(0x80); /* 4444; MOV:G.B #H'80, @H'F6F7; refs ram_F6F7; cycles=9 */
    R4 = (uint16_t)(0x0000); /* 4449; MOV:I.W #H'0000, R4; dataflow R4=0x0000; cycles=3 */
    goto loc_4456; /* 444C; BRA loc_4456; cycles=7 */
loc_444E:
    MEM8[0xF6F7] = (uint8_t)(0x80); /* 444E; MOV:G.B #H'80, @H'F6F7; refs ram_F6F7; cycles=9 */
    R4 = (uint16_t)(0x0001); /* 4453; MOV:I.W #H'0001, R4; dataflow R4=0x0001; cycles=3 */
loc_4456:
    return; /* 4456; RTS; cycles=12 */
}

void loc_4457(void)
{
    set_flags_cmp8(MEM8[0xF731], 0x01); /* 4457; CMP:G.B #H'01, @H'F731; refs ram_F731; cycles=6 */
    if (!C && !Z) goto loc_44E5; /* 445C; BHI loc_44E5; cycles=3/7 nt/t */
    set_flags_btst(MEM8[0xFB03], 7); /* 445F; BTST.B #7, @H'FB03; refs ram_FB03; cycles=6 */
    if (!Z) goto loc_44E5; /* 4463; BNE loc_44E5; cycles=3/8 nt/t */
    R3 = (uint16_t)(MEM16[0xF738]); /* 4466; MOV:G.W @H'F738, R3; refs ram_F738; cycles=7 */
    if (Z) goto loc_44E5; /* 446A; BEQ loc_44E5; cycles=3/7 nt/t */
    R4 = (uint16_t)(MEM16[0xF69C]); /* 446D; MOV:G.W @H'F69C, R4; refs ram_F69C; cycles=6 */
    R4 -= (uint16_t)(MEM16[0xF6BC]); /* 4471; SUB.W @H'F6BC, R4; refs ram_F6BC; cycles=6 */
    R3 &= ~BIT(15); /* 4475; BCLR.W #15, R3; cycles=3 */
    if (!Z) goto loc_4492; /* 4477; BNE loc_4492; cycles=3/8 nt/t */
    R3 &= ~BIT(14); /* 4479; BCLR.W #14, R3; cycles=3 */
    if (!Z) goto loc_449E; /* 447B; BNE loc_449E; cycles=3/8 nt/t */
    R3 &= ~BIT(13); /* 447D; BCLR.W #13, R3; cycles=3 */
    if (!Z) goto loc_44AA; /* 447F; BNE loc_44AA; cycles=3/8 nt/t */
    R3 &= ~BIT(12); /* 4481; BCLR.W #12, R3; cycles=3 */
    if (!Z) goto loc_44B6; /* 4483; BNE loc_44B6; cycles=3/8 nt/t */
    R3 &= ~BIT(11); /* 4485; BCLR.W #11, R3; cycles=3 */
    if (!Z) goto loc_44C2; /* 4487; BNE loc_44C2; cycles=3/8 nt/t */
    R3 &= ~BIT(10); /* 4489; BCLR.W #10, R3; cycles=3 */
    if (!Z) goto loc_44D0; /* 448B; BNE loc_44D0; cycles=3/8 nt/t */
    loc_19A2(); /* 448D; BSR loc_19A2; cycles=14 */
    goto loc_44E5; /* 4490; BRA loc_44E5; cycles=7 */
loc_4492:
    loc_44F2(); /* 4492; BSR loc_44F2; cycles=13 */
    set_flags_cmp16(R4, 0x0002); /* 4494; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 4497; BEQ loc_449C; cycles=3/8 nt/t */
        loc_1A35(); /* 4499; BSR loc_1A35; cycles=14 */
    }
    goto loc_44E5; /* 449C; BRA loc_44E5; cycles=7 */
loc_449E:
    loc_44F2(); /* 449E; BSR loc_44F2; cycles=13 */
    set_flags_cmp16(R4, 0x0002); /* 44A0; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 44A3; BEQ loc_44A8; cycles=3/8 nt/t */
        loc_1A9C(); /* 44A5; BSR loc_1A9C; cycles=14 */
    }
    goto loc_44E5; /* 44A8; BRA loc_44E5; cycles=7 */
loc_44AA:
    loc_44F2(); /* 44AA; BSR loc_44F2; cycles=13 */
    set_flags_cmp16(R4, 0x0002); /* 44AC; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 44AF; BEQ loc_44B4; cycles=3/8 nt/t */
        loc_1AE4(); /* 44B1; BSR loc_1AE4; cycles=14 */
    }
    goto loc_44E5; /* 44B4; BRA loc_44E5; cycles=7 */
loc_44B6:
    loc_44F2(); /* 44B6; BSR loc_44F2; cycles=13 */
    set_flags_cmp16(R4, 0x0002); /* 44B8; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 44BB; BEQ loc_44C0; cycles=3/8 nt/t */
        loc_1B0B(); /* 44BD; BSR loc_1B0B; cycles=14 */
    }
    goto loc_44E5; /* 44C0; BRA loc_44E5; cycles=7 */
loc_44C2:
    MEM8[0xF770] = (uint8_t)(0x40); /* 44C2; MOV:G.B #H'40, @H'F770; refs ram_F770; cycles=9 */
    MEM16[0xF772] = (uint16_t)(R4); /* 44C7; MOV:G.W R4, @H'F772; refs ram_F772; cycles=6 */
    loc_48FA(); /* 44CB; BSR loc_48FA; cycles=14 */
    goto loc_44E5; /* 44CE; BRA loc_44E5; cycles=7 */
loc_44D0:
    loc_44F2(); /* 44D0; BSR loc_44F2; cycles=13 */
    set_flags_cmp16(R4, 0x0002); /* 44D2; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 44D5; BEQ loc_44E3; cycles=3/8 nt/t */
        MEM8[0xF770] = (uint8_t)(0x40); /* 44D7; MOV:G.B #H'40, @H'F770; refs ram_F770; cycles=9 */
        MEM16[0xF772] = (uint16_t)(R4); /* 44DC; MOV:G.W R4, @H'F772; refs ram_F772; cycles=7 */
        loc_48FA(); /* 44E0; BSR loc_48FA; cycles=13 */
    }
    goto loc_44E5; /* 44E3; BRA loc_44E5; cycles=8 */
loc_44E5:
    R4 = (uint16_t)(MEM16[0xF69C]); /* 44E5; MOV:G.W @H'F69C, R4; refs ram_F69C; cycles=6 */
    MEM16[0xF6BC] = (uint16_t)(R4); /* 44E9; MOV:G.W R4, @H'F6BC; refs ram_F6BC; cycles=6 */
    MEM8[0xFB02] = 0; /* 44ED; CLR.B @H'FB02; refs ram_FB02; cycles=8 */
    return; /* 44F1; RTS; cycles=13 */
}

void loc_44F2(void)
{
    R4 += (uint8_t)(MEM8[0xF6F8]); /* 44F2; ADD:G.B @H'F6F8, R4; refs ram_F6F8; cycles=7 */
    set_flags_cmp8(R4, 0x88); /* 44F6; CMP:E #H'88, R4; cycles=2 */
    if (!C) goto loc_4507; /* 44F8; BCC loc_4507; cycles=3/7 nt/t */
    set_flags_cmp8(R4, 0x78); /* 44FA; CMP:E #H'78, R4; cycles=2 */
    if (C || Z) goto loc_4511; /* 44FC; BLS loc_4511; cycles=3/7 nt/t */
    MEM8[0xF6F8] = (uint8_t)(R4); /* 44FE; MOV:G.B R4, @H'F6F8; refs ram_F6F8; cycles=7 */
    R4 = (uint16_t)(0x0002); /* 4502; MOV:I.W #H'0002, R4; dataflow R4=0x0002; cycles=3 */
    goto loc_4519; /* 4505; BRA loc_4519; cycles=8 */
loc_4507:
    MEM8[0xF6F8] = (uint8_t)(0x80); /* 4507; MOV:G.B #H'80, @H'F6F8; refs ram_F6F8; cycles=9 */
    R4 = (uint16_t)(0x0000); /* 450C; MOV:I.W #H'0000, R4; dataflow R4=0x0000; cycles=3 */
    goto loc_4519; /* 450F; BRA loc_4519; cycles=8 */
loc_4511:
    MEM8[0xF6F8] = (uint8_t)(0x80); /* 4511; MOV:G.B #H'80, @H'F6F8; refs ram_F6F8; cycles=9 */
    R4 = (uint16_t)(0x0001); /* 4516; MOV:I.W #H'0001, R4; dataflow R4=0x0001; cycles=3 */
loc_4519:
    return; /* 4519; RTS; cycles=13 */
}

void loc_451A(void)
{
    set_flags_cmp8(MEM8[0xF731], 0x01); /* 451A; CMP:G.B #H'01, @H'F731; refs ram_F731; cycles=7 */
    if (!C && !Z) goto loc_45A8; /* 451F; BHI loc_45A8; cycles=3/8 nt/t */
    set_flags_btst(MEM8[0xFB03], 7); /* 4522; BTST.B #7, @H'FB03; refs ram_FB03; cycles=7 */
    if (!Z) goto loc_45A8; /* 4526; BNE loc_45A8; cycles=3/7 nt/t */
    R3 = (uint16_t)(MEM16[0xF73A]); /* 4529; MOV:G.W @H'F73A, R3; refs ram_F73A; cycles=6 */
    if (Z) goto loc_45A8; /* 452D; BEQ loc_45A8; cycles=3/8 nt/t */
    R4 = (uint16_t)(MEM16[0xF69A]); /* 4530; MOV:G.W @H'F69A, R4; refs ram_F69A; cycles=7 */
    R4 -= (uint16_t)(MEM16[0xF6BA]); /* 4534; SUB.W @H'F6BA, R4; refs ram_F6BA; cycles=7 */
    R3 &= ~BIT(15); /* 4538; BCLR.W #15, R3; cycles=3 */
    if (!Z) goto loc_4555; /* 453A; BNE loc_4555; cycles=3/7 nt/t */
    R3 &= ~BIT(14); /* 453C; BCLR.W #14, R3; cycles=3 */
    if (!Z) goto loc_4561; /* 453E; BNE loc_4561; cycles=3/7 nt/t */
    R3 &= ~BIT(13); /* 4540; BCLR.W #13, R3; cycles=3 */
    if (!Z) goto loc_456D; /* 4542; BNE loc_456D; cycles=3/7 nt/t */
    R3 &= ~BIT(12); /* 4544; BCLR.W #12, R3; cycles=3 */
    if (!Z) goto loc_4579; /* 4546; BNE loc_4579; cycles=3/7 nt/t */
    R3 &= ~BIT(11); /* 4548; BCLR.W #11, R3; cycles=3 */
    if (!Z) goto loc_4585; /* 454A; BNE loc_4585; cycles=3/7 nt/t */
    R3 &= ~BIT(10); /* 454C; BCLR.W #10, R3; cycles=3 */
    if (!Z) goto loc_4593; /* 454E; BNE loc_4593; cycles=3/7 nt/t */
    loc_19A2(); /* 4550; BSR loc_19A2; cycles=13 */
    goto loc_45A8; /* 4553; BRA loc_45A8; cycles=8 */
loc_4555:
    loc_45B5(); /* 4555; BSR loc_45B5; cycles=14 */
    set_flags_cmp16(R4, 0x0002); /* 4557; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 455A; BEQ loc_455F; cycles=3/7 nt/t */
        loc_1A35(); /* 455C; BSR loc_1A35; cycles=13 */
    }
    goto loc_45A8; /* 455F; BRA loc_45A8; cycles=8 */
loc_4561:
    loc_45B5(); /* 4561; BSR loc_45B5; cycles=14 */
    set_flags_cmp16(R4, 0x0002); /* 4563; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 4566; BEQ loc_456B; cycles=3/7 nt/t */
        loc_1A9C(); /* 4568; BSR loc_1A9C; cycles=13 */
    }
    goto loc_45A8; /* 456B; BRA loc_45A8; cycles=8 */
loc_456D:
    loc_45B5(); /* 456D; BSR loc_45B5; cycles=14 */
    set_flags_cmp16(R4, 0x0002); /* 456F; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 4572; BEQ loc_4577; cycles=3/7 nt/t */
        loc_1AE4(); /* 4574; BSR loc_1AE4; cycles=13 */
    }
    goto loc_45A8; /* 4577; BRA loc_45A8; cycles=8 */
loc_4579:
    loc_45B5(); /* 4579; BSR loc_45B5; cycles=14 */
    set_flags_cmp16(R4, 0x0002); /* 457B; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 457E; BEQ loc_4583; cycles=3/7 nt/t */
        loc_1B0B(); /* 4580; BSR loc_1B0B; cycles=13 */
    }
    goto loc_45A8; /* 4583; BRA loc_45A8; cycles=8 */
loc_4585:
    MEM8[0xF770] = (uint8_t)(0x20); /* 4585; MOV:G.B #H'20, @H'F770; refs ram_F770; cycles=9 */
    MEM16[0xF772] = (uint16_t)(R4); /* 458A; MOV:G.W R4, @H'F772; refs ram_F772; cycles=7 */
    loc_48FA(); /* 458E; BSR loc_48FA; cycles=13 */
    goto loc_45A8; /* 4591; BRA loc_45A8; cycles=8 */
loc_4593:
    loc_45B5(); /* 4593; BSR loc_45B5; cycles=14 */
    set_flags_cmp16(R4, 0x0002); /* 4595; CMP:I #H'0002, R4; cycles=3 */
    if (!Z) { /* 4598; BEQ loc_45A6; cycles=3/7 nt/t */
        MEM8[0xF770] = (uint8_t)(0x20); /* 459A; MOV:G.B #H'20, @H'F770; refs ram_F770; cycles=9 */
        MEM16[0xF772] = (uint16_t)(R4); /* 459F; MOV:G.W R4, @H'F772; refs ram_F772; cycles=6 */
        loc_48FA(); /* 45A3; BSR loc_48FA; cycles=14 */
    }
    goto loc_45A8; /* 45A6; BRA loc_45A8; cycles=7 */
loc_45A8:
    R4 = (uint16_t)(MEM16[0xF69A]); /* 45A8; MOV:G.W @H'F69A, R4; refs ram_F69A; cycles=7 */
    MEM16[0xF6BA] = (uint16_t)(R4); /* 45AC; MOV:G.W R4, @H'F6BA; refs ram_F6BA; cycles=7 */
    MEM8[0xFB02] = 0; /* 45B0; CLR.B @H'FB02; refs ram_FB02; cycles=9 */
    return; /* 45B4; RTS; cycles=12 */
}

void loc_45B5(void)
{
    R4 += (uint8_t)(MEM8[0xF6F9]); /* 45B5; ADD:G.B @H'F6F9, R4; refs ram_F6F9; cycles=6 */
    set_flags_cmp8(R4, 0x88); /* 45B9; CMP:E #H'88, R4; cycles=2 */
    if (!C) goto loc_45CA; /* 45BB; BCC loc_45CA; cycles=3/8 nt/t */
    set_flags_cmp8(R4, 0x78); /* 45BD; CMP:E #H'78, R4; cycles=2 */
    if (C || Z) goto loc_45D4; /* 45BF; BLS loc_45D4; cycles=3/8 nt/t */
    MEM8[0xF6F9] = (uint8_t)(R4); /* 45C1; MOV:G.B R4, @H'F6F9; refs ram_F6F9; cycles=6 */
    R4 = (uint16_t)(0x0002); /* 45C5; MOV:I.W #H'0002, R4; dataflow R4=0x0002; cycles=3 */
    goto loc_45DC; /* 45C8; BRA loc_45DC; cycles=7 */
loc_45CA:
    MEM8[0xF6F9] = (uint8_t)(0x80); /* 45CA; MOV:G.B #H'80, @H'F6F9; refs ram_F6F9; cycles=9 */
    R4 = (uint16_t)(0x0000); /* 45CF; MOV:I.W #H'0000, R4; dataflow R4=0x0000; cycles=3 */
    goto loc_45DC; /* 45D2; BRA loc_45DC; cycles=7 */
loc_45D4:
    MEM8[0xF6F9] = (uint8_t)(0x80); /* 45D4; MOV:G.B #H'80, @H'F6F9; refs ram_F6F9; cycles=9 */
    R4 = (uint16_t)(0x0001); /* 45D9; MOV:I.W #H'0001, R4; dataflow R4=0x0001; cycles=3 */
loc_45DC:
    return; /* 45DC; RTS; cycles=12 */
}

void loc_48EF(void)
{
    R0 = (uint16_t)(MEM16[0xF734]); /* 48EF; MOV:G.W @H'F734, R0; refs ram_F734; cycles=6 */
    MEM16[0xF732] = (uint16_t)(R0); /* 48F3; MOV:G.W R0, @H'F732; refs ram_F732; cycles=6 */
    loc_48FA(); /* 48F7; BSR loc_48FA; cycles=14 */
    return; /* 48F9; RTS; cycles=13 */
}

void loc_48FA(void)
{
    set_flags_btst(MEM8[0xFB03], 7); /* 48FA; BTST.B #7, @H'FB03; refs ram_FB03; cycles=7 */
    if (!Z) goto loc_4929; /* 48FE; BNE loc_4929; cycles=3/7 nt/t */
    set_flags_cmp8(MEM8[0xF732], 0x1A); /* 4900; CMP:G.B #H'1A, @H'F732; refs ram_F732; cycles=7 */
    if (Z) goto loc_4929; /* 4905; BEQ loc_4929; cycles=3/8 nt/t */
    set_flags_cmp16(MEM16[0xF732], 0x1900); /* 4907; CMP:G.W #H'1900, @H'F732; refs ram_F732; cycles=6 */
    if (Z) goto loc_4929; /* 490D; BEQ loc_4929; cycles=3/8 nt/t */
    set_flags_btst(MEM16[0xE1EC], 13); /* 490F; BTST.W #13, @H'E1EC; refs mem_E1EC; cycles=6 */
    if (Z) goto loc_4929; /* 4913; BEQ loc_4929; cycles=3/8 nt/t */
    R0 = (uint16_t)(MEM16[0xE1EC]); /* 4915; MOV:G.W @H'E1EC, R0; refs mem_E1EC; cycles=6 */
    R0 &= (uint16_t)(0x9FFF); /* 4919; AND.W #H'9FFF, R0; cycles=4 */
    MEM16[0xE9EC] = (uint16_t)(R0); /* 491D; MOV:G.W R0, @H'E9EC; refs mem_E9EC; cycles=6 */
    R2 = (uint8_t)(0x80); /* 4921; MOV:E.B #H'80, R2; dataflow R2=0x80; cycles=2 */
    R3 = (uint16_t)(0x00F6); /* 4923; MOV:I.W #H'00F6, R3; dataflow R3=0x00F6; cycles=3 */
    loc_3E54(); /* 4926; BSR loc_3E54; cycles=13 */
loc_4929:
    set_flags_btst(MEM8[0xF76E], 6); /* 4929; BTST.B #6, @H'F76E; refs ram_F76E; cycles=6 */
    if (Z) { /* 492D; BNE loc_493D; cycles=3/8 nt/t */
        R0 = (uint8_t)(MEM8[0xF732]); /* 492F; MOV:G.B @H'F732, R0; refs ram_F732; cycles=6 */
        R0 = zero_extend8(R0); /* 4933; EXTU.B R0; cycles=3 */
        R0 <<= 1; /* 4935; SHLL.B R0; cycles=2 */
        R0 = (uint16_t)(MEM16[R0 + 0x493E]); /* 4937; MOV:G.W @(H'493E,R0), R0; cycles=6 */
        call_indirect_table(0x493E, R0, R0); /* 493B; JSR @R0; JSR @R0 uses R0 loaded from pointer table H'493E via R0 (0/52 decoded targets); cycles=14 */
    }
    return; /* 493D; RTS; cycles=13 */
}

void loc_6206(void)
{
    R5 &= (uint16_t)(0x01FF); /* 6206; AND.W #H'01FF, R5; cycles=4 */
    set_flags_cmp16(R5, 0x007F); /* 620A; CMP:I #H'007F, R5; cycles=3 */
    if (C || Z) goto loc_6216; /* 620D; BLS loc_6216; cycles=3/8 nt/t */
    set_flags_cmp16(R5, 0x017F); /* 620F; CMP:I #H'017F, R5; cycles=3 */
    if (C || Z) goto loc_6218; /* 6212; BLS loc_6218; cycles=3/7 nt/t */
    goto loc_6222; /* 6214; BRA loc_6222; cycles=7 */
loc_6216:
    goto loc_622A; /* 6216; BRA loc_622A; cycles=7 */
loc_6218:
    R5 -= (uint16_t)(0x0080); /* 6218; SUB.W #H'0080, R5; cycles=4 */
    R5 += (uint16_t)(0x0100); /* 621C; ADD:G.W #H'0100, R5; cycles=4 */
    goto loc_622A; /* 6220; BRA loc_622A; cycles=7 */
loc_6222:
    R5 -= (uint16_t)(0x0180); /* 6222; SUB.W #H'0180, R5; cycles=4 */
    R5 += (uint16_t)(0x0200); /* 6226; ADD:G.W #H'0200, R5; cycles=4 */
loc_622A:
    return; /* 622A; RTS; cycles=12 */
}

void loc_622B(void)
{
    R4 = (uint16_t)(R5); /* 622B; MOV:G.W R5, R4; cycles=3 */
    R5 = zero_extend8(R5); /* 622D; EXTU.B R5; cycles=3 */
    R4 = swap_bytes(R4); /* 622F; SWAP.B R4; cycles=3 */
    R4 &= (uint8_t)(0x07); /* 6231; AND.B #H'07, R4; cycles=3 */
    set_flags_cmp8(R4, 0x00); /* 6234; CMP:E #H'00, R4; cycles=2 */
    if (Z) goto loc_6244; /* 6236; BEQ loc_6244; cycles=3/7 nt/t */
    set_flags_cmp8(R4, 0x01); /* 6238; CMP:E #H'01, R4; cycles=2 */
    if (Z) goto loc_624D; /* 623A; BEQ loc_624D; cycles=3/7 nt/t */
    set_flags_cmp8(R4, 0x02); /* 623C; CMP:E #H'02, R4; cycles=2 */
    if (Z) goto loc_6256; /* 623E; BEQ loc_6256; cycles=3/7 nt/t */
    set_flags_cmp8(R4, 0x03); /* 6240; CMP:E #H'03, R4; cycles=2 */
    if (Z) goto loc_625F; /* 6242; BEQ loc_625F; cycles=3/7 nt/t */
loc_6244:
    set_flags_cmp8(R5, 0x7F); /* 6244; CMP:E #H'7F, R5; cycles=2 */
    if (!C && !Z) goto loc_625F; /* 6246; BHI loc_625F; cycles=3/7 nt/t */
    R4 = (uint16_t)(0x0000); /* 6248; MOV:I.W #H'0000, R4; dataflow R4=0x0000; cycles=3 */
    goto loc_6264; /* 624B; BRA loc_6264; cycles=8 */
loc_624D:
    set_flags_cmp8(R5, 0xFF); /* 624D; CMP:E #H'FF, R5; cycles=2 */
    if (!C && !Z) goto loc_625F; /* 624F; BHI loc_625F; cycles=3/8 nt/t */
    R4 = (uint16_t)(0x0080); /* 6251; MOV:I.W #H'0080, R4; dataflow R4=0x0080; cycles=3 */
    goto loc_6264; /* 6254; BRA loc_6264; cycles=7 */
loc_6256:
    set_flags_cmp8(R5, 0x7F); /* 6256; CMP:E #H'7F, R5; cycles=2 */
    if (!C && !Z) goto loc_625F; /* 6258; BHI loc_625F; cycles=3/7 nt/t */
    R4 = (uint16_t)(0x0180); /* 625A; MOV:I.W #H'0180, R4; dataflow R4=0x0180; cycles=3 */
    goto loc_6264; /* 625D; BRA loc_6264; cycles=8 */
loc_625F:
    R4 = 0; /* 625F; CLR.W R4; dataflow R4=0x0000; cycles=3 */
    R5 = (uint16_t)(0x01FF); /* 6261; MOV:I.W #H'01FF, R5; dataflow R5=0x01FF; cycles=3 */
loc_6264:
    R5 += (uint16_t)(R4); /* 6264; ADD:G.W R4, R5; cycles=3 */
    return; /* 6266; RTS; cycles=12 */
}

void loc_BA26(void)
{
    do {
        set_flags_tst8(MEM8[0xF9C0]); /* BA26; TST.B @H'F9C0; refs ram_F9C0; cycles=7 */
    } while (!Z); /* BA2A; BNE loc_BA26; cycles=3/7 nt/t */
    MEM8[0xF9C0] = (uint8_t)(0x64); /* BA2C; MOV:G.B #H'64, @H'F9C0; refs ram_F9C0; cycles=9 */
    MEM8[0xF9C4] = (uint8_t)(0x07); /* BA31; MOV:G.B #H'07, @H'F9C4; refs ram_F9C4; cycles=9 */
    R0 = (uint16_t)(MEM16[0xF850]); /* BA36; MOV:G.W @H'F850, R0; refs ram_F850; cycles=7 */
    MEM16[0xF858] = (uint16_t)(R0); /* BA3A; MOV:G.W R0, @H'F858; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: TX buffer-region references cluster around H'F858-H'F85D; confidence high; refs ram_F858; cycles=7 */
    R0 = (uint16_t)(MEM16[0xF852]); /* BA3E; MOV:G.W @H'F852, R0; refs ram_F852; cycles=7 */
    MEM16[0xF85A] = (uint16_t)(R0); /* BA42; MOV:G.W R0, @H'F85A; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: TX buffer-region references cluster around H'F858-H'F85D; confidence high; refs ram_F85A; cycles=7 */
    R0 = (uint8_t)(MEM8[0xF854]); /* BA46; MOV:G.B @H'F854, R0; refs ram_F854; cycles=7 */
    MEM8[0xF85C] = (uint8_t)(R0); /* BA4A; MOV:G.B R0, @H'F85C; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: TX buffer-region references cluster around H'F858-H'F85D; confidence high; refs ram_F85C; cycles=7 */
    R0 = (uint8_t)(0x5A); /* BA4E; MOV:E.B #H'5A, R0; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: candidate TX checksum starts from seed H'005A; confidence high; dataflow R0=0x5A; cycles=2 */
    R0 ^= (uint8_t)(MEM8[0xF858]); /* BA50; XOR.B @H'F858, R0; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: TX buffer-region references cluster around H'F858-H'F85D; confidence high; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: XOR chain appears to feed the H'F85D checksum byte; confidence high; refs ram_F858; cycles=7 */
    R0 ^= (uint8_t)(MEM8[0xF859]); /* BA54; XOR.B @H'F859, R0; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: TX buffer-region references cluster around H'F858-H'F85D; confidence high; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: XOR chain appears to feed the H'F85D checksum byte; confidence high; refs ram_F859; cycles=7 */
    R0 ^= (uint8_t)(MEM8[0xF85A]); /* BA58; XOR.B @H'F85A, R0; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: TX buffer-region references cluster around H'F858-H'F85D; confidence high; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: XOR chain appears to feed the H'F85D checksum byte; confidence high; refs ram_F85A; cycles=7 */
    R0 ^= (uint8_t)(MEM8[0xF85B]); /* BA5C; XOR.B @H'F85B, R0; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: TX buffer-region references cluster around H'F858-H'F85D; confidence high; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: XOR chain appears to feed the H'F85D checksum byte; confidence high; refs ram_F85B; cycles=7 */
    R0 ^= (uint8_t)(MEM8[0xF85C]); /* BA60; XOR.B @H'F85C, R0; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: TX buffer-region references cluster around H'F858-H'F85D; confidence high; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: XOR chain appears to feed the H'F85D checksum byte; confidence high; refs ram_F85C; cycles=7 */
    MEM8[0xF85D] = (uint8_t)(R0); /* BA64; MOV:G.B R0, @H'F85D; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: TX buffer-region references cluster around H'F858-H'F85D; confidence high; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: candidate checksum byte write targets H'F85D; confidence high; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: XOR chain appears to feed the H'F85D checksum byte; confidence high; refs ram_F85D; cycles=7 */
    do {
        set_flags_btst(SCI1_SSR, 7); /* BA68; BTST.B #7, @SCI1_SSR; wait for SCI1 transmit data register empty (TDRE=1); SCI1 SSR status for traced RS232/MAX202 path; TDRE/RDRF/error flags gate TDR/RDR use; refs SCI1_SSR; cycles=7 */
    } while (Z); /* BA6C; BEQ loc_BA68; repeat SCI1 transmit-empty wait while TDRE=0; cycles=3/7 nt/t */
    R0 = (uint8_t)(MEM8[0xF858]); /* BA6E; MOV:G.B @H'F858, R0; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: TX buffer-region references cluster around H'F858-H'F85D; confidence high; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: initial SCI1 TDR send is supported by a read from H'F858; confidence high; refs ram_F858; cycles=7 */
    SCI1_TDR = (uint8_t)(R0); /* BA72; MOV:G.B R0, @SCI1_TDR; SCI1_TDR; write RS232/SCI byte to SCI1 TDR for transmission; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: initial SCI1 TDR send is supported by a read from H'F858; confidence high; SCI1 TDR write transmits on traced RS232/MAX202 path: H8 pin 66 P95/TXD -> MAX202 pin 11; refs SCI1_TDR; cycles=7 */
    MEM8[0xF9C2] = (uint8_t)(0x01); /* BA76; MOV:G.B #H'01, @H'F9C2; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: write evidence supports TX index H'F9C2 being initialized to 1; confidence high; refs ram_F9C2; cycles=9 */
    SCI1_SSR &= ~BIT(7); /* BA7B; BCLR.B #7, @SCI1_SSR; clear TDRE (bit 7) of SCI1_SSR; clear SCI1 TDRE after TDR write; TXI can fire again when hardware reasserts TDRE; SCI1 SSR status for traced RS232/MAX202 path; TDRE/RDRF/error flags gate TDR/RDR use; refs SCI1_SSR; cycles=8 */
    SCI1_SCR |= BIT(7); /* BA7F; BSET.B #7, @SCI1_SCR; set TIE (bit 7) of SCI1_SCR; enable SCI1 TX interrupt (TIE); gates TXI when hardware sets TDRE; SCI1 SCR write TE=1 RE=1; TE/RE select the traced RS232/MAX202 pins (P95/TXD pin 66 to MAX202 pin 11, P96/RXD pin 67 to MAX202 pin 12); refs SCI1_SCR; cycles=8 */
    return; /* BA83; RTS; cycles=13 */
}

void vec_sci1_txi_BA84(void)
{
    /* vector sources: sci1_txi */
    set_flags_btst(MEM8[0xFAA2], 3); /* BA84; BTST.B #3, @H'FAA2; refs ram_FAA2; cycles=7 */
    if (Z) goto loc_BAA9; /* BA88; BEQ loc_BAA9; cycles=3/7 nt/t */
    set_flags_btst(MEM8[0xFAA5], 7); /* BA8A; BTST.B #7, @H'FAA5; refs ram_FAA5; cycles=7 */
    if (Z) goto loc_BAA9; /* BA8E; BEQ loc_BAA9; cycles=3/7 nt/t */
    set_flags_tst8(MEM8[0xF9C3]); /* BA90; TST.B @H'F9C3; refs ram_F9C3; cycles=7 */
    if (Z) goto loc_BAA9; /* BA94; BEQ loc_BAA9; cycles=3/7 nt/t */
    MEM8[0xFAA2] &= ~BIT(3); /* BA96; BCLR.B #3, @H'FAA2; refs ram_FAA2; cycles=9 */
    MEM8[0xFAA3] = 0; /* BA9A; CLR.B @H'FAA3; refs ram_FAA3; cycles=9 */
    SCI1_SCR &= ~BIT(7); /* BA9E; BCLR.B #7, @SCI1_SCR; clear TIE (bit 7) of SCI1_SCR; disable SCI1 TX interrupt (TIE); gates TXI when hardware sets TDRE; SCI1 SCR write TE=1 RE=1; TE/RE select the traced RS232/MAX202 pins (P95/TXD pin 66 to MAX202 pin 11, P96/RXD pin 67 to MAX202 pin 12); refs SCI1_SCR; cycles=9 */
    MEM8[0xF9C0] = (uint8_t)(0x1F); /* BAA2; MOV:G.B #H'1F, @H'F9C0; refs ram_F9C0; cycles=9 */
    goto loc_BAF1; /* BAA7; BRA loc_BAF1; cycles=8 */
loc_BAA9:
    MEM16[--R7] = (uint16_t)(R0); /* BAA9; MOV:G.W R0, @-R7; cycles=5 */
    R0 = (uint8_t)(MEM8[0xF9C2]); /* BAAB; MOV:G.B @H'F9C2, R0; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: candidate TX ISR sends SCI1 TDR from indexed H'F858 buffer; confidence high; refs ram_F9C2; cycles=6 */
    R0 = zero_extend8(R0); /* BAAF; EXTU.B R0; cycles=3 */
    R0 = (uint8_t)(MEM8[R0 - 0x07A8]); /* BAB1; MOV:G.B @(-H'07A8,R0), R0; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: candidate TX ISR sends SCI1 TDR from indexed H'F858 buffer; confidence high; cycles=6 */
    SCI1_TDR = (uint8_t)(R0); /* BAB5; MOV:G.B R0, @SCI1_TDR; SCI1_TDR; write RS232/SCI byte to SCI1 TDR for transmission; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: candidate TX ISR sends SCI1 TDR from indexed H'F858 buffer; confidence high; SCI1 TDR write transmits on traced RS232/MAX202 path: H8 pin 66 P95/TXD -> MAX202 pin 11; refs SCI1_TDR; cycles=6 */
    R0 = (uint16_t)(MEM16[R7++]); /* BAB9; MOV:G.W @R7+, R0; cycles=6 */
    SCI1_SSR &= ~BIT(7); /* BABB; BCLR.B #7, @SCI1_SSR; clear TDRE (bit 7) of SCI1_SSR; clear SCI1 TDRE after TDR write; TXI can fire again when hardware reasserts TDRE; SCI1 SSR status for traced RS232/MAX202 path; TDRE/RDRF/error flags gate TDR/RDR use; refs SCI1_SSR; cycles=8 */
    MEM8[0xF9C2] += (uint8_t)(1); /* BABF; ADD:Q.B #1, @H'F9C2; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: candidate TX ISR increments TX index H'F9C2; confidence high; refs ram_F9C2; cycles=8 */
    set_flags_cmp8(MEM8[0xF9C2], 0x06); /* BAC3; CMP:G.B #H'06, @H'F9C2; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: candidate TX ISR compares TX index to frame length 6; confidence high; refs ram_F9C2; cycles=6 */
    if (!Z) goto loc_BAF1; /* BAC8; BNE loc_BAF1; cycles=3/7 nt/t */
    SCI1_SCR &= ~BIT(7); /* BACA; BCLR.B #7, @SCI1_SCR; clear TIE (bit 7) of SCI1_SCR; disable SCI1 TX interrupt (TIE); gates TXI when hardware sets TDRE; SCI1 SCR write TE=1 RE=1; TE/RE select the traced RS232/MAX202 pins (P95/TXD pin 66 to MAX202 pin 11, P96/RXD pin 67 to MAX202 pin 12); refs SCI1_SCR; cycles=9 */
    set_flags_btst(MEM8[0xF795], 6); /* BACE; BTST.B #6, @H'F795; refs ram_F795; cycles=7 */
    if (!Z) goto loc_BAE8; /* BAD2; BNE loc_BAE8; cycles=3/7 nt/t */
    set_flags_btst(MEM8[0xF791], 7); /* BAD4; BTST.B #7, @H'F791; refs ram_F791; cycles=7 */
    if (!Z) goto loc_BAE1; /* BAD8; BNE loc_BAE1; cycles=3/7 nt/t */
    MEM8[0xF9C0] = (uint8_t)(0x09); /* BADA; MOV:G.B #H'09, @H'F9C0; refs ram_F9C0; cycles=9 */
    goto loc_BAED; /* BADF; BRA loc_BAED; cycles=8 */
loc_BAE1:
    MEM8[0xF9C0] = (uint8_t)(0x09); /* BAE1; MOV:G.B #H'09, @H'F9C0; refs ram_F9C0; cycles=9 */
    goto loc_BAED; /* BAE6; BRA loc_BAED; cycles=7 */
loc_BAE8:
    MEM8[0xF9C0] = (uint8_t)(0xF0); /* BAE8; MOV:G.B #H'F0, @H'F9C0; refs ram_F9C0; cycles=9 */
loc_BAED:
    MEM8[0xF9C1] = 0; /* BAED; CLR.B @H'F9C1; refs ram_F9C1; cycles=8 */
loc_BAF1:
    return_from_interrupt(); /* BAF1; RTE; cycles=14 */
}

void loc_BAF2(void)
{
    R1 = (uint8_t)(MEM8[0xF9B5]); /* BAF2; MOV:G.B @H'F9B5, R1; refs ram_F9B5; cycles=7 */
    R1 = zero_extend8(R1); /* BAF6; EXTU.B R1; cycles=3 */
    set_flags_cmp8(R1, MEM8[0xF9B0]); /* BAF8; CMP:G.B @H'F9B0, R1; refs ram_F9B0; cycles=7 */
    if (!Z) goto loc_BB00; /* BAFC; BNE loc_BB00; cycles=3/7 nt/t */
    goto loc_BB56; /* BAFE; BRA loc_BB56; cycles=7 */
loc_BB00:
    MEM8[0xFAA2] |= BIT(3); /* BB00; BSET.B #3, @H'FAA2; refs ram_FAA2; cycles=9 */
    R0 = (uint16_t)(R1); /* BB04; MOV:G.W R1, R0; cycles=3 */
    R0 <<= 1; /* BB06; SHLL.W R0; cycles=3 */
    R0 = (uint16_t)(MEM16[R0 - 0x0790]); /* BB08; MOV:G.W @(-H'0790,R0), R0; cycles=7 */
    R5 = (uint16_t)(R0); /* BB0C; MOV:G.W R0, R5; cycles=3 */
    loc_6206(); /* BB0E; BSR loc_6206; cycles=13 */
    R1 = (uint16_t)(R0); /* BB11; MOV:G.W R0, R1; cycles=3 */
    R1 = swap_bytes(R1); /* BB13; SWAP.B R1; cycles=3 */
    R1 >>= 1; /* BB15; SHLR.B R1; cycles=2 */
    R2 = (uint8_t)(R1); /* BB17; MOV:G.B R1, R2; cycles=2 */
    R1 &= (uint8_t)(0x07); /* BB19; AND.B #H'07, R1; cycles=3 */
    MEM8[0xF850] = (uint8_t)(R1); /* BB1C; MOV:G.B R1, @H'F850; refs ram_F850; cycles=7 */
    MEM8[0xF852] = (uint8_t)(R5); /* BB20; MOV:G.B R5, @H'F852; refs ram_F852; cycles=7 */
    R5 = swap_bytes(R5); /* BB24; SWAP.B R5; cycles=3 */
    R2 &= (uint8_t)(0x78); /* BB26; AND.B #H'78, R2; cycles=3 */
    R5 |= (uint8_t)(R2); /* BB29; OR.B R2, R5; cycles=2 */
    MEM8[0xF851] = (uint8_t)(R5); /* BB2B; MOV:G.B R5, @H'F851; refs ram_F851; cycles=6 */
    R0 &= (uint16_t)(0x01FF); /* BB2F; AND.W #H'01FF, R0; cycles=4 */
    R0 <<= 1; /* BB33; SHLL.W R0; cycles=3 */
    R4 = (uint16_t)(MEM16[R0 - 0x1800]); /* BB35; MOV:G.W @(-H'1800,R0), R4; cycles=6 */
    MEM8[0xF854] = (uint8_t)(R4); /* BB39; MOV:G.B R4, @H'F854; refs ram_F854; cycles=6 */
    R4 = swap_bytes(R4); /* BB3D; SWAP.B R4; cycles=3 */
    MEM8[0xF853] = (uint8_t)(R4); /* BB3F; MOV:G.B R4, @H'F853; refs ram_F853; cycles=6 */
    loc_BA26(); /* BB43; BSR loc_BA26; cycles=14 */
    MEM16[0xF9C6] = (uint16_t)(0x01F4); /* BB46; MOV:G.W #H'01F4, @H'F9C6; refs ram_F9C6; cycles=11 */
    MEM8[0xF9C8] = (uint8_t)(0x14); /* BB4C; MOV:G.B #H'14, @H'F9C8; refs ram_F9C8; cycles=9 */
    MEM8[0xFAA3] = (uint8_t)(0x80); /* BB51; MOV:G.B #H'80, @H'FAA3; refs ram_FAA3; cycles=9 */
loc_BB56:
    return; /* BB56; RTS; cycles=12 */
}

void vec_sci1_eri_BB57(void)
{
    /* vector sources: sci1_eri */
    MEM8[0xFAA4] |= BIT(7); /* BB57; BSET.B #7, @H'FAA4; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: SCI1 ERI latches FAA4.bit7, clears ORER/FER/PER, then falls through into the same RXI byte-capture path; confidence high; refs ram_FAA4; cycles=8 */
    SCI1_SSR &= ~BIT(5); /* BB5B; BCLR.B #5, @SCI1_SSR; clear ORER (bit 5) of SCI1_SSR; clear SCI1 ORER with SSR R/(W)* semantics: write 0 clears latched hardware flag, write 1 preserves hardware-owned state; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: SCI1 ERI latches FAA4.bit7, clears ORER/FER/PER, then falls through into the same RXI byte-capture path; confidence high; SCI1 SSR status for traced RS232/MAX202 path; TDRE/RDRF/error flags gate TDR/RDR use; refs SCI1_SSR; cycles=8 */
    SCI1_SSR &= ~BIT(4); /* BB5F; BCLR.B #4, @SCI1_SSR; clear FER (bit 4) of SCI1_SSR; clear SCI1 FER with SSR R/(W)* semantics: write 0 clears latched hardware flag, write 1 preserves hardware-owned state; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: SCI1 ERI latches FAA4.bit7, clears ORER/FER/PER, then falls through into the same RXI byte-capture path; confidence high; SCI1 SSR status for traced RS232/MAX202 path; TDRE/RDRF/error flags gate TDR/RDR use; refs SCI1_SSR; cycles=8 */
    SCI1_SSR &= ~BIT(3); /* BB63; BCLR.B #3, @SCI1_SSR; clear PER (bit 3) of SCI1_SSR; clear SCI1 PER with SSR R/(W)* semantics: write 0 clears latched hardware flag, write 1 preserves hardware-owned state; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: SCI1 ERI latches FAA4.bit7, clears ORER/FER/PER, then falls through into the same RXI byte-capture path; confidence high; SCI1 SSR status for traced RS232/MAX202 path; TDRE/RDRF/error flags gate TDR/RDR use; refs SCI1_SSR; cycles=8 */
}

void vec_sci1_rxi_BB67(void)
{
    /* vector sources: sci1_rxi */
    push_registers(R0, R1); /* BB67; STM.W {R0,R1}, @-SP; cycles=12 */
    SCI1_SSR &= ~BIT(6); /* BB69; BCLR.B #6, @SCI1_SSR; clear RDRF (bit 6) of SCI1_SSR; clear SCI1 RDRF with SSR R/(W)* semantics: write 0 clears latched hardware flag, write 1 preserves hardware-owned state; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: ROM clears SCI1 SSR.RDRF before reading SCI1_RDR; preserve this observed ordering even though the manual describes the canonical RDR-read then RDRF-clear sequence; confidence high; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: SCI1 ERI latches FAA4.bit7, clears ORER/FER/PER, then falls through into the same RXI byte-capture path; confidence high; SCI1 SSR status for traced RS232/MAX202 path; TDRE/RDRF/error flags gate TDR/RDR use; refs SCI1_SSR; cycles=8 */
    R0 = (uint8_t)(SCI1_RDR); /* BB6D; MOV:G.B @SCI1_RDR, R0; read SCI1 received byte from RDR; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: SCI1 RX ISR reads a byte from SCI1_RDR; confidence high; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: ROM clears SCI1 SSR.RDRF before reading SCI1_RDR; preserve this observed ordering even though the manual describes the canonical RDR-read then RDRF-clear sequence; confidence high; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: SCI1 ERI latches FAA4.bit7, clears ORER/FER/PER, then falls through into the same RXI byte-capture path; confidence high; SCI1 RDR read receives from traced RS232/MAX202 path: MAX202 pin 12 -> H8 pin 67 P96/RXD; refs SCI1_RDR; cycles=6 */
    set_flags_tst8(MEM8[0xF9C1]); /* BB71; TST.B @H'F9C1; refs ram_F9C1; cycles=6 */
    if (!Z) goto loc_BB7D; /* BB75; BNE loc_BB7D; cycles=3/8 nt/t */
    MEM8[0xF9C3] = 0; /* BB77; CLR.B @H'F9C3; refs ram_F9C3; cycles=8 */
    goto loc_BB8A; /* BB7B; BRA loc_BB8A; cycles=8 */
loc_BB7D:
    set_flags_cmp8(MEM8[0xF9C3], 0x05); /* BB7D; CMP:G.B #H'05, @H'F9C3; refs ram_F9C3; cycles=6 */
    if (C || Z) goto loc_BB8A; /* BB82; BLS loc_BB8A; cycles=3/7 nt/t */
    MEM8[0xFAA4] = 0; /* BB84; CLR.B @H'FAA4; refs ram_FAA4; cycles=9 */
    goto loc_BBA3; /* BB88; BRA loc_BBA3; cycles=7 */
loc_BB8A:
    R1 = (uint8_t)(MEM8[0xF9C3]); /* BB8A; MOV:G.B @H'F9C3, R1; refs ram_F9C3; cycles=7 */
    R1 = zero_extend8(R1); /* BB8E; EXTU.B R1; cycles=3 */
    MEM8[R1 - 0x0798] = (uint8_t)(R0); /* BB90; MOV:G.B R0, @(-H'0798,R1); candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: received bytes are stored into candidate capture buffer H'F868-H'F86D; confidence high; cycles=7 */
    R1 += (uint8_t)(1); /* BB94; ADD:Q.B #1, R1; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX byte count/index is incremented and stored at H'F9C3; confidence high; cycles=4 */
    MEM8[0xF9C3] = (uint8_t)(R1); /* BB96; MOV:G.B R1, @H'F9C3; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX byte count/index is incremented and stored at H'F9C3; confidence high; refs ram_F9C3; cycles=7 */
    set_flags_cmp8(R1, 0x06); /* BB9A; CMP:E #H'06, R1; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX ISR compares incremented count to candidate frame length 6; confidence high; cycles=2 */
    if (!Z) goto loc_BBA3; /* BB9C; BNE loc_BBA3; cycles=3/7 nt/t */
    MEM8[0xF9C5] = (uint8_t)(0x14); /* BB9E; MOV:G.B #H'14, @H'F9C5; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX ISR sets H'F9C5 after count reaches 6; confidence high; refs ram_F9C5; cycles=9 */
loc_BBA3:
    MEM8[0xF9C1] = (uint8_t)(0x05); /* BBA3; MOV:G.B #H'05, @H'F9C1; refs ram_F9C1; cycles=9 */
    pop_registers(R0, R1); /* BBA8; LDM.W @SP+, {R0,R1}; cycles=14 */
    return_from_interrupt(); /* BBAA; RTE; cycles=13 */
}

void loc_BBAB(void)
{
    set_flags_cmp8(MEM8[0xF9C3], 0x06); /* BBAB; CMP:G.B #H'06, @H'F9C3; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX processing path requires H'F9C3 to equal 6; confidence high; refs ram_F9C3; cycles=6 */
    if (!Z) goto loc_BE6F; /* BBB0; BNE loc_BE6F; cycles=3/7 nt/t */
    R0 = (uint16_t)(MEM16[0xF868]); /* BBB3; MOV:G.W @H'F868, R0; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX processing copies candidate capture buffer H'F868-H'F86D to validation buffer H'F860-H'F865; confidence high; refs ram_F868; cycles=6 */
    MEM16[0xF860] = (uint16_t)(R0); /* BBB7; MOV:G.W R0, @H'F860; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX processing copies candidate capture buffer H'F868-H'F86D to validation buffer H'F860-H'F865; confidence high; refs ram_F860; cycles=6 */
    R0 = (uint16_t)(MEM16[0xF86A]); /* BBBB; MOV:G.W @H'F86A, R0; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX processing copies candidate capture buffer H'F868-H'F86D to validation buffer H'F860-H'F865; confidence high; refs ram_F86A; cycles=6 */
    MEM16[0xF862] = (uint16_t)(R0); /* BBBF; MOV:G.W R0, @H'F862; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX processing copies candidate capture buffer H'F868-H'F86D to validation buffer H'F860-H'F865; confidence high; refs ram_F862; cycles=6 */
    R0 = (uint16_t)(MEM16[0xF86C]); /* BBC3; MOV:G.W @H'F86C, R0; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX processing copies candidate capture buffer H'F868-H'F86D to validation buffer H'F860-H'F865; confidence high; refs ram_F86C; cycles=6 */
    MEM16[0xF864] = (uint16_t)(R0); /* BBC7; MOV:G.W R0, @H'F864; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX processing copies candidate capture buffer H'F868-H'F86D to validation buffer H'F860-H'F865; confidence high; refs ram_F864; cycles=6 */
    MEM8[0xF9C3] = 0; /* BBCB; CLR.B @H'F9C3; refs ram_F9C3; cycles=8 */
    set_flags_btst(MEM8[0xFAA4], 7); /* BBCF; BTST.B #7, @H'FAA4; refs ram_FAA4; cycles=6 */
    if (!Z) goto loc_BE29; /* BBD3; BNE loc_BE29; cycles=3/8 nt/t */
    R0 = (uint8_t)(0x5A); /* BBD6; MOV:E.B #H'5A, R0; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: candidate RX checksum validation starts from seed H'005A; confidence high; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX path XORs H'F860-H'F864 and compares the result with H'F865; confidence high; dataflow R0=0x5A; cycles=2 */
    R0 ^= (uint8_t)(MEM8[0xF860]); /* BBD8; XOR.B @H'F860, R0; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX path XORs H'F860-H'F864 and compares the result with H'F865; confidence high; refs ram_F860; cycles=7 */
    R0 ^= (uint8_t)(MEM8[0xF861]); /* BBDC; XOR.B @H'F861, R0; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX path XORs H'F860-H'F864 and compares the result with H'F865; confidence high; refs ram_F861; cycles=7 */
    R0 ^= (uint8_t)(MEM8[0xF862]); /* BBE0; XOR.B @H'F862, R0; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX path XORs H'F860-H'F864 and compares the result with H'F865; confidence high; refs ram_F862; cycles=7 */
    R0 ^= (uint8_t)(MEM8[0xF863]); /* BBE4; XOR.B @H'F863, R0; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX path XORs H'F860-H'F864 and compares the result with H'F865; confidence high; refs ram_F863; cycles=7 */
    R0 ^= (uint8_t)(MEM8[0xF864]); /* BBE8; XOR.B @H'F864, R0; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX path XORs H'F860-H'F864 and compares the result with H'F865; confidence high; refs ram_F864; cycles=7 */
    set_flags_cmp8(R0, MEM8[0xF865]); /* BBEC; CMP:G.B @H'F865, R0; candidate/evidence-supported SCI1 6-byte RX frame; capture H'F868-H'F86D, validate H'F860-H'F865, checksum H'F865 seeded by H'005A; evidence: RX path XORs H'F860-H'F864 and compares the result with H'F865; confidence high; refs ram_F865; cycles=7 */
    if (!Z) goto loc_BE29; /* BBF0; BNE loc_BE29; cycles=3/7 nt/t */
    MEM8[0xFAA6] = 0; /* BBF3; CLR.B @H'FAA6; refs ram_FAA6; cycles=8 */
    R5 = (uint8_t)(MEM8[0xF861]); /* BBF7; MOV:G.B @H'F861, R5; refs ram_F861; cycles=6 */
    R5 = swap_bytes(R5); /* BBFB; SWAP.B R5; cycles=3 */
    R5 = (uint8_t)(MEM8[0xF862]); /* BBFD; MOV:G.B @H'F862, R5; refs ram_F862; cycles=6 */
    loc_622B(); /* BC01; BSR loc_622B; cycles=14 */
    R4 = (uint16_t)(R5); /* BC04; MOV:G.W R5, R4; cycles=3 */
    R4 <<= 1; /* BC06; SHLL.W R4; cycles=3 */
    R0 = (uint8_t)(MEM8[0xF860]); /* BC08; MOV:G.B @H'F860, R0; refs ram_F860; cycles=7 */
    R0 &= (uint8_t)(0x07); /* BC0C; AND.B #H'07, R0; cycles=3 */
    set_flags_tst8(MEM8[0xFAA2]); /* BC0F; TST.B @H'FAA2; refs ram_FAA2; cycles=6 */
    if (!Z) goto loc_BC3A; /* BC13; BNE loc_BC3A; cycles=3/8 nt/t */
loc_BC15:
    MEM8[0xFAA2] |= BIT(7); /* BC15; BSET.B #7, @H'FAA2; refs ram_FAA2; cycles=8 */
    set_flags_btst(MEM8[0xF861], 7); /* BC19; BTST.B #7, @H'F861; refs ram_F861; cycles=6 */
    if (!Z) goto loc_BD0B; /* BC1D; BNE loc_BD0B; cycles=3/8 nt/t */
    set_flags_cmp8(R0, 0x00); /* BC20; CMP:E #H'00, R0; cycles=2 */
    if (Z) goto loc_BC69; /* BC22; BEQ loc_BC69; cycles=3/7 nt/t */
    set_flags_cmp8(R0, 0x01); /* BC24; CMP:E #H'01, R0; cycles=2 */
    if (Z) goto loc_BCD7; /* BC26; BEQ loc_BCD7; cycles=3/7 nt/t */
    set_flags_cmp8(R0, 0x02); /* BC29; CMP:E #H'02, R0; cycles=2 */
    if (Z) goto loc_BD04; /* BC2B; BEQ loc_BD04; cycles=3/8 nt/t */
    set_flags_cmp8(R0, 0x07); /* BC2E; CMP:E #H'07, R0; cycles=2 */
    if (Z) goto loc_BE05; /* BC30; BEQ loc_BE05; cycles=3/7 nt/t */
    MEM8[0xFAA2] = 0; /* BC33; CLR.B @H'FAA2; refs ram_FAA2; cycles=8 */
    goto loc_BE6F; /* BC37; BRA loc_BE6F; cycles=8 */
loc_BC3A:
    set_flags_btst(R0, 2); /* BC3A; BTST.B #2, R0; cycles=2 */
    if (Z) goto loc_BC5C; /* BC3C; BEQ loc_BC5C; cycles=3/7 nt/t */
    set_flags_btst(MEM8[0xF861], 7); /* BC3E; BTST.B #7, @H'F861; refs ram_F861; cycles=7 */
    if (!Z) goto loc_BE27; /* BC42; BNE loc_BE27; cycles=3/7 nt/t */
    set_flags_cmp8(R0, 0x04); /* BC45; CMP:E #H'04, R0; cycles=2 */
    if (Z) goto loc_BD0E; /* BC47; BEQ loc_BD0E; cycles=3/8 nt/t */
    set_flags_cmp8(R0, 0x05); /* BC4A; CMP:E #H'05, R0; cycles=2 */
    if (Z) goto loc_BD80; /* BC4C; BEQ loc_BD80; cycles=3/7 nt/t */
    set_flags_cmp8(R0, 0x06); /* BC4F; CMP:E #H'06, R0; cycles=2 */
    if (Z) goto loc_BDDB; /* BC51; BEQ loc_BDDB; cycles=3/8 nt/t */
    set_flags_cmp8(R0, 0x07); /* BC54; CMP:E #H'07, R0; cycles=2 */
    if (Z) goto loc_BE05; /* BC56; BEQ loc_BE05; cycles=3/7 nt/t */
    goto loc_BE6F; /* BC59; BRA loc_BE6F; cycles=8 */
loc_BC5C:
    MEM8[0xFAA2] &= ~BIT(3); /* BC5C; BCLR.B #3, @H'FAA2; refs ram_FAA2; cycles=9 */
    if (Z) goto loc_BE6F; /* BC60; BEQ loc_BE6F; cycles=3/7 nt/t */
    MEM8[0xFAA3] = 0; /* BC63; CLR.B @H'FAA3; refs ram_FAA3; cycles=8 */
    goto loc_BC15; /* BC67; BRA loc_BC15; cycles=8 */
loc_BC69:
    set_flags_tst16(R5); /* BC69; TST.W R5; cycles=3 */
    if (!Z) goto loc_BC8B; /* BC6B; BNE loc_BC8B; cycles=3/8 nt/t */
    R0 = (uint8_t)(MEM8[0xF863]); /* BC6D; MOV:G.B @H'F863, R0; refs ram_F863; cycles=6 */
    R0 = swap_bytes(R0); /* BC71; SWAP.B R0; cycles=3 */
    R0 = (uint8_t)(0x80); /* BC73; MOV:E.B #H'80, R0; dataflow R0=0x80; cycles=2 */
    MEM16[R4 - 0x2000] = (uint16_t)(R0); /* BC75; MOV:G.W R0, @(-H'2000,R4); cycles=6 */
    MEM16[R4 - 0x1800] = (uint16_t)(R0); /* BC79; MOV:G.W R0, @(-H'1800,R4); cycles=6 */
    MEM8[0xF864] = (uint8_t)(0x80); /* BC7D; MOV:G.B #H'80, @H'F864; refs ram_F864; cycles=9 */
    MEM8[R5 - 0x1400] |= BIT(7); /* BC82; BSET.B #7, @(-H'1400,R5); cycles=9 */
    loc_BE70(); /* BC86; BSR loc_BE70; cycles=13 */
    goto loc_BCB0; /* BC89; BRA loc_BCB0; cycles=8 */
loc_BC8B:
    R0 = (uint8_t)(MEM8[0xF863]); /* BC8B; MOV:G.B @H'F863, R0; refs ram_F863; cycles=6 */
    R0 = swap_bytes(R0); /* BC8F; SWAP.B R0; cycles=3 */
    R0 = (uint8_t)(MEM8[0xF864]); /* BC91; MOV:G.B @H'F864, R0; refs ram_F864; cycles=6 */
    MEM16[R4 - 0x2000] = (uint16_t)(R0); /* BC95; MOV:G.W R0, @(-H'2000,R4); cycles=6 */
    MEM16[R4 - 0x1800] = (uint16_t)(R0); /* BC99; MOV:G.W R0, @(-H'1800,R4); cycles=6 */
    MEM8[R5 - 0x1400] |= BIT(7); /* BC9D; BSET.B #7, @(-H'1400,R5); cycles=8 */
    R1 = (uint16_t)(MEM16[R4 - 0x3A9C]); /* BCA1; MOV:G.W @(-H'3A9C,R4), R1; cycles=6 */
    R1 = zero_extend8(R1); /* BCA5; EXTU.B R1; cycles=3 */
    if (!Z) { /* BCA7; BEQ loc_BCAD; cycles=3/8 nt/t */
        MEM16[R1 - 0x0C00] = (uint16_t)(R0); /* BCA9; MOV:G.W R0, @(-H'0C00,R1); cycles=6 */
    }
    loc_BE70(); /* BCAD; BSR loc_BE70; cycles=14 */
loc_BCB0:
    MEM8[0xF850] = (uint8_t)(0x04); /* BCB0; MOV:G.B #H'04, @H'F850; refs ram_F850; cycles=9 */
    R0 = (uint8_t)(MEM8[0xF861]); /* BCB5; MOV:G.B @H'F861, R0; refs ram_F861; cycles=6 */
    MEM8[0xF851] = (uint8_t)(R0); /* BCB9; MOV:G.B R0, @H'F851; refs ram_F851; cycles=6 */
    R0 = (uint16_t)(MEM16[0xF862]); /* BCBD; MOV:G.W @H'F862, R0; refs ram_F862; cycles=6 */
    MEM16[0xF852] = (uint16_t)(R0); /* BCC1; MOV:G.W R0, @H'F852; refs ram_F852; cycles=6 */
    R0 = (uint8_t)(MEM8[0xF864]); /* BCC5; MOV:G.B @H'F864, R0; refs ram_F864; cycles=6 */
    MEM8[0xF854] = (uint8_t)(R0); /* BCC9; MOV:G.B R0, @H'F854; refs ram_F854; cycles=6 */
    loc_BA26(); /* BCCD; BSR loc_BA26; cycles=14 */
    MEM8[0xFAA2] &= ~BIT(7); /* BCD0; BCLR.B #7, @H'FAA2; refs ram_FAA2; cycles=9 */
    goto loc_BE6F; /* BCD4; BRA loc_BE6F; cycles=7 */
loc_BCD7:
    MEM8[0xF850] = (uint8_t)(0x04); /* BCD7; MOV:G.B #H'04, @H'F850; refs ram_F850; cycles=9 */
    R0 = (uint8_t)(MEM8[0xF861]); /* BCDC; MOV:G.B @H'F861, R0; refs ram_F861; cycles=7 */
    MEM8[0xF851] = (uint8_t)(R0); /* BCE0; MOV:G.B R0, @H'F851; refs ram_F851; cycles=7 */
    R0 = (uint8_t)(MEM8[0xF862]); /* BCE4; MOV:G.B @H'F862, R0; refs ram_F862; cycles=7 */
    MEM8[0xF851] = (uint8_t)(R0); /* BCE8; MOV:G.B R0, @H'F851; refs ram_F851; cycles=7 */
    R0 = (uint16_t)(MEM16[R4 - 0x2000]); /* BCEC; MOV:G.W @(-H'2000,R4), R0; cycles=7 */
    MEM8[0xF854] = (uint8_t)(R0); /* BCF0; MOV:G.B R0, @H'F854; refs ram_F854; cycles=7 */
    R0 = swap_bytes(R0); /* BCF4; SWAP.B R0; cycles=3 */
    MEM8[0xF853] = (uint8_t)(R0); /* BCF6; MOV:G.B R0, @H'F853; refs ram_F853; cycles=7 */
    loc_BA26(); /* BCFA; BSR loc_BA26; cycles=13 */
    MEM8[0xFAA2] &= ~BIT(7); /* BCFD; BCLR.B #7, @H'FAA2; refs ram_FAA2; cycles=8 */
    goto loc_BE6F; /* BD01; BRA loc_BE6F; cycles=8 */
loc_BD04:
    MEM8[0xFAA2] &= ~BIT(7); /* BD04; BCLR.B #7, @H'FAA2; refs ram_FAA2; cycles=9 */
    goto loc_BE6F; /* BD08; BRA loc_BE6F; cycles=7 */
loc_BD0B:
    goto loc_BE6F; /* BD0B; BRA loc_BE6F; cycles=8 */
loc_BD0E:
    set_flags_tst16(R5); /* BD0E; TST.W R5; cycles=3 */
    if (!Z) goto loc_BD2B; /* BD10; BNE loc_BD2B; cycles=3/7 nt/t */
    R0 = (uint8_t)(MEM8[0xF863]); /* BD12; MOV:G.B @H'F863, R0; refs ram_F863; cycles=7 */
    R0 = swap_bytes(R0); /* BD16; SWAP.B R0; cycles=3 */
    R0 = (uint8_t)(0x80); /* BD18; MOV:E.B #H'80, R0; dataflow R0=0x80; cycles=2 */
    MEM16[R4 - 0x2000] = (uint16_t)(R0); /* BD1A; MOV:G.W R0, @(-H'2000,R4); cycles=7 */
    MEM16[R4 - 0x1800] = (uint16_t)(R0); /* BD1E; MOV:G.W R0, @(-H'1800,R4); cycles=7 */
    MEM8[R5 - 0x1400] |= BIT(7); /* BD22; BSET.B #7, @(-H'1400,R5); cycles=9 */
    loc_BE70(); /* BD26; BSR loc_BE70; cycles=13 */
    goto loc_BD67; /* BD29; BRA loc_BD67; cycles=8 */
loc_BD2B:
    R0 = (uint8_t)(MEM8[0xF863]); /* BD2B; MOV:G.B @H'F863, R0; refs ram_F863; cycles=6 */
    R0 = swap_bytes(R0); /* BD2F; SWAP.B R0; cycles=3 */
    R0 = (uint8_t)(MEM8[0xF864]); /* BD31; MOV:G.B @H'F864, R0; refs ram_F864; cycles=6 */
    MEM16[R4 - 0x2000] = (uint16_t)(R0); /* BD35; MOV:G.W R0, @(-H'2000,R4); cycles=6 */
    MEM8[R5 - 0x1400] |= BIT(7); /* BD39; BSET.B #7, @(-H'1400,R5); cycles=8 */
    R1 = (uint8_t)(MEM8[R4 - 0x3A9B]); /* BD3D; MOV:G.B @(-H'3A9B,R4), R1; cycles=6 */
    R1 = zero_extend8(R1); /* BD41; EXTU.B R1; cycles=3 */
    if (Z) goto loc_BD64; /* BD43; BEQ loc_BD64; cycles=3/8 nt/t */
    MEM16[R1 - 0x0C00] = (uint16_t)(R0); /* BD45; MOV:G.W R0, @(-H'0C00,R1); cycles=6 */
    set_flags_btst(MEM8[0xF76E], 7); /* BD49; BTST.B #7, @H'F76E; refs ram_F76E; cycles=6 */
    if (Z) goto loc_BD64; /* BD4D; BEQ loc_BD64; cycles=3/8 nt/t */
    push_registers(R0, R4, R5); /* BD4F; STM.W {R0,R4,R5}, @-SP; cycles=15 */
    R4 = (uint8_t)(MEM8[0xF76E]); /* BD51; MOV:G.B @H'F76E, R4; refs ram_F76E; cycles=6 */
    R4 = swap_bytes(R4); /* BD55; SWAP.B R4; cycles=3 */
    R4 = (uint8_t)(R1); /* BD57; MOV:G.B R1, R4; cycles=2 */
    R4 &= (uint16_t)(0x0FFE); /* BD59; AND.W #H'0FFE, R4; cycles=4 */
    R5 = (uint16_t)(R0); /* BD5D; MOV:G.W R0, R5; cycles=3 */
    loc_BFE0(); /* BD5F; BSR loc_BFE0; cycles=14 */
    pop_registers(R0, R4, R5); /* BD62; LDM.W @SP+, {R0,R4,R5}; cycles=18 */
loc_BD64:
    loc_BE70(); /* BD64; BSR loc_BE70; cycles=13 */
loc_BD67:
    set_flags_btst(MEM8[0xFAA2], 3); /* BD67; BTST.B #3, @H'FAA2; refs ram_FAA2; cycles=6 */
    if (!Z) { /* BD6B; BEQ loc_BD75; cycles=3/8 nt/t */
        MEM8[0xF9B5] += (uint8_t)(1); /* BD6D; ADD:Q.B #1, @H'F9B5; refs ram_F9B5; cycles=8 */
        MEM8[0xF9B5] &= ~BIT(7); /* BD71; BCLR.B #7, @H'F9B5; refs ram_F9B5; cycles=8 */
    }
    MEM8[0xFAA3] = 0; /* BD75; CLR.B @H'FAA3; refs ram_FAA3; cycles=8 */
    MEM8[0xFAA2] = 0; /* BD79; CLR.B @H'FAA2; refs ram_FAA2; cycles=8 */
    goto loc_BE6F; /* BD7D; BRA loc_BE6F; cycles=8 */
loc_BD80:
    set_flags_cmp16(R5, 0x006C); /* BD80; CMP:I #H'006C, R5; cycles=3 */
    if (Z) goto loc_BDBF; /* BD83; BEQ loc_BDBF; cycles=3/8 nt/t */
    set_flags_cmp16(R5, 0x006D); /* BD85; CMP:I #H'006D, R5; cycles=3 */
    if (Z) goto loc_BDBF; /* BD88; BEQ loc_BDBF; cycles=3/7 nt/t */
    set_flags_cmp16(R5, 0x006E); /* BD8A; CMP:I #H'006E, R5; cycles=3 */
    if (Z) goto loc_BDBF; /* BD8D; BEQ loc_BDBF; cycles=3/8 nt/t */
    set_flags_cmp16(R5, 0x006E); /* BD8F; CMP:I #H'006E, R5; cycles=3 */
    if (Z) goto loc_BDBF; /* BD92; BEQ loc_BDBF; cycles=3/7 nt/t */
    set_flags_btst(MEM8[0xF731], 7); /* BD94; BTST.B #7, @H'F731; refs ram_F731; cycles=7 */
    if (Z) goto loc_BDC2; /* BD98; BEQ loc_BDC2; cycles=3/7 nt/t */
    set_flags_cmp16(R5, 0x006B); /* BD9A; CMP:I #H'006B, R5; cycles=3 */
    if (Z) goto loc_BDB5; /* BD9D; BEQ loc_BDB5; cycles=3/8 nt/t */
    set_flags_cmp16(R5, 0x0096); /* BD9F; CMP:I #H'0096, R5; cycles=3 */
    if (Z) goto loc_BDB5; /* BDA2; BEQ loc_BDB5; cycles=3/7 nt/t */
    set_flags_cmp16(R5, 0x0097); /* BDA4; CMP:I #H'0097, R5; cycles=3 */
    if (Z) goto loc_BDB5; /* BDA7; BEQ loc_BDB5; cycles=3/8 nt/t */
    set_flags_cmp16(R5, 0x00C6); /* BDA9; CMP:I #H'00C6, R5; cycles=3 */
    if (Z) goto loc_BDB5; /* BDAC; BEQ loc_BDB5; cycles=3/7 nt/t */
    set_flags_cmp16(R5, 0x00F8); /* BDAE; CMP:I #H'00F8, R5; cycles=3 */
    if (Z) goto loc_BDB5; /* BDB1; BEQ loc_BDB5; cycles=3/8 nt/t */
    goto loc_BDC2; /* BDB3; BRA loc_BDC2; cycles=8 */
loc_BDB5:
    MEM8[0xF731] &= ~BIT(7); /* BDB5; BCLR.B #7, @H'F731; refs ram_F731; cycles=8 */
    MEM8[0xF790] &= ~BIT(7); /* BDB9; BCLR.B #7, @H'F790; refs ram_F790; cycles=8 */
    goto loc_BDC2; /* BDBD; BRA loc_BDC2; cycles=8 */
loc_BDBF:
    loc_BE70(); /* BDBF; BSR loc_BE70; cycles=14 */
loc_BDC2:
    set_flags_btst(MEM8[0xFAA2], 3); /* BDC2; BTST.B #3, @H'FAA2; refs ram_FAA2; cycles=7 */
    if (!Z) { /* BDC6; BEQ loc_BDD0; cycles=3/7 nt/t */
        MEM8[0xF9B5] += (uint8_t)(1); /* BDC8; ADD:Q.B #1, @H'F9B5; refs ram_F9B5; cycles=9 */
        MEM8[0xF9B5] &= ~BIT(7); /* BDCC; BCLR.B #7, @H'F9B5; refs ram_F9B5; cycles=9 */
    }
    MEM8[0xFAA3] = 0; /* BDD0; CLR.B @H'FAA3; refs ram_FAA3; cycles=9 */
    MEM8[0xFAA2] = 0; /* BDD4; CLR.B @H'FAA2; refs ram_FAA2; cycles=9 */
    goto loc_BE6F; /* BDD8; BRA loc_BE6F; cycles=7 */
loc_BDDB:
    R0 = (uint8_t)(MEM8[0xF863]); /* BDDB; MOV:G.B @H'F863, R0; refs ram_F863; cycles=6 */
    R0 = swap_bytes(R0); /* BDDF; SWAP.B R0; cycles=3 */
    R0 = (uint8_t)(MEM8[0xF864]); /* BDE1; MOV:G.B @H'F864, R0; refs ram_F864; cycles=6 */
    MEM16[R4 - 0x1C00] = (uint16_t)(R0); /* BDE5; MOV:G.W R0, @(-H'1C00,R4); cycles=6 */
    MEM8[R5 - 0x1400] |= BIT(6); /* BDE9; BSET.B #6, @(-H'1400,R5); cycles=8 */
    set_flags_btst(MEM8[0xFAA2], 3); /* BDED; BTST.B #3, @H'FAA2; refs ram_FAA2; cycles=6 */
    if (!Z) { /* BDF1; BEQ loc_BDFB; cycles=3/8 nt/t */
        MEM8[0xF9B5] += (uint8_t)(1); /* BDF3; ADD:Q.B #1, @H'F9B5; refs ram_F9B5; cycles=8 */
        MEM8[0xF9B5] &= ~BIT(7); /* BDF7; BCLR.B #7, @H'F9B5; refs ram_F9B5; cycles=8 */
    }
    MEM8[0xFAA3] = 0; /* BDFB; CLR.B @H'FAA3; refs ram_FAA3; cycles=8 */
    MEM8[0xFAA2] = 0; /* BDFF; CLR.B @H'FAA2; refs ram_FAA2; cycles=8 */
    goto loc_BE6F; /* BE03; BRA loc_BE6F; cycles=8 */
loc_BE05:
    R0 = (uint16_t)(MEM16[0xF858]); /* BE05; MOV:G.W @H'F858, R0; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: TX buffer-region references cluster around H'F858-H'F85D; confidence high; refs ram_F858; cycles=6 */
    MEM16[0xF850] = (uint16_t)(R0); /* BE09; MOV:G.W R0, @H'F850; refs ram_F850; cycles=6 */
    R0 = (uint16_t)(MEM16[0xF85A]); /* BE0D; MOV:G.W @H'F85A, R0; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: TX buffer-region references cluster around H'F858-H'F85D; confidence high; refs ram_F85A; cycles=6 */
    MEM16[0xF852] = (uint16_t)(R0); /* BE11; MOV:G.W R0, @H'F852; refs ram_F852; cycles=6 */
    R0 = (uint16_t)(MEM16[0xF85C]); /* BE15; MOV:G.W @H'F85C, R0; candidate/evidence-supported SCI1 6-byte TX frame; H'F858-H'F85D, checksum H'F85D seeded by H'005A; evidence: TX buffer-region references cluster around H'F858-H'F85D; confidence high; refs ram_F85C; cycles=6 */
    MEM16[0xF854] = (uint16_t)(R0); /* BE19; MOV:G.W R0, @H'F854; refs ram_F854; cycles=6 */
    MEM8[0xF9C0] = (uint8_t)(0x1F); /* BE1D; MOV:G.B #H'1F, @H'F9C0; refs ram_F9C0; cycles=9 */
    loc_BA26(); /* BE22; BSR loc_BA26; cycles=13 */
    goto loc_BE6F; /* BE25; BRA loc_BE6F; cycles=8 */
loc_BE27:
    goto loc_BE6F; /* BE27; BRA loc_BE6F; cycles=8 */
loc_BE29:
    MEM8[0xFAA4] &= ~BIT(7); /* BE29; BCLR.B #7, @H'FAA4; refs ram_FAA4; cycles=8 */
    set_flags_btst(MEM8[0xFAA5], 7); /* BE2D; BTST.B #7, @H'FAA5; refs ram_FAA5; cycles=6 */
    if (Z) goto loc_BE6D; /* BE31; BEQ loc_BE6D; cycles=3/8 nt/t */
    MEM8[0xFAA6] += (uint8_t)(1); /* BE33; ADD:Q.B #1, @H'FAA6; refs ram_FAA6; cycles=8 */
    set_flags_cmp8(MEM8[0xFAA6], 0x02); /* BE37; CMP:G.B #H'02, @H'FAA6; refs ram_FAA6; cycles=6 */
    if (C) goto loc_BE4D; /* BE3C; BCS loc_BE4D; cycles=3/7 nt/t */
    MEM8[0xF9C0] = (uint8_t)(0x1F); /* BE3E; MOV:G.B #H'1F, @H'F9C0; refs ram_F9C0; cycles=9 */
    MEM8[0xFAA3] = 0; /* BE43; CLR.B @H'FAA3; refs ram_FAA3; cycles=8 */
    MEM8[0xFAA2] = 0; /* BE47; CLR.B @H'FAA2; refs ram_FAA2; cycles=8 */
    goto loc_BE6D; /* BE4B; BRA loc_BE6D; cycles=8 */
loc_BE4D:
    MEM8[0xF850] = (uint8_t)(0x07); /* BE4D; MOV:G.B #H'07, @H'F850; refs ram_F850; cycles=9 */
    R0 = (uint8_t)(MEM8[0xF861]); /* BE52; MOV:G.B @H'F861, R0; refs ram_F861; cycles=7 */
    MEM8[0xF851] = (uint8_t)(R0); /* BE56; MOV:G.B R0, @H'F851; refs ram_F851; cycles=7 */
    R0 = (uint16_t)(MEM16[0xF862]); /* BE5A; MOV:G.W @H'F862, R0; refs ram_F862; cycles=7 */
    MEM16[0xF852] = (uint16_t)(R0); /* BE5E; MOV:G.W R0, @H'F852; refs ram_F852; cycles=7 */
    R0 = (uint8_t)(MEM8[0xF864]); /* BE62; MOV:G.B @H'F864, R0; refs ram_F864; cycles=7 */
    MEM8[0xF854] = (uint8_t)(R0); /* BE66; MOV:G.B R0, @H'F854; refs ram_F854; cycles=7 */
    loc_BA26(); /* BE6A; BSR loc_BA26; cycles=13 */
loc_BE6D:
    goto loc_BE6F; /* BE6D; BRA loc_BE6F; cycles=8 */
loc_BE6F:
    return; /* BE6F; RTS; cycles=13 */
}

void loc_BE70(void)
{
    R3 = (uint8_t)(MEM8[0xF9B9]); /* BE70; MOV:G.B @H'F9B9, R3; refs ram_F9B9; cycles=7 */
    R3 = zero_extend8(R3); /* BE74; EXTU.B R3; cycles=3 */
    R3 <<= 1; /* BE76; SHLL.W R3; cycles=3 */
    R1 = (uint8_t)(MEM8[0xF9B4]); /* BE78; MOV:G.B @H'F9B4, R1; refs ram_F9B4; cycles=7 */
    R1 = zero_extend8(R1); /* BE7C; EXTU.B R1; cycles=3 */
    R1 <<= 1; /* BE7E; SHLL.W R1; cycles=3 */
loc_BE80:
    set_flags_cmp8(R1, R3); /* BE80; CMP:G.B R3, R1; cycles=2 */
    if (Z) goto loc_BE91; /* BE82; BEQ loc_BE91; cycles=3/7 nt/t */
    set_flags_cmp16(R5, MEM16[R3 - 0x0690]); /* BE84; CMP:G.W @(-H'0690,R3), R5; cycles=7 */
    if (Z) goto loc_BE9D; /* BE88; BEQ loc_BE9D; cycles=3/7 nt/t */
    R3 += (uint8_t)(2); /* BE8A; ADD:Q.B #2, R3; cycles=4 */
    R3 &= (uint8_t)(0x3F); /* BE8C; AND.B #H'3F, R3; cycles=3 */
    goto loc_BE80; /* BE8F; BRA loc_BE80; cycles=8 */
loc_BE91:
    MEM16[R1 - 0x0690] = (uint16_t)(R5); /* BE91; MOV:G.W R5, @(-H'0690,R1); cycles=6 */
    MEM8[0xF9B4] += (uint8_t)(1); /* BE95; ADD:Q.B #1, @H'F9B4; refs ram_F9B4; cycles=8 */
    MEM8[0xF9B4] &= ~BIT(5); /* BE99; BCLR.B #5, @H'F9B4; refs ram_F9B4; cycles=8 */
loc_BE9D:
    return; /* BE9D; RTS; cycles=13 */
}

void loc_BE9E(void)
{
    R0 = (uint8_t)(MEM8[0xFAA5]); /* BE9E; MOV:G.B @H'FAA5, R0; refs ram_FAA5; cycles=7 */
    R0 &= (uint8_t)(0x80); /* BEA2; AND.B #H'80, R0; cycles=3 */
    R0 &= (uint8_t)(MEM8[0xFAA3]); /* BEA5; AND.B @H'FAA3, R0; refs ram_FAA3; cycles=6 */
    MEM8[0xFAA3] = (uint8_t)(R0); /* BEA9; MOV:G.B R0, @H'FAA3; refs ram_FAA3; cycles=6 */
    if (!Z) goto loc_BEB5; /* BEAD; BNE loc_BEB5; cycles=3/8 nt/t */
    MEM8[0xFAA2] = 0; /* BEAF; CLR.B @H'FAA2; refs ram_FAA2; cycles=8 */
    goto loc_BEE8; /* BEB3; BRA loc_BEE8; cycles=8 */
loc_BEB5:
    set_flags_tst16(MEM16[0xF9C6]); /* BEB5; TST.W @H'F9C6; refs ram_F9C6; cycles=6 */
    if (!Z) goto loc_BEE8; /* BEB9; BNE loc_BEE8; cycles=3/8 nt/t */
    set_flags_tst8(MEM8[0xF9C8]); /* BEBB; TST.B @H'F9C8; refs ram_F9C8; cycles=6 */
    if (Z) goto loc_BEE4; /* BEBF; BEQ loc_BEE4; cycles=3/8 nt/t */
    MEM8[0xF9C8] += (uint8_t)(-1); /* BEC1; ADD:Q.B #-1, @H'F9C8; refs ram_F9C8; cycles=8 */
    MEM16[0xF9C6] = (uint16_t)(0x01F4); /* BEC5; MOV:G.W #H'01F4, @H'F9C6; refs ram_F9C6; cycles=9 */
    set_flags_btst(MEM8[0xFAA3], 7); /* BECB; BTST.B #7, @H'FAA3; refs ram_FAA3; cycles=6 */
    if (Z) goto loc_BEE8; /* BECF; BEQ loc_BEE8; cycles=3/8 nt/t */
    MEM8[0xF9C3] = 0; /* BED1; CLR.B @H'F9C3; refs ram_F9C3; cycles=8 */
    loc_BA26(); /* BED5; BSR loc_BA26; cycles=14 */
    goto loc_BEE8; /* BED8; BRA loc_BEE8; cycles=7 */
loc_BEE4:
    MEM8[0xF9C5] = 0; /* BEE4; CLR.B @H'F9C5; refs ram_F9C5; cycles=9 */
loc_BEE8:
    return; /* BEE8; RTS; cycles=12 */
}

void vec_frt1_ocia_BEEA(void)
{
    /* vector sources: frt1_ocia */
    FRT1_TCSR &= ~BIT(5); /* BEEA; BCLR.B #5, @FRT1_TCSR; clear OCFA (bit 5) of FRT1_TCSR; candidate/evidence-supported RAM role post_tx_report_delay at H'F9C0; evidence: candidate periodic tick ISR at H'BEEA for FRT1 OCIA vector H'0062 clears OCFA; confidence candidate/evidence-supported; candidate/evidence-supported RAM role secondary_tx_report_delay at H'F9C1; evidence: candidate periodic tick ISR at H'BEEA for FRT1 OCIA vector H'0062 clears OCFA; confidence candidate/evidence-supported; candidate/evidence-supported RAM role periodic_report_countdown at H'F9C6; evidence: candidate periodic tick ISR at H'BEEA for FRT1 OCIA vector H'0062 clears OCFA; confidence candidate/evidence-supported; refs FRT1_TCSR; cycles=9 */
    set_flags_tst8(MEM8[0xF9C0]); /* BEEE; TST.B @H'F9C0; candidate/evidence-supported RAM role post_tx_report_delay at H'F9C0; evidence: candidate post-TX/report delay timer is decremented by the FRT1 OCIA periodic tick ISR; confidence candidate/evidence-supported; refs ram_F9C0; cycles=7 */
    if (!Z) { /* BEF2; BEQ loc_BEF8; cycles=3/7 nt/t */
        MEM8[0xF9C0] += (uint8_t)(-1); /* BEF4; ADD:Q.B #-1, @H'F9C0; candidate/evidence-supported RAM role post_tx_report_delay at H'F9C0; evidence: candidate post-TX/report delay timer is decremented by the FRT1 OCIA periodic tick ISR; confidence candidate/evidence-supported; refs ram_F9C0; cycles=9 */
    }
    set_flags_tst8(MEM8[0xF9C1]); /* BEF8; TST.B @H'F9C1; candidate/evidence-supported RAM role secondary_tx_report_delay at H'F9C1; evidence: candidate secondary TX/report delay timer is decremented by the FRT1 OCIA periodic tick ISR; confidence candidate/evidence-supported; refs ram_F9C1; cycles=7 */
    if (!Z) { /* BEFC; BEQ loc_BF02; cycles=3/7 nt/t */
        MEM8[0xF9C1] += (uint8_t)(-1); /* BEFE; ADD:Q.B #-1, @H'F9C1; candidate/evidence-supported RAM role secondary_tx_report_delay at H'F9C1; evidence: candidate secondary TX/report delay timer is decremented by the FRT1 OCIA periodic tick ISR; confidence candidate/evidence-supported; refs ram_F9C1; cycles=9 */
    }
    set_flags_tst16(MEM16[0xF9C6]); /* BF02; TST.W @H'F9C6; candidate/evidence-supported RAM role periodic_report_countdown at H'F9C6; evidence: candidate periodic report countdown is decremented by the FRT1 OCIA periodic tick ISR; confidence candidate/evidence-supported; refs ram_F9C6; cycles=7 */
    if (!Z) { /* BF06; BEQ loc_BF0C; cycles=3/7 nt/t */
        MEM16[0xF9C6] += (uint16_t)(-1); /* BF08; ADD:Q.W #-1, @H'F9C6; candidate/evidence-supported RAM role periodic_report_countdown at H'F9C6; evidence: candidate periodic report countdown is decremented by the FRT1 OCIA periodic tick ISR; confidence candidate/evidence-supported; refs ram_F9C6; cycles=9 */
    }
    set_flags_btst(MEM8[0xF6F6], 7); /* BF0C; BTST.B #7, @H'F6F6; refs ram_F6F6; cycles=7 */
    if (Z) goto loc_BF22; /* BF10; BEQ loc_BF22; cycles=3/7 nt/t */
    set_flags_tst16(MEM16[0xF6F4]); /* BF12; TST.W @H'F6F4; refs ram_F6F4; cycles=7 */
    if (!Z) goto loc_BF1E; /* BF16; BNE loc_BF1E; cycles=3/7 nt/t */
    MEM8[0xF6F6] |= BIT(5); /* BF18; BSET.B #5, @H'F6F6; refs ram_F6F6; cycles=9 */
    goto loc_BF22; /* BF1C; BRA loc_BF22; cycles=7 */
loc_BF1E:
    MEM16[0xF6F4] += (uint16_t)(-1); /* BF1E; ADD:Q.W #-1, @H'F6F4; refs ram_F6F4; cycles=9 */
loc_BF22:
    return_from_interrupt(); /* BF22; RTE; cycles=13 */
}

void vec_frt2_ocia_BF23(void)
{
    /* vector sources: frt2_ocia */
    FRT2_TCSR &= ~BIT(5); /* BF23; BCLR.B #5, @FRT2_TCSR; clear OCFA (bit 5) of FRT2_TCSR; refs FRT2_TCSR; cycles=8 */
    set_flags_tst8(MEM8[0xF9C4]); /* BF27; TST.B @H'F9C4; refs ram_F9C4; cycles=6 */
    if (!Z) { /* BF2B; BEQ loc_BF31; cycles=3/8 nt/t */
        MEM8[0xF9C4] += (uint8_t)(-1); /* BF2D; ADD:Q.B #-1, @H'F9C4; refs ram_F9C4; cycles=8 */
    }
    set_flags_tst8(MEM8[0xF9C5]); /* BF31; TST.B @H'F9C5; refs ram_F9C5; cycles=6 */
    if (!Z) { /* BF35; BEQ loc_BF3B; cycles=3/8 nt/t */
        MEM8[0xF9C5] += (uint8_t)(-1); /* BF37; ADD:Q.B #-1, @H'F9C5; refs ram_F9C5; cycles=8 */
    }
    set_flags_tst8(MEM8[0xF724]); /* BF3B; TST.B @H'F724; refs ram_F724; cycles=6 */
    if (Z) goto loc_BF47; /* BF3F; BEQ loc_BF47; cycles=3/8 nt/t */
    MEM8[0xF724] += (uint8_t)(-1); /* BF41; ADD:Q.B #-1, @H'F724; refs ram_F724; cycles=8 */
    goto loc_BF50; /* BF45; BRA loc_BF50; cycles=8 */
loc_BF47:
    MEM8[0xF724] = (uint8_t)(0x03); /* BF47; MOV:G.B #H'03, @H'F724; refs ram_F724; cycles=9 */
    MEM8[0xF723] = ~MEM8[0xF723]; /* BF4C; NOT.B @H'F723; refs ram_F723; cycles=9 */
loc_BF50:
    set_flags_btst(MEM8[0xFB03], 7); /* BF50; BTST.B #7, @H'FB03; refs ram_FB03; cycles=7 */
    if (Z) goto loc_BF6D; /* BF54; BEQ loc_BF6D; cycles=3/7 nt/t */
    set_flags_tst8(MEM8[0xFB02]); /* BF56; TST.B @H'FB02; refs ram_FB02; cycles=7 */
    if (Z) goto loc_BF62; /* BF5A; BEQ loc_BF62; cycles=3/7 nt/t */
    MEM8[0xFB02] += (uint8_t)(-1); /* BF5C; ADD:Q.B #-1, @H'FB02; refs ram_FB02; cycles=9 */
    goto loc_BF6D; /* BF60; BRA loc_BF6D; cycles=7 */
loc_BF62:
    MEM8[0xFB03] &= ~BIT(7); /* BF62; BCLR.B #7, @H'FB03; refs ram_FB03; cycles=9 */
    push_registers(R0, R1, R2, R3, R4, R5); /* BF66; STM.W {R0,R1,R2,R3,R4,R5}, @-SP; cycles=24 */
    loc_48EF(); /* BF68; BSR loc_48EF; cycles=13 */
    pop_registers(R0, R1, R2, R3, R4, R5); /* BF6B; LDM.W @SP+, {R0,R1,R2,R3,R4,R5}; cycles=30 */
loc_BF6D:
    set_flags_tst8(MEM8[0xF76C]); /* BF6D; TST.B @H'F76C; refs ram_F76C; cycles=6 */
    if (!Z) { /* BF71; BEQ loc_BF77; cycles=3/8 nt/t */
        MEM8[0xF76C] += (uint8_t)(-1); /* BF73; ADD:Q.B #-1, @H'F76C; refs ram_F76C; cycles=8 */
    }
    set_flags_tst8(MEM8[0xF840]); /* BF77; TST.B @H'F840; refs ram_F840; cycles=6 */
    if (!Z) { /* BF7B; BEQ loc_BF81; cycles=3/8 nt/t */
        MEM8[0xF840] += (uint8_t)(-1); /* BF7D; ADD:Q.B #-1, @H'F840; refs ram_F840; cycles=8 */
    }
    set_flags_tst8(MEM8[0xF726]); /* BF81; TST.B @H'F726; refs ram_F726; cycles=6 */
    if (Z) goto loc_BFA3; /* BF85; BEQ loc_BFA3; cycles=3/8 nt/t */
    MEM8[0xF726] += (uint8_t)(-1); /* BF87; ADD:Q.B #-1, @H'F726; refs ram_F726; cycles=8 */
    if (!Z) goto loc_BFA3; /* BF8B; BNE loc_BFA3; cycles=3/8 nt/t */
    MEM8[0xF713] &= ~BIT(6); /* BF8D; BCLR.B #6, @H'F713; refs ram_F713; cycles=8 */
    if (!Z) goto loc_BFA3; /* BF91; BNE loc_BFA3; cycles=3/8 nt/t */
    MEM8[0xF711] &= ~BIT(7); /* BF93; BCLR.B #7, @H'F711; refs ram_F711; cycles=8 */
    MEM8[0xF711] &= ~BIT(6); /* BF97; BCLR.B #6, @H'F711; refs ram_F711; cycles=8 */
    MEM8[0xF711] &= ~BIT(5); /* BF9B; BCLR.B #5, @H'F711; refs ram_F711; cycles=8 */
    MEM8[0xF711] &= ~BIT(4); /* BF9F; BCLR.B #4, @H'F711; refs ram_F711; cycles=8 */
loc_BFA3:
    set_flags_tst8(MEM8[0xF797]); /* BFA3; TST.B @H'F797; refs ram_F797; cycles=6 */
    if (Z) goto loc_BFB3; /* BFA7; BEQ loc_BFB3; cycles=3/8 nt/t */
    MEM8[0xF797] += (uint8_t)(-1); /* BFA9; ADD:Q.B #-1, @H'F797; refs ram_F797; cycles=8 */
    if (!Z) goto loc_BFB3; /* BFAD; BNE loc_BFB3; cycles=3/8 nt/t */
    MEM8[0xF731] &= ~BIT(7); /* BFAF; BCLR.B #7, @H'F731; refs ram_F731; cycles=8 */
loc_BFB3:
    set_flags_tst8(MEM8[0xF798]); /* BFB3; TST.B @H'F798; refs ram_F798; cycles=6 */
    if (Z) goto loc_BFC3; /* BFB7; BEQ loc_BFC3; cycles=3/8 nt/t */
    MEM8[0xF798] += (uint8_t)(-1); /* BFB9; ADD:Q.B #-1, @H'F798; refs ram_F798; cycles=8 */
    if (!Z) goto loc_BFC3; /* BFBD; BNE loc_BFC3; cycles=3/8 nt/t */
    MEM8[0xF731] &= ~BIT(7); /* BFBF; BCLR.B #7, @H'F731; refs ram_F731; cycles=8 */
loc_BFC3:
    return_from_interrupt(); /* BFC3; RTE; cycles=14 */
}

void vec_interval_timer_BFC4(void)
{
    /* vector sources: interval_timer */
    set_flags_btst(WDT_TCSR_R, 7); /* BFC4; BTST.B #7, @WDT_TCSR_R; refs WDT_TCSR_R; cycles=7 */
    WDT_TCSR_R = (uint16_t)(0xA53F); /* BFC8; MOV:G.W #H'A53F, @WDT_TCSR_R; WDT_TCSR_R = H'A53F (OVF=0 WT/IT=0 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, interval IRQ0, clock phi/4096); refs WDT_TCSR_R; cycles=11 */
    MEM8[0xF794] += (uint8_t)(1); /* BFCE; ADD:Q.B #1, @H'F794; refs ram_F794; cycles=9 */
    set_flags_cmp8(MEM8[0xF794], 0x0A); /* BFD2; CMP:G.B #H'0A, @H'F794; refs ram_F794; cycles=7 */
    if (Z) { /* BFD7; BNE loc_BFDF; cycles=3/8 nt/t */
        WDT_TCSR_R = (uint16_t)(0xA57F); /* BFD9; MOV:G.W #H'A57F, @WDT_TCSR_R; WDT_TCSR_R = H'A57F (OVF=0 WT/IT=1 TME=1 CKS2=1 CKS1=1 CKS0=1; TCSR password H'A5, WDT enabled, watchdog NMI, clock phi/4096); refs WDT_TCSR_R; cycles=9 */
    }
    return_from_interrupt(); /* BFDF; RTE; cycles=14 */
}

void loc_BFE0(void)
{
    MEM8[0xF840] = (uint8_t)(0x0A); /* BFE0; MOV:G.B #H'0A, @H'F840; refs ram_F840; cycles=9 */
loc_BFE5:
    R2 = (uint16_t)(R5); /* BFE5; MOV:G.W R5, R2; cycles=3 */
    loc_C010(); /* BFE7; BSR loc_C010; cycles=14 */
    loc_C039(); /* BFE9; BSR loc_C039; cycles=14 */
    set_flags_cmp16(R5, R2); /* BFEB; CMP:G.W R2, R5; cycles=3 */
    if (Z) goto loc_BFFD; /* BFED; BEQ loc_BFFD; cycles=3/8 nt/t */
    set_flags_tst8(MEM8[0xF840]); /* BFEF; TST.B @H'F840; refs ram_F840; cycles=6 */
    if (Z) goto loc_BFF9; /* BFF3; BEQ loc_BFF9; cycles=3/8 nt/t */
    R5 = (uint16_t)(R2); /* BFF5; MOV:G.W R2, R5; cycles=3 */
    goto loc_BFE5; /* BFF7; BRA loc_BFE5; cycles=8 */
loc_BFF9:
    MEM8[0xF841] |= BIT(7); /* BFF9; BSET.B #7, @H'F841; refs ram_F841; cycles=8 */
loc_BFFD:
    return; /* BFFD; RTS; cycles=13 */
}

void loc_BFFE(void)
{
    MEM8[0xF840] = (uint8_t)(0x0A); /* BFFE; MOV:G.B #H'0A, @H'F840; refs ram_F840; cycles=9 */
    loc_C039(); /* C003; BSR loc_C039; cycles=14 */
    set_flags_tst8(MEM8[0xF840]); /* C005; TST.B @H'F840; refs ram_F840; cycles=6 */
    if (Z) { /* C009; BNE loc_C00F; cycles=3/8 nt/t */
        MEM8[0xF841] |= BIT(6); /* C00B; BSET.B #6, @H'F841; refs ram_F841; cycles=8 */
    }
    return; /* C00F; RTS; cycles=13 */
}

void loc_C010(void)
{
    loc_C06A(); /* C010; BSR loc_C06A; cycles=13 */
loc_C012:
    set_flags_tst8(MEM8[0xF840]); /* C012; TST.B @H'F840; refs ram_F840; cycles=7 */
    if (Z) goto loc_C038; /* C016; BEQ loc_C038; cycles=3/7 nt/t */
    loc_C121(); /* C018; BSR loc_C121; cycles=13 */
    R0 = (uint8_t)(R3); /* C01B; MOV:G.B R3, R0; cycles=2 */
    loc_C08B(); /* C01D; BSR loc_C08B; cycles=14 */
    if (Z) goto loc_C012; /* C01F; BEQ loc_C012; cycles=3/8 nt/t */
    R0 = (uint8_t)(R4); /* C021; MOV:G.B R4, R0; cycles=2 */
    loc_C08B(); /* C023; BSR loc_C08B; cycles=14 */
    if (Z) goto loc_C012; /* C025; BEQ loc_C012; cycles=3/8 nt/t */
    R0 = (uint16_t)(R5); /* C027; MOV:G.W R5, R0; cycles=3 */
    R0 = swap_bytes(R0); /* C029; SWAP.B R0; cycles=3 */
    loc_C08B(); /* C02B; BSR loc_C08B; cycles=14 */
    if (Z) goto loc_C012; /* C02D; BEQ loc_C012; cycles=3/8 nt/t */
    R0 = (uint8_t)(R5); /* C02F; MOV:G.B R5, R0; cycles=2 */
    loc_C08B(); /* C031; BSR loc_C08B; cycles=14 */
    if (Z) goto loc_C012; /* C033; BEQ loc_C012; cycles=3/8 nt/t */
    loc_C142(); /* C035; BSR loc_C142; cycles=14 */
loc_C038:
    return; /* C038; RTS; cycles=12 */
}

void loc_C039(void)
{
    loc_C06A(); /* C039; BSR loc_C06A; cycles=14 */
loc_C03B:
    set_flags_tst8(MEM8[0xF840]); /* C03B; TST.B @H'F840; refs ram_F840; cycles=6 */
    if (Z) goto loc_C069; /* C03F; BEQ loc_C069; cycles=3/8 nt/t */
    loc_C121(); /* C041; BSR loc_C121; cycles=14 */
    R0 = (uint8_t)(R3); /* C044; MOV:G.B R3, R0; cycles=2 */
    loc_C08B(); /* C046; BSR loc_C08B; cycles=13 */
    if (Z) goto loc_C03B; /* C048; BEQ loc_C03B; cycles=3/7 nt/t */
    R0 = (uint8_t)(R4); /* C04A; MOV:G.B R4, R0; cycles=2 */
    loc_C08B(); /* C04C; BSR loc_C08B; cycles=13 */
    if (Z) goto loc_C03B; /* C04E; BEQ loc_C03B; cycles=3/7 nt/t */
    loc_C121(); /* C050; BSR loc_C121; cycles=13 */
    R0 = (uint8_t)(R3); /* C053; MOV:G.B R3, R0; cycles=2 */
    R0 |= BIT(0); /* C055; BSET.B #0, R0; cycles=2 */
    loc_C08B(); /* C057; BSR loc_C08B; cycles=14 */
    if (Z) goto loc_C03B; /* C059; BEQ loc_C03B; cycles=3/8 nt/t */
    loc_C0DB(); /* C05B; BSR loc_C0DB; cycles=14 */
    R5 = swap_bytes(R5); /* C05E; SWAP.B R5; cycles=3 */
    loc_C10C(); /* C060; BSR loc_C10C; cycles=13 */
    loc_C0DB(); /* C063; BSR loc_C0DB; cycles=14 */
    loc_C142(); /* C066; BSR loc_C142; cycles=13 */
loc_C069:
    return; /* C069; RTS; cycles=13 */
}

void loc_C06A(void)
{
    R4 &= (uint16_t)(0x0FFF); /* C06A; AND.W #H'0FFF, R4; cycles=4 */
    set_flags_cmp16(R4, 0x0800); /* C06E; CMP:I #H'0800, R4; cycles=3 */
    if (!C) goto loc_C07E; /* C071; BCC loc_C07E; cycles=3/8 nt/t */
    R3 = (uint16_t)(R4); /* C073; MOV:G.W R4, R3; cycles=3 */
    R3 = swap_bytes(R3); /* C075; SWAP.B R3; cycles=3 */
    R3 <<= 1; /* C077; SHLL.B R3; cycles=2 */
    R3 |= (uint8_t)(0xA0); /* C079; OR.B #H'A0, R3; cycles=3 */
    goto loc_C08A; /* C07C; BRA loc_C08A; cycles=7 */
loc_C07E:
    R3 = (uint16_t)(R4); /* C07E; MOV:G.W R4, R3; cycles=3 */
    R3 = swap_bytes(R3); /* C080; SWAP.B R3; cycles=3 */
    R3 <<= 1; /* C082; SHLL.B R3; cycles=2 */
    R3 &= (uint8_t)(0x0E); /* C084; AND.B #H'0E, R3; cycles=3 */
    R3 |= (uint8_t)(0xE0); /* C087; OR.B #H'E0, R3; cycles=3 */
loc_C08A:
    return; /* C08A; RTS; cycles=12 */
}

void loc_C08B(void)
{
    R1 = (uint16_t)(0x0007); /* C08B; MOV:I.W #H'0007, R1; dataflow R1=0x0007; cycles=3 */
loc_C08E:
    R0 <<= 1; /* C08E; SHLL.B R0; cycles=2 */
    if (!C) goto loc_C098; /* C090; BCC loc_C098; cycles=3/7 nt/t */
    P9DR |= BIT(7); /* C092; BSET.B #7, @P9DR; set bit 7 of P9DR; refs P9DR; cycles=9 */
    goto loc_C09C; /* C096; BRA loc_C09C; cycles=7 */
loc_C098:
    P9DR &= ~BIT(7); /* C098; BCLR.B #7, @P9DR; clear bit 7 of P9DR; refs P9DR; cycles=9 */
loc_C09C:
    P9DR |= BIT(1); /* C09C; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
    P9DR |= BIT(1); /* C0A0; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
    P9DR |= BIT(1); /* C0A4; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
    P9DR &= ~BIT(1); /* C0A8; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=9 */
    if (scb_f(R1)) goto loc_C08E; /* C0AC; SCB/F R1, loc_C08E; cycles=? */
    P9DDR = (uint8_t)(0x13); /* C0AF; MOV:G.B #H'13, @P9DDR; P9DDR = H'13; refs P9DDR; cycles=9 */
    P9DR |= BIT(1); /* C0B4; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
    P9DR |= BIT(1); /* C0B8; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
    set_flags_btst(P9DR, 7); /* C0BC; BTST.B #7, @P9DR; refs P9DR; cycles=7 */
    if (Z) goto loc_C0CF; /* C0C0; BEQ loc_C0CF; cycles=3/7 nt/t */
    P9DR &= ~BIT(1); /* C0C2; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=9 */
    P9DDR = (uint8_t)(0x93); /* C0C6; MOV:G.B #H'93, @P9DDR; P9DDR = H'93; refs P9DDR; cycles=9 */
    R0 = (uint8_t)(0x00); /* C0CB; MOV:E.B #H'00, R0; dataflow R0=0x00; cycles=2 */
    goto loc_C0DA; /* C0CD; BRA loc_C0DA; cycles=8 */
loc_C0CF:
    P9DR &= ~BIT(1); /* C0CF; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=8 */
    P9DDR = (uint8_t)(0x93); /* C0D3; MOV:G.B #H'93, @P9DDR; P9DDR = H'93; refs P9DDR; cycles=9 */
    R0 = (uint8_t)(0x01); /* C0D8; MOV:E.B #H'01, R0; dataflow R0=0x01; cycles=2 */
loc_C0DA:
    return; /* C0DA; RTS; cycles=12 */
}

void loc_C0DB(void)
{
    P9DDR = (uint8_t)(0x13); /* C0DB; MOV:G.B #H'13, @P9DDR; P9DDR = H'13; refs P9DDR; cycles=9 */
    R1 = (uint16_t)(0x0007); /* C0E0; MOV:I.W #H'0007, R1; dataflow R1=0x0007; cycles=3 */
loc_C0E3:
    P9DR |= BIT(1); /* C0E3; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=8 */
    P9DR |= BIT(1); /* C0E7; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=8 */
    set_flags_btst(P9DR, 7); /* C0EB; BTST.B #7, @P9DR; refs P9DR; cycles=6 */
    if (Z) goto loc_C0F5; /* C0EF; BEQ loc_C0F5; cycles=3/8 nt/t */
    R5 |= BIT(R1); /* C0F1; BSET.B R1, R5; cycles=2 */
    goto loc_C0F7; /* C0F3; BRA loc_C0F7; cycles=8 */
loc_C0F5:
    R5 &= ~BIT(R1); /* C0F5; BCLR.B R1, R5; cycles=2 */
loc_C0F7:
    P9DR &= ~BIT(1); /* C0F7; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=8 */
    P9DR &= ~BIT(1); /* C0FB; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=8 */
    P9DR &= ~BIT(1); /* C0FF; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=8 */
    if (scb_f(R1)) goto loc_C0E3; /* C103; SCB/F R1, loc_C0E3; cycles=? */
    P9DDR = (uint8_t)(0x93); /* C106; MOV:G.B #H'93, @P9DDR; P9DDR = H'93; refs P9DDR; cycles=9 */
    return; /* C10B; RTS; cycles=13 */
}

void loc_C10C(void)
{
    P9DR &= ~BIT(7); /* C10C; BCLR.B #7, @P9DR; clear bit 7 of P9DR; refs P9DR; cycles=9 */
    P9DR |= BIT(1); /* C110; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
    P9DR |= BIT(1); /* C114; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
    P9DR |= BIT(1); /* C118; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
    P9DR &= ~BIT(1); /* C11C; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=9 */
    return; /* C120; RTS; cycles=12 */
}

void loc_C121(void)
{
    P9DR |= BIT(7); /* C121; BSET.B #7, @P9DR; set bit 7 of P9DR; refs P9DR; cycles=8 */
    P9DR |= BIT(1); /* C125; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=8 */
    P9DR |= BIT(1); /* C129; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=8 */
    P9DR |= BIT(1); /* C12D; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=8 */
    P9DR &= ~BIT(7); /* C131; BCLR.B #7, @P9DR; clear bit 7 of P9DR; refs P9DR; cycles=8 */
    P9DR |= BIT(1); /* C135; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=8 */
    P9DR |= BIT(1); /* C139; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=8 */
    P9DR &= ~BIT(1); /* C13D; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=8 */
    return; /* C141; RTS; cycles=13 */
}

void loc_C142(void)
{
    P9DR &= ~BIT(7); /* C142; BCLR.B #7, @P9DR; clear bit 7 of P9DR; refs P9DR; cycles=9 */
    P9DR |= BIT(1); /* C146; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
    P9DR |= BIT(1); /* C14A; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
    P9DR |= BIT(1); /* C14E; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
    P9DR |= BIT(7); /* C152; BSET.B #7, @P9DR; set bit 7 of P9DR; refs P9DR; cycles=9 */
    P9DR |= BIT(1); /* C156; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
    P9DR |= BIT(1); /* C15A; BSET.B #1, @P9DR; set bit 1 of P9DR; refs P9DR; cycles=9 */
    P9DR &= ~BIT(1); /* C15E; BCLR.B #1, @P9DR; clear bit 1 of P9DR; refs P9DR; cycles=9 */
    return; /* C162; RTS; cycles=12 */
}

void unreached_or_unowned_code(void)
{
loc_1865:
    set_flags_cmp8(MEM8[0xF731], 0x02); /* 1865; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
    if (!C && !Z) goto loc_1888; /* 186A; BHI loc_1888; cycles=3/7 nt/t */
    R4 = (uint16_t)(MEM16[0xF6AA]); /* 186C; MOV:G.W @H'F6AA, R4; refs ram_F6AA; cycles=7 */
    R4 -= (uint16_t)(MEM16[0xF6CA]); /* 1870; SUB.W @H'F6CA, R4; refs ram_F6CA; cycles=7 */
    R3 = (uint16_t)(0x00D8); /* 1874; MOV:I.W #H'00D8, R3; dataflow R3=0x00D8; cycles=3 */
    set_flags_btst(MEM8[0xF791], 7); /* 1877; BTST.B #7, @H'F791; refs ram_F791; cycles=6 */
    if (Z) goto loc_1885; /* 187B; BEQ loc_1885; cycles=3/8 nt/t */
    set_flags_btst(MEM8[0xF404], 1); /* 187D; BTST.B #1, @H'F404; refs mem_F404; cycles=6 */
    if (Z) goto loc_1885; /* 1881; BEQ loc_1885; cycles=3/8 nt/t */
    R3 |= BIT(14); /* 1883; BSET.W #14, R3; cycles=3 */
loc_1885:
    loc_19A2(); /* 1885; BSR loc_19A2; cycles=14 */
loc_1888:
    R4 = (uint16_t)(MEM16[0xF6AA]); /* 1888; MOV:G.W @H'F6AA, R4; refs ram_F6AA; cycles=7 */
    MEM16[0xF6CA] = (uint16_t)(R4); /* 188C; MOV:G.W R4, @H'F6CA; refs ram_F6CA; cycles=7 */
    return; /* 1890; RTS; cycles=12 */
loc_18BB:
    set_flags_cmp8(MEM8[0xF731], 0x02); /* 18BB; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
    if (!C && !Z) goto loc_18DE; /* 18C0; BHI loc_18DE; cycles=3/7 nt/t */
    R4 = (uint16_t)(MEM16[0xF6A8]); /* 18C2; MOV:G.W @H'F6A8, R4; refs ram_F6A8; cycles=7 */
    R4 -= (uint16_t)(MEM16[0xF6C8]); /* 18C6; SUB.W @H'F6C8, R4; refs ram_F6C8; cycles=7 */
    R3 = (uint16_t)(0x00D9); /* 18CA; MOV:I.W #H'00D9, R3; dataflow R3=0x00D9; cycles=3 */
    set_flags_btst(MEM8[0xF791], 7); /* 18CD; BTST.B #7, @H'F791; refs ram_F791; cycles=6 */
    if (Z) goto loc_18DB; /* 18D1; BEQ loc_18DB; cycles=3/8 nt/t */
    set_flags_btst(MEM8[0xF404], 1); /* 18D3; BTST.B #1, @H'F404; refs mem_F404; cycles=6 */
    if (Z) goto loc_18DB; /* 18D7; BEQ loc_18DB; cycles=3/8 nt/t */
    R3 |= BIT(14); /* 18D9; BSET.W #14, R3; cycles=3 */
loc_18DB:
    loc_19A2(); /* 18DB; BSR loc_19A2; cycles=14 */
loc_18DE:
    R4 = (uint16_t)(MEM16[0xF6A8]); /* 18DE; MOV:G.W @H'F6A8, R4; refs ram_F6A8; cycles=7 */
    MEM16[0xF6C8] = (uint16_t)(R4); /* 18E2; MOV:G.W R4, @H'F6C8; refs ram_F6C8; cycles=7 */
    return; /* 18E6; RTS; cycles=12 */
loc_191F:
    set_flags_cmp8(MEM8[0xF731], 0x02); /* 191F; CMP:G.B #H'02, @H'F731; refs ram_F731; cycles=6 */
    if (!C && !Z) goto loc_1941; /* 1924; BHI loc_1941; cycles=3/7 nt/t */
    R4 = (uint16_t)(MEM16[0xF6A6]); /* 1926; MOV:G.W @H'F6A6, R4; refs ram_F6A6; cycles=7 */
    R4 -= (uint16_t)(MEM16[0xF6C6]); /* 192A; SUB.W @H'F6C6, R4; refs ram_F6C6; cycles=7 */
    R3 = (uint16_t)(0x00DA); /* 192E; MOV:I.W #H'00DA, R3; dataflow R3=0x00DA; cycles=3 */
    set_flags_btst(MEM8[0xF791], 7); /* 1931; BTST.B #7, @H'F791; refs ram_F791; cycles=6 */
    if (Z) goto loc_193F; /* 1935; BEQ loc_193F; cycles=3/8 nt/t */
    set_flags_btst(MEM8[0xF404], 1); /* 1937; BTST.B #1, @H'F404; refs mem_F404; cycles=6 */
    if (Z) goto loc_193F; /* 193B; BEQ loc_193F; cycles=3/8 nt/t */
    R3 |= BIT(14); /* 193D; BSET.W #14, R3; cycles=3 */
loc_193F:
    loc_19A2(); /* 193F; BSR loc_19A2; cycles=14 */
loc_1941:
    R4 = (uint16_t)(MEM16[0xF6A6]); /* 1941; MOV:G.W @H'F6A6, R4; refs ram_F6A6; cycles=6 */
    MEM16[0xF6C6] = (uint16_t)(R4); /* 1945; MOV:G.W R4, @H'F6C6; refs ram_F6C6; cycles=6 */
    return; /* 1949; RTS; cycles=13 */
loc_1A7D:
    R0 |= BIT(15); /* 1A7D; BSET.W #15, R0; cycles=3 */
loc_1A7F:
    R1 = (uint16_t)(R0); /* 1A7F; MOV:G.W R0, R1; cycles=3 */
    R1 &= (uint16_t)(MEM16[R3 - 0x1C00]); /* 1A81; AND.W @(-H'1C00,R3), R1; cycles=6 */
    if (!Z) goto loc_1A8B; /* 1A85; BNE loc_1A8B; cycles=3/8 nt/t */
    R0 >>= 1; /* 1A87; SHLR.W R0; cycles=3 */
    goto loc_1A7F; /* 1A89; BRA loc_1A7F; cycles=8 */
loc_1A8B:
    goto loc_1A45; /* 1A8B; BRA loc_1A45; cycles=8 */
loc_2CAB:
    push_registers(R0, R4, R5); /* 2CAB; STM.W {R0,R4,R5}, @-SP; cycles=15 */
    loc_48FA(); /* 2CAD; BSR loc_48FA; cycles=14 */
    pop_registers(R0, R4, R5); /* 2CB0; LDM.W @SP+, {R0,R4,R5}; cycles=18 */
    MEM8[0xF769] |= BIT(7); /* 2CB2; BSET.B #7, @H'F769; refs ram_F769; cycles=9 */
    goto loc_289F; /* 2CB6; BRA loc_289F; cycles=7 */
loc_397C:
    loc_3995(); /* 397C; BSR loc_3995; cycles=13 */
    return; /* 397E; RTS; cycles=12 */
loc_397F:
    loc_3A2E(); /* 397F; BSR loc_3A2E; cycles=14 */
    return; /* 3982; RTS; cycles=12 */
loc_3983:
    loc_398A(); /* 3983; BSR loc_398A; cycles=14 */
    MEM8[0xF722] = 0; /* 3985; CLR.B @H'F722; refs ram_F722; cycles=8 */
    return; /* 3989; RTS; cycles=13 */
loc_3F76:
    R0 = (uint16_t)(0x2710); /* 3F76; MOV:I.W #H'2710, R0; dataflow R0=0x2710; cycles=3 */
    R1 = (uint16_t)(0xC350); /* 3F79; MOV:I.W #H'C350, R1; dataflow R1=0xC350; cycles=3 */
loc_3F7C:
    P1DR &= ~BIT(7); /* 3F7C; BCLR.B #7, @P1DR; clear bit 7 of P1DR; refs P1DR; cycles=9 */
    if (scb_f(R0)) goto loc_3F7C; /* 3F80; SCB/F R0, loc_3F7C; cycles=? */
loc_3F83:
    P1DR |= BIT(7); /* 3F83; BSET.B #7, @P1DR; set bit 7 of P1DR; refs P1DR; cycles=8 */
    if (scb_f(R1)) goto loc_3F83; /* 3F87; SCB/F R1, loc_3F83; cycles=? */
    R0 = 0; /* 3F8A; CLR.W R0; dataflow R0=0x0000; cycles=3 */
    do {
        MEM16[R0 - 0x2000] = 0; /* 3F8C; CLR.W @(-H'2000,R0); cycles=9 */
        MEM16[R0 - 0x1800] = 0; /* 3F90; CLR.W @(-H'1800,R0); cycles=9 */
        MEM16[R0 - 0x0980] = 0; /* 3F94; CLR.W @(-H'0980,R0); cycles=9 */
        R0 += (uint16_t)(2); /* 3F98; ADD:Q.W #2, R0; cycles=4 */
        set_flags_cmp16(R0, 0x0800); /* 3F9A; CMP:I #H'0800, R0; cycles=3 */
    } while (!Z); /* 3F9D; BNE loc_3F8C; cycles=3/8 nt/t */
    loc_430C(); /* 3F9F; BSR loc_430C; cycles=14 */
    loc_4324(); /* 3FA2; BSR loc_4324; cycles=13 */
    loc_4096(); /* 3FA5; BSR loc_4096; cycles=14 */
    loc_40BB(); /* 3FA8; BSR loc_40BB; cycles=13 */
    loc_4217(); /* 3FAB; BSR loc_4217; cycles=14 */
    loc_434C(); /* 3FAE; BSR loc_434C; cycles=13 */
loc_3FB1:
    WDT_TCSR_R = (uint16_t)(0x5A00); /* 3FB1; MOV:G.W #H'5A00, @WDT_TCSR_R; WDT_TCSR_R = H'5A00 (OVF=0 WT/IT=0 TME=0 CKS2=0 CKS1=0 CKS0=0; TCNT password H'5A, counter write H'00); refs WDT_TCSR_R; cycles=9 */
    MEM8[0xF794] = 0; /* 3FB7; CLR.B @H'F794; refs ram_F794; cycles=8 */
    loc_3FD3(); /* 3FBB; BSR loc_3FD3; cycles=14 */
    loc_BBAB(); /* 3FBD; BSR loc_BBAB; cycles=14 */
    loc_3FEF(); /* 3FC0; BSR loc_3FEF; cycles=13 */
    loc_4046(); /* 3FC2; BSR loc_4046; cycles=13 */
    loc_BE9E(); /* 3FC5; BSR loc_BE9E; cycles=14 */
    loc_2806(); /* 3FC8; BSR loc_2806; cycles=13 */
    loc_3930(); /* 3FCB; BSR loc_3930; cycles=14 */
    loc_15E0(); /* 3FCE; BSR loc_15E0; cycles=13 */
    goto loc_3FB1; /* 3FD1; BRA loc_3FB1; cycles=8 */
loc_4059:
    R2 = (uint8_t)(MEM8[0xF9B0]); /* 4059; MOV:G.B @H'F9B0, R2; refs ram_F9B0; cycles=6 */
    R2 = zero_extend8(R2); /* 405D; EXTU.B R2; cycles=3 */
    set_flags_cmp8(R2, MEM8[0xF9B5]); /* 405F; CMP:G.B @H'F9B5, R2; refs ram_F9B5; cycles=6 */
    if (Z) { /* 4063; BNE loc_4074; cycles=3/8 nt/t */
        R2 <<= 1; /* 4065; SHLL.B R2; cycles=2 */
        MEM16[R2 - 0x0790] = zero_extend8_to16(0x00); /* 4067; MOV:G.W #H'00, @(-H'0790,R2); byte immediate zero-extended into word destination; cycles=11 */
        MEM8[0xF9B0] += (uint8_t)(1); /* 406C; ADD:Q.B #1, @H'F9B0; refs ram_F9B0; cycles=9 */
        MEM8[0xF9B0] &= ~BIT(7); /* 4070; BCLR.B #7, @H'F9B0; refs ram_F9B0; cycles=9 */
    }
    return; /* 4074; RTS; cycles=12 */
}
